1//===-- MSP430InstrInfo.h - MSP430 Instruction Information ------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the MSP430 implementation of the TargetInstrInfo class.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_MSP430_MSP430INSTRINFO_H
14#define LLVM_LIB_TARGET_MSP430_MSP430INSTRINFO_H
15
16#include "MSP430RegisterInfo.h"
17#include "llvm/CodeGen/TargetInstrInfo.h"
18
19#define GET_INSTRINFO_HEADER
20#include "MSP430GenInstrInfo.inc"
21
22namespace llvm {
23
24class MSP430Subtarget;
25
26class MSP430InstrInfo : public MSP430GenInstrInfo {
27 const MSP430RegisterInfo RI;
28 virtual void anchor();
29public:
30 explicit MSP430InstrInfo(const MSP430Subtarget &STI);
31
32 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
33 /// such, whenever a client has an instance of instruction info, it should
34 /// always be able to get register info as well (through this method).
35 ///
36 const MSP430RegisterInfo &getRegisterInfo() const { return RI; }
37
38 const TargetRegisterClass *getInlineAsmMemoryOperandRegClass(
39 InlineAsm::ConstraintCode C) const override {
40 return &MSP430::GR16RegClass;
41 }
42
43 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
44 const DebugLoc &DL, Register DestReg, Register SrcReg,
45 bool KillSrc, bool RenamableDest = false,
46 bool RenamableSrc = false) const override;
47
48 void storeRegToStackSlot(
49 MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register SrcReg,
50 bool isKill, int FrameIndex, const TargetRegisterClass *RC, Register VReg,
51 MachineInstr::MIFlag Flags = MachineInstr::NoFlags) const override;
52 void loadRegFromStackSlot(
53 MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, Register DestReg,
54 int FrameIdx, const TargetRegisterClass *RC, Register VReg,
55 unsigned SubReg = 0,
56 MachineInstr::MIFlag Flags = MachineInstr::NoFlags) const override;
57
58 unsigned getInstSizeInBytes(const MachineInstr &MI) const override;
59
60 // Branch folding goodness
61 bool
62 reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
63 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
64 MachineBasicBlock *&FBB,
65 SmallVectorImpl<MachineOperand> &Cond,
66 bool AllowModify) const override;
67
68 unsigned removeBranch(MachineBasicBlock &MBB,
69 int *BytesRemoved = nullptr) const override;
70 unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
71 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
72 const DebugLoc &DL,
73 int *BytesAdded = nullptr) const override;
74
75 int64_t getFramePoppedByCallee(const MachineInstr &I) const {
76 assert(isFrameInstr(I) && "Not a frame instruction");
77 assert(I.getOperand(1).getImm() >= 0 && "Size must not be negative");
78 return I.getOperand(i: 1).getImm();
79 }
80};
81
82}
83
84#endif
85