| 1 | //===-- MSP430TargetMachine.cpp - Define TargetMachine for MSP430 ---------===// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // Top-level implementation for the MSP430 target. |
| 10 | // |
| 11 | //===----------------------------------------------------------------------===// |
| 12 | |
| 13 | #include "MSP430TargetMachine.h" |
| 14 | #include "MSP430.h" |
| 15 | #include "MSP430MachineFunctionInfo.h" |
| 16 | #include "TargetInfo/MSP430TargetInfo.h" |
| 17 | #include "llvm/CodeGen/Passes.h" |
| 18 | #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h" |
| 19 | #include "llvm/CodeGen/TargetPassConfig.h" |
| 20 | #include "llvm/MC/TargetRegistry.h" |
| 21 | #include "llvm/Support/Compiler.h" |
| 22 | #include <optional> |
| 23 | using namespace llvm; |
| 24 | |
| 25 | extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeMSP430Target() { |
| 26 | // Register the target. |
| 27 | RegisterTargetMachine<MSP430TargetMachine> X(getTheMSP430Target()); |
| 28 | PassRegistry &PR = *PassRegistry::getPassRegistry(); |
| 29 | initializeMSP430AsmPrinterPass(PR); |
| 30 | initializeMSP430DAGToDAGISelLegacyPass(PR); |
| 31 | } |
| 32 | |
| 33 | static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM) { |
| 34 | return RM.value_or(u: Reloc::Static); |
| 35 | } |
| 36 | |
| 37 | MSP430TargetMachine::MSP430TargetMachine(const Target &T, const Triple &TT, |
| 38 | StringRef CPU, StringRef FS, |
| 39 | const TargetOptions &Options, |
| 40 | std::optional<Reloc::Model> RM, |
| 41 | std::optional<CodeModel::Model> CM, |
| 42 | CodeGenOptLevel OL, bool JIT) |
| 43 | : CodeGenTargetMachineImpl(T, TT.computeDataLayout(), TT, CPU, FS, Options, |
| 44 | getEffectiveRelocModel(RM), |
| 45 | getEffectiveCodeModel(CM, Default: CodeModel::Small), OL), |
| 46 | TLOF(std::make_unique<TargetLoweringObjectFileELF>()), |
| 47 | Subtarget(TT, std::string(CPU), std::string(FS), *this) { |
| 48 | initAsmInfo(); |
| 49 | } |
| 50 | |
| 51 | MSP430TargetMachine::~MSP430TargetMachine() = default; |
| 52 | |
| 53 | namespace { |
| 54 | /// MSP430 Code Generator Pass Configuration Options. |
| 55 | class MSP430PassConfig : public TargetPassConfig { |
| 56 | public: |
| 57 | MSP430PassConfig(MSP430TargetMachine &TM, PassManagerBase &PM) |
| 58 | : TargetPassConfig(TM, PM) {} |
| 59 | |
| 60 | MSP430TargetMachine &getMSP430TargetMachine() const { |
| 61 | return getTM<MSP430TargetMachine>(); |
| 62 | } |
| 63 | |
| 64 | void addIRPasses() override; |
| 65 | bool addInstSelector() override; |
| 66 | void addPreEmitPass() override; |
| 67 | }; |
| 68 | } // namespace |
| 69 | |
| 70 | TargetPassConfig *MSP430TargetMachine::createPassConfig(PassManagerBase &PM) { |
| 71 | return new MSP430PassConfig(*this, PM); |
| 72 | } |
| 73 | |
| 74 | MachineFunctionInfo *MSP430TargetMachine::createMachineFunctionInfo( |
| 75 | BumpPtrAllocator &Allocator, const Function &F, |
| 76 | const TargetSubtargetInfo *STI) const { |
| 77 | return MSP430MachineFunctionInfo::create<MSP430MachineFunctionInfo>(Allocator, |
| 78 | F, STI); |
| 79 | } |
| 80 | |
| 81 | void MSP430PassConfig::addIRPasses() { |
| 82 | addPass(P: createAtomicExpandLegacyPass()); |
| 83 | |
| 84 | TargetPassConfig::addIRPasses(); |
| 85 | } |
| 86 | |
| 87 | bool MSP430PassConfig::addInstSelector() { |
| 88 | // Install an instruction selector. |
| 89 | addPass(P: createMSP430ISelDag(TM&: getMSP430TargetMachine(), OptLevel: getOptLevel())); |
| 90 | return false; |
| 91 | } |
| 92 | |
| 93 | void MSP430PassConfig::addPreEmitPass() { |
| 94 | // Must run branch selection immediately preceding the asm printer. |
| 95 | addPass(P: createMSP430BranchSelectionPass()); |
| 96 | } |
| 97 | |