1//===----------------------------------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "PPCSelectionDAGInfo.h"
10#include "llvm/CodeGen/SelectionDAG.h"
11
12#define GET_SDNODE_DESC
13#include "PPCGenSDNodeInfo.inc"
14
15using namespace llvm;
16
17PPCSelectionDAGInfo::PPCSelectionDAGInfo()
18 : SelectionDAGGenTargetInfo(PPCGenSDNodeInfo) {}
19
20PPCSelectionDAGInfo::~PPCSelectionDAGInfo() = default;
21
22const char *PPCSelectionDAGInfo::getTargetNodeName(unsigned Opcode) const {
23 switch (static_cast<PPCISD::NodeType>(Opcode)) {
24 case PPCISD::GlobalBaseReg:
25 return "PPCISD::GlobalBaseReg";
26 case PPCISD::SRA_ADDZE:
27 return "PPCISD::SRA_ADDZE";
28 case PPCISD::READ_TIME_BASE:
29 return "PPCISD::READ_TIME_BASE";
30 case PPCISD::MFOCRF:
31 return "PPCISD::MFOCRF";
32 case PPCISD::ANDI_rec_1_EQ_BIT:
33 return "PPCISD::ANDI_rec_1_EQ_BIT";
34 case PPCISD::ANDI_rec_1_GT_BIT:
35 return "PPCISD::ANDI_rec_1_GT_BIT";
36 case PPCISD::BDNZ:
37 return "PPCISD::BDNZ";
38 case PPCISD::BDZ:
39 return "PPCISD::BDZ";
40 case PPCISD::PPC32_PICGOT:
41 return "PPCISD::PPC32_PICGOT";
42 case PPCISD::VADD_SPLAT:
43 return "PPCISD::VADD_SPLAT";
44 }
45
46 return SelectionDAGGenTargetInfo::getTargetNodeName(Opcode);
47}
48
49void PPCSelectionDAGInfo::verifyTargetNode(const SelectionDAG &DAG,
50 const SDNode *N) const {
51 switch (N->getOpcode()) {
52 default:
53 break;
54 case PPCISD::DYNAREAOFFSET:
55 // invalid number of results; expected 2, got 1
56 case PPCISD::TOC_ENTRY:
57 // invalid number of results; expected 1, got 2
58 case PPCISD::STORE_COND:
59 // invalid number of results; expected 2, got 3
60 case PPCISD::LD_SPLAT:
61 case PPCISD::SEXT_LD_SPLAT:
62 case PPCISD::ZEXT_LD_SPLAT:
63 // invalid number of operands; expected 2, got 3
64 case PPCISD::ST_VSR_SCAL_INT:
65 // invalid number of operands; expected 4, got 5
66 case PPCISD::XXPERM:
67 // operand #1 must have type v2f64, but has type v16i8
68 case PPCISD::ACC_BUILD:
69 // operand #3 must have type v4i32, but has type v16i8
70 case PPCISD::PAIR_BUILD:
71 // operand #1 must have type v4i32, but has type v16i8
72 return;
73 }
74
75 SelectionDAGGenTargetInfo::verifyTargetNode(DAG, N);
76}
77
78std::pair<SDValue, SDValue> PPCSelectionDAGInfo::EmitTargetCodeForMemcmp(
79 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2,
80 SDValue Op3, const CallInst *CI) const {
81 return DAG.getMemcmp(Chain, dl, Dst: Op1, Src: Op2, Size: Op3, CI);
82}
83
84std::pair<SDValue, SDValue> PPCSelectionDAGInfo::EmitTargetCodeForStrcmp(
85 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Op1, SDValue Op2,
86 MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo,
87 const CallInst *CI) const {
88 return DAG.getStrcmp(Chain, dl: DL, S0: Op1, S1: Op2, CI);
89}
90
91std::pair<SDValue, SDValue> PPCSelectionDAGInfo::EmitTargetCodeForStrcpy(
92 SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dest,
93 SDValue Src, MachinePointerInfo DestPtrInfo, MachinePointerInfo SrcPtrInfo,
94 bool isStpcpy, const CallInst *CI) const {
95 if (isStpcpy)
96 return SelectionDAGTargetInfo::EmitTargetCodeForStrcpy(
97 DAG, DL, Chain, Dest, Src, DestPtrInfo, SrcPtrInfo, isStpcpy, CI);
98 return DAG.getStrcpy(Chain, dl: DL, Dst: Dest, Src, CI);
99}
100
101std::pair<SDValue, SDValue>
102PPCSelectionDAGInfo::EmitTargetCodeForStrlen(SelectionDAG &DAG, const SDLoc &DL,
103 SDValue Chain, SDValue Src,
104 const CallInst *CI) const {
105 return DAG.getStrlen(Chain, dl: DL, Src, CI);
106}
107
108std::pair<SDValue, SDValue> PPCSelectionDAGInfo::EmitTargetCodeForStrstr(
109 SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2,
110 const CallInst *CI) const {
111 return DAG.getStrstr(Chain, dl, S0: Op1, S1: Op2, CI);
112}
113