1//===-- RISCVFrameLowering.h - Define frame lowering for RISC-V -*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This class implements RISC-V specific bits of TargetFrameLowering class.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_RISCV_RISCVFRAMELOWERING_H
14#define LLVM_LIB_TARGET_RISCV_RISCVFRAMELOWERING_H
15
16#include "llvm/CodeGen/TargetFrameLowering.h"
17#include "llvm/Support/TypeSize.h"
18
19namespace llvm {
20class RISCVSubtarget;
21
22class RISCVFrameLowering : public TargetFrameLowering {
23public:
24 explicit RISCVFrameLowering(const RISCVSubtarget &STI);
25
26 int getInitialCFAOffset(const MachineFunction &MF) const override;
27 Register getInitialCFARegister(const MachineFunction &MF) const override;
28
29 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
30 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override;
31
32 uint64_t getStackSizeWithRVVPadding(const MachineFunction &MF) const;
33
34 StackOffset getFrameIndexReference(const MachineFunction &MF, int FI,
35 Register &FrameReg) const override;
36
37 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs,
38 RegScavenger *RS) const override;
39
40 void processFunctionBeforeFrameFinalized(MachineFunction &MF,
41 RegScavenger *RS) const override;
42
43 bool hasBP(const MachineFunction &MF) const;
44
45 bool hasReservedCallFrame(const MachineFunction &MF) const override;
46 MachineBasicBlock::iterator
47 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
48 MachineBasicBlock::iterator MI) const override;
49
50 bool
51 assignCalleeSavedSpillSlots(MachineFunction &MF,
52 const TargetRegisterInfo *TRI,
53 std::vector<CalleeSavedInfo> &CSI) const override;
54 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
55 MachineBasicBlock::iterator MI,
56 ArrayRef<CalleeSavedInfo> CSI,
57 const TargetRegisterInfo *TRI) const override;
58 bool
59 restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
60 MachineBasicBlock::iterator MI,
61 MutableArrayRef<CalleeSavedInfo> CSI,
62 const TargetRegisterInfo *TRI) const override;
63
64 // Get the first stack adjustment amount for SplitSPAdjust.
65 // Return 0 if we don't want to split the SP adjustment in prologue and
66 // epilogue.
67 uint64_t getFirstSPAdjustAmount(const MachineFunction &MF) const;
68
69 bool canUseAsPrologue(const MachineBasicBlock &MBB) const override;
70 bool canUseAsEpilogue(const MachineBasicBlock &MBB) const override;
71
72 bool enableShrinkWrapping(const MachineFunction &MF) const override;
73
74 Register
75 findScratchNonCalleeSaveRegister(MachineBasicBlock *MBB,
76 Register PreferredReg,
77 Register DontUseReg = Register()) const;
78
79 bool isSupportedStackID(TargetStackID::Value ID) const override;
80 TargetStackID::Value getStackIDForScalableVectors() const override;
81
82 bool isStackIdSafeForLocalArea(unsigned StackId) const override {
83 // We don't support putting RISC-V Vector objects into the pre-allocated
84 // local frame block at the moment.
85 return StackId != TargetStackID::ScalableVector;
86 }
87
88 void allocateStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
89 MachineFunction &MF, uint64_t Offset,
90 uint64_t RealStackSize, bool EmitCFI, bool NeedProbe,
91 uint64_t ProbeSize, bool DynAllocation,
92 MachineInstr::MIFlag Flag) const;
93
94 uint64_t getStackThreshold() const override;
95
96protected:
97 const RISCVSubtarget &STI;
98
99 bool hasFPImpl(const MachineFunction &MF) const override;
100
101private:
102 void determineFrameLayout(MachineFunction &MF) const;
103 void emitCalleeSavedRVVPrologCFI(MachineBasicBlock &MBB,
104 MachineBasicBlock::iterator MI,
105 bool HasFP) const;
106 void emitCalleeSavedRVVEpilogCFI(MachineBasicBlock &MBB,
107 MachineBasicBlock::iterator MI) const;
108 void deallocateStack(MachineFunction &MF, MachineBasicBlock &MBB,
109 MachineBasicBlock::iterator MBBI, const DebugLoc &DL,
110 uint64_t &StackSize, int64_t CFAOffset) const;
111
112 std::pair<int64_t, Align>
113 assignRVVStackObjectOffsets(MachineFunction &MF) const;
114 // Replace a StackProbe stub (if any) with the actual probe code inline
115 void inlineStackProbe(MachineFunction &MF,
116 MachineBasicBlock &PrologueMBB) const override;
117 void allocateAndProbeStackForRVV(MachineFunction &MF, MachineBasicBlock &MBB,
118 MachineBasicBlock::iterator MBBI,
119 const DebugLoc &DL, int64_t Amount,
120 MachineInstr::MIFlag Flag, bool EmitCFI,
121 bool DynAllocation) const;
122
123 /// Emit target zero call-used regs.
124 void emitZeroCallUsedRegs(BitVector RegsToZero, MachineBasicBlock &MBB,
125 RegScavenger *RS) const override;
126};
127} // namespace llvm
128#endif
129