1//===-- SPIRVInstrInfo.h - SPIR-V Instruction Information -------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the SPIR-V implementation of the TargetInstrInfo class.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H
14#define LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H
15
16#include "SPIRVRegisterInfo.h"
17#include "llvm/CodeGen/TargetInstrInfo.h"
18
19#define GET_INSTRINFO_HEADER
20#include "SPIRVGenInstrInfo.inc"
21
22namespace llvm {
23class SPIRVSubtarget;
24
25class SPIRVInstrInfo : public SPIRVGenInstrInfo {
26 const SPIRVRegisterInfo RI;
27
28public:
29 explicit SPIRVInstrInfo(const SPIRVSubtarget &STI);
30
31 const SPIRVRegisterInfo &getRegisterInfo() const { return RI; }
32 bool isHeaderInstr(const MachineInstr &MI) const;
33 bool isConstantInstr(const MachineInstr &MI) const;
34 bool isSpecConstantInstr(const MachineInstr &MI) const;
35 bool isInlineAsmDefInstr(const MachineInstr &MI) const;
36 bool isTypeDeclInstr(const MachineInstr &MI) const;
37 bool isDecorationInstr(const MachineInstr &MI) const;
38 bool isAliasingInstr(const MachineInstr &MI) const;
39 bool canUseFastMathFlags(const MachineInstr &MI,
40 bool KHRFloatControls2) const;
41 bool canUseIntegerWrapDecoration(const MachineInstr &MI) const;
42
43 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
44 MachineBasicBlock *&FBB,
45 SmallVectorImpl<MachineOperand> &Cond,
46 bool AllowModify = false) const override;
47
48 unsigned removeBranch(MachineBasicBlock &MBB,
49 int *BytesRemoved = nullptr) const override;
50
51 unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
52 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
53 const DebugLoc &DL,
54 int *BytesAdded = nullptr) const override;
55 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
56 const DebugLoc &DL, Register DestReg, Register SrcReg,
57 bool KillSrc, bool RenamableDest = false,
58 bool RenamableSrc = false) const override;
59};
60
61namespace SPIRV {
62enum AsmComments : MachineInstr::AsmPrinterFlagTy {
63 // It is a half type
64 ASM_PRINTER_WIDTH16 = MachineInstr::TAsmComments,
65 // It is a 64 bit type
66 ASM_PRINTER_WIDTH64 = ASM_PRINTER_WIDTH16 << 1,
67};
68} // namespace SPIRV
69
70} // namespace llvm
71
72#endif // LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H
73