| 1 | //===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // This file declares the Sparc specific subclass of TargetMachine. |
| 10 | // |
| 11 | //===----------------------------------------------------------------------===// |
| 12 | |
| 13 | #ifndef LLVM_LIB_TARGET_SPARC_SPARCTARGETMACHINE_H |
| 14 | #define LLVM_LIB_TARGET_SPARC_SPARCTARGETMACHINE_H |
| 15 | |
| 16 | #include "SparcInstrInfo.h" |
| 17 | #include "SparcSubtarget.h" |
| 18 | #include "llvm/CodeGen/CodeGenTargetMachineImpl.h" |
| 19 | #include "llvm/Target/TargetMachine.h" |
| 20 | #include <optional> |
| 21 | |
| 22 | namespace llvm { |
| 23 | |
| 24 | class SparcTargetMachine : public CodeGenTargetMachineImpl { |
| 25 | std::unique_ptr<TargetLoweringObjectFile> TLOF; |
| 26 | mutable StringMap<std::unique_ptr<SparcSubtarget>> SubtargetMap; |
| 27 | |
| 28 | public: |
| 29 | SparcTargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
| 30 | StringRef FS, const TargetOptions &Options, |
| 31 | std::optional<Reloc::Model> RM, |
| 32 | std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, |
| 33 | bool JIT); |
| 34 | ~SparcTargetMachine() override; |
| 35 | |
| 36 | const SparcSubtarget *getSubtargetImpl(const Function &F) const override; |
| 37 | |
| 38 | // Pass Pipeline Configuration |
| 39 | TargetPassConfig *createPassConfig(PassManagerBase &PM) override; |
| 40 | TargetLoweringObjectFile *getObjFileLowering() const override { |
| 41 | return TLOF.get(); |
| 42 | } |
| 43 | |
| 44 | MachineFunctionInfo * |
| 45 | createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, |
| 46 | const TargetSubtargetInfo *STI) const override; |
| 47 | }; |
| 48 | |
| 49 | /// Sparc 32-bit target machine |
| 50 | /// |
| 51 | class SparcV8TargetMachine : public SparcTargetMachine { |
| 52 | virtual void anchor(); |
| 53 | |
| 54 | public: |
| 55 | SparcV8TargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
| 56 | StringRef FS, const TargetOptions &Options, |
| 57 | std::optional<Reloc::Model> RM, |
| 58 | std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, |
| 59 | bool JIT); |
| 60 | }; |
| 61 | |
| 62 | /// Sparc 64-bit target machine |
| 63 | /// |
| 64 | class SparcV9TargetMachine : public SparcTargetMachine { |
| 65 | virtual void anchor(); |
| 66 | |
| 67 | public: |
| 68 | SparcV9TargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
| 69 | StringRef FS, const TargetOptions &Options, |
| 70 | std::optional<Reloc::Model> RM, |
| 71 | std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, |
| 72 | bool JIT); |
| 73 | }; |
| 74 | |
| 75 | class SparcelTargetMachine : public SparcTargetMachine { |
| 76 | virtual void anchor(); |
| 77 | |
| 78 | public: |
| 79 | SparcelTargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
| 80 | StringRef FS, const TargetOptions &Options, |
| 81 | std::optional<Reloc::Model> RM, |
| 82 | std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, |
| 83 | bool JIT); |
| 84 | }; |
| 85 | |
| 86 | } // end namespace llvm |
| 87 | |
| 88 | #endif |
| 89 | |