1//===-- VETargetMachine.cpp - Define TargetMachine for VE -----------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9//
10//===----------------------------------------------------------------------===//
11
12#include "VETargetMachine.h"
13#include "TargetInfo/VETargetInfo.h"
14#include "VE.h"
15#include "VEMachineFunctionInfo.h"
16#include "VETargetTransformInfo.h"
17#include "llvm/CodeGen/Passes.h"
18#include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
19#include "llvm/CodeGen/TargetPassConfig.h"
20#include "llvm/IR/LegacyPassManager.h"
21#include "llvm/MC/TargetRegistry.h"
22#include "llvm/Support/Compiler.h"
23#include <optional>
24
25using namespace llvm;
26
27#define DEBUG_TYPE "ve"
28
29extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void LLVMInitializeVETarget() {
30 // Register the target.
31 RegisterTargetMachine<VETargetMachine> X(getTheVETarget());
32
33 PassRegistry &PR = *PassRegistry::getPassRegistry();
34 initializeVEAsmPrinterPass(PR);
35 initializeVEDAGToDAGISelLegacyPass(PR);
36}
37
38static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM) {
39 return RM.value_or(u: Reloc::Static);
40}
41
42namespace {
43class VEELFTargetObjectFile : public TargetLoweringObjectFileELF {
44 void Initialize(MCContext &Ctx, const TargetMachine &TM) override {
45 TargetLoweringObjectFileELF::Initialize(Ctx, TM);
46 InitializeELF(UseInitArray_: TM.Options.UseInitArray);
47 }
48};
49} // namespace
50
51static std::unique_ptr<TargetLoweringObjectFile> createTLOF() {
52 return std::make_unique<VEELFTargetObjectFile>();
53}
54
55/// Create an Aurora VE architecture model
56VETargetMachine::VETargetMachine(const Target &T, const Triple &TT,
57 StringRef CPU, StringRef FS,
58 const TargetOptions &Options,
59 std::optional<Reloc::Model> RM,
60 std::optional<CodeModel::Model> CM,
61 CodeGenOptLevel OL, bool JIT)
62 : CodeGenTargetMachineImpl(T, TT.computeDataLayout(), TT, CPU, FS, Options,
63 getEffectiveRelocModel(RM),
64 getEffectiveCodeModel(CM, Default: CodeModel::Small), OL),
65 TLOF(createTLOF()),
66 Subtarget(TT, std::string(CPU), std::string(FS), *this) {
67 initAsmInfo();
68}
69
70VETargetMachine::~VETargetMachine() = default;
71
72TargetTransformInfo
73VETargetMachine::getTargetTransformInfo(const Function &F) const {
74 return TargetTransformInfo(std::make_unique<VETTIImpl>(args: this, args: F));
75}
76
77MachineFunctionInfo *VETargetMachine::createMachineFunctionInfo(
78 BumpPtrAllocator &Allocator, const Function &F,
79 const TargetSubtargetInfo *STI) const {
80 return VEMachineFunctionInfo::create<VEMachineFunctionInfo>(Allocator, F,
81 STI);
82}
83
84namespace {
85/// VE Code Generator Pass Configuration Options.
86class VEPassConfig : public TargetPassConfig {
87public:
88 VEPassConfig(VETargetMachine &TM, PassManagerBase &PM)
89 : TargetPassConfig(TM, PM) {}
90
91 VETargetMachine &getVETargetMachine() const {
92 return getTM<VETargetMachine>();
93 }
94
95 void addIRPasses() override;
96 bool addInstSelector() override;
97 void addPreEmitPass() override;
98};
99} // namespace
100
101TargetPassConfig *VETargetMachine::createPassConfig(PassManagerBase &PM) {
102 return new VEPassConfig(*this, PM);
103}
104
105void VEPassConfig::addIRPasses() {
106 // VE requires atomic expand pass.
107 addPass(P: createAtomicExpandLegacyPass());
108 TargetPassConfig::addIRPasses();
109}
110
111bool VEPassConfig::addInstSelector() {
112 addPass(P: createVEISelDag(TM&: getVETargetMachine()));
113 return false;
114}
115
116void VEPassConfig::addPreEmitPass() {
117 // LVLGen should be called after scheduling and register allocation
118 addPass(P: createLVLGenPass());
119}
120