1//===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the entry points for global functions defined in the x86
10// target library, as used by the LLVM JIT.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_X86_X86_H
15#define LLVM_LIB_TARGET_X86_X86_H
16
17#include "llvm/CodeGen/MachineFunctionAnalysisManager.h"
18#include "llvm/CodeGen/SelectionDAGISel.h"
19#include "llvm/IR/Analysis.h"
20#include "llvm/IR/Module.h"
21#include "llvm/IR/PassManager.h"
22#include "llvm/PassInfo.h"
23#include "llvm/Support/CodeGen.h"
24#include "llvm/Target/TargetMachine.h"
25
26namespace llvm {
27
28class FunctionPass;
29class InstructionSelector;
30class MachineFunction;
31class PassRegistry;
32class X86RegisterBankInfo;
33class X86Subtarget;
34class X86TargetMachine;
35
36/// This pass converts a legalized DAG into a X86-specific DAG, ready for
37/// instruction scheduling.
38class X86ISelDAGToDAGPass : public SelectionDAGISelPass {
39public:
40 X86ISelDAGToDAGPass(X86TargetMachine &TM);
41};
42
43FunctionPass *createX86ISelDag(X86TargetMachine &TM, CodeGenOptLevel OptLevel);
44
45/// This pass initializes a global base register for PIC on x86-32.
46class X86GlobalBaseRegPass
47 : public OptionalPassInfoMixin<X86GlobalBaseRegPass> {
48public:
49 PreservedAnalyses run(MachineFunction &MF,
50 MachineFunctionAnalysisManager &MFAM);
51};
52
53FunctionPass *createX86GlobalBaseRegLegacyPass();
54
55/// This pass combines multiple accesses to local-dynamic TLS variables so that
56/// the TLS base address for the module is only fetched once per execution path
57/// through the function.
58class X86CleanupLocalDynamicTLSPass
59 : public OptionalPassInfoMixin<X86CleanupLocalDynamicTLSPass> {
60public:
61 PreservedAnalyses run(MachineFunction &MF,
62 MachineFunctionAnalysisManager &MFAM);
63};
64
65FunctionPass *createCleanupLocalDynamicTLSLegacyPass();
66
67/// This function returns a pass which converts floating-point register
68/// references and pseudo instructions into floating-point stack references and
69/// physical instructions.
70class X86FPStackifierPass : public OptionalPassInfoMixin<X86FPStackifierPass> {
71public:
72 PreservedAnalyses run(MachineFunction &MF,
73 MachineFunctionAnalysisManager &MFAM);
74};
75
76FunctionPass *createX86FPStackifierLegacyPass();
77
78/// This pass inserts AVX vzeroupper instructions before each call to avoid
79/// transition penalty between functions encoded with AVX and SSE.
80class X86InsertVZeroUpperPass
81 : public OptionalPassInfoMixin<X86InsertVZeroUpperPass> {
82public:
83 PreservedAnalyses run(MachineFunction &MF,
84 MachineFunctionAnalysisManager &MFAM);
85};
86
87FunctionPass *createX86InsertVZeroUpperLegacyPass();
88/// This pass inserts ENDBR instructions before indirect jump/call
89/// destinations as part of CET IBT mechanism.
90class X86IndirectBranchTrackingPass
91 : public OptionalPassInfoMixin<X86IndirectBranchTrackingPass> {
92public:
93 PreservedAnalyses run(MachineFunction &MF,
94 MachineFunctionAnalysisManager &MFAM);
95};
96
97FunctionPass *createX86IndirectBranchTrackingLegacyPass();
98
99/// Return a pass that pads short functions with NOOPs.
100/// This will prevent a stall when returning on the Atom.
101FunctionPass *createX86PadShortFunctions();
102
103/// Return a pass that selectively replaces certain instructions (like add,
104/// sub, inc, dec, some shifts, and some multiplies) by equivalent LEA
105/// instructions, in order to eliminate execution delays in some processors.
106class X86FixupLEAsPass : public OptionalPassInfoMixin<X86FixupLEAsPass> {
107public:
108 PreservedAnalyses run(MachineFunction &MF,
109 MachineFunctionAnalysisManager &MFAM);
110};
111
112FunctionPass *createX86FixupLEAsLegacyPass();
113
114/// Return a pass that replaces equivalent slower instructions with faster
115/// ones.
116class X86FixupInstTuningPass
117 : public OptionalPassInfoMixin<X86FixupInstTuningPass> {
118public:
119 PreservedAnalyses run(MachineFunction &MF,
120 MachineFunctionAnalysisManager &MFAM);
121};
122
123FunctionPass *createX86FixupInstTuningLegacyPass();
124
125/// Return a pass that reduces the size of vector constant pool loads.
126class X86FixupVectorConstantsPass
127 : public OptionalPassInfoMixin<X86FixupInstTuningPass> {
128public:
129 PreservedAnalyses run(MachineFunction &MF,
130 MachineFunctionAnalysisManager &MFAM);
131};
132
133FunctionPass *createX86FixupVectorConstantsLegacyPass();
134
135/// Return a pass that removes redundant LEA instructions and redundant address
136/// recalculations.
137class X86OptimizeLEAsPass : public OptionalPassInfoMixin<X86OptimizeLEAsPass> {
138public:
139 PreservedAnalyses run(MachineFunction &MF,
140 MachineFunctionAnalysisManager &MFAM);
141};
142
143FunctionPass *createX86OptimizeLEAsLegacyPass();
144
145/// Return a pass that transforms setcc + movzx pairs into xor + setcc.
146class X86FixupSetCCPass : public OptionalPassInfoMixin<X86FixupSetCCPass> {
147public:
148 PreservedAnalyses run(MachineFunction &MF,
149 MachineFunctionAnalysisManager &MFAM);
150};
151
152FunctionPass *createX86FixupSetCCLegacyPass();
153
154/// Return a pass that avoids creating store forward block issues in the
155/// hardware.
156class X86AvoidStoreForwardingBlocksPass
157 : public OptionalPassInfoMixin<X86AvoidStoreForwardingBlocksPass> {
158public:
159 PreservedAnalyses run(MachineFunction &MF,
160 MachineFunctionAnalysisManager &MFAM);
161};
162
163FunctionPass *createX86AvoidStoreForwardingBlocksLegacyPass();
164
165/// Return a pass that lowers EFLAGS copy pseudo instructions.
166class X86FlagsCopyLoweringPass
167 : public OptionalPassInfoMixin<X86FlagsCopyLoweringPass> {
168public:
169 PreservedAnalyses run(MachineFunction &MF,
170 MachineFunctionAnalysisManager &MFAM);
171};
172
173FunctionPass *createX86FlagsCopyLoweringLegacyPass();
174
175/// Return a pass that expands DynAlloca pseudo-instructions.
176class X86DynAllocaExpanderPass
177 : public OptionalPassInfoMixin<X86DynAllocaExpanderPass> {
178public:
179 PreservedAnalyses run(MachineFunction &MF,
180 MachineFunctionAnalysisManager &MFAM);
181};
182
183FunctionPass *createX86DynAllocaExpanderLegacyPass();
184
185/// Return a pass that config the tile registers.
186class X86TileConfigPass : public OptionalPassInfoMixin<X86TileConfigPass> {
187public:
188 PreservedAnalyses run(MachineFunction &MF,
189 MachineFunctionAnalysisManager &MFAM);
190};
191
192FunctionPass *createX86TileConfigLegacyPass();
193
194/// Return a pass that preconfig the tile registers before fast reg allocation.
195class X86FastPreTileConfigPass
196 : public OptionalPassInfoMixin<X86FastPreTileConfigPass> {
197public:
198 PreservedAnalyses run(MachineFunction &MF,
199 MachineFunctionAnalysisManager &MFAM);
200};
201
202FunctionPass *createX86FastPreTileConfigLegacyPass();
203
204/// Return a pass that config the tile registers after fast reg allocation.
205class X86FastTileConfigPass
206 : public OptionalPassInfoMixin<X86FastTileConfigPass> {
207public:
208 PreservedAnalyses run(MachineFunction &MF,
209 MachineFunctionAnalysisManager &MFAM);
210};
211
212FunctionPass *createX86FastTileConfigLegacyPass();
213
214/// Return a pass that insert pseudo tile config instruction.
215class X86PreTileConfigPass
216 : public OptionalPassInfoMixin<X86PreTileConfigPass> {
217public:
218 PreservedAnalyses run(MachineFunction &MF,
219 MachineFunctionAnalysisManager &MFAM);
220};
221
222FunctionPass *createX86PreTileConfigLegacyPass();
223
224/// Return a pass that lower the tile copy instruction.
225class X86LowerTileCopyPass
226 : public OptionalPassInfoMixin<X86LowerTileCopyPass> {
227public:
228 PreservedAnalyses run(MachineFunction &MF,
229 MachineFunctionAnalysisManager &MFAM);
230};
231
232FunctionPass *createX86LowerTileCopyLegacyPass();
233
234/// Return a pass that inserts int3 at the end of the function if it ends with a
235/// CALL instruction. The pass does the same for each funclet as well. This
236/// ensures that the open interval of function start and end PCs contains all
237/// return addresses for the benefit of the Windows x64 unwinder.
238class X86AvoidTrailingCallPass
239 : public RequiredPassInfoMixin<X86AvoidTrailingCallPass> {
240public:
241 PreservedAnalyses run(MachineFunction &MF,
242 MachineFunctionAnalysisManager &MFAM);
243};
244
245FunctionPass *createX86AvoidTrailingCallLegacyPass();
246
247/// Return a pass that optimizes the code-size of x86 call sequences. This is
248/// done by replacing esp-relative movs with pushes.
249class X86CallFrameOptimizationPass
250 : public OptionalPassInfoMixin<X86CallFrameOptimizationPass> {
251public:
252 PreservedAnalyses run(MachineFunction &MF,
253 MachineFunctionAnalysisManager &MFAM);
254};
255
256FunctionPass *createX86CallFrameOptimizationLegacyPass();
257
258/// Return an IR pass that inserts EH registration stack objects and explicit
259/// EH state updates. This pass must run after EH preparation, which does
260/// Windows-specific but architecture-neutral preparation.
261class X86WinEHStatePass : public OptionalPassInfoMixin<X86WinEHStatePass> {
262public:
263 X86WinEHStatePass() = default;
264 PreservedAnalyses run(Module &M, ModuleAnalysisManager &MAM);
265};
266
267FunctionPass *createX86WinEHStateLegacyPass();
268
269/// Return a Machine IR pass that expands X86-specific pseudo
270/// instructions into a sequence of actual instructions. This pass
271/// must run after prologue/epilogue insertion and before lowering
272/// the MachineInstr to MC.
273class X86ExpandPseudoPass : public OptionalPassInfoMixin<X86ExpandPseudoPass> {
274public:
275 PreservedAnalyses run(MachineFunction &MF,
276 MachineFunctionAnalysisManager &MFAM);
277};
278
279FunctionPass *createX86ExpandPseudoLegacyPass();
280
281/// This pass converts X86 cmov instructions into branch when profitable.
282class X86CmovConversionPass
283 : public OptionalPassInfoMixin<X86CmovConversionPass> {
284public:
285 PreservedAnalyses run(MachineFunction &MF,
286 MachineFunctionAnalysisManager &MFAM);
287};
288
289FunctionPass *createX86CmovConversionLegacyPass();
290
291/// Return a Machine IR pass that selectively replaces
292/// certain byte and word instructions by equivalent 32 bit instructions,
293/// in order to eliminate partial register usage, false dependences on
294/// the upper portions of registers, and to save code size.
295class X86FixupBWInstsPass : public OptionalPassInfoMixin<X86FixupBWInstsPass> {
296public:
297 PreservedAnalyses run(MachineFunction &MF,
298 MachineFunctionAnalysisManager &MFAM);
299};
300
301FunctionPass *createX86FixupBWInstsLegacyPass();
302
303/// Return a Machine IR pass that reassigns instruction chains from one domain
304/// to another, when profitable.
305class X86DomainReassignmentPass
306 : public OptionalPassInfoMixin<X86DomainReassignmentPass> {
307public:
308 PreservedAnalyses run(MachineFunction &MF,
309 MachineFunctionAnalysisManager &MFAM);
310};
311
312FunctionPass *createX86DomainReassignmentLegacyPass();
313
314/// This pass compress instructions from EVEX space to legacy/VEX/EVEX space when
315/// possible in order to reduce code size or facilitate HW decoding.
316class X86CompressEVEXPass : public OptionalPassInfoMixin<X86CompressEVEXPass> {
317public:
318 PreservedAnalyses run(MachineFunction &MF,
319 MachineFunctionAnalysisManager &MFAM);
320};
321
322FunctionPass *createX86CompressEVEXLegacyPass();
323
324/// This pass creates the thunks for the retpoline feature.
325FunctionPass *createX86IndirectThunksPass();
326
327/// This pass replaces ret instructions with jmp's to __x86_return thunk.
328class X86ReturnThunksPass : public OptionalPassInfoMixin<X86ReturnThunksPass> {
329public:
330 PreservedAnalyses run(MachineFunction &MF,
331 MachineFunctionAnalysisManager &MFAM);
332};
333
334FunctionPass *createX86ReturnThunksLegacyPass();
335
336/// This pass insert wait instruction after X87 instructions which could raise
337/// fp exceptions when strict-fp enabled.
338class X86InsertX87WaitPass
339 : public OptionalPassInfoMixin<X86InsertX87WaitPass> {
340public:
341 PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &);
342};
343
344FunctionPass *createX86InsertX87WaitLegacyPass();
345
346/// This pass optimizes arithmetic based on knowledge that is only used by
347/// a reduction sequence and is therefore safe to reassociate in interesting
348/// ways.
349class X86PartialReductionPass
350 : public OptionalPassInfoMixin<X86PartialReductionPass> {
351private:
352 const X86TargetMachine *TM;
353
354public:
355 X86PartialReductionPass(const X86TargetMachine *TM) : TM(TM) {}
356 PreservedAnalyses run(Function &F, FunctionAnalysisManager &FAM);
357};
358
359FunctionPass *createX86PartialReductionLegacyPass();
360
361/// // Analyzes and emits pseudos to support Win x64 Unwind V2.
362class X86WinEHUnwindV2Pass
363 : public OptionalPassInfoMixin<X86WinEHUnwindV2Pass> {
364public:
365 X86WinEHUnwindV2Pass() = default;
366 PreservedAnalyses run(MachineFunction &MF,
367 MachineFunctionAnalysisManager &MFAM);
368};
369
370FunctionPass *createX86WinEHUnwindV2LegacyPass();
371
372/// The pass transforms load/store <256 x i32> to AMX load/store intrinsics
373/// or split the data to two <128 x i32>.
374class X86LowerAMXTypePass : public RequiredPassInfoMixin<X86LowerAMXTypePass> {
375private:
376 const TargetMachine *TM;
377
378public:
379 X86LowerAMXTypePass(const TargetMachine *TM) : TM(TM) {}
380 PreservedAnalyses run(Function &F, FunctionAnalysisManager &FAM);
381};
382
383FunctionPass *createX86LowerAMXTypeLegacyPass();
384
385// Suppresses APX features for relocations for supporting older linkers.
386class X86SuppressAPXForRelocationPass
387 : public OptionalPassInfoMixin<X86SuppressAPXForRelocationPass> {
388public:
389 PreservedAnalyses run(MachineFunction &MF,
390 MachineFunctionAnalysisManager &MFAM);
391};
392
393FunctionPass *createX86SuppressAPXForRelocationLegacyPass();
394
395/// The pass transforms amx intrinsics to scalar operation if the function has
396/// optnone attribute or it is O0.
397class X86LowerAMXIntrinsicsPass
398 : public RequiredPassInfoMixin<X86LowerAMXIntrinsicsPass> {
399private:
400 const TargetMachine *TM;
401
402public:
403 X86LowerAMXIntrinsicsPass(const TargetMachine *TM) : TM(TM) {}
404 PreservedAnalyses run(Function &F, FunctionAnalysisManager &FAM);
405};
406
407FunctionPass *createX86LowerAMXIntrinsicsLegacyPass();
408
409/// Capacity check and sub-fragment splitting for Win x64 Unwind V3.
410FunctionPass *createX86WinEHUnwindV3Pass();
411
412/// Returns true when \p MF must use Windows x64 Unwind V3: the module is in V3
413/// mode, or the function needs an unwind table and may use EGPR (R16-R31),
414/// which V1/V2 cannot encode. Shared by frame lowering and the WinEH Unwind
415/// V2/V3 passes so their decisions cannot disagree.
416bool requireWinX64UnwindV3(const MachineFunction &MF);
417
418InstructionSelector *createX86InstructionSelector(const X86TargetMachine &TM,
419 const X86Subtarget &,
420 const X86RegisterBankInfo &);
421
422class X86PostLegalizerCombinerPass
423 : public OptionalPassInfoMixin<X86PostLegalizerCombinerPass> {
424public:
425 PreservedAnalyses run(MachineFunction &MF,
426 MachineFunctionAnalysisManager &MFAM);
427};
428
429FunctionPass *createX86PostLegalizerCombinerLegacy();
430
431class X86PreLegalizerCombinerPass
432 : public RequiredPassInfoMixin<X86PreLegalizerCombinerPass> {
433public:
434 PreservedAnalyses run(MachineFunction &MF,
435 MachineFunctionAnalysisManager &MFAM);
436};
437
438FunctionPass *createX86PreLegalizerCombinerLegacy();
439
440class X86LoadValueInjectionLoadHardeningPass
441 : public OptionalPassInfoMixin<X86LoadValueInjectionLoadHardeningPass> {
442public:
443 PreservedAnalyses run(MachineFunction &MF,
444 MachineFunctionAnalysisManager &MFAM);
445};
446
447FunctionPass *createX86LoadValueInjectionLoadHardeningLegacyPass();
448
449class X86LoadValueInjectionRetHardeningPass
450 : public OptionalPassInfoMixin<X86LoadValueInjectionRetHardeningPass> {
451public:
452 PreservedAnalyses run(MachineFunction &MF,
453 MachineFunctionAnalysisManager &MFAM);
454};
455
456FunctionPass *createX86LoadValueInjectionRetHardeningLegacyPass();
457
458class X86SpeculativeExecutionSideEffectSuppressionPass
459 : public OptionalPassInfoMixin<
460 X86SpeculativeExecutionSideEffectSuppressionPass> {
461public:
462 PreservedAnalyses run(MachineFunction &MF,
463 MachineFunctionAnalysisManager &MFAM);
464};
465
466FunctionPass *createX86SpeculativeExecutionSideEffectSuppressionLegacyPass();
467
468class X86SpeculativeLoadHardeningPass
469 : public OptionalPassInfoMixin<X86SpeculativeLoadHardeningPass> {
470public:
471 PreservedAnalyses run(MachineFunction &MF,
472 MachineFunctionAnalysisManager &MFAM);
473};
474
475FunctionPass *createX86SpeculativeLoadHardeningLegacyPass();
476
477class X86ArgumentStackSlotPass
478 : public OptionalPassInfoMixin<X86ArgumentStackSlotPass> {
479public:
480 PreservedAnalyses run(MachineFunction &MF,
481 MachineFunctionAnalysisManager &MFAM);
482};
483
484FunctionPass *createX86ArgumentStackSlotLegacyPass();
485
486void initializeCompressEVEXLegacyPass(PassRegistry &);
487void initializeX86FixupBWInstLegacyPass(PassRegistry &);
488void initializeFixupLEAsLegacyPass(PassRegistry &);
489void initializeX86ArgumentStackSlotLegacyPass(PassRegistry &);
490void initializeX86AsmPrinterPass(PassRegistry &);
491void initializeX86FixupInstTuningLegacyPass(PassRegistry &);
492void initializeX86FixupVectorConstantsLegacyPass(PassRegistry &);
493void initializeWinEHStateLegacyPass(PassRegistry &);
494void initializeX86AvoidSFBLegacyPass(PassRegistry &);
495void initializeX86AvoidTrailingCallLegacyPassPass(PassRegistry &);
496void initializeX86CallFrameOptimizationLegacyPass(PassRegistry &);
497void initializeX86CmovConversionLegacyPass(PassRegistry &);
498void initializeX86DAGToDAGISelLegacyPass(PassRegistry &);
499void initializeX86DomainReassignmentLegacyPass(PassRegistry &);
500void initializeX86DynAllocaExpanderLegacyPass(PassRegistry &);
501void initializeX86ExecutionDomainFixPass(PassRegistry &);
502void initializeX86ExpandPseudoLegacyPass(PassRegistry &);
503void initializeX86FPStackifierLegacyPass(PassRegistry &);
504void initializeX86FastPreTileConfigLegacyPass(PassRegistry &);
505void initializeX86FastTileConfigLegacyPass(PassRegistry &);
506void initializeX86FixupSetCCLegacyPass(PassRegistry &);
507void initializeX86FlagsCopyLoweringLegacyPass(PassRegistry &);
508void initializeX86IndirectBranchTrackingLegacyPass(PassRegistry &);
509void initializeX86LoadValueInjectionLoadHardeningLegacyPass(PassRegistry &);
510void initializeX86LoadValueInjectionRetHardeningLegacyPass(PassRegistry &);
511void initializeX86LowerAMXIntrinsicsLegacyPassPass(PassRegistry &);
512void initializeX86LowerAMXTypeLegacyPassPass(PassRegistry &);
513void initializeX86LowerTileCopyLegacyPass(PassRegistry &);
514void initializeX86OptimizeLEAsLegacyPass(PassRegistry &);
515void initializeX86PartialReductionLegacyPass(PassRegistry &);
516void initializeX86PreTileConfigLegacyPass(PassRegistry &);
517void initializeX86ReturnThunksLegacyPass(PassRegistry &);
518void initializeX86SpeculativeExecutionSideEffectSuppressionLegacyPass(
519 PassRegistry &);
520void initializeX86SpeculativeLoadHardeningLegacyPass(PassRegistry &);
521void initializeX86SuppressAPXForRelocationLegacyPass(PassRegistry &);
522void initializeX86TileConfigLegacyPass(PassRegistry &);
523void initializeX86WinEHUnwindV2LegacyPass(PassRegistry &);
524void initializeX86PreLegalizerCombinerLegacyPass(PassRegistry &);
525void initializeX86PostLegalizerCombinerLegacyPass(PassRegistry &);
526void initializeX86WinEHUnwindV3Pass(PassRegistry &);
527
528namespace X86AS {
529enum : unsigned {
530 GS = 256,
531 FS = 257,
532 SS = 258,
533 PTR32_SPTR = 270,
534 PTR32_UPTR = 271,
535 PTR64 = 272
536};
537} // End X86AS namespace
538
539} // End llvm namespace
540
541#endif
542