1//===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the entry points for global functions defined in the x86
10// target library, as used by the LLVM JIT.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_X86_X86_H
15#define LLVM_LIB_TARGET_X86_X86_H
16
17#include "llvm/CodeGen/MachineFunctionAnalysisManager.h"
18#include "llvm/IR/Analysis.h"
19#include "llvm/IR/Module.h"
20#include "llvm/IR/PassManager.h"
21#include "llvm/PassInfo.h"
22#include "llvm/Support/CodeGen.h"
23#include "llvm/Target/TargetMachine.h"
24
25namespace llvm {
26
27class FunctionPass;
28class InstructionSelector;
29class PassRegistry;
30class X86RegisterBankInfo;
31class X86Subtarget;
32class X86TargetMachine;
33
34/// This pass converts a legalized DAG into a X86-specific DAG, ready for
35/// instruction scheduling.
36FunctionPass *createX86ISelDag(X86TargetMachine &TM, CodeGenOptLevel OptLevel);
37
38/// This pass initializes a global base register for PIC on x86-32.
39class X86GlobalBaseRegPass : public PassInfoMixin<X86GlobalBaseRegPass> {
40public:
41 PreservedAnalyses run(MachineFunction &MF,
42 MachineFunctionAnalysisManager &MFAM);
43};
44
45FunctionPass *createX86GlobalBaseRegLegacyPass();
46
47/// This pass combines multiple accesses to local-dynamic TLS variables so that
48/// the TLS base address for the module is only fetched once per execution path
49/// through the function.
50class X86CleanupLocalDynamicTLSPass
51 : public PassInfoMixin<X86CleanupLocalDynamicTLSPass> {
52public:
53 PreservedAnalyses run(MachineFunction &MF,
54 MachineFunctionAnalysisManager &MFAM);
55};
56
57FunctionPass *createCleanupLocalDynamicTLSLegacyPass();
58
59/// This function returns a pass which converts floating-point register
60/// references and pseudo instructions into floating-point stack references and
61/// physical instructions.
62class X86FPStackifierPass : public PassInfoMixin<X86FPStackifierPass> {
63public:
64 PreservedAnalyses run(MachineFunction &MF,
65 MachineFunctionAnalysisManager &MFAM);
66};
67
68FunctionPass *createX86FPStackifierLegacyPass();
69
70/// This pass inserts AVX vzeroupper instructions before each call to avoid
71/// transition penalty between functions encoded with AVX and SSE.
72FunctionPass *createX86IssueVZeroUpperPass();
73
74/// This pass inserts ENDBR instructions before indirect jump/call
75/// destinations as part of CET IBT mechanism.
76class X86IndirectBranchTrackingPass
77 : public PassInfoMixin<X86IndirectBranchTrackingPass> {
78public:
79 PreservedAnalyses run(MachineFunction &MF,
80 MachineFunctionAnalysisManager &MFAM);
81};
82
83FunctionPass *createX86IndirectBranchTrackingLegacyPass();
84
85/// Return a pass that pads short functions with NOOPs.
86/// This will prevent a stall when returning on the Atom.
87FunctionPass *createX86PadShortFunctions();
88
89/// Return a pass that selectively replaces certain instructions (like add,
90/// sub, inc, dec, some shifts, and some multiplies) by equivalent LEA
91/// instructions, in order to eliminate execution delays in some processors.
92class X86FixupLEAsPass : public PassInfoMixin<X86FixupLEAsPass> {
93public:
94 PreservedAnalyses run(MachineFunction &MF,
95 MachineFunctionAnalysisManager &MFAM);
96};
97
98FunctionPass *createX86FixupLEAsLegacyPass();
99
100/// Return a pass that replaces equivalent slower instructions with faster
101/// ones.
102class X86FixupInstTuningPass : public PassInfoMixin<X86FixupInstTuningPass> {
103public:
104 PreservedAnalyses run(MachineFunction &MF,
105 MachineFunctionAnalysisManager &MFAM);
106};
107
108FunctionPass *createX86FixupInstTuningLegacyPass();
109
110/// Return a pass that reduces the size of vector constant pool loads.
111class X86FixupVectorConstantsPass
112 : public PassInfoMixin<X86FixupInstTuningPass> {
113public:
114 PreservedAnalyses run(MachineFunction &MF,
115 MachineFunctionAnalysisManager &MFAM);
116};
117
118FunctionPass *createX86FixupVectorConstantsLegacyPass();
119
120/// Return a pass that removes redundant LEA instructions and redundant address
121/// recalculations.
122class X86OptimizeLEAsPass : public PassInfoMixin<X86OptimizeLEAsPass> {
123public:
124 PreservedAnalyses run(MachineFunction &MF,
125 MachineFunctionAnalysisManager &MFAM);
126};
127
128FunctionPass *createX86OptimizeLEAsLegacyPass();
129
130/// Return a pass that transforms setcc + movzx pairs into xor + setcc.
131class X86FixupSetCCPass : public PassInfoMixin<X86FixupSetCCPass> {
132public:
133 PreservedAnalyses run(MachineFunction &MF,
134 MachineFunctionAnalysisManager &MFAM);
135};
136
137FunctionPass *createX86FixupSetCCLegacyPass();
138
139/// Return a pass that avoids creating store forward block issues in the
140/// hardware.
141class X86AvoidStoreForwardingBlocksPass
142 : public PassInfoMixin<X86AvoidStoreForwardingBlocksPass> {
143public:
144 PreservedAnalyses run(MachineFunction &MF,
145 MachineFunctionAnalysisManager &MFAM);
146};
147
148FunctionPass *createX86AvoidStoreForwardingBlocksLegacyPass();
149
150/// Return a pass that lowers EFLAGS copy pseudo instructions.
151class X86FlagsCopyLoweringPass
152 : public PassInfoMixin<X86FlagsCopyLoweringPass> {
153public:
154 PreservedAnalyses run(MachineFunction &MF,
155 MachineFunctionAnalysisManager &MFAM);
156};
157
158FunctionPass *createX86FlagsCopyLoweringLegacyPass();
159
160/// Return a pass that expands DynAlloca pseudo-instructions.
161class X86DynAllocaExpanderPass
162 : public PassInfoMixin<X86DynAllocaExpanderPass> {
163public:
164 PreservedAnalyses run(MachineFunction &MF,
165 MachineFunctionAnalysisManager &MFAM);
166};
167
168FunctionPass *createX86DynAllocaExpanderLegacyPass();
169
170/// Return a pass that config the tile registers.
171class X86TileConfigPass : public PassInfoMixin<X86TileConfigPass> {
172public:
173 PreservedAnalyses run(MachineFunction &MF,
174 MachineFunctionAnalysisManager &MFAM);
175};
176
177FunctionPass *createX86TileConfigLegacyPass();
178
179/// Return a pass that preconfig the tile registers before fast reg allocation.
180class X86FastPreTileConfigPass
181 : public PassInfoMixin<X86FastPreTileConfigPass> {
182public:
183 PreservedAnalyses run(MachineFunction &MF,
184 MachineFunctionAnalysisManager &MFAM);
185};
186
187FunctionPass *createX86FastPreTileConfigLegacyPass();
188
189/// Return a pass that config the tile registers after fast reg allocation.
190class X86FastTileConfigPass : public PassInfoMixin<X86FastTileConfigPass> {
191public:
192 PreservedAnalyses run(MachineFunction &MF,
193 MachineFunctionAnalysisManager &MFAM);
194};
195
196FunctionPass *createX86FastTileConfigLegacyPass();
197
198/// Return a pass that insert pseudo tile config instruction.
199class X86PreTileConfigPass : public PassInfoMixin<X86PreTileConfigPass> {
200public:
201 PreservedAnalyses run(MachineFunction &MF,
202 MachineFunctionAnalysisManager &MFAM);
203};
204
205FunctionPass *createX86PreTileConfigLegacyPass();
206
207/// Return a pass that lower the tile copy instruction.
208class X86LowerTileCopyPass : public PassInfoMixin<X86LowerTileCopyPass> {
209public:
210 PreservedAnalyses run(MachineFunction &MF,
211 MachineFunctionAnalysisManager &MFAM);
212};
213
214FunctionPass *createX86LowerTileCopyLegacyPass();
215
216/// Return a pass that inserts int3 at the end of the function if it ends with a
217/// CALL instruction. The pass does the same for each funclet as well. This
218/// ensures that the open interval of function start and end PCs contains all
219/// return addresses for the benefit of the Windows x64 unwinder.
220class X86AvoidTrailingCallPass
221 : public PassInfoMixin<X86AvoidTrailingCallPass> {
222public:
223 PreservedAnalyses run(MachineFunction &MF,
224 MachineFunctionAnalysisManager &MFAM);
225 static bool isRequired() { return true; }
226};
227
228FunctionPass *createX86AvoidTrailingCallLegacyPass();
229
230/// Return a pass that optimizes the code-size of x86 call sequences. This is
231/// done by replacing esp-relative movs with pushes.
232class X86CallFrameOptimizationPass
233 : public PassInfoMixin<X86CallFrameOptimizationPass> {
234public:
235 PreservedAnalyses run(MachineFunction &MF,
236 MachineFunctionAnalysisManager &MFAM);
237};
238
239FunctionPass *createX86CallFrameOptimizationLegacyPass();
240
241/// Return an IR pass that inserts EH registration stack objects and explicit
242/// EH state updates. This pass must run after EH preparation, which does
243/// Windows-specific but architecture-neutral preparation.
244class X86WinEHStatePass : public PassInfoMixin<X86WinEHStatePass> {
245public:
246 X86WinEHStatePass() = default;
247 PreservedAnalyses run(Module &M, ModuleAnalysisManager &MAM);
248};
249
250FunctionPass *createX86WinEHStateLegacyPass();
251
252/// Return a Machine IR pass that expands X86-specific pseudo
253/// instructions into a sequence of actual instructions. This pass
254/// must run after prologue/epilogue insertion and before lowering
255/// the MachineInstr to MC.
256class X86ExpandPseudoPass : public PassInfoMixin<X86ExpandPseudoPass> {
257public:
258 PreservedAnalyses run(MachineFunction &MF,
259 MachineFunctionAnalysisManager &MFAM);
260};
261
262FunctionPass *createX86ExpandPseudoLegacyPass();
263
264/// This pass converts X86 cmov instructions into branch when profitable.
265class X86CmovConversionPass : public PassInfoMixin<X86CmovConversionPass> {
266public:
267 PreservedAnalyses run(MachineFunction &MF,
268 MachineFunctionAnalysisManager &MFAM);
269};
270
271FunctionPass *createX86CmovConversionLegacyPass();
272
273/// Return a Machine IR pass that selectively replaces
274/// certain byte and word instructions by equivalent 32 bit instructions,
275/// in order to eliminate partial register usage, false dependences on
276/// the upper portions of registers, and to save code size.
277class X86FixupBWInstsPass : public PassInfoMixin<X86FixupBWInstsPass> {
278public:
279 PreservedAnalyses run(MachineFunction &MF,
280 MachineFunctionAnalysisManager &MFAM);
281};
282
283FunctionPass *createX86FixupBWInstsLegacyPass();
284
285/// Return a Machine IR pass that reassigns instruction chains from one domain
286/// to another, when profitable.
287class X86DomainReassignmentPass
288 : public PassInfoMixin<X86DomainReassignmentPass> {
289public:
290 PreservedAnalyses run(MachineFunction &MF,
291 MachineFunctionAnalysisManager &MFAM);
292};
293
294FunctionPass *createX86DomainReassignmentLegacyPass();
295
296/// This pass compress instructions from EVEX space to legacy/VEX/EVEX space when
297/// possible in order to reduce code size or facilitate HW decoding.
298class X86CompressEVEXPass : public PassInfoMixin<X86CompressEVEXPass> {
299public:
300 PreservedAnalyses run(MachineFunction &MF,
301 MachineFunctionAnalysisManager &MFAM);
302};
303
304FunctionPass *createX86CompressEVEXLegacyPass();
305
306/// This pass creates the thunks for the retpoline feature.
307FunctionPass *createX86IndirectThunksPass();
308
309/// This pass replaces ret instructions with jmp's to __x86_return thunk.
310class X86ReturnThunksPass : public PassInfoMixin<X86ReturnThunksPass> {
311public:
312 PreservedAnalyses run(MachineFunction &MF,
313 MachineFunctionAnalysisManager &MFAM);
314};
315
316FunctionPass *createX86ReturnThunksLegacyPass();
317
318/// This pass insert wait instruction after X87 instructions which could raise
319/// fp exceptions when strict-fp enabled.
320class X86InsertX87WaitPass : public PassInfoMixin<X86InsertX87WaitPass> {
321public:
322 PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &);
323};
324
325FunctionPass *createX86InsertX87WaitLegacyPass();
326
327/// This pass optimizes arithmetic based on knowledge that is only used by
328/// a reduction sequence and is therefore safe to reassociate in interesting
329/// ways.
330class X86PartialReductionPass : public PassInfoMixin<X86PartialReductionPass> {
331private:
332 const X86TargetMachine *TM;
333
334public:
335 X86PartialReductionPass(const X86TargetMachine *TM) : TM(TM) {}
336 PreservedAnalyses run(Function &F, FunctionAnalysisManager &FAM);
337};
338
339FunctionPass *createX86PartialReductionLegacyPass();
340
341/// // Analyzes and emits pseudos to support Win x64 Unwind V2.
342class X86WinEHUnwindV2Pass : public PassInfoMixin<X86WinEHUnwindV2Pass> {
343public:
344 X86WinEHUnwindV2Pass() = default;
345 PreservedAnalyses run(MachineFunction &MF,
346 MachineFunctionAnalysisManager &MFAM);
347};
348
349FunctionPass *createX86WinEHUnwindV2LegacyPass();
350
351/// The pass transforms load/store <256 x i32> to AMX load/store intrinsics
352/// or split the data to two <128 x i32>.
353class X86LowerAMXTypePass : public PassInfoMixin<X86LowerAMXTypePass> {
354private:
355 const TargetMachine *TM;
356
357public:
358 X86LowerAMXTypePass(const TargetMachine *TM) : TM(TM) {}
359 PreservedAnalyses run(Function &F, FunctionAnalysisManager &FAM);
360 static bool isRequired() { return true; }
361};
362
363FunctionPass *createX86LowerAMXTypeLegacyPass();
364
365// Suppresses APX features for relocations for supporting older linkers.
366class X86SuppressAPXForRelocationPass
367 : public PassInfoMixin<X86SuppressAPXForRelocationPass> {
368public:
369 PreservedAnalyses run(MachineFunction &MF,
370 MachineFunctionAnalysisManager &MFAM);
371};
372
373FunctionPass *createX86SuppressAPXForRelocationLegacyPass();
374
375/// The pass transforms amx intrinsics to scalar operation if the function has
376/// optnone attribute or it is O0.
377class X86LowerAMXIntrinsicsPass
378 : public PassInfoMixin<X86LowerAMXIntrinsicsPass> {
379private:
380 const TargetMachine *TM;
381
382public:
383 X86LowerAMXIntrinsicsPass(const TargetMachine *TM) : TM(TM) {}
384 PreservedAnalyses run(Function &F, FunctionAnalysisManager &FAM);
385 static bool isRequired() { return true; }
386};
387
388FunctionPass *createX86LowerAMXIntrinsicsLegacyPass();
389
390InstructionSelector *createX86InstructionSelector(const X86TargetMachine &TM,
391 const X86Subtarget &,
392 const X86RegisterBankInfo &);
393
394FunctionPass *createX86PostLegalizerCombiner();
395FunctionPass *createX86PreLegalizerCombiner();
396
397class X86LoadValueInjectionLoadHardeningPass
398 : public PassInfoMixin<X86LoadValueInjectionLoadHardeningPass> {
399public:
400 PreservedAnalyses run(MachineFunction &MF,
401 MachineFunctionAnalysisManager &MFAM);
402};
403
404FunctionPass *createX86LoadValueInjectionLoadHardeningLegacyPass();
405
406class X86LoadValueInjectionRetHardeningPass
407 : public PassInfoMixin<X86LoadValueInjectionRetHardeningPass> {
408public:
409 PreservedAnalyses run(MachineFunction &MF,
410 MachineFunctionAnalysisManager &MFAM);
411};
412
413FunctionPass *createX86LoadValueInjectionRetHardeningLegacyPass();
414
415class X86SpeculativeExecutionSideEffectSuppressionPass
416 : public PassInfoMixin<X86SpeculativeExecutionSideEffectSuppressionPass> {
417public:
418 PreservedAnalyses run(MachineFunction &MF,
419 MachineFunctionAnalysisManager &MFAM);
420};
421
422FunctionPass *createX86SpeculativeExecutionSideEffectSuppressionLegacyPass();
423
424class X86SpeculativeLoadHardeningPass
425 : public PassInfoMixin<X86SpeculativeLoadHardeningPass> {
426public:
427 PreservedAnalyses run(MachineFunction &MF,
428 MachineFunctionAnalysisManager &MFAM);
429};
430
431FunctionPass *createX86SpeculativeLoadHardeningLegacyPass();
432
433class X86ArgumentStackSlotPass
434 : public PassInfoMixin<X86ArgumentStackSlotPass> {
435public:
436 PreservedAnalyses run(MachineFunction &MF,
437 MachineFunctionAnalysisManager &MFAM);
438};
439
440FunctionPass *createX86ArgumentStackSlotLegacyPass();
441
442void initializeCompressEVEXLegacyPass(PassRegistry &);
443void initializeX86FixupBWInstLegacyPass(PassRegistry &);
444void initializeFixupLEAsLegacyPass(PassRegistry &);
445void initializeX86ArgumentStackSlotLegacyPass(PassRegistry &);
446void initializeX86AsmPrinterPass(PassRegistry &);
447void initializeX86FixupInstTuningLegacyPass(PassRegistry &);
448void initializeX86FixupVectorConstantsLegacyPass(PassRegistry &);
449void initializeWinEHStateLegacyPass(PassRegistry &);
450void initializeX86AvoidSFBLegacyPass(PassRegistry &);
451void initializeX86AvoidTrailingCallLegacyPassPass(PassRegistry &);
452void initializeX86CallFrameOptimizationLegacyPass(PassRegistry &);
453void initializeX86CmovConversionLegacyPass(PassRegistry &);
454void initializeX86DAGToDAGISelLegacyPass(PassRegistry &);
455void initializeX86DomainReassignmentLegacyPass(PassRegistry &);
456void initializeX86DynAllocaExpanderLegacyPass(PassRegistry &);
457void initializeX86ExecutionDomainFixPass(PassRegistry &);
458void initializeX86ExpandPseudoLegacyPass(PassRegistry &);
459void initializeX86FPStackifierLegacyPass(PassRegistry &);
460void initializeX86FastPreTileConfigLegacyPass(PassRegistry &);
461void initializeX86FastTileConfigLegacyPass(PassRegistry &);
462void initializeX86FixupSetCCLegacyPass(PassRegistry &);
463void initializeX86FlagsCopyLoweringLegacyPass(PassRegistry &);
464void initializeX86IndirectBranchTrackingLegacyPass(PassRegistry &);
465void initializeX86LoadValueInjectionLoadHardeningLegacyPass(PassRegistry &);
466void initializeX86LoadValueInjectionRetHardeningLegacyPass(PassRegistry &);
467void initializeX86LowerAMXIntrinsicsLegacyPassPass(PassRegistry &);
468void initializeX86LowerAMXTypeLegacyPassPass(PassRegistry &);
469void initializeX86LowerTileCopyLegacyPass(PassRegistry &);
470void initializeX86OptimizeLEAsLegacyPass(PassRegistry &);
471void initializeX86PartialReductionLegacyPass(PassRegistry &);
472void initializeX86PreTileConfigLegacyPass(PassRegistry &);
473void initializeX86ReturnThunksLegacyPass(PassRegistry &);
474void initializeX86SpeculativeExecutionSideEffectSuppressionLegacyPass(
475 PassRegistry &);
476void initializeX86SpeculativeLoadHardeningLegacyPass(PassRegistry &);
477void initializeX86SuppressAPXForRelocationLegacyPass(PassRegistry &);
478void initializeX86TileConfigLegacyPass(PassRegistry &);
479void initializeX86WinEHUnwindV2LegacyPass(PassRegistry &);
480void initializeX86PreLegalizerCombinerPass(PassRegistry &);
481void initializeX86PostLegalizerCombinerPass(PassRegistry &);
482
483namespace X86AS {
484enum : unsigned {
485 GS = 256,
486 FS = 257,
487 SS = 258,
488 PTR32_SPTR = 270,
489 PTR32_UPTR = 271,
490 PTR64 = 272
491};
492} // End X86AS namespace
493
494} // End llvm namespace
495
496#endif
497