1//===- VPlanTransforms.h - Utility VPlan to VPlan transforms --------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file provides utility VPlan to VPlan transformations.
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_TRANSFORMS_VECTORIZE_VPLANTRANSFORMS_H
14#define LLVM_TRANSFORMS_VECTORIZE_VPLANTRANSFORMS_H
15
16#include "VPlan.h"
17#include "VPlanVerifier.h"
18#include "llvm/ADT/STLFunctionalExtras.h"
19#include "llvm/ADT/ScopeExit.h"
20#include "llvm/Support/CommandLine.h"
21#include "llvm/Support/Compiler.h"
22#include "llvm/Support/Regex.h"
23
24namespace llvm {
25
26class InductionDescriptor;
27class Instruction;
28class Loop;
29class LoopVersioning;
30class OptimizationRemarkEmitter;
31class PHINode;
32class ScalarEvolution;
33class PredicatedScalarEvolution;
34class TargetLibraryInfo;
35class TargetTransformInfo;
36class VPBuilder;
37class VPRecipeBuilder;
38struct VFRange;
39
40LLVM_ABI_FOR_TEST extern cl::opt<bool> VerifyEachVPlan;
41LLVM_ABI_FOR_TEST extern cl::opt<bool> EnableWideActiveLaneMask;
42
43#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
44LLVM_ABI_FOR_TEST extern cl::opt<bool> VPlanPrintAfterAll;
45LLVM_ABI_FOR_TEST extern cl::list<std::string> VPlanPrintAfterPasses;
46LLVM_ABI_FOR_TEST extern cl::opt<bool> VPlanPrintVectorRegionScope;
47#endif
48
49struct VPlanTransforms {
50 /// Helper to run a VPlan pass \p Pass on \p VPlan, forwarding extra arguments
51 /// to the pass. Performs verification/printing after each VPlan pass if
52 /// requested via command line options.
53 template <bool EnableVerify = true, typename PassTy, typename... ArgsTy>
54 static decltype(auto) runPass(StringRef PassName, PassTy &&Pass, VPlan &Plan,
55 ArgsTy &&...Args) {
56 scope_exit PostTransformActions{[&]() {
57#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
58 // Make sure to print before verification, so that output is more useful
59 // in case of failures:
60 if (VPlanPrintAfterAll ||
61 (VPlanPrintAfterPasses.getNumOccurrences() > 0 &&
62 any_of(VPlanPrintAfterPasses, [PassName](StringRef Entry) {
63 return Regex(Entry).match(PassName);
64 }))) {
65 dbgs()
66 << "VPlan for loop in '"
67 << Plan.getScalarHeader()->getIRBasicBlock()->getParent()->getName()
68 << "' after " << PassName << '\n';
69 if (VPlanPrintVectorRegionScope && Plan.getVectorLoopRegion())
70 Plan.getVectorLoopRegion()->print(dbgs());
71 else
72 dbgs() << Plan << '\n';
73 }
74#endif
75 if (VerifyEachVPlan && EnableVerify) {
76 if (!verifyVPlanIsValid(Plan))
77 report_fatal_error(reason: "Broken VPlan found, compilation aborted!");
78 }
79 }};
80
81 return std::forward<PassTy>(Pass)(Plan, std::forward<ArgsTy>(Args)...);
82 }
83#define RUN_VPLAN_PASS(PASS, ...) \
84 llvm::VPlanTransforms::runPass(#PASS, PASS, __VA_ARGS__)
85#define RUN_VPLAN_PASS_NO_VERIFY(PASS, ...) \
86 llvm::VPlanTransforms::runPass<false>(#PASS, PASS, __VA_ARGS__)
87
88 /// Create a base VPlan0, serving as the common starting point for all later
89 /// candidates. It consists of an initial plain CFG loop with loop blocks from
90 /// \p TheLoop being directly translated to VPBasicBlocks with VPInstruction
91 /// corresponding to the input IR.
92 ///
93 /// The created loop is wrapped in an initial skeleton to facilitate
94 /// vectorization, consisting of a vector pre-header, an exit block for the
95 /// main vector loop (middle.block) and a new block as preheader of the scalar
96 /// loop (scalar.ph). See below for an illustration. It also adds a canonical
97 /// IV and its increment, using \p InductionTy and \p IVDL, and creates a
98 /// VPValue expression for the original trip count.
99 ///
100 /// [ ] <-- Plan's entry VPIRBasicBlock, wrapping the original loop's
101 /// / \ old preheader. Will contain iteration number check and SCEV
102 /// | | expansions.
103 /// | |
104 /// / v
105 /// | [ ] <-- vector loop bypass (may consist of multiple blocks) will be
106 /// | / | added later.
107 /// | / v
108 /// || [ ] <-- vector pre header.
109 /// |/ |
110 /// | v
111 /// | [ ] \ <-- plain CFG loop wrapping original loop to be vectorized.
112 /// | [ ]_|
113 /// | |
114 /// | v
115 /// | [ ] <--- middle-block with the branch to successors
116 /// | / |
117 /// | / |
118 /// | | v
119 /// \--->[ ] <--- scalar preheader (initial a VPBasicBlock, which will be
120 /// | | replaced later by a VPIRBasicBlock wrapping the scalar
121 /// | | preheader basic block.
122 /// | |
123 /// v <-- edge from middle to exit iff epilogue is not required.
124 /// | [ ] \
125 /// | [ ]_| <-- old scalar loop to handle remainder (scalar epilogue,
126 /// | | header wrapped in VPIRBasicBlock).
127 /// \ |
128 /// \ v
129 /// >[ ] <-- original loop exit block(s), wrapped in VPIRBasicBlocks.
130 LLVM_ABI_FOR_TEST static std::unique_ptr<VPlan>
131 buildVPlan0(Loop *TheLoop, LoopInfo &LI, Type *InductionTy, DebugLoc IVDL,
132 PredicatedScalarEvolution &PSE, LoopVersioning *LVer = nullptr);
133
134 /// Replace VPPhi recipes in \p Plan's header with corresponding
135 /// VPHeaderPHIRecipe subclasses for inductions, reductions, and
136 /// fixed-order recurrences. This processes all header phis and creates
137 /// the appropriate widened recipe for each one.
138 static void createHeaderPhiRecipes(
139 VPlan &Plan, PredicatedScalarEvolution &PSE, Loop &OrigLoop,
140 const MapVector<PHINode *, InductionDescriptor> &Inductions,
141 const MapVector<PHINode *, RecurrenceDescriptor> &Reductions,
142 const SmallPtrSetImpl<const PHINode *> &FixedOrderRecurrences,
143 const SmallPtrSetImpl<PHINode *> &InLoopReductions, bool AllowReordering);
144
145 /// Create VPReductionRecipes for in-loop reductions. This processes chains
146 /// of operations contributing to in-loop reductions and creates appropriate
147 /// VPReductionRecipe instances.
148 static void createInLoopReductionRecipes(
149 VPlan &Plan, const DenseSet<BasicBlock *> &BlocksNeedingPredication,
150 ElementCount MinVF);
151
152 /// Update \p Plan to account for all early exits.
153 LLVM_ABI_FOR_TEST static void handleEarlyExits(VPlan &Plan,
154 bool HasUncountableExit);
155
156 /// If a check is needed to guard executing the scalar epilogue loop, it will
157 /// be added to the middle block.
158 LLVM_ABI_FOR_TEST static void addMiddleCheck(VPlan &Plan, bool TailFolded);
159
160 // Create a check to \p Plan to see if the vector loop should be executed.
161 static void addMinimumIterationCheck(
162 VPlan &Plan, ElementCount VF, unsigned UF,
163 ElementCount MinProfitableTripCount, bool RequiresScalarEpilogue,
164 bool TailFolded, Loop *OrigLoop, const uint32_t *MinItersBypassWeights,
165 DebugLoc DL, PredicatedScalarEvolution &PSE);
166
167 /// Add a check to \p Plan to see if the epilogue vector loop should be
168 /// executed.
169 static void addMinimumVectorEpilogueIterationCheck(
170 VPlan &Plan, Value *TripCount, Value *VectorTripCount,
171 bool RequiresScalarEpilogue, ElementCount EpilogueVF, unsigned EpilogueUF,
172 unsigned MainLoopStep, unsigned EpilogueLoopStep, ScalarEvolution &SE);
173
174 /// Replace loops in \p Plan's flat CFG with VPRegionBlocks, turning \p Plan's
175 /// flat CFG into a hierarchical CFG.
176 LLVM_ABI_FOR_TEST static void createLoopRegions(VPlan &Plan);
177
178 /// Wrap runtime check block \p CheckBlock in a VPIRBB and \p Cond in a
179 /// VPValue and connect the block to \p Plan, using the VPValue as branch
180 /// condition.
181 static void attachCheckBlock(VPlan &Plan, Value *Cond, BasicBlock *CheckBlock,
182 bool AddBranchWeights);
183
184 /// Replaces the VPInstructions in \p Plan with corresponding
185 /// widen recipes. Returns false if any VPInstructions could not be converted
186 /// to a wide recipe if needed.
187 LLVM_ABI_FOR_TEST static bool
188 tryToConvertVPInstructionsToVPRecipes(VPlan &Plan,
189 const TargetLibraryInfo &TLI);
190
191 /// Try to legalize reductions with multiple in-loop uses. Currently only
192 /// strict and non-strict min/max reductions used by FindLastIV reductions are
193 /// supported, corresponding to computing the first and last argmin/argmax,
194 /// respectively. Otherwise return false.
195 static bool handleMultiUseReductions(VPlan &Plan,
196 OptimizationRemarkEmitter *ORE,
197 Loop *TheLoop);
198
199 /// Try to have all users of fixed-order recurrences appear after the recipe
200 /// defining their previous value, by either sinking users or hoisting recipes
201 /// defining their previous value (and its operands). Then introduce
202 /// FirstOrderRecurrenceSplice VPInstructions to combine the value from the
203 /// recurrence phis and previous values.
204 /// \returns true if all users of fixed-order recurrences could be re-arranged
205 /// as needed or false if it is not possible. In the latter case, \p Plan is
206 /// not valid.
207 static bool adjustFixedOrderRecurrences(VPlan &Plan, VPBuilder &Builder);
208
209 /// Check if \p Plan contains any FMaxNum or FMinNum reductions. If they do,
210 /// try to update the vector loop to exit early if any input is NaN and resume
211 /// executing in the scalar loop to handle the NaNs there. Return false if
212 /// this attempt was unsuccessful.
213 static bool handleMaxMinNumReductions(VPlan &Plan);
214
215 /// Check if \p Plan contains any FindLast reductions. If it does, try to
216 /// update the vector loop to save the appropriate state using selects
217 /// for entire vectors for both the latest mask containing at least one active
218 /// element and the corresponding data vector. Return false if this attempt
219 /// was unsuccessful.
220 static bool handleFindLastReductions(VPlan &Plan);
221
222 /// Clear NSW/NUW flags from reduction instructions if necessary.
223 static void clearReductionWrapFlags(VPlan &Plan);
224
225 /// Explicitly unroll \p Plan by \p UF.
226 static void unrollByUF(VPlan &Plan, unsigned UF);
227
228 /// Replace each replicating VPReplicateRecipe and VPInstruction outside of
229 /// any replicate region in \p Plan with \p VF single-scalar recipes.
230 /// TODO: Also replicate VPScalarIVSteps and VPReplicateRecipes inside
231 /// replicate regions, thereby dissolving the latter.
232 static void replicateByVF(VPlan &Plan, ElementCount VF);
233
234 /// Optimize \p Plan based on \p BestVF and \p BestUF. This may restrict the
235 /// resulting plan to \p BestVF and \p BestUF.
236 static void optimizeForVFAndUF(VPlan &Plan, ElementCount BestVF,
237 unsigned BestUF,
238 PredicatedScalarEvolution &PSE);
239
240 /// Apply VPlan-to-VPlan optimizations to \p Plan, including induction recipe
241 /// optimizations, dead recipe removal, replicate region optimizations and
242 /// block merging.
243 LLVM_ABI_FOR_TEST static void optimize(VPlan &Plan);
244
245 /// Wrap predicated VPReplicateRecipes with a mask operand in an if-then
246 /// region block and remove the mask operand. Optimize the created regions by
247 /// iteratively sinking scalar operands into the region, followed by merging
248 /// regions until no improvements are remaining.
249 static void createAndOptimizeReplicateRegions(VPlan &Plan);
250
251 /// Replace (ICMP_ULE, wide canonical IV, backedge-taken-count) checks with an
252 /// (active-lane-mask recipe, wide canonical IV, trip-count). If \p
253 /// UseActiveLaneMaskForControlFlow is true, introduce an
254 /// VPActiveLaneMaskPHIRecipe.
255 static void addActiveLaneMask(VPlan &Plan,
256 bool UseActiveLaneMaskForControlFlow);
257
258 /// Insert truncates and extends for any truncated recipe. Redundant casts
259 /// will be folded later.
260 static void
261 truncateToMinimalBitwidths(VPlan &Plan,
262 const MapVector<Instruction *, uint64_t> &MinBWs);
263
264 /// Replace symbolic strides from \p StridesMap in \p Plan with constants when
265 /// possible.
266 static void
267 replaceSymbolicStrides(VPlan &Plan, PredicatedScalarEvolution &PSE,
268 const DenseMap<Value *, const SCEV *> &StridesMap);
269
270 /// Drop poison flags from recipes that may generate a poison value that is
271 /// used after vectorization, even when their operands are not poison. Those
272 /// recipes meet the following conditions:
273 /// * Contribute to the address computation of a recipe generating a widen
274 /// memory load/store (VPWidenMemoryInstructionRecipe or
275 /// VPInterleaveRecipe).
276 /// * Such a widen memory load/store has at least one underlying Instruction
277 /// that is in a basic block that needs predication and after vectorization
278 /// the generated instruction won't be predicated.
279 /// Uses \p BlockNeedsPredication to check if a block needs predicating.
280 /// TODO: Replace BlockNeedsPredication callback with retrieving info from
281 /// VPlan directly.
282 static void dropPoisonGeneratingRecipes(
283 VPlan &Plan,
284 const std::function<bool(BasicBlock *)> &BlockNeedsPredication);
285
286 /// Add a VPCurrentIterationPHIRecipe and related recipes to \p Plan and
287 /// replaces all uses except the canonical IV increment of
288 /// VPCanonicalIVPHIRecipe with a VPCurrentIterationPHIRecipe.
289 /// VPCanonicalIVPHIRecipe is only used to control the loop after
290 /// this transformation.
291 static void
292 addExplicitVectorLength(VPlan &Plan,
293 const std::optional<unsigned> &MaxEVLSafeElements);
294
295 /// Optimize recipes which use an EVL-based header mask to VP intrinsics, for
296 /// example:
297 ///
298 /// %mask = icmp ult step-vector, EVL
299 /// %load = load %ptr, %mask
300 /// -->
301 /// %load = vp.load %ptr, EVL
302 static void optimizeEVLMasks(VPlan &Plan);
303
304 // For each Interleave Group in \p InterleaveGroups replace the Recipes
305 // widening its memory instructions with a single VPInterleaveRecipe at its
306 // insertion point.
307 static void createInterleaveGroups(
308 VPlan &Plan,
309 const SmallPtrSetImpl<const InterleaveGroup<Instruction> *>
310 &InterleaveGroups,
311 VPRecipeBuilder &RecipeBuilder, const bool &ScalarEpilogueAllowed);
312
313 /// Remove dead recipes from \p Plan.
314 static void removeDeadRecipes(VPlan &Plan);
315
316 /// Update \p Plan to account for uncountable early exits by introducing
317 /// appropriate branching logic in the latch that handles early exits and the
318 /// latch exit condition. Multiple exits are handled with a dispatch block
319 /// that determines which exit to take based on lane-by-lane semantics.
320 static void handleUncountableEarlyExits(VPlan &Plan, VPBasicBlock *HeaderVPBB,
321 VPBasicBlock *LatchVPBB,
322 VPBasicBlock *MiddleVPBB);
323
324 /// Replaces the exit condition from
325 /// (branch-on-cond eq CanonicalIVInc, VectorTripCount)
326 /// to
327 /// (branch-on-cond eq AVLNext, 0)
328 static void convertEVLExitCond(VPlan &Plan);
329
330 /// Replace loop regions with explicit CFG.
331 static void dissolveLoopRegions(VPlan &Plan);
332
333 /// Expand BranchOnTwoConds instructions into explicit CFG with
334 /// BranchOnCond instructions. Should be called after dissolveLoopRegions.
335 static void expandBranchOnTwoConds(VPlan &Plan);
336
337 /// Transform loops with variable-length stepping after region
338 /// dissolution.
339 ///
340 /// Once loop regions are replaced with explicit CFG, loops can step with
341 /// variable vector lengths instead of fixed lengths. This transformation:
342 /// * Makes CurrentIteration-Phi concrete.
343 // * Removes CanonicalIV and increment.
344 static void convertToVariableLengthStep(VPlan &Plan);
345
346 /// Lower abstract recipes to concrete ones, that can be codegen'd.
347 static void convertToConcreteRecipes(VPlan &Plan);
348
349 /// This function converts initial recipes to the abstract recipes and clamps
350 /// \p Range based on cost model for following optimizations and cost
351 /// estimations. The converted abstract recipes will lower to concrete
352 /// recipes before codegen.
353 static void convertToAbstractRecipes(VPlan &Plan, VPCostContext &Ctx,
354 VFRange &Range);
355
356 /// Perform instcombine-like simplifications on recipes in \p Plan.
357 static void simplifyRecipes(VPlan &Plan);
358
359 /// Remove BranchOnCond recipes with true or false conditions together with
360 /// removing dead edges to their successors.
361 static void removeBranchOnConst(VPlan &Plan);
362
363 /// Perform common-subexpression-elimination on \p Plan.
364 static void cse(VPlan &Plan);
365
366 /// If there's a single exit block, optimize its phi recipes that use exiting
367 /// IV values by feeding them precomputed end values instead, possibly taken
368 /// one step backwards.
369 static void optimizeInductionLiveOutUsers(VPlan &Plan,
370 PredicatedScalarEvolution &PSE,
371 bool FoldTail);
372
373 /// Add explicit broadcasts for live-ins and VPValues defined in \p Plan's entry block if they are used as vectors.
374 static void materializeBroadcasts(VPlan &Plan);
375
376 /// Hoist single-scalar loads with invariant addresses out of the vector loop
377 /// to the preheader, if they are proven not to alias with any stores in the
378 /// plan using noalias metadata.
379 static void hoistInvariantLoads(VPlan &Plan);
380
381 /// Hoist predicated loads from the same address to the loop entry block, if
382 /// they are guaranteed to execute on both paths (i.e., in replicate regions
383 /// with complementary masks P and NOT P).
384 static void hoistPredicatedLoads(VPlan &Plan, PredicatedScalarEvolution &PSE,
385 const Loop *L);
386
387 /// Sink predicated stores to the same address with complementary predicates
388 /// (P and NOT P) to an unconditional store with select recipes for the
389 /// stored values. This eliminates branching overhead when all paths
390 /// unconditionally store to the same location.
391 static void sinkPredicatedStores(VPlan &Plan, PredicatedScalarEvolution &PSE,
392 const Loop *L);
393
394 // Materialize vector trip counts for constants early if it can simply be
395 // computed as (Original TC / VF * UF) * VF * UF.
396 static void
397 materializeConstantVectorTripCount(VPlan &Plan, ElementCount BestVF,
398 unsigned BestUF,
399 PredicatedScalarEvolution &PSE);
400
401 /// Materialize vector trip count computations to a set of VPInstructions.
402 /// \p Step is used as the step value for the trip count computation.
403 static void materializeVectorTripCount(VPlan &Plan,
404 VPBasicBlock *VectorPHVPBB,
405 bool TailByMasking,
406 bool RequiresScalarEpilogue,
407 VPValue *Step);
408
409 /// Materialize the backedge-taken count to be computed explicitly using
410 /// VPInstructions.
411 static void materializeBackedgeTakenCount(VPlan &Plan,
412 VPBasicBlock *VectorPH);
413
414 /// Add explicit Build[Struct]Vector recipes to Pack multiple scalar values
415 /// into vectors and Unpack recipes to extract scalars from vectors as
416 /// needed.
417 static void materializePacksAndUnpacks(VPlan &Plan);
418
419 /// Materialize UF, VF and VFxUF to be computed explicitly using
420 /// VPInstructions.
421 static void materializeFactors(VPlan &Plan, VPBasicBlock *VectorPH,
422 ElementCount VF);
423
424 /// Expand VPExpandSCEVRecipes in \p Plan's entry block. Each
425 /// VPExpandSCEVRecipe is replaced with a live-in wrapping the expanded IR
426 /// value. A mapping from SCEV expressions to their expanded IR value is
427 /// returned.
428 static DenseMap<const SCEV *, Value *> expandSCEVs(VPlan &Plan,
429 ScalarEvolution &SE);
430
431 /// Try to find a single VF among \p Plan's VFs for which all interleave
432 /// groups (with known minimum VF elements) can be replaced by wide loads and
433 /// stores processing VF elements, if all transformed interleave groups access
434 /// the full vector width (checked via the maximum vector register width). If
435 /// the transformation can be applied, the original \p Plan will be split in
436 /// 2:
437 /// 1. The original Plan with the single VF containing the optimized recipes
438 /// using wide loads instead of interleave groups.
439 /// 2. A new clone which contains all VFs of Plan except the optimized VF.
440 ///
441 /// This effectively is a very simple form of loop-aware SLP, where we use
442 /// interleave groups to identify candidates.
443 static std::unique_ptr<VPlan>
444 narrowInterleaveGroups(VPlan &Plan, const TargetTransformInfo &TTI);
445
446 /// Adapts the vector loop region for tail folding by introducing a header
447 /// mask and conditionally executing the content of the region:
448 ///
449 /// Vector loop region before:
450 /// +-------------------------------------------+
451 /// |%iv = ... |
452 /// |... |
453 /// |%iv.next = add %iv, vfxuf |
454 /// |branch-on-count %iv.next, vector-trip-count|
455 /// +-------------------------------------------+
456 ///
457 /// Vector loop region after:
458 /// +-------------------------------------------+
459 /// |%iv = ... |
460 /// |%wide.iv = widen-canonical-iv ... |
461 /// |%header-mask = icmp ule %wide.iv, BTC |
462 /// |branch-on-cond %header-mask |---+
463 /// +-------------------------------------------+ |
464 /// | |
465 /// v |
466 /// +-------------------------------------------+ |
467 /// | ... | |
468 /// +-------------------------------------------+ |
469 /// | |
470 /// v |
471 /// +-------------------------------------------+ |
472 /// |<phis> = phi [..., ...], [poison, header] |
473 /// |%iv.next = add %iv, vfxuf |<--+
474 /// |branch-on-count %iv.next, vector-trip-count|
475 /// +-------------------------------------------+
476 ///
477 /// Any VPInstruction::ExtractLastLanes are also updated to extract from the
478 /// last active lane of the header mask.
479 static void foldTailByMasking(VPlan &Plan);
480
481 /// Predicate and linearize the control-flow in the only loop region of
482 /// \p Plan.
483 static void introduceMasksAndLinearize(VPlan &Plan);
484
485 /// Add branch weight metadata, if the \p Plan's middle block is terminated by
486 /// a BranchOnCond recipe.
487 static void
488 addBranchWeightToMiddleTerminator(VPlan &Plan, ElementCount VF,
489 std::optional<unsigned> VScaleForTuning);
490
491 /// Handle users in the exit block for first order reductions in the original
492 /// exit block. The penultimate value of recurrences is fed to their LCSSA phi
493 /// users in the original exit block using the VPIRInstruction wrapping to the
494 /// LCSSA phi.
495 static void addExitUsersForFirstOrderRecurrences(VPlan &Plan, VFRange &Range);
496
497 /// Optimize FindLast reductions selecting IVs (or expressions of IVs) by
498 /// converting them to FindIV reductions, if their IV range excludes a
499 /// suitable sentinel value. For expressions of IVs, the expression is sunk
500 /// to the middle block.
501 static void optimizeFindIVReductions(VPlan &Plan,
502 PredicatedScalarEvolution &PSE, Loop &L);
503
504 /// Detect and create partial reduction recipes for scaled reductions in
505 /// \p Plan. Must be called after recipe construction. If partial reductions
506 /// are only valid for a subset of VFs in Range, Range.End is updated.
507 static void createPartialReductions(VPlan &Plan, VPCostContext &CostCtx,
508 VFRange &Range);
509};
510
511} // namespace llvm
512
513#endif // LLVM_TRANSFORMS_VECTORIZE_VPLANTRANSFORMS_H
514