| 1 | //===--- AArch64.h - Declare AArch64 target feature support -----*- C++ -*-===// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // This file declares AArch64 TargetInfo objects. |
| 10 | // |
| 11 | //===----------------------------------------------------------------------===// |
| 12 | |
| 13 | #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_AARCH64_H |
| 14 | #define LLVM_CLANG_LIB_BASIC_TARGETS_AARCH64_H |
| 15 | |
| 16 | #include "OSTargets.h" |
| 17 | #include "clang/Basic/TargetBuiltins.h" |
| 18 | #include "llvm/TargetParser/AArch64TargetParser.h" |
| 19 | #include <optional> |
| 20 | |
| 21 | namespace clang { |
| 22 | namespace targets { |
| 23 | |
| 24 | enum AArch64AddrSpace { ptr32_sptr = 270, ptr32_uptr = 271, ptr64 = 272 }; |
| 25 | |
| 26 | static const unsigned ARM64AddrSpaceMap[] = { |
| 27 | 0, // Default |
| 28 | 0, // opencl_global |
| 29 | 0, // opencl_local |
| 30 | 0, // opencl_constant |
| 31 | 0, // opencl_private |
| 32 | 0, // opencl_generic |
| 33 | 0, // opencl_global_device |
| 34 | 0, // opencl_global_host |
| 35 | 0, // cuda_device |
| 36 | 0, // cuda_constant |
| 37 | 0, // cuda_shared |
| 38 | 0, // sycl_global |
| 39 | 0, // sycl_global_device |
| 40 | 0, // sycl_global_host |
| 41 | 0, // sycl_local |
| 42 | 0, // sycl_private |
| 43 | static_cast<unsigned>(AArch64AddrSpace::ptr32_sptr), |
| 44 | static_cast<unsigned>(AArch64AddrSpace::ptr32_uptr), |
| 45 | static_cast<unsigned>(AArch64AddrSpace::ptr64), |
| 46 | 0, // hlsl_groupshared |
| 47 | 0, // hlsl_constant |
| 48 | 0, // hlsl_private |
| 49 | 0, // hlsl_device |
| 50 | 0, // hlsl_input |
| 51 | // Wasm address space values for this target are dummy values, |
| 52 | // as it is only enabled for Wasm targets. |
| 53 | 20, // wasm_funcref |
| 54 | }; |
| 55 | |
| 56 | class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo { |
| 57 | virtual void setDataLayout() = 0; |
| 58 | static const TargetInfo::GCCRegAlias GCCRegAliases[]; |
| 59 | static const char *const GCCRegNames[]; |
| 60 | |
| 61 | enum FPUModeEnum { |
| 62 | FPUMode = (1 << 0), |
| 63 | NeonMode = (1 << 1), |
| 64 | SveMode = (1 << 2), |
| 65 | }; |
| 66 | |
| 67 | unsigned FPU = FPUMode; |
| 68 | bool HasCRC = false; |
| 69 | bool HasCSSC = false; |
| 70 | bool HasAES = false; |
| 71 | bool HasSHA2 = false; |
| 72 | bool HasSHA3 = false; |
| 73 | bool HasSM4 = false; |
| 74 | bool HasFullFP16 = false; |
| 75 | bool HasDotProd = false; |
| 76 | bool HasFP16FML = false; |
| 77 | bool HasMTE = false; |
| 78 | bool HasTME = false; |
| 79 | bool HasPAuth = false; |
| 80 | bool HasLS64 = false; |
| 81 | bool HasRandGen = false; |
| 82 | bool HasMatMul = false; |
| 83 | bool HasBFloat16 = false; |
| 84 | bool HasSVE2 = false; |
| 85 | bool HasSVE2p1 = false; |
| 86 | bool HasSVEAES = false; |
| 87 | bool HasSVE2SHA3 = false; |
| 88 | bool HasSVE2SM4 = false; |
| 89 | bool HasSVEB16B16 = false; |
| 90 | bool HasSVEBitPerm = false; |
| 91 | bool HasMatmulFP64 = false; |
| 92 | bool HasMatmulFP32 = false; |
| 93 | bool HasLSE = false; |
| 94 | bool HasFlagM = false; |
| 95 | bool HasAlternativeNZCV = false; |
| 96 | bool HasMOPS = false; |
| 97 | bool HasD128 = false; |
| 98 | bool HasRCPC = false; |
| 99 | bool HasRDM = false; |
| 100 | bool HasDIT = false; |
| 101 | bool HasCCPP = false; |
| 102 | bool HasCCDP = false; |
| 103 | bool HasFRInt3264 = false; |
| 104 | bool HasSME = false; |
| 105 | bool HasSME2 = false; |
| 106 | bool HasSMEF64F64 = false; |
| 107 | bool HasSMEI16I64 = false; |
| 108 | bool HasSMEF16F16 = false; |
| 109 | bool HasSMEB16B16 = false; |
| 110 | bool HasSME2p1 = false; |
| 111 | bool HasFP8 = false; |
| 112 | bool HasFP8FMA = false; |
| 113 | bool HasFP8DOT2 = false; |
| 114 | bool HasFP8DOT4 = false; |
| 115 | bool HasSSVE_FP8DOT2 = false; |
| 116 | bool HasSSVE_FP8DOT4 = false; |
| 117 | bool HasSSVE_FP8FMA = false; |
| 118 | bool HasSME_F8F32 = false; |
| 119 | bool HasSME_F8F16 = false; |
| 120 | bool HasSB = false; |
| 121 | bool HasPredRes = false; |
| 122 | bool HasSSBS = false; |
| 123 | bool HasBTI = false; |
| 124 | bool HasWFxT = false; |
| 125 | bool HasJSCVT = false; |
| 126 | bool HasFCMA = false; |
| 127 | bool HasNoFP = false; |
| 128 | bool HasNoNeon = false; |
| 129 | bool HasNoSVE = false; |
| 130 | bool HasFMV = true; |
| 131 | bool HasGCS = false; |
| 132 | bool HasRCPC3 = false; |
| 133 | bool HasSMEFA64 = false; |
| 134 | bool HasPAuthLR = false; |
| 135 | |
| 136 | const llvm::AArch64::ArchInfo *ArchInfo = &llvm::AArch64::ARMV8A; |
| 137 | |
| 138 | std::string ABI; |
| 139 | |
| 140 | public: |
| 141 | AArch64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); |
| 142 | |
| 143 | StringRef getABI() const override; |
| 144 | bool setABI(const std::string &Name) override; |
| 145 | |
| 146 | bool validateBranchProtection(StringRef Spec, StringRef Arch, |
| 147 | BranchProtectionInfo &BPI, |
| 148 | const LangOptions &LO, |
| 149 | StringRef &Err) const override; |
| 150 | |
| 151 | bool isValidCPUName(StringRef Name) const override; |
| 152 | void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override; |
| 153 | bool setCPU(const std::string &Name) override; |
| 154 | |
| 155 | uint64_t getFMVPriority(ArrayRef<StringRef> Features) const override; |
| 156 | |
| 157 | bool useFP16ConversionIntrinsics() const override { |
| 158 | return false; |
| 159 | } |
| 160 | |
| 161 | void getTargetDefinesARMV81A(const LangOptions &Opts, |
| 162 | MacroBuilder &Builder) const; |
| 163 | void getTargetDefinesARMV82A(const LangOptions &Opts, |
| 164 | MacroBuilder &Builder) const; |
| 165 | void getTargetDefinesARMV83A(const LangOptions &Opts, |
| 166 | MacroBuilder &Builder) const; |
| 167 | void getTargetDefinesARMV84A(const LangOptions &Opts, |
| 168 | MacroBuilder &Builder) const; |
| 169 | void getTargetDefinesARMV85A(const LangOptions &Opts, |
| 170 | MacroBuilder &Builder) const; |
| 171 | void getTargetDefinesARMV86A(const LangOptions &Opts, |
| 172 | MacroBuilder &Builder) const; |
| 173 | void getTargetDefinesARMV87A(const LangOptions &Opts, |
| 174 | MacroBuilder &Builder) const; |
| 175 | void getTargetDefinesARMV88A(const LangOptions &Opts, |
| 176 | MacroBuilder &Builder) const; |
| 177 | void getTargetDefinesARMV89A(const LangOptions &Opts, |
| 178 | MacroBuilder &Builder) const; |
| 179 | void getTargetDefinesARMV9A(const LangOptions &Opts, |
| 180 | MacroBuilder &Builder) const; |
| 181 | void getTargetDefinesARMV91A(const LangOptions &Opts, |
| 182 | MacroBuilder &Builder) const; |
| 183 | void getTargetDefinesARMV92A(const LangOptions &Opts, |
| 184 | MacroBuilder &Builder) const; |
| 185 | void getTargetDefinesARMV93A(const LangOptions &Opts, |
| 186 | MacroBuilder &Builder) const; |
| 187 | void getTargetDefinesARMV94A(const LangOptions &Opts, |
| 188 | MacroBuilder &Builder) const; |
| 189 | void getTargetDefinesARMV95A(const LangOptions &Opts, |
| 190 | MacroBuilder &Builder) const; |
| 191 | void getTargetDefinesARMV96A(const LangOptions &Opts, |
| 192 | MacroBuilder &Builder) const; |
| 193 | void getTargetDefines(const LangOptions &Opts, |
| 194 | MacroBuilder &Builder) const override; |
| 195 | |
| 196 | llvm::SmallVector<Builtin::InfosShard> getTargetBuiltins() const override; |
| 197 | |
| 198 | std::optional<std::pair<unsigned, unsigned>> |
| 199 | getVScaleRange(const LangOptions &LangOpts, ArmStreamingKind Mode, |
| 200 | llvm::StringMap<bool> *FeatureMap = nullptr) const override; |
| 201 | bool doesFeatureAffectCodeGen(StringRef Name) const override; |
| 202 | bool validateCpuSupports(StringRef FeatureStr) const override; |
| 203 | bool hasFeature(StringRef Feature) const override; |
| 204 | void setFeatureEnabled(llvm::StringMap<bool> &Features, StringRef Name, |
| 205 | bool Enabled) const override; |
| 206 | bool handleTargetFeatures(std::vector<std::string> &Features, |
| 207 | DiagnosticsEngine &Diags) override; |
| 208 | ParsedTargetAttr parseTargetAttr(StringRef Str) const override; |
| 209 | bool supportsTargetAttributeTune() const override { return true; } |
| 210 | bool supportsCpuSupports() const override { return true; } |
| 211 | bool checkArithmeticFenceSupported() const override { return true; } |
| 212 | |
| 213 | bool hasBFloat16Type() const override; |
| 214 | |
| 215 | CallingConvCheckResult checkCallingConvention(CallingConv CC) const override; |
| 216 | |
| 217 | bool isCLZForZeroUndef() const override; |
| 218 | |
| 219 | BuiltinVaListKind getBuiltinVaListKind() const override; |
| 220 | |
| 221 | ArrayRef<const char *> getGCCRegNames() const override; |
| 222 | ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override; |
| 223 | |
| 224 | std::string convertConstraint(const char *&Constraint) const override; |
| 225 | |
| 226 | bool validateAsmConstraint(const char *&Name, |
| 227 | TargetInfo::ConstraintInfo &Info) const override; |
| 228 | bool |
| 229 | validateConstraintModifier(StringRef Constraint, char Modifier, unsigned Size, |
| 230 | std::string &SuggestedModifier) const override; |
| 231 | std::string_view getClobbers() const override; |
| 232 | |
| 233 | StringRef getConstraintRegister(StringRef Constraint, |
| 234 | StringRef Expression) const override { |
| 235 | return Expression; |
| 236 | } |
| 237 | |
| 238 | int getEHDataRegisterNumber(unsigned RegNo) const override; |
| 239 | |
| 240 | bool validatePointerAuthKey(const llvm::APSInt &value) const override; |
| 241 | |
| 242 | const char *getBFloat16Mangling() const override { return "u6__bf16" ; }; |
| 243 | |
| 244 | std::pair<unsigned, unsigned> hardwareInterferenceSizes() const override { |
| 245 | return std::make_pair(x: 256, y: 64); |
| 246 | } |
| 247 | |
| 248 | bool hasInt128Type() const override; |
| 249 | |
| 250 | bool hasBitIntType() const override { return true; } |
| 251 | |
| 252 | bool validateTarget(DiagnosticsEngine &Diags) const override; |
| 253 | |
| 254 | bool validateGlobalRegisterVariable(StringRef RegName, unsigned RegSize, |
| 255 | bool &HasSizeMismatch) const override; |
| 256 | |
| 257 | uint64_t getPointerWidthV(LangAS AddrSpace) const override { |
| 258 | if (AddrSpace == LangAS::ptr32_sptr || AddrSpace == LangAS::ptr32_uptr) |
| 259 | return 32; |
| 260 | if (AddrSpace == LangAS::ptr64) |
| 261 | return 64; |
| 262 | return PointerWidth; |
| 263 | } |
| 264 | |
| 265 | uint64_t getPointerAlignV(LangAS AddrSpace) const override { |
| 266 | return getPointerWidthV(AddrSpace); |
| 267 | } |
| 268 | }; |
| 269 | |
| 270 | class LLVM_LIBRARY_VISIBILITY AArch64leTargetInfo : public AArch64TargetInfo { |
| 271 | public: |
| 272 | AArch64leTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); |
| 273 | |
| 274 | void getTargetDefines(const LangOptions &Opts, |
| 275 | MacroBuilder &Builder) const override; |
| 276 | private: |
| 277 | void setDataLayout() override; |
| 278 | }; |
| 279 | |
| 280 | class LLVM_LIBRARY_VISIBILITY WindowsARM64TargetInfo |
| 281 | : public WindowsTargetInfo<AArch64leTargetInfo> { |
| 282 | const llvm::Triple Triple; |
| 283 | |
| 284 | public: |
| 285 | WindowsARM64TargetInfo(const llvm::Triple &Triple, |
| 286 | const TargetOptions &Opts); |
| 287 | |
| 288 | void setDataLayout() override; |
| 289 | |
| 290 | BuiltinVaListKind getBuiltinVaListKind() const override; |
| 291 | |
| 292 | CallingConvCheckResult checkCallingConvention(CallingConv CC) const override; |
| 293 | }; |
| 294 | |
| 295 | // Windows ARM, MS (C++) ABI |
| 296 | class LLVM_LIBRARY_VISIBILITY MicrosoftARM64TargetInfo |
| 297 | : public WindowsARM64TargetInfo { |
| 298 | public: |
| 299 | MicrosoftARM64TargetInfo(const llvm::Triple &Triple, |
| 300 | const TargetOptions &Opts); |
| 301 | |
| 302 | void getTargetDefines(const LangOptions &Opts, |
| 303 | MacroBuilder &Builder) const override; |
| 304 | TargetInfo::CallingConvKind |
| 305 | getCallingConvKind(bool ClangABICompat4) const override; |
| 306 | |
| 307 | unsigned getMinGlobalAlign(uint64_t TypeSize, |
| 308 | bool HasNonWeakDef) const override; |
| 309 | }; |
| 310 | |
| 311 | // ARM64 MinGW target |
| 312 | class LLVM_LIBRARY_VISIBILITY MinGWARM64TargetInfo |
| 313 | : public WindowsARM64TargetInfo { |
| 314 | public: |
| 315 | MinGWARM64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); |
| 316 | }; |
| 317 | |
| 318 | class LLVM_LIBRARY_VISIBILITY AArch64beTargetInfo : public AArch64TargetInfo { |
| 319 | public: |
| 320 | AArch64beTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); |
| 321 | void getTargetDefines(const LangOptions &Opts, |
| 322 | MacroBuilder &Builder) const override; |
| 323 | |
| 324 | private: |
| 325 | void setDataLayout() override; |
| 326 | }; |
| 327 | |
| 328 | void getAppleMachOAArch64Defines(MacroBuilder &Builder, const LangOptions &Opts, |
| 329 | const llvm::Triple &Triple); |
| 330 | |
| 331 | class LLVM_LIBRARY_VISIBILITY AppleMachOAArch64TargetInfo |
| 332 | : public AppleMachOTargetInfo<AArch64leTargetInfo> { |
| 333 | public: |
| 334 | AppleMachOAArch64TargetInfo(const llvm::Triple &Triple, |
| 335 | const TargetOptions &Opts); |
| 336 | |
| 337 | protected: |
| 338 | void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, |
| 339 | MacroBuilder &Builder) const override; |
| 340 | }; |
| 341 | |
| 342 | class LLVM_LIBRARY_VISIBILITY DarwinAArch64TargetInfo |
| 343 | : public DarwinTargetInfo<AArch64leTargetInfo> { |
| 344 | public: |
| 345 | DarwinAArch64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts); |
| 346 | |
| 347 | BuiltinVaListKind getBuiltinVaListKind() const override; |
| 348 | |
| 349 | protected: |
| 350 | void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple, |
| 351 | MacroBuilder &Builder) const override; |
| 352 | }; |
| 353 | |
| 354 | } // namespace targets |
| 355 | } // namespace clang |
| 356 | |
| 357 | #endif // LLVM_CLANG_LIB_BASIC_TARGETS_AARCH64_H |
| 358 | |