1//=--- RegUsageInfoPropagate.cpp - Register Usage Informartion Propagation --=//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// This pass is required to take advantage of the interprocedural register
10/// allocation infrastructure.
11///
12/// This pass iterates through MachineInstrs in a given MachineFunction and at
13/// each callsite queries RegisterUsageInfo for RegMask (calculated based on
14/// actual register allocation) of the callee function, if the RegMask detail
15/// is available then this pass will update the RegMask of the call instruction.
16/// This updated RegMask will be used by the register allocator while allocating
17/// the current MachineFunction.
18///
19//===----------------------------------------------------------------------===//
20
21#include "llvm/CodeGen/RegUsageInfoPropagate.h"
22#include "llvm/CodeGen/MachineBasicBlock.h"
23#include "llvm/CodeGen/MachineFrameInfo.h"
24#include "llvm/CodeGen/MachineFunctionPass.h"
25#include "llvm/CodeGen/MachineInstr.h"
26#include "llvm/CodeGen/MachineRegisterInfo.h"
27#include "llvm/CodeGen/Passes.h"
28#include "llvm/CodeGen/RegisterUsageInfo.h"
29#include "llvm/IR/Analysis.h"
30#include "llvm/IR/Module.h"
31#include "llvm/Pass.h"
32#include "llvm/Support/Debug.h"
33#include "llvm/Support/raw_ostream.h"
34
35using namespace llvm;
36
37#define DEBUG_TYPE "ip-regalloc"
38
39#define RUIP_NAME "Register Usage Information Propagation"
40
41namespace {
42
43class RegUsageInfoPropagation {
44public:
45 explicit RegUsageInfoPropagation(PhysicalRegisterUsageInfo *PRUI)
46 : PRUI(PRUI) {}
47
48 bool run(MachineFunction &MF);
49
50private:
51 PhysicalRegisterUsageInfo *PRUI;
52
53 static void setRegMask(MachineInstr &MI, ArrayRef<uint32_t> RegMask) {
54 assert(RegMask.size() ==
55 MachineOperand::getRegMaskSize(MI.getParent()->getParent()
56 ->getRegInfo().getTargetRegisterInfo()
57 ->getNumRegs())
58 && "expected register mask size");
59 for (MachineOperand &MO : MI.operands()) {
60 if (MO.isRegMask())
61 MO.setRegMask(RegMask.data());
62 }
63 }
64};
65
66class RegUsageInfoPropagationLegacy : public MachineFunctionPass {
67public:
68 static char ID;
69 RegUsageInfoPropagationLegacy() : MachineFunctionPass(ID) {
70 PassRegistry &Registry = *PassRegistry::getPassRegistry();
71 initializeRegUsageInfoPropagationLegacyPass(Registry);
72 }
73
74 StringRef getPassName() const override { return RUIP_NAME; }
75
76 bool runOnMachineFunction(MachineFunction &MF) override;
77
78 void getAnalysisUsage(AnalysisUsage &AU) const override {
79 AU.addRequired<PhysicalRegisterUsageInfoWrapperLegacy>();
80 AU.setPreservesAll();
81 MachineFunctionPass::getAnalysisUsage(AU);
82 }
83};
84
85} // end of anonymous namespace
86
87INITIALIZE_PASS_BEGIN(RegUsageInfoPropagationLegacy, "reg-usage-propagation",
88 RUIP_NAME, false, false)
89INITIALIZE_PASS_DEPENDENCY(PhysicalRegisterUsageInfoWrapperLegacy)
90INITIALIZE_PASS_END(RegUsageInfoPropagationLegacy, "reg-usage-propagation",
91 RUIP_NAME, false, false)
92
93char RegUsageInfoPropagationLegacy::ID = 0;
94
95// Assumes call instructions have a single reference to a function.
96static const Function *findCalledFunction(const Module &M,
97 const MachineInstr &MI) {
98 for (const MachineOperand &MO : MI.operands()) {
99 if (MO.isGlobal())
100 return dyn_cast<const Function>(Val: MO.getGlobal());
101
102 if (MO.isSymbol())
103 return M.getFunction(Name: MO.getSymbolName());
104 }
105
106 return nullptr;
107}
108
109bool RegUsageInfoPropagationLegacy::runOnMachineFunction(MachineFunction &MF) {
110 PhysicalRegisterUsageInfo *PRUI =
111 &getAnalysis<PhysicalRegisterUsageInfoWrapperLegacy>().getPRUI();
112
113 RegUsageInfoPropagation RUIP(PRUI);
114 return RUIP.run(MF);
115}
116
117PreservedAnalyses
118RegUsageInfoPropagationPass::run(MachineFunction &MF,
119 MachineFunctionAnalysisManager &MFAM) {
120 Module &MFA = *MF.getFunction().getParent();
121 auto *PRUI = MFAM.getResult<ModuleAnalysisManagerMachineFunctionProxy>(IR&: MF)
122 .getCachedResult<PhysicalRegisterUsageAnalysis>(IR&: MFA);
123 assert(PRUI && "PhysicalRegisterUsageAnalysis not available");
124 RegUsageInfoPropagation(PRUI).run(MF);
125 return PreservedAnalyses::all();
126}
127
128bool RegUsageInfoPropagation::run(MachineFunction &MF) {
129 const Module &M = *MF.getFunction().getParent();
130
131 LLVM_DEBUG(dbgs() << " ++++++++++++++++++++ " << RUIP_NAME
132 << " ++++++++++++++++++++ \n");
133 LLVM_DEBUG(dbgs() << "MachineFunction : " << MF.getName() << "\n");
134
135 const MachineFrameInfo &MFI = MF.getFrameInfo();
136 if (!MFI.hasCalls() && !MFI.hasTailCall())
137 return false;
138
139 bool Changed = false;
140
141 for (MachineBasicBlock &MBB : MF) {
142 for (MachineInstr &MI : MBB) {
143 if (!MI.isCall())
144 continue;
145 LLVM_DEBUG(
146 dbgs()
147 << "Call Instruction Before Register Usage Info Propagation : \n"
148 << MI << "\n");
149
150 auto UpdateRegMask = [&](const Function &F) {
151 const ArrayRef<uint32_t> RegMask = PRUI->getRegUsageInfo(FP: F);
152 if (RegMask.empty())
153 return;
154 setRegMask(MI, RegMask);
155 Changed = true;
156 };
157
158 if (const Function *F = findCalledFunction(M, MI)) {
159 if (F->isDefinitionExact()) {
160 UpdateRegMask(*F);
161 } else {
162 LLVM_DEBUG(dbgs() << "Function definition is not exact\n");
163 }
164 } else {
165 LLVM_DEBUG(dbgs() << "Failed to find call target function\n");
166 }
167
168 LLVM_DEBUG(
169 dbgs()
170 << "Call Instruction After Register Usage Info Propagation : \n"
171 << MI << '\n');
172 }
173 }
174
175 LLVM_DEBUG(
176 dbgs() << " +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++"
177 "++++++ \n");
178 return Changed;
179}
180
181FunctionPass *llvm::createRegUsageInfoPropPass() {
182 return new RegUsageInfoPropagationLegacy();
183}
184