| 1 | //===-- NVPTXMCTargetDesc.cpp - NVPTX Target Descriptions -------*- C++ -*-===// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // This file provides NVPTX specific target descriptions. |
| 10 | // |
| 11 | //===----------------------------------------------------------------------===// |
| 12 | |
| 13 | #include "NVPTXMCTargetDesc.h" |
| 14 | #include "NVPTXInstPrinter.h" |
| 15 | #include "NVPTXMCAsmInfo.h" |
| 16 | #include "NVPTXTargetStreamer.h" |
| 17 | #include "TargetInfo/NVPTXTargetInfo.h" |
| 18 | #include "llvm/MC/MCInstrInfo.h" |
| 19 | #include "llvm/MC/MCRegisterInfo.h" |
| 20 | #include "llvm/MC/MCSubtargetInfo.h" |
| 21 | #include "llvm/MC/TargetRegistry.h" |
| 22 | #include "llvm/Support/Compiler.h" |
| 23 | |
| 24 | using namespace llvm; |
| 25 | |
| 26 | #define GET_INSTRINFO_MC_DESC |
| 27 | #define ENABLE_INSTR_PREDICATE_VERIFIER |
| 28 | #include "NVPTXGenInstrInfo.inc" |
| 29 | |
| 30 | #define GET_SUBTARGETINFO_MC_DESC |
| 31 | #include "NVPTXGenSubtargetInfo.inc" |
| 32 | |
| 33 | #define GET_REGINFO_MC_DESC |
| 34 | #include "NVPTXGenRegisterInfo.inc" |
| 35 | |
| 36 | static MCInstrInfo *createNVPTXMCInstrInfo() { |
| 37 | MCInstrInfo *X = new MCInstrInfo(); |
| 38 | InitNVPTXMCInstrInfo(II: X); |
| 39 | return X; |
| 40 | } |
| 41 | |
| 42 | static MCRegisterInfo *createNVPTXMCRegisterInfo(const Triple &TT) { |
| 43 | MCRegisterInfo *X = new MCRegisterInfo(); |
| 44 | // PTX does not have a return address register. |
| 45 | InitNVPTXMCRegisterInfo(RI: X, RA: 0); |
| 46 | return X; |
| 47 | } |
| 48 | |
| 49 | static MCSubtargetInfo * |
| 50 | createNVPTXMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) { |
| 51 | return createNVPTXMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS); |
| 52 | } |
| 53 | |
| 54 | static MCInstPrinter *createNVPTXMCInstPrinter(const Triple &T, |
| 55 | unsigned SyntaxVariant, |
| 56 | const MCAsmInfo &MAI, |
| 57 | const MCInstrInfo &MII, |
| 58 | const MCRegisterInfo &MRI) { |
| 59 | if (SyntaxVariant == 0) |
| 60 | return new NVPTXInstPrinter(MAI, MII, MRI); |
| 61 | return nullptr; |
| 62 | } |
| 63 | |
| 64 | static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S, |
| 65 | formatted_raw_ostream &, |
| 66 | MCInstPrinter *) { |
| 67 | return new NVPTXAsmTargetStreamer(S); |
| 68 | } |
| 69 | |
| 70 | static MCTargetStreamer *createNullTargetStreamer(MCStreamer &S) { |
| 71 | return new NVPTXTargetStreamer(S); |
| 72 | } |
| 73 | |
| 74 | // Force static initialization. |
| 75 | extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void |
| 76 | LLVMInitializeNVPTXTargetMC() { |
| 77 | for (Target *T : {&getTheNVPTXTarget32(), &getTheNVPTXTarget64()}) { |
| 78 | // Register the MC asm info. |
| 79 | RegisterMCAsmInfo<NVPTXMCAsmInfo> X(*T); |
| 80 | |
| 81 | // Register the MC instruction info. |
| 82 | TargetRegistry::RegisterMCInstrInfo(T&: *T, Fn: createNVPTXMCInstrInfo); |
| 83 | |
| 84 | // Register the MC register info. |
| 85 | TargetRegistry::RegisterMCRegInfo(T&: *T, Fn: createNVPTXMCRegisterInfo); |
| 86 | |
| 87 | // Register the MC subtarget info. |
| 88 | TargetRegistry::RegisterMCSubtargetInfo(T&: *T, Fn: createNVPTXMCSubtargetInfo); |
| 89 | |
| 90 | // Register the MCInstPrinter. |
| 91 | TargetRegistry::RegisterMCInstPrinter(T&: *T, Fn: createNVPTXMCInstPrinter); |
| 92 | |
| 93 | // Register the MCTargetStreamer. |
| 94 | TargetRegistry::RegisterAsmTargetStreamer(T&: *T, Fn: createTargetAsmStreamer); |
| 95 | |
| 96 | // Register the MCTargetStreamer. |
| 97 | TargetRegistry::RegisterNullTargetStreamer(T&: *T, Fn: createNullTargetStreamer); |
| 98 | } |
| 99 | } |
| 100 | |