| 1 | //===-- PPCCallLowering.h - Call lowering for GlobalISel -------*- C++ -*-===// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | /// |
| 9 | /// \file |
| 10 | /// This file describes how to lower LLVM calls to machine code calls. |
| 11 | /// |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #ifndef LLVM_LIB_TARGET_POWERPC_GISEL_PPCCALLLOWERING_H |
| 15 | #define LLVM_LIB_TARGET_POWERPC_GISEL_PPCCALLLOWERING_H |
| 16 | |
| 17 | #include "PPCISelLowering.h" |
| 18 | #include "llvm/CodeGen/GlobalISel/CallLowering.h" |
| 19 | |
| 20 | namespace llvm { |
| 21 | |
| 22 | class PPCTargetLowering; |
| 23 | |
| 24 | class PPCCallLowering : public CallLowering { |
| 25 | public: |
| 26 | PPCCallLowering(const PPCTargetLowering &TLI); |
| 27 | |
| 28 | bool lowerReturn(MachineIRBuilder &MIRBuilder, const Value *Val, |
| 29 | ArrayRef<Register> VRegs, FunctionLoweringInfo &FLI, |
| 30 | Register SwiftErrorVReg) const override; |
| 31 | bool lowerFormalArguments(MachineIRBuilder &MIRBuilder, const Function &F, |
| 32 | ArrayRef<ArrayRef<Register>> VRegs, |
| 33 | FunctionLoweringInfo &FLI) const override; |
| 34 | bool lowerCall(MachineIRBuilder &MIRBuilder, |
| 35 | CallLoweringInfo &Info) const override; |
| 36 | }; |
| 37 | |
| 38 | class PPCIncomingValueHandler : public CallLowering::IncomingValueHandler { |
| 39 | public: |
| 40 | PPCIncomingValueHandler(MachineIRBuilder &MIRBuilder, |
| 41 | MachineRegisterInfo &MRI) |
| 42 | : CallLowering::IncomingValueHandler(MIRBuilder, MRI) {} |
| 43 | |
| 44 | uint64_t StackUsed; |
| 45 | |
| 46 | private: |
| 47 | void assignValueToReg(Register ValVReg, Register PhysReg, |
| 48 | const CCValAssign &VA) override; |
| 49 | |
| 50 | void assignValueToAddress(Register ValVReg, Register Addr, LLT MemTy, |
| 51 | const MachinePointerInfo &MPO, |
| 52 | const CCValAssign &VA) override; |
| 53 | |
| 54 | Register getStackAddress(uint64_t Size, int64_t Offset, |
| 55 | MachinePointerInfo &MPO, |
| 56 | ISD::ArgFlagsTy Flags) override; |
| 57 | |
| 58 | virtual void markPhysRegUsed(unsigned PhysReg) = 0; |
| 59 | }; |
| 60 | |
| 61 | class FormalArgHandler : public PPCIncomingValueHandler { |
| 62 | |
| 63 | void markPhysRegUsed(unsigned PhysReg) override; |
| 64 | |
| 65 | public: |
| 66 | FormalArgHandler(MachineIRBuilder &MIRBuilder, MachineRegisterInfo &MRI) |
| 67 | : PPCIncomingValueHandler(MIRBuilder, MRI) {} |
| 68 | }; |
| 69 | |
| 70 | } // end namespace llvm |
| 71 | |
| 72 | #endif |
| 73 | |