| 1 | //===-- PPCRegisterBankInfo.h -----------------------------------*- C++ -*-===// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | /// |
| 9 | /// \file |
| 10 | /// This file declares the targeting of the RegisterBankInfo class for PowerPC. |
| 11 | /// |
| 12 | //===----------------------------------------------------------------------===// |
| 13 | |
| 14 | #ifndef LLVM_LIB_TARGET_POWERPC_GISEL_PPCREGISTERBANKINFO_H |
| 15 | #define LLVM_LIB_TARGET_POWERPC_GISEL_PPCREGISTERBANKINFO_H |
| 16 | |
| 17 | #include "llvm/CodeGen/RegisterBank.h" |
| 18 | #include "llvm/CodeGen/RegisterBankInfo.h" |
| 19 | #include "llvm/CodeGen/TargetRegisterInfo.h" |
| 20 | |
| 21 | #define GET_REGBANK_DECLARATIONS |
| 22 | #include "PPCGenRegisterBank.inc" |
| 23 | |
| 24 | namespace llvm { |
| 25 | class TargetRegisterInfo; |
| 26 | |
| 27 | class PPCGenRegisterBankInfo : public RegisterBankInfo { |
| 28 | protected: |
| 29 | enum PartialMappingIdx { |
| 30 | PMI_None = -1, |
| 31 | PMI_GPR32 = 1, |
| 32 | PMI_GPR64 = 2, |
| 33 | PMI_FPR32 = 3, |
| 34 | PMI_FPR64 = 4, |
| 35 | PMI_VEC128 = 5, |
| 36 | PMI_CR = 6, |
| 37 | PMI_Min = PMI_GPR32, |
| 38 | }; |
| 39 | |
| 40 | static const RegisterBankInfo::PartialMapping PartMappings[]; |
| 41 | static const RegisterBankInfo::ValueMapping ValMappings[]; |
| 42 | static const PartialMappingIdx BankIDToCopyMapIdx[]; |
| 43 | |
| 44 | /// Get the pointer to the ValueMapping representing the RegisterBank |
| 45 | /// at \p RBIdx. |
| 46 | /// |
| 47 | /// The returned mapping works for instructions with the same kind of |
| 48 | /// operands for up to 3 operands. |
| 49 | /// |
| 50 | /// \pre \p RBIdx != PartialMappingIdx::None |
| 51 | static const RegisterBankInfo::ValueMapping * |
| 52 | getValueMapping(PartialMappingIdx RBIdx); |
| 53 | |
| 54 | /// Get the pointer to the ValueMapping of the operands of a copy |
| 55 | /// instruction from the \p SrcBankID register bank to the \p DstBankID |
| 56 | /// register bank with a size of \p Size. |
| 57 | static const RegisterBankInfo::ValueMapping * |
| 58 | getCopyMapping(unsigned DstBankID, unsigned SrcBankID, unsigned Size); |
| 59 | |
| 60 | #define GET_TARGET_REGBANK_CLASS |
| 61 | #include "PPCGenRegisterBank.inc" |
| 62 | }; |
| 63 | |
| 64 | class PPCRegisterBankInfo final : public PPCGenRegisterBankInfo { |
| 65 | public: |
| 66 | PPCRegisterBankInfo(const TargetRegisterInfo &TRI); |
| 67 | |
| 68 | const RegisterBank &getRegBankFromRegClass(const TargetRegisterClass &RC, |
| 69 | LLT Ty) const override; |
| 70 | |
| 71 | const InstructionMapping & |
| 72 | getInstrMapping(const MachineInstr &MI) const override; |
| 73 | |
| 74 | InstructionMappings |
| 75 | getInstrAlternativeMappings(const MachineInstr &MI) const override; |
| 76 | |
| 77 | private: |
| 78 | /// Maximum recursion depth for hasFPConstraints. |
| 79 | const unsigned MaxFPRSearchDepth = 2; |
| 80 | |
| 81 | /// \returns true if \p MI only uses and defines FPRs. |
| 82 | bool hasFPConstraints(const MachineInstr &MI, const MachineRegisterInfo &MRI, |
| 83 | const TargetRegisterInfo &TRI, |
| 84 | unsigned Depth = 0) const; |
| 85 | |
| 86 | /// \returns true if \p MI only uses FPRs. |
| 87 | bool onlyUsesFP(const MachineInstr &MI, const MachineRegisterInfo &MRI, |
| 88 | const TargetRegisterInfo &TRI, unsigned Depth = 0) const; |
| 89 | |
| 90 | /// \returns true if \p MI only defines FPRs. |
| 91 | bool onlyDefinesFP(const MachineInstr &MI, const MachineRegisterInfo &MRI, |
| 92 | const TargetRegisterInfo &TRI, unsigned Depth = 0) const; |
| 93 | }; |
| 94 | } // namespace llvm |
| 95 | |
| 96 | #endif |
| 97 | |