1//===-- SPIRVInstrInfo.h - SPIR-V Instruction Information -------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the SPIR-V implementation of the TargetInstrInfo class.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H
14#define LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H
15
16#include "SPIRVRegisterInfo.h"
17#include "llvm/CodeGen/TargetInstrInfo.h"
18
19#define GET_INSTRINFO_HEADER
20#include "SPIRVGenInstrInfo.inc"
21
22namespace llvm {
23
24class SPIRVInstrInfo : public SPIRVGenInstrInfo {
25 const SPIRVRegisterInfo RI;
26
27public:
28 SPIRVInstrInfo();
29
30 const SPIRVRegisterInfo &getRegisterInfo() const { return RI; }
31 bool isHeaderInstr(const MachineInstr &MI) const;
32 bool isConstantInstr(const MachineInstr &MI) const;
33 bool isSpecConstantInstr(const MachineInstr &MI) const;
34 bool isInlineAsmDefInstr(const MachineInstr &MI) const;
35 bool isTypeDeclInstr(const MachineInstr &MI) const;
36 bool isDecorationInstr(const MachineInstr &MI) const;
37 bool isAliasingInstr(const MachineInstr &MI) const;
38 bool canUseFastMathFlags(const MachineInstr &MI) const;
39 bool canUseNSW(const MachineInstr &MI) const;
40 bool canUseNUW(const MachineInstr &MI) const;
41
42 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
43 MachineBasicBlock *&FBB,
44 SmallVectorImpl<MachineOperand> &Cond,
45 bool AllowModify = false) const override;
46
47 unsigned removeBranch(MachineBasicBlock &MBB,
48 int *BytesRemoved = nullptr) const override;
49
50 unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
51 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
52 const DebugLoc &DL,
53 int *BytesAdded = nullptr) const override;
54 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
55 const DebugLoc &DL, Register DestReg, Register SrcReg,
56 bool KillSrc, bool RenamableDest = false,
57 bool RenamableSrc = false) const override;
58};
59
60namespace SPIRV {
61enum AsmComments {
62 // It is a half type
63 ASM_PRINTER_WIDTH16 = MachineInstr::TAsmComments
64};
65} // namespace SPIRV
66
67} // namespace llvm
68
69#endif // LLVM_LIB_TARGET_SPIRV_SPIRVINSTRINFO_H
70