1 | //===-- SparcTargetMachine.h - Define TargetMachine for Sparc ---*- C++ -*-===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // |
9 | // This file declares the Sparc specific subclass of TargetMachine. |
10 | // |
11 | //===----------------------------------------------------------------------===// |
12 | |
13 | #ifndef LLVM_LIB_TARGET_SPARC_SPARCTARGETMACHINE_H |
14 | #define LLVM_LIB_TARGET_SPARC_SPARCTARGETMACHINE_H |
15 | |
16 | #include "SparcInstrInfo.h" |
17 | #include "SparcSubtarget.h" |
18 | #include "llvm/CodeGen/CodeGenTargetMachineImpl.h" |
19 | #include "llvm/Target/TargetMachine.h" |
20 | #include <optional> |
21 | |
22 | namespace llvm { |
23 | |
24 | class SparcTargetMachine : public CodeGenTargetMachineImpl { |
25 | std::unique_ptr<TargetLoweringObjectFile> TLOF; |
26 | bool is64Bit; |
27 | mutable StringMap<std::unique_ptr<SparcSubtarget>> SubtargetMap; |
28 | |
29 | public: |
30 | SparcTargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
31 | StringRef FS, const TargetOptions &Options, |
32 | std::optional<Reloc::Model> RM, |
33 | std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, |
34 | bool JIT, bool is64bit); |
35 | ~SparcTargetMachine() override; |
36 | |
37 | const SparcSubtarget *getSubtargetImpl(const Function &F) const override; |
38 | |
39 | // Pass Pipeline Configuration |
40 | TargetPassConfig *createPassConfig(PassManagerBase &PM) override; |
41 | TargetLoweringObjectFile *getObjFileLowering() const override { |
42 | return TLOF.get(); |
43 | } |
44 | |
45 | MachineFunctionInfo * |
46 | createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, |
47 | const TargetSubtargetInfo *STI) const override; |
48 | }; |
49 | |
50 | /// Sparc 32-bit target machine |
51 | /// |
52 | class SparcV8TargetMachine : public SparcTargetMachine { |
53 | virtual void anchor(); |
54 | |
55 | public: |
56 | SparcV8TargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
57 | StringRef FS, const TargetOptions &Options, |
58 | std::optional<Reloc::Model> RM, |
59 | std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, |
60 | bool JIT); |
61 | }; |
62 | |
63 | /// Sparc 64-bit target machine |
64 | /// |
65 | class SparcV9TargetMachine : public SparcTargetMachine { |
66 | virtual void anchor(); |
67 | |
68 | public: |
69 | SparcV9TargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
70 | StringRef FS, const TargetOptions &Options, |
71 | std::optional<Reloc::Model> RM, |
72 | std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, |
73 | bool JIT); |
74 | }; |
75 | |
76 | class SparcelTargetMachine : public SparcTargetMachine { |
77 | virtual void anchor(); |
78 | |
79 | public: |
80 | SparcelTargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
81 | StringRef FS, const TargetOptions &Options, |
82 | std::optional<Reloc::Model> RM, |
83 | std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, |
84 | bool JIT); |
85 | }; |
86 | |
87 | } // end namespace llvm |
88 | |
89 | #endif |
90 | |