1//===-- SparcSubtarget.h - Define Subtarget for the SPARC -------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares the SPARC specific subclass of TargetSubtargetInfo.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_SPARC_SPARCSUBTARGET_H
14#define LLVM_LIB_TARGET_SPARC_SPARCSUBTARGET_H
15
16#include "MCTargetDesc/SparcMCTargetDesc.h"
17#include "SparcFrameLowering.h"
18#include "SparcISelLowering.h"
19#include "SparcInstrInfo.h"
20#include "llvm/CodeGen/TargetSubtargetInfo.h"
21#include "llvm/IR/DataLayout.h"
22#include "llvm/Support/ErrorHandling.h"
23#include "llvm/TargetParser/Triple.h"
24#include <string>
25
26#define GET_SUBTARGETINFO_HEADER
27#include "SparcGenSubtargetInfo.inc"
28
29namespace llvm {
30class StringRef;
31
32class SparcSubtarget : public SparcGenSubtargetInfo {
33 // ReserveRegister[i] - Register #i is not available as a general purpose
34 // register.
35 BitVector ReserveRegister;
36
37 Triple TargetTriple;
38 virtual void anchor();
39
40 bool Is64Bit;
41
42#define GET_SUBTARGETINFO_MACRO(ATTRIBUTE, DEFAULT, GETTER) \
43 bool ATTRIBUTE = DEFAULT;
44#include "SparcGenSubtargetInfo.inc"
45
46 SparcInstrInfo InstrInfo;
47 SparcTargetLowering TLInfo;
48 std::unique_ptr<const SelectionDAGTargetInfo> TSInfo;
49 SparcFrameLowering FrameLowering;
50
51public:
52 SparcSubtarget(const StringRef &CPU, const StringRef &TuneCPU,
53 const StringRef &FS, const TargetMachine &TM, bool is64bit);
54
55 ~SparcSubtarget() override;
56
57 const SparcInstrInfo *getInstrInfo() const override { return &InstrInfo; }
58 const TargetFrameLowering *getFrameLowering() const override {
59 return &FrameLowering;
60 }
61 const SparcRegisterInfo *getRegisterInfo() const override {
62 return &InstrInfo.getRegisterInfo();
63 }
64 const SparcTargetLowering *getTargetLowering() const override {
65 return &TLInfo;
66 }
67
68 const SelectionDAGTargetInfo *getSelectionDAGInfo() const override;
69
70 bool enableMachineScheduler() const override;
71
72#define GET_SUBTARGETINFO_MACRO(ATTRIBUTE, DEFAULT, GETTER) \
73 bool GETTER() const { return ATTRIBUTE; }
74#include "SparcGenSubtargetInfo.inc"
75
76 /// ParseSubtargetFeatures - Parses features string setting specified
77 /// subtarget options. Definition of function is auto generated by tblgen.
78 void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS);
79 SparcSubtarget &initializeSubtargetDependencies(StringRef CPU,
80 StringRef TuneCPU,
81 StringRef FS);
82
83 bool is64Bit() const { return Is64Bit; }
84
85 /// The 64-bit ABI uses biased stack and frame pointers, so the stack frame
86 /// of the current function is the area from [%sp+BIAS] to [%fp+BIAS].
87 int64_t getStackPointerBias() const {
88 return is64Bit() ? 2047 : 0;
89 }
90
91 bool isRegisterReserved(MCPhysReg PhysReg) const {
92 return ReserveRegister[PhysReg];
93 }
94
95 /// Given a actual stack size as determined by FrameInfo, this function
96 /// returns adjusted framesize which includes space for register window
97 /// spills and arguments.
98 int getAdjustedFrameSize(int stackSize) const;
99
100 bool isTargetLinux() const { return TargetTriple.isOSLinux(); }
101};
102
103} // end namespace llvm
104
105#endif
106