1//- WebAssemblyISelLowering.h - WebAssembly DAG Lowering Interface -*- C++ -*-//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file defines the interfaces that WebAssembly uses to lower LLVM
11/// code into a selection DAG.
12///
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYISELLOWERING_H
16#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYISELLOWERING_H
17
18#include "llvm/CodeGen/TargetLowering.h"
19
20namespace llvm {
21
22namespace WebAssemblyISD {
23
24enum NodeType : unsigned {
25 FIRST_NUMBER = ISD::BUILTIN_OP_END,
26#define HANDLE_NODETYPE(NODE) NODE,
27#include "WebAssemblyISD.def"
28#undef HANDLE_NODETYPE
29};
30
31} // end namespace WebAssemblyISD
32
33class WebAssemblySubtarget;
34
35class WebAssemblyTargetLowering final : public TargetLowering {
36public:
37 WebAssemblyTargetLowering(const TargetMachine &TM,
38 const WebAssemblySubtarget &STI);
39
40 MVT getPointerTy(const DataLayout &DL, uint32_t AS = 0) const override;
41 MVT getPointerMemTy(const DataLayout &DL, uint32_t AS = 0) const override;
42
43private:
44 /// Keep a pointer to the WebAssemblySubtarget around so that we can make the
45 /// right decision when generating code for different targets.
46 const WebAssemblySubtarget *Subtarget;
47
48 bool
49 shouldExpandPartialReductionIntrinsic(const IntrinsicInst *I) const override;
50 AtomicExpansionKind shouldExpandAtomicRMWInIR(AtomicRMWInst *) const override;
51 bool shouldScalarizeBinop(SDValue VecOp) const override;
52 FastISel *createFastISel(FunctionLoweringInfo &FuncInfo,
53 const TargetLibraryInfo *LibInfo) const override;
54 MVT getScalarShiftAmountTy(const DataLayout &DL, EVT) const override;
55 MachineBasicBlock *
56 EmitInstrWithCustomInserter(MachineInstr &MI,
57 MachineBasicBlock *MBB) const override;
58 const char *getTargetNodeName(unsigned Opcode) const override;
59 std::pair<unsigned, const TargetRegisterClass *>
60 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
61 StringRef Constraint, MVT VT) const override;
62 bool isCheapToSpeculateCttz(Type *Ty) const override;
63 bool isCheapToSpeculateCtlz(Type *Ty) const override;
64 bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty,
65 unsigned AS,
66 Instruction *I = nullptr) const override;
67 bool allowsMisalignedMemoryAccesses(EVT, unsigned AddrSpace, Align Alignment,
68 MachineMemOperand::Flags Flags,
69 unsigned *Fast) const override;
70 bool isIntDivCheap(EVT VT, AttributeList Attr) const override;
71 bool isVectorLoadExtDesirable(SDValue ExtVal) const override;
72 bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
73 EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context,
74 EVT VT) const override;
75 bool getTgtMemIntrinsic(IntrinsicInfo &Info, const CallInst &I,
76 MachineFunction &MF,
77 unsigned Intrinsic) const override;
78
79 void computeKnownBitsForTargetNode(const SDValue Op, KnownBits &Known,
80 const APInt &DemandedElts,
81 const SelectionDAG &DAG,
82 unsigned Depth) const override;
83
84 TargetLoweringBase::LegalizeTypeAction
85 getPreferredVectorAction(MVT VT) const override;
86
87 SDValue LowerCall(CallLoweringInfo &CLI,
88 SmallVectorImpl<SDValue> &InVals) const override;
89 bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
90 bool isVarArg,
91 const SmallVectorImpl<ISD::OutputArg> &Outs,
92 LLVMContext &Context,
93 const Type *RetTy) const override;
94 SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
95 const SmallVectorImpl<ISD::OutputArg> &Outs,
96 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &dl,
97 SelectionDAG &DAG) const override;
98 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
99 bool IsVarArg,
100 const SmallVectorImpl<ISD::InputArg> &Ins,
101 const SDLoc &DL, SelectionDAG &DAG,
102 SmallVectorImpl<SDValue> &InVals) const override;
103
104 void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results,
105 SelectionDAG &DAG) const override;
106
107 bool
108 shouldSimplifyDemandedVectorElts(SDValue Op,
109 const TargetLoweringOpt &TLO) const override;
110
111 // Custom lowering hooks.
112 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
113 SDValue LowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
114 SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const;
115 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
116 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
117 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
118 SDValue LowerExternalSymbol(SDValue Op, SelectionDAG &DAG) const;
119 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
120 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
121 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const;
122 SDValue LowerCopyToReg(SDValue Op, SelectionDAG &DAG) const;
123 SDValue LowerIntrinsic(SDValue Op, SelectionDAG &DAG) const;
124 SDValue LowerSIGN_EXTEND_INREG(SDValue Op, SelectionDAG &DAG) const;
125 SDValue LowerEXTEND_VECTOR_INREG(SDValue Op, SelectionDAG &DAG) const;
126 SDValue LowerBUILD_VECTOR(SDValue Op, SelectionDAG &DAG) const;
127 SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG) const;
128 SDValue LowerSETCC(SDValue Op, SelectionDAG &DAG) const;
129 SDValue LowerAccessVectorElement(SDValue Op, SelectionDAG &DAG) const;
130 SDValue LowerShift(SDValue Op, SelectionDAG &DAG) const;
131 SDValue LowerFP_TO_INT_SAT(SDValue Op, SelectionDAG &DAG) const;
132 SDValue LowerLoad(SDValue Op, SelectionDAG &DAG) const;
133 SDValue LowerStore(SDValue Op, SelectionDAG &DAG) const;
134 SDValue LowerMUL_LOHI(SDValue Op, SelectionDAG &DAG) const;
135 SDValue Replace128Op(SDNode *N, SelectionDAG &DAG) const;
136 SDValue LowerUADDO(SDValue Op, SelectionDAG &DAG) const;
137
138 // Custom DAG combine hooks
139 SDValue
140 PerformDAGCombine(SDNode *N,
141 TargetLowering::DAGCombinerInfo &DCI) const override;
142};
143
144namespace WebAssembly {
145FastISel *createFastISel(FunctionLoweringInfo &funcInfo,
146 const TargetLibraryInfo *libInfo);
147} // end namespace WebAssembly
148
149} // end namespace llvm
150
151#endif
152