1//=- WebAssemblyInstrInfo.h - WebAssembly Instruction Information -*- C++ -*-=//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file contains the WebAssembly implementation of the
11/// TargetInstrInfo class.
12///
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H
16#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H
17
18#include "WebAssemblyRegisterInfo.h"
19#include "llvm/ADT/ArrayRef.h"
20#include "llvm/CodeGen/TargetInstrInfo.h"
21
22#define GET_INSTRINFO_HEADER
23#include "WebAssemblyGenInstrInfo.inc"
24
25#define GET_INSTRINFO_OPERAND_ENUM
26#include "WebAssemblyGenInstrInfo.inc"
27
28namespace llvm {
29
30class WebAssemblySubtarget;
31
32class WebAssemblyInstrInfo final : public WebAssemblyGenInstrInfo {
33 const WebAssemblyRegisterInfo RI;
34
35public:
36 explicit WebAssemblyInstrInfo(const WebAssemblySubtarget &STI);
37
38 const WebAssemblyRegisterInfo &getRegisterInfo() const { return RI; }
39
40 bool isReallyTriviallyReMaterializable(const MachineInstr &MI) const override;
41
42 void copyPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
43 const DebugLoc &DL, Register DestReg, Register SrcReg,
44 bool KillSrc, bool RenamableDest = false,
45 bool RenamableSrc = false) const override;
46 MachineInstr *commuteInstructionImpl(MachineInstr &MI, bool NewMI,
47 unsigned OpIdx1,
48 unsigned OpIdx2) const override;
49
50 bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
51 MachineBasicBlock *&FBB,
52 SmallVectorImpl<MachineOperand> &Cond,
53 bool AllowModify = false) const override;
54 unsigned removeBranch(MachineBasicBlock &MBB,
55 int *BytesRemoved = nullptr) const override;
56 unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
57 MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
58 const DebugLoc &DL,
59 int *BytesAdded = nullptr) const override;
60 bool
61 reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
62
63 ArrayRef<std::pair<int, const char *>>
64 getSerializableTargetIndices() const override;
65
66 const MachineOperand &getCalleeOperand(const MachineInstr &MI) const override;
67
68 bool isExplicitTargetIndexDef(const MachineInstr &MI, int &Index,
69 int64_t &Offset) const override;
70};
71
72} // end namespace llvm
73
74#endif
75