1//===- CallingConvEmitter.cpp - Generate calling conventions --------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This tablegen backend is responsible for emitting descriptions of the calling
10// conventions supported by this target.
11//
12//===----------------------------------------------------------------------===//
13
14#include "Common/CodeGenRegisters.h"
15#include "Common/CodeGenTarget.h"
16#include "llvm/Support/FormatVariadic.h"
17#include "llvm/Support/InterleavedRange.h"
18#include "llvm/TableGen/Error.h"
19#include "llvm/TableGen/Record.h"
20#include "llvm/TableGen/TGTimer.h"
21#include "llvm/TableGen/TableGenBackend.h"
22#include <deque>
23#include <set>
24
25using namespace llvm;
26
27namespace {
28class CallingConvEmitter {
29 const RecordKeeper &Records;
30 const CodeGenTarget Target;
31 unsigned Counter = 0u;
32 std::string CurrentAction;
33 bool SwiftAction = false;
34
35 std::map<std::string, std::set<std::string>> AssignedRegsMap;
36 std::map<std::string, std::set<std::string>> AssignedSwiftRegsMap;
37 std::map<std::string, std::set<std::string>> DelegateToMap;
38
39public:
40 explicit CallingConvEmitter(const RecordKeeper &R) : Records(R), Target(R) {
41 for (const CodeGenRegister &Reg : Target.getRegBank().getRegisters())
42 RegistersByDefName.try_emplace(Key: Reg.getName(), Args: &Reg);
43 }
44
45 void run(raw_ostream &O);
46
47private:
48 void emitCallingConv(const Record *CC, raw_ostream &O);
49 void emitAction(const Record *Action, indent Indent, raw_ostream &O);
50 void emitArgRegisterLists(raw_ostream &O);
51
52 StringMap<const CodeGenRegister *> RegistersByDefName;
53 std::string getQualifiedRegisterName(const Init *I);
54};
55} // End anonymous namespace
56
57void CallingConvEmitter::run(raw_ostream &O) {
58 emitSourceFileHeader(Desc: "Calling Convention Implementation Fragment", OS&: O);
59
60 ArrayRef<const Record *> CCs =
61 Records.getAllDerivedDefinitions(ClassName: "CallingConv");
62
63 // Emit prototypes for all of the non-custom CC's so that they can forward ref
64 // each other.
65 Records.getTimer().startTimer(Name: "Emit prototypes");
66 O << "#ifndef GET_CC_REGISTER_LISTS\n\n";
67 for (const Record *CC : CCs) {
68 if (!CC->getValueAsBit(FieldName: "Custom")) {
69 unsigned Pad = CC->getName().size();
70 if (CC->getValueAsBit(FieldName: "Entry")) {
71 O << "bool llvm::";
72 Pad += 12;
73 } else {
74 O << "static bool ";
75 Pad += 13;
76 }
77 O << CC->getName() << "(unsigned ValNo, MVT ValVT,\n"
78 << std::string(Pad, ' ') << "MVT LocVT, CCValAssign::LocInfo LocInfo,\n"
79 << std::string(Pad, ' ')
80 << "ISD::ArgFlagsTy ArgFlags, CCState &State);\n";
81 }
82 }
83
84 // Emit each non-custom calling convention description in full.
85 Records.getTimer().startTimer(Name: "Emit full descriptions");
86 for (const Record *CC : CCs) {
87 if (!CC->getValueAsBit(FieldName: "Custom")) {
88 emitCallingConv(CC, O);
89 }
90 }
91
92 emitArgRegisterLists(O);
93
94 O << "\n#endif // CC_REGISTER_LIST\n";
95}
96
97void CallingConvEmitter::emitCallingConv(const Record *CC, raw_ostream &O) {
98 const ListInit *CCActions = CC->getValueAsListInit(FieldName: "Actions");
99 Counter = 0;
100
101 CurrentAction = CC->getName().str();
102 // Call upon the creation of a map entry from the void!
103 // We want an entry in AssignedRegsMap for every action, even if that
104 // entry is empty.
105 AssignedRegsMap[CurrentAction] = {};
106
107 O << "\n\n";
108 unsigned Pad = CurrentAction.size();
109 if (CC->getValueAsBit(FieldName: "Entry")) {
110 O << "bool llvm::";
111 Pad += 12;
112 } else {
113 O << "static bool ";
114 Pad += 13;
115 }
116 O << CurrentAction << "(unsigned ValNo, MVT ValVT,\n"
117 << std::string(Pad, ' ') << "MVT LocVT, CCValAssign::LocInfo LocInfo,\n"
118 << std::string(Pad, ' ') << "ISD::ArgFlagsTy ArgFlags, CCState &State) {\n";
119 // Emit all of the actions, in order.
120 for (unsigned I = 0, E = CCActions->size(); I != E; ++I) {
121 const Record *Action = CCActions->getElementAsRecord(Idx: I);
122 SwiftAction =
123 llvm::any_of(Range: Action->getSuperClasses(), P: [](const Record *Class) {
124 std::string Name = Class->getNameInitAsString();
125 return StringRef(Name).starts_with(Prefix: "CCIfSwift");
126 });
127
128 O << "\n";
129 emitAction(Action, Indent: indent(2), O);
130 }
131
132 O << "\n return true; // CC didn't match.\n";
133 O << "}\n";
134}
135
136// Return the name of the specified Init (DefInit or StringInit), with a
137// namespace qualifier if the corresponding record contains one.
138std::string CallingConvEmitter::getQualifiedRegisterName(const Init *I) {
139 if (const auto *DI = dyn_cast<DefInit>(Val: I))
140 return getQualifiedName(R: DI->getDef());
141
142 const auto *SI = cast<StringInit>(Val: I);
143 if (const CodeGenRegister *CGR = RegistersByDefName.lookup(Key: SI->getValue()))
144 return getQualifiedName(R: CGR->TheDef);
145
146 PrintFatalError(Msg: "register not defined: " + SI->getAsString());
147 return "";
148}
149
150void CallingConvEmitter::emitAction(const Record *Action, indent Indent,
151 raw_ostream &O) {
152
153 auto EmitRegList = [&](const ListInit *RL, const StringRef RLName) {
154 O << Indent << "static const MCPhysReg " << RLName << "[] = {\n";
155 O << Indent << " ";
156 ListSeparator LS;
157 for (const Init *V : RL->getElements())
158 O << LS << getQualifiedRegisterName(I: V);
159 O << "\n" << Indent << "};\n";
160 };
161
162 auto EmitAllocateReg = [&](ArrayRef<const ListInit *> RegLists,
163 ArrayRef<std::string> RLNames) {
164 SmallVector<std::string> Parms;
165 if (RegLists[0]->size() == 1) {
166 for (const ListInit *LI : RegLists)
167 Parms.push_back(Elt: getQualifiedRegisterName(I: LI->getElement(Idx: 0)));
168 } else {
169 for (const std::string &S : RLNames)
170 Parms.push_back(Elt: S + utostr(X: ++Counter));
171 for (const auto [Idx, LI] : enumerate(First&: RegLists))
172 EmitRegList(LI, Parms[Idx]);
173 }
174 O << formatv(Fmt: "{0}if (MCRegister Reg = State.AllocateReg({1})) {{\n", Vals&: Indent,
175 Vals: make_range(x: Parms.begin(), y: Parms.end()));
176 O << Indent << " State.addLoc(CCValAssign::getReg(ValNo, ValVT, "
177 << "Reg, LocVT, LocInfo));\n";
178 };
179
180 auto EmitAllocateStack = [&](bool EmitOffset = false) {
181 int Size = Action->getValueAsInt(FieldName: "Size");
182 int Align = Action->getValueAsInt(FieldName: "Align");
183 if (EmitOffset)
184 O << Indent << "int64_t Offset" << ++Counter << " = ";
185 else
186 O << Indent << " (void)";
187 O << "State.AllocateStack(";
188
189 const char *Fmt = " State.getMachineFunction().getDataLayout()."
190 "{0}(EVT(LocVT).getTypeForEVT(State.getContext()))";
191 if (Size)
192 O << Size << ", ";
193 else
194 O << "\n" << Indent << formatv(Fmt, Vals: "getTypeAllocSize") << ", ";
195 if (Align)
196 O << "Align(" << Align << ")";
197 else
198 O << "\n" << Indent << formatv(Fmt, Vals: "getABITypeAlign");
199 O << ");\n";
200 };
201
202 if (Action->isSubClassOf(Name: "CCPredicateAction")) {
203 O << Indent << "if (";
204
205 if (Action->isSubClassOf(Name: "CCIfType")) {
206 const ListInit *VTs = Action->getValueAsListInit(FieldName: "VTs");
207 for (unsigned I = 0, E = VTs->size(); I != E; ++I) {
208 const Record *VT = VTs->getElementAsRecord(Idx: I);
209 if (I != 0)
210 O << " ||\n " << Indent;
211 O << "LocVT == " << getEnumName(T: getValueType(Rec: VT));
212 }
213
214 } else if (Action->isSubClassOf(Name: "CCIf")) {
215 O << Action->getValueAsString(FieldName: "Predicate");
216 } else {
217 errs() << *Action;
218 PrintFatalError(ErrorLoc: Action->getLoc(), Msg: "Unknown CCPredicateAction!");
219 }
220
221 O << ") {\n";
222 emitAction(Action: Action->getValueAsDef(FieldName: "SubAction"), Indent: Indent + 2, O);
223 O << Indent << "}\n";
224 return;
225 }
226
227 if (Action->isSubClassOf(Name: "CCDelegateTo")) {
228 const Record *CC = Action->getValueAsDef(FieldName: "CC");
229 O << Indent << "if (!" << CC->getName()
230 << "(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))\n"
231 << Indent + 2 << "return false;\n";
232 DelegateToMap[CurrentAction].insert(x: CC->getName().str());
233 } else if (Action->isSubClassOf(Name: "CCAssignToReg") ||
234 Action->isSubClassOf(Name: "CCAssignToRegTuple") ||
235 Action->isSubClassOf(Name: "CCAssignToRegAndStack")) {
236 const ListInit *RegList = Action->getValueAsListInit(FieldName: "RegList");
237 for (unsigned I = 0, E = RegList->size(); I != E; ++I) {
238 std::string Name = getQualifiedRegisterName(I: RegList->getElement(Idx: I));
239 if (SwiftAction)
240 AssignedSwiftRegsMap[CurrentAction].insert(x: std::move(Name));
241 else
242 AssignedRegsMap[CurrentAction].insert(x: std::move(Name));
243 }
244 EmitAllocateReg({RegList}, {"RegList"});
245
246 if (Action->isSubClassOf(Name: "CCAssignToRegAndStack"))
247 EmitAllocateStack();
248
249 O << Indent << " return false;\n";
250 O << Indent << "}\n";
251 } else if (Action->isSubClassOf(Name: "CCAssignToRegWithShadow")) {
252 const ListInit *RegList = Action->getValueAsListInit(FieldName: "RegList");
253 const ListInit *ShadowRegList = Action->getValueAsListInit(FieldName: "ShadowRegList");
254 if (!ShadowRegList->empty() && ShadowRegList->size() != RegList->size())
255 PrintFatalError(ErrorLoc: Action->getLoc(),
256 Msg: "Invalid length of list of shadowed registers");
257
258 EmitAllocateReg({RegList, ShadowRegList}, {"RegList", "RegList"});
259
260 O << Indent << " return false;\n";
261 O << Indent << "}\n";
262 } else if (Action->isSubClassOf(Name: "CCAssignToStack")) {
263 EmitAllocateStack(/*EmitOffset=*/true);
264 O << Indent << "State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset"
265 << Counter << ", LocVT, LocInfo));\n";
266 O << Indent << "return false;\n";
267 } else if (Action->isSubClassOf(Name: "CCAssignToStackWithShadow")) {
268 int Size = Action->getValueAsInt(FieldName: "Size");
269 int Align = Action->getValueAsInt(FieldName: "Align");
270 const ListInit *ShadowRegList = Action->getValueAsListInit(FieldName: "ShadowRegList");
271
272 unsigned ShadowRegListNumber = ++Counter;
273 EmitRegList(ShadowRegList, "ShadowRegList" + utostr(X: ShadowRegListNumber));
274
275 O << Indent << "int64_t Offset" << ++Counter << " = State.AllocateStack("
276 << Size << ", Align(" << Align << "), "
277 << "ShadowRegList" << ShadowRegListNumber << ");\n";
278 O << Indent << "State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset"
279 << Counter << ", LocVT, LocInfo));\n";
280 O << Indent << "return false;\n";
281 } else if (Action->isSubClassOf(Name: "CCPromoteToType")) {
282 const Record *DestTy = Action->getValueAsDef(FieldName: "DestTy");
283 MVT::SimpleValueType DestVT = getValueType(Rec: DestTy);
284 O << Indent << "LocVT = " << getEnumName(T: DestVT) << ";\n";
285 if (MVT(DestVT).isFloatingPoint()) {
286 O << Indent << "LocInfo = CCValAssign::FPExt;\n";
287 } else {
288 O << Indent << "if (ArgFlags.isSExt())\n"
289 << Indent << " LocInfo = CCValAssign::SExt;\n"
290 << Indent << "else if (ArgFlags.isZExt())\n"
291 << Indent << " LocInfo = CCValAssign::ZExt;\n"
292 << Indent << "else\n"
293 << Indent << " LocInfo = CCValAssign::AExt;\n";
294 }
295 } else if (Action->isSubClassOf(Name: "CCPromoteToUpperBitsInType")) {
296 const Record *DestTy = Action->getValueAsDef(FieldName: "DestTy");
297 MVT::SimpleValueType DestVT = getValueType(Rec: DestTy);
298 O << Indent << "LocVT = " << getEnumName(T: DestVT) << ";\n";
299 if (MVT(DestVT).isFloatingPoint()) {
300 PrintFatalError(ErrorLoc: Action->getLoc(),
301 Msg: "CCPromoteToUpperBitsInType does not handle floating "
302 "point");
303 } else {
304 O << Indent << "if (ArgFlags.isSExt())\n"
305 << Indent << " LocInfo = CCValAssign::SExtUpper;\n"
306 << Indent << "else if (ArgFlags.isZExt())\n"
307 << Indent << " LocInfo = CCValAssign::ZExtUpper;\n"
308 << Indent << "else\n"
309 << Indent << " LocInfo = CCValAssign::AExtUpper;\n";
310 }
311 } else if (Action->isSubClassOf(Name: "CCBitConvertToType")) {
312 const Record *DestTy = Action->getValueAsDef(FieldName: "DestTy");
313 O << Indent << "LocVT = " << getEnumName(T: getValueType(Rec: DestTy)) << ";\n";
314 O << Indent << "LocInfo = CCValAssign::BCvt;\n";
315 } else if (Action->isSubClassOf(Name: "CCTruncToType")) {
316 const Record *DestTy = Action->getValueAsDef(FieldName: "DestTy");
317 O << Indent << "LocVT = " << getEnumName(T: getValueType(Rec: DestTy)) << ";\n";
318 O << Indent << "LocInfo = CCValAssign::Trunc;\n";
319 } else if (Action->isSubClassOf(Name: "CCPassIndirect")) {
320 const Record *DestTy = Action->getValueAsDef(FieldName: "DestTy");
321 O << Indent << "LocVT = " << getEnumName(T: getValueType(Rec: DestTy)) << ";\n";
322 O << Indent << "LocInfo = CCValAssign::Indirect;\n";
323 } else if (Action->isSubClassOf(Name: "CCPassByVal")) {
324 int Size = Action->getValueAsInt(FieldName: "Size");
325 int Align = Action->getValueAsInt(FieldName: "Align");
326 O << Indent << "State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, " << Size
327 << ", Align(" << Align << "), ArgFlags);\n";
328 O << Indent << "return false;\n";
329 } else if (Action->isSubClassOf(Name: "CCCustom")) {
330 O << Indent << "if (" << Action->getValueAsString(FieldName: "FuncName")
331 << "(ValNo, ValVT, "
332 << "LocVT, LocInfo, ArgFlags, State))\n";
333 O << Indent << " return false;\n";
334 } else {
335 errs() << *Action;
336 PrintFatalError(ErrorLoc: Action->getLoc(), Msg: "Unknown CCAction!");
337 }
338}
339
340void CallingConvEmitter::emitArgRegisterLists(raw_ostream &O) {
341 // Transitively merge all delegated CCs into AssignedRegsMap.
342 using EntryTy = std::pair<std::string, std::set<std::string>>;
343 bool Redo;
344 do {
345 Redo = false;
346 std::deque<EntryTy> Worklist(DelegateToMap.begin(), DelegateToMap.end());
347
348 while (!Worklist.empty()) {
349 EntryTy Entry = Worklist.front();
350 Worklist.pop_front();
351
352 const std::string &CCName = Entry.first;
353 std::set<std::string> &Registers = Entry.second;
354 if (!Registers.empty())
355 continue;
356
357 for (auto &InnerEntry : Worklist) {
358 const std::string &InnerCCName = InnerEntry.first;
359 std::set<std::string> &InnerRegisters = InnerEntry.second;
360
361 auto It = InnerRegisters.find(x: CCName);
362 if (It != InnerRegisters.end()) {
363 const auto &Src = AssignedRegsMap[CCName];
364 AssignedRegsMap[InnerCCName].insert(first: Src.begin(), last: Src.end());
365 InnerRegisters.erase(position: It);
366 }
367 }
368
369 DelegateToMap.erase(x: CCName);
370 Redo = true;
371 }
372 } while (Redo);
373
374 if (AssignedRegsMap.empty())
375 return;
376
377 O << "\n#else\n\n";
378
379 for (const auto &[RegName, Registers] : AssignedRegsMap) {
380 if (RegName.empty())
381 continue;
382
383 O << "const MCRegister " << RegName << "_ArgRegs[] = { ";
384
385 if (Registers.empty())
386 O << "0";
387 else
388 O << llvm::interleaved(R: Registers);
389
390 O << " };\n";
391 }
392
393 if (AssignedSwiftRegsMap.empty())
394 return;
395
396 O << "\n// Registers used by Swift.\n";
397 for (const auto &[RegName, Registers] : AssignedSwiftRegsMap)
398 O << "const MCRegister " << RegName << "_Swift_ArgRegs[] = { "
399 << llvm::interleaved(R: Registers) << " };\n";
400}
401
402static TableGen::Emitter::OptClass<CallingConvEmitter>
403 X("gen-callingconv", "Generate calling convention descriptions");
404