1//===- DAGISelMatcherGen.cpp - Matcher generator --------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "Basic/SDNodeProperties.h"
10#include "Common/CodeGenDAGPatterns.h"
11#include "Common/CodeGenInstruction.h"
12#include "Common/CodeGenRegisters.h"
13#include "Common/CodeGenTarget.h"
14#include "Common/DAGISelMatcher.h"
15#include "Common/InfoByHwMode.h"
16#include "llvm/ADT/SmallVector.h"
17#include "llvm/ADT/StringMap.h"
18#include "llvm/TableGen/Error.h"
19#include "llvm/TableGen/Record.h"
20#include <utility>
21using namespace llvm;
22
23/// getRegisterValueType - Look up and return the ValueType of the specified
24/// register. If the register is a member of multiple register classes, they
25/// must all have the same type.
26static MVT::SimpleValueType getRegisterValueType(const Record *R,
27 const CodeGenTarget &T) {
28 bool FoundRC = false;
29 MVT::SimpleValueType VT = MVT::Other;
30 const CodeGenRegister *Reg = T.getRegBank().getReg(R);
31
32 for (const auto &RC : T.getRegBank().getRegClasses()) {
33 if (!RC.contains(Reg))
34 continue;
35
36 if (!FoundRC) {
37 FoundRC = true;
38 const ValueTypeByHwMode &VVT = RC.getValueTypeNum(VTNum: 0);
39 assert(VVT.isSimple());
40 VT = VVT.getSimple().SimpleTy;
41 continue;
42 }
43
44#ifndef NDEBUG
45 // If this occurs in multiple register classes, they all have to agree.
46 const ValueTypeByHwMode &VVT = RC.getValueTypeNum(0);
47 assert(VVT.isSimple() && VVT.getSimple().SimpleTy == VT &&
48 "ValueType mismatch between register classes for this register");
49#endif
50 }
51 return VT;
52}
53
54namespace {
55class MatcherGen {
56 const PatternToMatch &Pattern;
57 const CodeGenDAGPatterns &CGP;
58
59 /// PatWithNoTypes - This is a clone of Pattern.getSrcPattern() that starts
60 /// out with all of the types removed. This allows us to insert type checks
61 /// as we scan the tree.
62 TreePatternNodePtr PatWithNoTypes;
63
64 /// VariableMap - A map from variable names ('$dst') to the recorded operand
65 /// number that they were captured as. These are biased by 1 to make
66 /// insertion easier.
67 StringMap<unsigned> VariableMap;
68
69 /// This maintains the recorded operand number that OPC_CheckComplexPattern
70 /// drops each sub-operand into. We don't want to insert these into
71 /// VariableMap because that leads to identity checking if they are
72 /// encountered multiple times. Biased by 1 like VariableMap for
73 /// consistency.
74 StringMap<unsigned> NamedComplexPatternOperands;
75
76 /// NextRecordedOperandNo - As we emit opcodes to record matched values in
77 /// the RecordedNodes array, this keeps track of which slot will be next to
78 /// record into.
79 unsigned NextRecordedOperandNo = 0;
80
81 /// MatchedChainNodes - This maintains the position in the recorded nodes
82 /// array of all of the recorded input nodes that have chains.
83 SmallVector<unsigned, 2> MatchedChainNodes;
84
85 /// MatchedComplexPatterns - This maintains a list of all of the
86 /// ComplexPatterns that we need to check. The second element of each pair
87 /// is the recorded operand number of the input node.
88 SmallVector<std::pair<const TreePatternNode *, unsigned>, 2>
89 MatchedComplexPatterns;
90
91 /// PhysRegInputs - List list has an entry for each explicitly specified
92 /// physreg input to the pattern. The first elt is the Register node, the
93 /// second is the recorded slot number the input pattern match saved it in.
94 SmallVector<std::pair<const Record *, unsigned>, 2> PhysRegInputs;
95
96 /// Matcher - This is the top level of the generated matcher, the result.
97 Matcher *TheMatcher = nullptr;
98
99 /// CurPredicate - As we emit matcher nodes, this points to the latest check
100 /// which should have future checks stuck into its Next position.
101 Matcher *CurPredicate = nullptr;
102
103public:
104 MatcherGen(const PatternToMatch &pattern, const CodeGenDAGPatterns &cgp);
105
106 bool EmitMatcherCode(unsigned Variant);
107 void EmitResultCode();
108
109 Matcher *GetMatcher() const { return TheMatcher; }
110
111private:
112 void AddMatcher(Matcher *NewNode);
113 void InferPossibleTypes();
114
115 // Matcher Generation.
116 void EmitMatchCode(const TreePatternNode &N, TreePatternNode &NodeNoTypes);
117 void EmitLeafMatchCode(const TreePatternNode &N);
118 void EmitOperatorMatchCode(const TreePatternNode &N,
119 TreePatternNode &NodeNoTypes);
120
121 /// If this is the first time a node with unique identifier Name has been
122 /// seen, record it. Otherwise, emit a check to make sure this is the same
123 /// node. Returns true if this is the first encounter.
124 bool recordUniqueNode(ArrayRef<std::string> Names);
125
126 // Result Code Generation.
127 unsigned getNamedArgumentSlot(StringRef Name) {
128 unsigned VarMapEntry = VariableMap[Name];
129 assert(VarMapEntry != 0 &&
130 "Variable referenced but not defined and not caught earlier!");
131 return VarMapEntry - 1;
132 }
133
134 void EmitResultOperand(const TreePatternNode &N,
135 SmallVectorImpl<unsigned> &ResultOps);
136 void EmitResultOfNamedOperand(const TreePatternNode &N,
137 SmallVectorImpl<unsigned> &ResultOps);
138 void EmitResultLeafAsOperand(const TreePatternNode &N,
139 SmallVectorImpl<unsigned> &ResultOps);
140 void EmitResultInstructionAsOperand(const TreePatternNode &N,
141 SmallVectorImpl<unsigned> &ResultOps);
142 void EmitResultSDNodeXFormAsOperand(const TreePatternNode &N,
143 SmallVectorImpl<unsigned> &ResultOps);
144};
145
146} // end anonymous namespace
147
148MatcherGen::MatcherGen(const PatternToMatch &pattern,
149 const CodeGenDAGPatterns &cgp)
150 : Pattern(pattern), CGP(cgp) {
151 // We need to produce the matcher tree for the patterns source pattern. To
152 // do this we need to match the structure as well as the types. To do the
153 // type matching, we want to figure out the fewest number of type checks we
154 // need to emit. For example, if there is only one integer type supported
155 // by a target, there should be no type comparisons at all for integer
156 // patterns!
157 //
158 // To figure out the fewest number of type checks needed, clone the pattern,
159 // remove the types, then perform type inference on the pattern as a whole.
160 // If there are unresolved types, emit an explicit check for those types,
161 // apply the type to the tree, then rerun type inference. Iterate until all
162 // types are resolved.
163 //
164 PatWithNoTypes = Pattern.getSrcPattern().clone();
165 PatWithNoTypes->RemoveAllTypes();
166
167 // If there are types that are manifestly known, infer them.
168 InferPossibleTypes();
169}
170
171/// InferPossibleTypes - As we emit the pattern, we end up generating type
172/// checks and applying them to the 'PatWithNoTypes' tree. As we do this, we
173/// want to propagate implied types as far throughout the tree as possible so
174/// that we avoid doing redundant type checks. This does the type propagation.
175void MatcherGen::InferPossibleTypes() {
176 // TP - Get *SOME* tree pattern, we don't care which. It is only used for
177 // diagnostics, which we know are impossible at this point.
178 TreePattern &TP = *CGP.pf_begin()->second;
179
180 bool MadeChange = true;
181 while (MadeChange)
182 MadeChange = PatWithNoTypes->ApplyTypeConstraints(
183 TP, NotRegisters: true /*Ignore reg constraints*/);
184}
185
186/// AddMatcher - Add a matcher node to the current graph we're building.
187void MatcherGen::AddMatcher(Matcher *NewNode) {
188 if (CurPredicate)
189 CurPredicate->setNext(NewNode);
190 else
191 TheMatcher = NewNode;
192 CurPredicate = NewNode;
193}
194
195//===----------------------------------------------------------------------===//
196// Pattern Match Generation
197//===----------------------------------------------------------------------===//
198
199/// EmitLeafMatchCode - Generate matching code for leaf nodes.
200void MatcherGen::EmitLeafMatchCode(const TreePatternNode &N) {
201 assert(N.isLeaf() && "Not a leaf?");
202
203 // Direct match against an integer constant.
204 if (const IntInit *II = dyn_cast<IntInit>(Val: N.getLeafValue())) {
205 // If this is the root of the dag we're matching, we emit a redundant opcode
206 // check to ensure that this gets folded into the normal top-level
207 // OpcodeSwitch.
208 if (&N == &Pattern.getSrcPattern()) {
209 const SDNodeInfo &NI = CGP.getSDNodeInfo(R: CGP.getSDNodeNamed(Name: "imm"));
210 AddMatcher(NewNode: new CheckOpcodeMatcher(NI));
211 }
212
213 return AddMatcher(NewNode: new CheckIntegerMatcher(II->getValue()));
214 }
215
216 // An UnsetInit represents a named node without any constraints.
217 if (isa<UnsetInit>(Val: N.getLeafValue())) {
218 assert(N.hasName() && "Unnamed ? leaf");
219 return;
220 }
221
222 const DefInit *DI = dyn_cast<DefInit>(Val: N.getLeafValue());
223 if (!DI) {
224 errs() << "Unknown leaf kind: " << N << "\n";
225 abort();
226 }
227
228 const Record *LeafRec = DI->getDef();
229
230 // A ValueType leaf node can represent a register when named, or itself when
231 // unnamed.
232 if (LeafRec->isSubClassOf(Name: "ValueType")) {
233 // A named ValueType leaf always matches: (add i32:$a, i32:$b).
234 if (N.hasName())
235 return;
236 // An unnamed ValueType as in (sext_inreg GPR:$foo, i8).
237 return AddMatcher(NewNode: new CheckValueTypeMatcher(llvm::getValueType(Rec: LeafRec)));
238 }
239
240 if ( // Handle register references. Nothing to do here, they always match.
241 LeafRec->isSubClassOf(Name: "RegisterClass") ||
242 LeafRec->isSubClassOf(Name: "RegisterOperand") ||
243 LeafRec->isSubClassOf(Name: "PointerLikeRegClass") ||
244 LeafRec->isSubClassOf(Name: "SubRegIndex") ||
245 // Place holder for SRCVALUE nodes. Nothing to do here.
246 LeafRec->getName() == "srcvalue")
247 return;
248
249 // If we have a physreg reference like (mul gpr:$src, EAX) then we need to
250 // record the register
251 if (LeafRec->isSubClassOf(Name: "Register")) {
252 AddMatcher(NewNode: new RecordMatcher("physreg input " + LeafRec->getName().str(),
253 NextRecordedOperandNo));
254 PhysRegInputs.emplace_back(Args&: LeafRec, Args: NextRecordedOperandNo++);
255 return;
256 }
257
258 if (LeafRec->isSubClassOf(Name: "CondCode"))
259 return AddMatcher(NewNode: new CheckCondCodeMatcher(LeafRec->getName()));
260
261 if (LeafRec->isSubClassOf(Name: "ComplexPattern")) {
262 // We can't model ComplexPattern uses that don't have their name taken yet.
263 // The OPC_CheckComplexPattern operation implicitly records the results.
264 if (N.getName().empty()) {
265 std::string S;
266 raw_string_ostream OS(S);
267 OS << "We expect complex pattern uses to have names: " << N;
268 PrintFatalError(Msg: S);
269 }
270
271 // Remember this ComplexPattern so that we can emit it after all the other
272 // structural matches are done.
273 unsigned InputOperand = VariableMap[N.getName()] - 1;
274 MatchedComplexPatterns.emplace_back(Args: &N, Args&: InputOperand);
275 return;
276 }
277
278 if (LeafRec->getName() == "immAllOnesV" ||
279 LeafRec->getName() == "immAllZerosV") {
280 // If this is the root of the dag we're matching, we emit a redundant opcode
281 // check to ensure that this gets folded into the normal top-level
282 // OpcodeSwitch.
283 if (&N == &Pattern.getSrcPattern()) {
284 MVT VT = N.getSimpleType(ResNo: 0);
285 StringRef Name = VT.isScalableVector() ? "splat_vector" : "build_vector";
286 const SDNodeInfo &NI = CGP.getSDNodeInfo(R: CGP.getSDNodeNamed(Name));
287 AddMatcher(NewNode: new CheckOpcodeMatcher(NI));
288 }
289 if (LeafRec->getName() == "immAllOnesV")
290 AddMatcher(NewNode: new CheckImmAllOnesVMatcher());
291 else
292 AddMatcher(NewNode: new CheckImmAllZerosVMatcher());
293 return;
294 }
295
296 errs() << "Unknown leaf kind: " << N << "\n";
297 abort();
298}
299
300void MatcherGen::EmitOperatorMatchCode(const TreePatternNode &N,
301 TreePatternNode &NodeNoTypes) {
302 assert(!N.isLeaf() && "Not an operator?");
303
304 if (N.getOperator()->isSubClassOf(Name: "ComplexPattern")) {
305 // The "name" of a non-leaf complex pattern (MY_PAT $op1, $op2) is
306 // "MY_PAT:op1:op2". We should already have validated that the uses are
307 // consistent.
308 std::string PatternName = N.getOperator()->getName().str();
309 for (const TreePatternNode &Child : N.children()) {
310 PatternName += ":";
311 PatternName += Child.getName();
312 }
313
314 if (recordUniqueNode(Names: PatternName)) {
315 auto NodeAndOpNum = std::pair(&N, NextRecordedOperandNo - 1);
316 MatchedComplexPatterns.push_back(Elt: NodeAndOpNum);
317 }
318
319 return;
320 }
321
322 const SDNodeInfo &CInfo = CGP.getSDNodeInfo(R: N.getOperator());
323
324 // If this is an 'and R, 1234' where the operation is AND/OR and the RHS is
325 // a constant without a predicate fn that has more than one bit set, handle
326 // this as a special case. This is usually for targets that have special
327 // handling of certain large constants (e.g. alpha with it's 8/16/32-bit
328 // handling stuff). Using these instructions is often far more efficient
329 // than materializing the constant. Unfortunately, both the instcombiner
330 // and the dag combiner can often infer that bits are dead, and thus drop
331 // them from the mask in the dag. For example, it might turn 'AND X, 255'
332 // into 'AND X, 254' if it knows the low bit is set. Emit code that checks
333 // to handle this.
334 if ((N.getOperator()->getName() == "and" ||
335 N.getOperator()->getName() == "or") &&
336 N.getChild(N: 1).isLeaf() && N.getChild(N: 1).getPredicateCalls().empty() &&
337 N.getPredicateCalls().empty()) {
338 if (const IntInit *II = dyn_cast<IntInit>(Val: N.getChild(N: 1).getLeafValue())) {
339 if (!llvm::has_single_bit<uint32_t>(
340 Value: II->getValue())) { // Don't bother with single bits.
341 // If this is at the root of the pattern, we emit a redundant
342 // CheckOpcode so that the following checks get factored properly under
343 // a single opcode check.
344 if (&N == &Pattern.getSrcPattern())
345 AddMatcher(NewNode: new CheckOpcodeMatcher(CInfo));
346
347 // Emit the CheckAndImm/CheckOrImm node.
348 if (N.getOperator()->getName() == "and")
349 AddMatcher(NewNode: new CheckAndImmMatcher(II->getValue()));
350 else
351 AddMatcher(NewNode: new CheckOrImmMatcher(II->getValue()));
352
353 // Match the LHS of the AND as appropriate.
354 AddMatcher(NewNode: new MoveChildMatcher(0));
355 EmitMatchCode(N: N.getChild(N: 0), NodeNoTypes&: NodeNoTypes.getChild(N: 0));
356 AddMatcher(NewNode: new MoveParentMatcher());
357 return;
358 }
359 }
360 }
361
362 // Check that the current opcode lines up.
363 AddMatcher(NewNode: new CheckOpcodeMatcher(CInfo));
364
365 // If this node has memory references (i.e. is a load or store), tell the
366 // interpreter to capture them in the memref array.
367 if (N.NodeHasProperty(Property: SDNPMemOperand, CGP))
368 AddMatcher(NewNode: new RecordMemRefMatcher());
369
370 // If this node has a chain, then the chain is operand #0 is the SDNode, and
371 // the child numbers of the node are all offset by one.
372 unsigned OpNo = 0;
373 if (N.NodeHasProperty(Property: SDNPHasChain, CGP)) {
374 // Record the node and remember it in our chained nodes list.
375 AddMatcher(NewNode: new RecordMatcher("'" + N.getOperator()->getName().str() +
376 "' chained node",
377 NextRecordedOperandNo));
378 // Remember all of the input chains our pattern will match.
379 MatchedChainNodes.push_back(Elt: NextRecordedOperandNo++);
380
381 // Don't look at the input chain when matching the tree pattern to the
382 // SDNode.
383 OpNo = 1;
384
385 // If this node is not the root and the subtree underneath it produces a
386 // chain, then the result of matching the node is also produce a chain.
387 // Beyond that, this means that we're also folding (at least) the root node
388 // into the node that produce the chain (for example, matching
389 // "(add reg, (load ptr))" as a add_with_memory on X86). This is
390 // problematic, if the 'reg' node also uses the load (say, its chain).
391 // Graphically:
392 //
393 // [LD]
394 // ^ ^
395 // | \ DAG's like cheese.
396 // / |
397 // / [YY]
398 // | ^
399 // [XX]--/
400 //
401 // It would be invalid to fold XX and LD. In this case, folding the two
402 // nodes together would induce a cycle in the DAG, making it a 'cyclic DAG'
403 // To prevent this, we emit a dynamic check for legality before allowing
404 // this to be folded.
405 //
406 const TreePatternNode &Root = Pattern.getSrcPattern();
407 if (&N != &Root) { // Not the root of the pattern.
408 // If there is a node between the root and this node, then we definitely
409 // need to emit the check.
410 bool NeedCheck = !Root.hasChild(N: &N);
411
412 // If it *is* an immediate child of the root, we can still need a check if
413 // the root SDNode has multiple inputs. For us, this means that it is an
414 // intrinsic, has multiple operands, or has other inputs like chain or
415 // glue).
416 if (!NeedCheck) {
417 const SDNodeInfo &PInfo = CGP.getSDNodeInfo(R: Root.getOperator());
418 NeedCheck =
419 Root.getOperator() == CGP.get_intrinsic_void_sdnode() ||
420 Root.getOperator() == CGP.get_intrinsic_w_chain_sdnode() ||
421 Root.getOperator() == CGP.get_intrinsic_wo_chain_sdnode() ||
422 PInfo.getNumOperands() > 1 || PInfo.hasProperty(Prop: SDNPHasChain) ||
423 PInfo.hasProperty(Prop: SDNPInGlue) || PInfo.hasProperty(Prop: SDNPOptInGlue);
424 }
425
426 if (NeedCheck)
427 AddMatcher(NewNode: new CheckFoldableChainNodeMatcher());
428 }
429 }
430
431 // If this node has an output glue and isn't the root, remember it.
432 if (N.NodeHasProperty(Property: SDNPOutGlue, CGP) && &N != &Pattern.getSrcPattern()) {
433 // TODO: This redundantly records nodes with both glues and chains.
434
435 // Record the node and remember it in our chained nodes list.
436 AddMatcher(NewNode: new RecordMatcher("'" + N.getOperator()->getName().str() +
437 "' glue output node",
438 NextRecordedOperandNo));
439 }
440
441 // If this node is known to have an input glue or if it *might* have an input
442 // glue, capture it as the glue input of the pattern.
443 if (N.NodeHasProperty(Property: SDNPOptInGlue, CGP) ||
444 N.NodeHasProperty(Property: SDNPInGlue, CGP))
445 AddMatcher(NewNode: new CaptureGlueInputMatcher());
446
447 for (unsigned i = 0, e = N.getNumChildren(); i != e; ++i, ++OpNo) {
448 // Get the code suitable for matching this child. Move to the child, check
449 // it then move back to the parent.
450 AddMatcher(NewNode: new MoveChildMatcher(OpNo));
451 EmitMatchCode(N: N.getChild(N: i), NodeNoTypes&: NodeNoTypes.getChild(N: i));
452 AddMatcher(NewNode: new MoveParentMatcher());
453 }
454}
455
456bool MatcherGen::recordUniqueNode(ArrayRef<std::string> Names) {
457 unsigned Entry = 0;
458 for (const std::string &Name : Names) {
459 unsigned &VarMapEntry = VariableMap[Name];
460 if (!Entry)
461 Entry = VarMapEntry;
462 assert(Entry == VarMapEntry);
463 }
464
465 bool NewRecord = false;
466 if (Entry == 0) {
467 // If it is a named node, we must emit a 'Record' opcode.
468 std::string WhatFor;
469 for (const std::string &Name : Names) {
470 if (!WhatFor.empty())
471 WhatFor += ',';
472 WhatFor += "$" + Name;
473 }
474 AddMatcher(NewNode: new RecordMatcher(WhatFor, NextRecordedOperandNo));
475 Entry = ++NextRecordedOperandNo;
476 NewRecord = true;
477 } else {
478 // If we get here, this is a second reference to a specific name. Since
479 // we already have checked that the first reference is valid, we don't
480 // have to recursively match it, just check that it's the same as the
481 // previously named thing.
482 AddMatcher(NewNode: new CheckSameMatcher(Entry - 1));
483 }
484
485 for (const std::string &Name : Names)
486 VariableMap[Name] = Entry;
487
488 return NewRecord;
489}
490
491void MatcherGen::EmitMatchCode(const TreePatternNode &N,
492 TreePatternNode &NodeNoTypes) {
493 // If N and NodeNoTypes don't agree on a type, then this is a case where we
494 // need to do a type check. Emit the check, apply the type to NodeNoTypes and
495 // reinfer any correlated types.
496 SmallVector<unsigned, 2> ResultsToTypeCheck;
497
498 for (unsigned i = 0, e = NodeNoTypes.getNumTypes(); i != e; ++i) {
499 if (NodeNoTypes.getExtType(ResNo: i) == N.getExtType(ResNo: i))
500 continue;
501 NodeNoTypes.setType(ResNo: i, T: N.getExtType(ResNo: i));
502 InferPossibleTypes();
503 ResultsToTypeCheck.push_back(Elt: i);
504 }
505
506 // If this node has a name associated with it, capture it in VariableMap. If
507 // we already saw this in the pattern, emit code to verify dagness.
508 SmallVector<std::string, 4> Names;
509 if (!N.getName().empty())
510 Names.push_back(Elt: N.getName().str());
511
512 for (const ScopedName &Name : N.getNamesAsPredicateArg()) {
513 Names.push_back(
514 Elt: ("pred:" + Twine(Name.getScope()) + ":" + Name.getIdentifier()).str());
515 }
516
517 if (!Names.empty()) {
518 if (!recordUniqueNode(Names))
519 return;
520 }
521
522 if (N.isLeaf())
523 EmitLeafMatchCode(N);
524 else
525 EmitOperatorMatchCode(N, NodeNoTypes);
526
527 // If there are node predicates for this node, generate their checks.
528 for (const TreePredicateCall &Pred : N.getPredicateCalls()) {
529 SmallVector<unsigned, 4> Operands;
530 if (Pred.Fn.usesOperands()) {
531 TreePattern *TP = Pred.Fn.getOrigPatFragRecord();
532 for (const std::string &Arg : TP->getArgList()) {
533 std::string Name = ("pred:" + Twine(Pred.Scope) + ":" + Arg).str();
534 Operands.push_back(Elt: getNamedArgumentSlot(Name));
535 }
536 }
537 AddMatcher(NewNode: new CheckPredicateMatcher(Pred.Fn, Operands));
538 }
539
540 for (unsigned I : ResultsToTypeCheck)
541 AddMatcher(NewNode: new CheckTypeMatcher(N.getSimpleType(ResNo: I), I));
542}
543
544/// EmitMatcherCode - Generate the code that matches the predicate of this
545/// pattern for the specified Variant. If the variant is invalid this returns
546/// true and does not generate code, if it is valid, it returns false.
547bool MatcherGen::EmitMatcherCode(unsigned Variant) {
548 // If the root of the pattern is a ComplexPattern and if it is specified to
549 // match some number of root opcodes, these are considered to be our variants.
550 // Depending on which variant we're generating code for, emit the root opcode
551 // check.
552 if (const ComplexPattern *CP =
553 Pattern.getSrcPattern().getComplexPatternInfo(CGP)) {
554 ArrayRef<const Record *> OpNodes = CP->getRootNodes();
555 assert(!OpNodes.empty() &&
556 "Complex Pattern must specify what it can match");
557 if (Variant >= OpNodes.size())
558 return true;
559
560 AddMatcher(NewNode: new CheckOpcodeMatcher(CGP.getSDNodeInfo(R: OpNodes[Variant])));
561 } else {
562 if (Variant != 0)
563 return true;
564 }
565
566 // Emit the matcher for the pattern structure and types.
567 EmitMatchCode(N: Pattern.getSrcPattern(), NodeNoTypes&: *PatWithNoTypes);
568
569 // If the pattern has a predicate on it (e.g. only enabled when a subtarget
570 // feature is around, do the check).
571 std::string PredicateCheck = Pattern.getPredicateCheck();
572 if (!PredicateCheck.empty())
573 AddMatcher(NewNode: new CheckPatternPredicateMatcher(PredicateCheck));
574
575 // Now that we've completed the structural type match, emit any ComplexPattern
576 // checks (e.g. addrmode matches). We emit this after the structural match
577 // because they are generally more expensive to evaluate and more difficult to
578 // factor.
579 for (const auto &MCP : MatchedComplexPatterns) {
580 auto &N = *MCP.first;
581
582 // Remember where the results of this match get stuck.
583 if (N.isLeaf()) {
584 NamedComplexPatternOperands[N.getName()] = NextRecordedOperandNo + 1;
585 } else {
586 unsigned CurOp = NextRecordedOperandNo;
587 for (const TreePatternNode &Child : N.children()) {
588 NamedComplexPatternOperands[Child.getName()] = CurOp + 1;
589 CurOp += Child.getNumMIResults(CGP);
590 }
591 }
592
593 // Get the slot we recorded the value in from the name on the node.
594 unsigned RecNodeEntry = MCP.second;
595
596 const ComplexPattern *CP = N.getComplexPatternInfo(CGP);
597 assert(CP && "Not a valid ComplexPattern!");
598
599 // Emit a CheckComplexPat operation, which does the match (aborting if it
600 // fails) and pushes the matched operands onto the recorded nodes list.
601 AddMatcher(NewNode: new CheckComplexPatMatcher(*CP, RecNodeEntry, N.getName(),
602 NextRecordedOperandNo));
603
604 // Record the right number of operands.
605 NextRecordedOperandNo += CP->getNumOperands();
606 if (CP->hasProperty(Prop: SDNPHasChain)) {
607 // If the complex pattern has a chain, then we need to keep track of the
608 // fact that we just recorded a chain input. The chain input will be
609 // matched as the last operand of the predicate if it was successful.
610 ++NextRecordedOperandNo; // Chained node operand.
611
612 // It is the last operand recorded.
613 assert(NextRecordedOperandNo > 1 &&
614 "Should have recorded input/result chains at least!");
615 MatchedChainNodes.push_back(Elt: NextRecordedOperandNo - 1);
616 }
617
618 // TODO: Complex patterns can't have output glues, if they did, we'd want
619 // to record them.
620 }
621
622 return false;
623}
624
625//===----------------------------------------------------------------------===//
626// Node Result Generation
627//===----------------------------------------------------------------------===//
628
629void MatcherGen::EmitResultOfNamedOperand(
630 const TreePatternNode &N, SmallVectorImpl<unsigned> &ResultOps) {
631 assert(!N.getName().empty() && "Operand not named!");
632
633 if (unsigned SlotNo = NamedComplexPatternOperands[N.getName()]) {
634 // Complex operands have already been completely selected, just find the
635 // right slot ant add the arguments directly.
636 for (unsigned i = 0; i < N.getNumMIResults(CGP); ++i)
637 ResultOps.push_back(Elt: SlotNo - 1 + i);
638
639 return;
640 }
641
642 unsigned SlotNo = getNamedArgumentSlot(Name: N.getName());
643
644 // If this is an 'imm' or 'fpimm' node, make sure to convert it to the target
645 // version of the immediate so that it doesn't get selected due to some other
646 // node use.
647 if (!N.isLeaf()) {
648 StringRef OperatorName = N.getOperator()->getName();
649 if (OperatorName == "imm" || OperatorName == "fpimm") {
650 AddMatcher(NewNode: new EmitConvertToTargetMatcher(SlotNo, NextRecordedOperandNo));
651 ResultOps.push_back(Elt: NextRecordedOperandNo++);
652 return;
653 }
654 }
655
656 for (unsigned i = 0; i < N.getNumMIResults(CGP); ++i)
657 ResultOps.push_back(Elt: SlotNo + i);
658}
659
660void MatcherGen::EmitResultLeafAsOperand(const TreePatternNode &N,
661 SmallVectorImpl<unsigned> &ResultOps) {
662 assert(N.isLeaf() && "Must be a leaf");
663
664 if (const IntInit *II = dyn_cast<IntInit>(Val: N.getLeafValue())) {
665 AddMatcher(NewNode: new EmitIntegerMatcher(II->getValue(), N.getSimpleType(ResNo: 0),
666 NextRecordedOperandNo));
667 ResultOps.push_back(Elt: NextRecordedOperandNo++);
668 return;
669 }
670
671 // If this is an explicit register reference, handle it.
672 if (const DefInit *DI = dyn_cast<DefInit>(Val: N.getLeafValue())) {
673 const Record *Def = DI->getDef();
674 if (Def->isSubClassOf(Name: "Register")) {
675 const CodeGenRegister *Reg = CGP.getTargetInfo().getRegBank().getReg(Def);
676 AddMatcher(NewNode: new EmitRegisterMatcher(Reg, N.getSimpleType(ResNo: 0),
677 NextRecordedOperandNo));
678 ResultOps.push_back(Elt: NextRecordedOperandNo++);
679 return;
680 }
681
682 if (Def->getName() == "zero_reg") {
683 AddMatcher(NewNode: new EmitRegisterMatcher(nullptr, N.getSimpleType(ResNo: 0),
684 NextRecordedOperandNo));
685 ResultOps.push_back(Elt: NextRecordedOperandNo++);
686 return;
687 }
688
689 if (Def->getName() == "undef_tied_input") {
690 MVT::SimpleValueType ResultVT = N.getSimpleType(ResNo: 0);
691 auto IDOperandNo = NextRecordedOperandNo++;
692 const Record *ImpDef = Def->getRecords().getDef(Name: "IMPLICIT_DEF");
693 CodeGenInstruction &II = CGP.getTargetInfo().getInstruction(InstRec: ImpDef);
694 AddMatcher(NewNode: new EmitNodeMatcher(II, ResultVT, {}, false, false, false,
695 false, -1, IDOperandNo));
696 ResultOps.push_back(Elt: IDOperandNo);
697 return;
698 }
699
700 // Handle a reference to a register class. This is used
701 // in COPY_TO_SUBREG instructions.
702 if (Def->isSubClassOf(Name: "RegisterOperand"))
703 Def = Def->getValueAsDef(FieldName: "RegClass");
704 if (Def->isSubClassOf(Name: "RegisterClass")) {
705 // If the register class has an enum integer value greater than 127, the
706 // encoding overflows the limit of 7 bits, which precludes the use of
707 // StringIntegerMatcher. In this case, fallback to using IntegerMatcher.
708 const CodeGenRegisterClass &RC =
709 CGP.getTargetInfo().getRegisterClass(R: Def);
710 if (RC.EnumValue <= 127) {
711 std::string Value = RC.getQualifiedIdName();
712 AddMatcher(NewNode: new EmitStringIntegerMatcher(Value, MVT::i32,
713 NextRecordedOperandNo));
714 } else {
715 AddMatcher(NewNode: new EmitIntegerMatcher(RC.EnumValue, MVT::i32,
716 NextRecordedOperandNo));
717 }
718 ResultOps.push_back(Elt: NextRecordedOperandNo++);
719 return;
720 }
721
722 // Handle a subregister index. This is used for INSERT_SUBREG etc.
723 if (Def->isSubClassOf(Name: "SubRegIndex")) {
724 const CodeGenRegBank &RB = CGP.getTargetInfo().getRegBank();
725 // If we have more than 127 subreg indices the encoding can overflow
726 // 7 bit and we cannot use StringInteger.
727 if (RB.getSubRegIndices().size() > 127) {
728 const CodeGenSubRegIndex *I = RB.findSubRegIdx(Def);
729 if (I->EnumValue > 127) {
730 AddMatcher(NewNode: new EmitIntegerMatcher(I->EnumValue, MVT::i32,
731 NextRecordedOperandNo));
732 ResultOps.push_back(Elt: NextRecordedOperandNo++);
733 return;
734 }
735 }
736 std::string Value = getQualifiedName(R: Def);
737 AddMatcher(
738 NewNode: new EmitStringIntegerMatcher(Value, MVT::i32, NextRecordedOperandNo));
739 ResultOps.push_back(Elt: NextRecordedOperandNo++);
740 return;
741 }
742 }
743
744 errs() << "unhandled leaf node:\n";
745 N.dump();
746}
747
748static bool mayInstNodeLoadOrStore(const TreePatternNode &N,
749 const CodeGenDAGPatterns &CGP) {
750 const Record *Op = N.getOperator();
751 const CodeGenTarget &CGT = CGP.getTargetInfo();
752 CodeGenInstruction &II = CGT.getInstruction(InstRec: Op);
753 return II.mayLoad || II.mayStore;
754}
755
756static unsigned numNodesThatMayLoadOrStore(const TreePatternNode &N,
757 const CodeGenDAGPatterns &CGP) {
758 if (N.isLeaf())
759 return 0;
760
761 const Record *OpRec = N.getOperator();
762 if (!OpRec->isSubClassOf(Name: "Instruction"))
763 return 0;
764
765 unsigned Count = 0;
766 if (mayInstNodeLoadOrStore(N, CGP))
767 ++Count;
768
769 for (const TreePatternNode &Child : N.children())
770 Count += numNodesThatMayLoadOrStore(N: Child, CGP);
771
772 return Count;
773}
774
775void MatcherGen::EmitResultInstructionAsOperand(
776 const TreePatternNode &N, SmallVectorImpl<unsigned> &OutputOps) {
777 const Record *Op = N.getOperator();
778 const CodeGenTarget &CGT = CGP.getTargetInfo();
779 CodeGenInstruction &II = CGT.getInstruction(InstRec: Op);
780 const DAGInstruction &Inst = CGP.getInstruction(R: Op);
781
782 bool isRoot = &N == &Pattern.getDstPattern();
783
784 // TreeHasOutGlue - True if this tree has glue.
785 bool TreeHasInGlue = false, TreeHasOutGlue = false;
786 if (isRoot) {
787 const TreePatternNode &SrcPat = Pattern.getSrcPattern();
788 TreeHasInGlue = SrcPat.TreeHasProperty(Property: SDNPOptInGlue, CGP) ||
789 SrcPat.TreeHasProperty(Property: SDNPInGlue, CGP);
790
791 // FIXME2: this is checking the entire pattern, not just the node in
792 // question, doing this just for the root seems like a total hack.
793 TreeHasOutGlue = SrcPat.TreeHasProperty(Property: SDNPOutGlue, CGP);
794 }
795
796 // NumResults - This is the number of results produced by the instruction in
797 // the "outs" list.
798 unsigned NumResults = Inst.getNumResults();
799
800 // Number of operands we know the output instruction must have. If it is
801 // variadic, we could have more operands.
802 unsigned NumFixedOperands = II.Operands.size();
803
804 SmallVector<unsigned, 8> InstOps;
805
806 // Loop over all of the fixed operands of the instruction pattern, emitting
807 // code to fill them all in. The node 'N' usually has number children equal to
808 // the number of input operands of the instruction. However, in cases where
809 // there are predicate operands for an instruction, we need to fill in the
810 // 'execute always' values. Match up the node operands to the instruction
811 // operands to do this.
812 unsigned ChildNo = 0;
813
814 // Similarly to the code in TreePatternNode::ApplyTypeConstraints, count the
815 // number of operands at the end of the list which have default values.
816 // Those can come from the pattern if it provides enough arguments, or be
817 // filled in with the default if the pattern hasn't provided them. But any
818 // operand with a default value _before_ the last mandatory one will be
819 // filled in with their defaults unconditionally.
820 unsigned NonOverridableOperands = NumFixedOperands;
821 while (NonOverridableOperands > NumResults &&
822 CGP.operandHasDefault(Op: II.Operands[NonOverridableOperands - 1].Rec))
823 --NonOverridableOperands;
824
825 for (unsigned InstOpNo = NumResults, e = NumFixedOperands; InstOpNo != e;
826 ++InstOpNo) {
827 // Determine what to emit for this operand.
828 const Record *OperandNode = II.Operands[InstOpNo].Rec;
829 if (CGP.operandHasDefault(Op: OperandNode) &&
830 (InstOpNo < NonOverridableOperands || ChildNo >= N.getNumChildren())) {
831 // This is a predicate or optional def operand which the pattern has not
832 // overridden, or which we aren't letting it override; emit the 'default
833 // ops' operands.
834 const DAGDefaultOperand &DefaultOp = CGP.getDefaultOperand(R: OperandNode);
835 for (const TreePatternNodePtr &Op : DefaultOp.DefaultOps)
836 EmitResultOperand(N: *Op, ResultOps&: InstOps);
837 continue;
838 }
839
840 // Otherwise this is a normal operand or a predicate operand without
841 // 'execute always'; emit it.
842
843 // For operands with multiple sub-operands we may need to emit
844 // multiple child patterns to cover them all. However, ComplexPattern
845 // children may themselves emit multiple MI operands.
846 unsigned NumSubOps = 1;
847 if (OperandNode->isSubClassOf(Name: "Operand")) {
848 const DagInit *MIOpInfo = OperandNode->getValueAsDag(FieldName: "MIOperandInfo");
849 if (unsigned NumArgs = MIOpInfo->getNumArgs())
850 NumSubOps = NumArgs;
851 }
852
853 unsigned FinalNumOps = InstOps.size() + NumSubOps;
854 while (InstOps.size() < FinalNumOps) {
855 const TreePatternNode &Child = N.getChild(N: ChildNo);
856 unsigned BeforeAddingNumOps = InstOps.size();
857 EmitResultOperand(N: Child, ResultOps&: InstOps);
858 assert(InstOps.size() > BeforeAddingNumOps && "Didn't add any operands");
859
860 // If the operand is an instruction and it produced multiple results, just
861 // take the first one.
862 if (!Child.isLeaf() && Child.getOperator()->isSubClassOf(Name: "Instruction"))
863 InstOps.resize(N: BeforeAddingNumOps + 1);
864
865 ++ChildNo;
866 }
867 }
868
869 // If this is a variadic output instruction (i.e. REG_SEQUENCE), we can't
870 // expand suboperands, use default operands, or other features determined from
871 // the CodeGenInstruction after the fixed operands, which were handled
872 // above. Emit the remaining instructions implicitly added by the use for
873 // variable_ops.
874 if (II.Operands.isVariadic) {
875 for (unsigned I = ChildNo, E = N.getNumChildren(); I < E; ++I)
876 EmitResultOperand(N: N.getChild(N: I), ResultOps&: InstOps);
877 }
878
879 // If this node has input glue or explicitly specified input physregs, we
880 // need to add chained and glued copyfromreg nodes and materialize the glue
881 // input.
882 if (isRoot && !PhysRegInputs.empty()) {
883 // Emit all of the CopyToReg nodes for the input physical registers. These
884 // occur in patterns like (mul:i8 AL:i8, GR8:i8:$src).
885 for (const auto &PhysRegInput : PhysRegInputs) {
886 const CodeGenRegister *Reg =
887 CGP.getTargetInfo().getRegBank().getReg(PhysRegInput.first);
888 AddMatcher(NewNode: new EmitCopyToRegMatcher(PhysRegInput.second, Reg));
889 }
890
891 // Even if the node has no other glue inputs, the resultant node must be
892 // glued to the CopyFromReg nodes we just generated.
893 TreeHasInGlue = true;
894 }
895
896 // Result order: node results, chain, glue
897
898 // Determine the result types.
899 SmallVector<MVT::SimpleValueType, 4> ResultVTs;
900 for (unsigned i = 0, e = N.getNumTypes(); i != e; ++i)
901 ResultVTs.push_back(Elt: N.getSimpleType(ResNo: i));
902
903 // If this is the root instruction of a pattern that has physical registers in
904 // its result pattern, add output VTs for them. For example, X86 has:
905 // (set AL, (mul ...))
906 if (isRoot && !Pattern.getDstRegs().empty()) {
907 // If the root came from an implicit def in the instruction handling stuff,
908 // don't re-add it.
909 const Record *HandledReg = nullptr;
910 if (II.HasOneImplicitDefWithKnownVT(TargetInfo: CGT) != MVT::Other)
911 HandledReg = II.ImplicitDefs[0];
912
913 for (const Record *Reg : Pattern.getDstRegs()) {
914 if (!Reg->isSubClassOf(Name: "Register") || Reg == HandledReg)
915 continue;
916 ResultVTs.push_back(Elt: getRegisterValueType(R: Reg, T: CGT));
917 }
918 }
919
920 // If this is the root of the pattern and the pattern we're matching includes
921 // a node that is variadic, mark the generated node as variadic so that it
922 // gets the excess operands from the input DAG.
923 int NumFixedArityOperands = -1;
924 if (isRoot && Pattern.getSrcPattern().NodeHasProperty(Property: SDNPVariadic, CGP))
925 NumFixedArityOperands = Pattern.getSrcPattern().getNumChildren();
926
927 // If this is the root node and multiple matched nodes in the input pattern
928 // have MemRefs in them, have the interpreter collect them and plop them onto
929 // this node. If there is just one node with MemRefs, leave them on that node
930 // even if it is not the root.
931 //
932 // FIXME3: This is actively incorrect for result patterns with multiple
933 // memory-referencing instructions.
934 bool PatternHasMemOperands =
935 Pattern.getSrcPattern().TreeHasProperty(Property: SDNPMemOperand, CGP);
936
937 bool NodeHasMemRefs = false;
938 if (PatternHasMemOperands) {
939 unsigned NumNodesThatLoadOrStore =
940 numNodesThatMayLoadOrStore(N: Pattern.getDstPattern(), CGP);
941 bool NodeIsUniqueLoadOrStore =
942 mayInstNodeLoadOrStore(N, CGP) && NumNodesThatLoadOrStore == 1;
943 NodeHasMemRefs =
944 NodeIsUniqueLoadOrStore || (isRoot && (mayInstNodeLoadOrStore(N, CGP) ||
945 NumNodesThatLoadOrStore != 1));
946 }
947
948 // Determine whether we need to attach a chain to this node.
949 bool NodeHasChain = false;
950 if (Pattern.getSrcPattern().TreeHasProperty(Property: SDNPHasChain, CGP)) {
951 // For some instructions, we were able to infer from the pattern whether
952 // they should have a chain. Otherwise, attach the chain to the root.
953 //
954 // FIXME2: This is extremely dubious for several reasons, not the least of
955 // which it gives special status to instructions with patterns that Pat<>
956 // nodes can't duplicate.
957 if (II.hasChain_Inferred)
958 NodeHasChain = II.hasChain;
959 else
960 NodeHasChain = isRoot;
961 // Instructions which load and store from memory should have a chain,
962 // regardless of whether they happen to have a pattern saying so.
963 if (II.hasCtrlDep || II.mayLoad || II.mayStore || II.canFoldAsLoad ||
964 II.hasSideEffects)
965 NodeHasChain = true;
966 }
967
968 assert((!ResultVTs.empty() || TreeHasOutGlue || NodeHasChain) &&
969 "Node has no result");
970
971 AddMatcher(NewNode: new EmitNodeMatcher(II, ResultVTs, InstOps, NodeHasChain,
972 TreeHasInGlue, TreeHasOutGlue, NodeHasMemRefs,
973 NumFixedArityOperands, NextRecordedOperandNo));
974
975 // The non-chain and non-glue results of the newly emitted node get recorded.
976 for (MVT::SimpleValueType ResultVT : ResultVTs) {
977 if (ResultVT == MVT::Other || ResultVT == MVT::Glue)
978 break;
979 OutputOps.push_back(Elt: NextRecordedOperandNo++);
980 }
981}
982
983void MatcherGen::EmitResultSDNodeXFormAsOperand(
984 const TreePatternNode &N, SmallVectorImpl<unsigned> &ResultOps) {
985 assert(N.getOperator()->isSubClassOf("SDNodeXForm") && "Not SDNodeXForm?");
986
987 // Emit the operand.
988 SmallVector<unsigned, 8> InputOps;
989
990 // FIXME2: Could easily generalize this to support multiple inputs and outputs
991 // to the SDNodeXForm. For now we just support one input and one output like
992 // the old instruction selector.
993 assert(N.getNumChildren() == 1);
994 EmitResultOperand(N: N.getChild(N: 0), ResultOps&: InputOps);
995
996 // The input currently must have produced exactly one result.
997 assert(InputOps.size() == 1 && "Unexpected input to SDNodeXForm");
998
999 AddMatcher(NewNode: new EmitNodeXFormMatcher(InputOps[0], N.getOperator(),
1000 NextRecordedOperandNo));
1001 ResultOps.push_back(Elt: NextRecordedOperandNo++);
1002}
1003
1004void MatcherGen::EmitResultOperand(const TreePatternNode &N,
1005 SmallVectorImpl<unsigned> &ResultOps) {
1006 // This is something selected from the pattern we matched.
1007 if (!N.getName().empty())
1008 return EmitResultOfNamedOperand(N, ResultOps);
1009
1010 if (N.isLeaf())
1011 return EmitResultLeafAsOperand(N, ResultOps);
1012
1013 const Record *OpRec = N.getOperator();
1014 if (OpRec->isSubClassOf(Name: "Instruction"))
1015 return EmitResultInstructionAsOperand(N, OutputOps&: ResultOps);
1016 if (OpRec->isSubClassOf(Name: "SDNodeXForm"))
1017 return EmitResultSDNodeXFormAsOperand(N, ResultOps);
1018 errs() << "Unknown result node to emit code for: " << N << '\n';
1019 PrintFatalError(Msg: "Unknown node in result pattern!");
1020}
1021
1022void MatcherGen::EmitResultCode() {
1023 // Patterns that match nodes with (potentially multiple) chain inputs have to
1024 // merge them together into a token factor. This informs the generated code
1025 // what all the chained nodes are.
1026 if (!MatchedChainNodes.empty())
1027 AddMatcher(NewNode: new EmitMergeInputChainsMatcher(MatchedChainNodes));
1028
1029 // Codegen the root of the result pattern, capturing the resulting values.
1030 SmallVector<unsigned, 8> Ops;
1031 EmitResultOperand(N: Pattern.getDstPattern(), ResultOps&: Ops);
1032
1033 // At this point, we have however many values the result pattern produces.
1034 // However, the input pattern might not need all of these. If there are
1035 // excess values at the end (such as implicit defs of condition codes etc)
1036 // just lop them off. This doesn't need to worry about glue or chains, just
1037 // explicit results.
1038 //
1039 unsigned NumSrcResults = Pattern.getSrcPattern().getNumTypes();
1040
1041 // If the pattern also has implicit results, count them as well.
1042 if (!Pattern.getDstRegs().empty()) {
1043 // If the root came from an implicit def in the instruction handling stuff,
1044 // don't re-add it.
1045 const Record *HandledReg = nullptr;
1046 const TreePatternNode &DstPat = Pattern.getDstPattern();
1047 if (!DstPat.isLeaf() && DstPat.getOperator()->isSubClassOf(Name: "Instruction")) {
1048 const CodeGenTarget &CGT = CGP.getTargetInfo();
1049 CodeGenInstruction &II = CGT.getInstruction(InstRec: DstPat.getOperator());
1050
1051 if (II.HasOneImplicitDefWithKnownVT(TargetInfo: CGT) != MVT::Other)
1052 HandledReg = II.ImplicitDefs[0];
1053 }
1054
1055 for (const Record *Reg : Pattern.getDstRegs()) {
1056 if (!Reg->isSubClassOf(Name: "Register") || Reg == HandledReg)
1057 continue;
1058 ++NumSrcResults;
1059 }
1060 }
1061
1062 SmallVector<unsigned, 8> Results(Ops);
1063
1064 // Apply result permutation.
1065 for (unsigned ResNo = 0; ResNo < Pattern.getDstPattern().getNumResults();
1066 ++ResNo) {
1067 Results[ResNo] = Ops[Pattern.getDstPattern().getResultIndex(ResNo)];
1068 }
1069
1070 Results.resize(N: NumSrcResults);
1071 AddMatcher(NewNode: new CompleteMatchMatcher(Results, Pattern));
1072}
1073
1074/// ConvertPatternToMatcher - Create the matcher for the specified pattern with
1075/// the specified variant. If the variant number is invalid, this returns null.
1076Matcher *llvm::ConvertPatternToMatcher(const PatternToMatch &Pattern,
1077 unsigned Variant,
1078 const CodeGenDAGPatterns &CGP) {
1079 MatcherGen Gen(Pattern, CGP);
1080
1081 // Generate the code for the matcher.
1082 if (Gen.EmitMatcherCode(Variant))
1083 return nullptr;
1084
1085 // FIXME2: Kill extra MoveParent commands at the end of the matcher sequence.
1086 // FIXME2: Split result code out to another table, and make the matcher end
1087 // with an "Emit <index>" command. This allows result generation stuff to be
1088 // shared and factored?
1089
1090 // If the match succeeds, then we generate Pattern.
1091 Gen.EmitResultCode();
1092
1093 // Unconditional match.
1094 return Gen.GetMatcher();
1095}
1096