1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | |* *| |
3 | |* DAG Instruction Selector for the Lanai target *| |
4 | |* *| |
5 | |* Automatically generated file, do not edit! *| |
6 | |* *| |
7 | \*===----------------------------------------------------------------------===*/ |
8 | |
9 | // *** NOTE: This file is #included into the middle of the target |
10 | // *** instruction selector class. These functions are really methods. |
11 | |
12 | // If GET_DAGISEL_DECL is #defined with any value, only function |
13 | // declarations will be included when this file is included. |
14 | // If GET_DAGISEL_BODY is #defined, its value should be the name of |
15 | // the instruction selector class. Function bodies will be emitted |
16 | // and each function's name will be qualified with the name of the |
17 | // class. |
18 | // |
19 | // When neither of the GET_DAGISEL* macros is defined, the functions |
20 | // are emitted inline. |
21 | |
22 | #if defined(GET_DAGISEL_DECL) && defined(GET_DAGISEL_BODY) |
23 | #error GET_DAGISEL_DECL and GET_DAGISEL_BODY cannot be both defined, undef both for inline definitions |
24 | #endif |
25 | |
26 | #ifdef GET_DAGISEL_BODY |
27 | #define LOCAL_DAGISEL_STRINGIZE(X) LOCAL_DAGISEL_STRINGIZE_(X) |
28 | #define LOCAL_DAGISEL_STRINGIZE_(X) #X |
29 | static_assert(sizeof(LOCAL_DAGISEL_STRINGIZE(GET_DAGISEL_BODY)) > 1, |
30 | "GET_DAGISEL_BODY is empty: it should be defined with the class name" ); |
31 | #undef LOCAL_DAGISEL_STRINGIZE_ |
32 | #undef LOCAL_DAGISEL_STRINGIZE |
33 | #endif |
34 | |
35 | #if !defined(GET_DAGISEL_DECL) && !defined(GET_DAGISEL_BODY) |
36 | #define DAGISEL_INLINE 1 |
37 | #else |
38 | #define DAGISEL_INLINE 0 |
39 | #endif |
40 | |
41 | #if !DAGISEL_INLINE |
42 | #define DAGISEL_CLASS_COLONCOLON GET_DAGISEL_BODY :: |
43 | #else |
44 | #define DAGISEL_CLASS_COLONCOLON |
45 | #endif |
46 | |
47 | #ifdef GET_DAGISEL_DECL |
48 | void SelectCode(SDNode *N); |
49 | #endif |
50 | #if defined(GET_DAGISEL_BODY) || DAGISEL_INLINE |
51 | void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N) |
52 | { |
53 | // Some target values are emitted as 2 bytes, TARGET_VAL handles |
54 | // this. |
55 | #define TARGET_VAL(X) X & 255, unsigned(X) >> 8 |
56 | static const unsigned char MatcherTable[] = { |
57 | OPC_SwitchOpcode , 97|128,1, TARGET_VAL(ISD::LOAD), |
58 | OPC_RecordMemRef, |
59 | OPC_RecordNode, |
60 | OPC_RecordChild1, |
61 | OPC_CheckChild1TypeI32, |
62 | OPC_CheckPredicate, 14, |
63 | OPC_CheckTypeI32, |
64 | OPC_Scope, 30, |
65 | OPC_CheckPredicate, 9, |
66 | OPC_Scope, 12, |
67 | OPC_CheckComplexPat2, /*#*/1, |
68 | OPC_EmitMergeInputChains1_0, |
69 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDW_RI), 0|OPFL_Chain|OPFL_MemRefs, |
70 | MVT::i32, 3, 2, 3, 4, |
71 | 12, |
72 | OPC_CheckComplexPat0, /*#*/1, |
73 | OPC_EmitMergeInputChains1_0, |
74 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDW_RR), 0|OPFL_Chain|OPFL_MemRefs, |
75 | MVT::i32, 3, 2, 3, 4, |
76 | 0, |
77 | 46, |
78 | OPC_CheckPredicate4, |
79 | OPC_Scope, 14, |
80 | OPC_CheckPredicate, 15, |
81 | OPC_CheckComplexPat0, /*#*/1, |
82 | OPC_EmitMergeInputChains1_0, |
83 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDWz_RR), 0|OPFL_Chain|OPFL_MemRefs, |
84 | MVT::i32, 3, 2, 3, 4, |
85 | 13, |
86 | OPC_CheckPredicate3, |
87 | OPC_CheckComplexPat0, /*#*/1, |
88 | OPC_EmitMergeInputChains1_0, |
89 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDHz_RR), 0|OPFL_Chain|OPFL_MemRefs, |
90 | MVT::i32, 3, 2, 3, 4, |
91 | 13, |
92 | OPC_CheckPredicate2, |
93 | OPC_CheckComplexPat0, /*#*/1, |
94 | OPC_EmitMergeInputChains1_0, |
95 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDBz_RR), 0|OPFL_Chain|OPFL_MemRefs, |
96 | MVT::i32, 3, 2, 3, 4, |
97 | 0, |
98 | 31, |
99 | OPC_CheckPredicate5, |
100 | OPC_Scope, 13, |
101 | OPC_CheckPredicate3, |
102 | OPC_CheckComplexPat0, /*#*/1, |
103 | OPC_EmitMergeInputChains1_0, |
104 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDHs_RR), 0|OPFL_Chain|OPFL_MemRefs, |
105 | MVT::i32, 3, 2, 3, 4, |
106 | 13, |
107 | OPC_CheckPredicate2, |
108 | OPC_CheckComplexPat0, /*#*/1, |
109 | OPC_EmitMergeInputChains1_0, |
110 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDBs_RR), 0|OPFL_Chain|OPFL_MemRefs, |
111 | MVT::i32, 3, 2, 3, 4, |
112 | 0, |
113 | 14, |
114 | OPC_CheckPredicate4, |
115 | OPC_CheckPredicate3, |
116 | OPC_CheckComplexPat1, /*#*/1, |
117 | OPC_EmitMergeInputChains1_0, |
118 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDHz_RI), 0|OPFL_Chain|OPFL_MemRefs, |
119 | MVT::i32, 3, 2, 3, 4, |
120 | 14, |
121 | OPC_CheckPredicate5, |
122 | OPC_CheckPredicate3, |
123 | OPC_CheckComplexPat1, /*#*/1, |
124 | OPC_EmitMergeInputChains1_0, |
125 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDHs_RI), 0|OPFL_Chain|OPFL_MemRefs, |
126 | MVT::i32, 3, 2, 3, 4, |
127 | 14, |
128 | OPC_CheckPredicate4, |
129 | OPC_CheckPredicate2, |
130 | OPC_CheckComplexPat1, /*#*/1, |
131 | OPC_EmitMergeInputChains1_0, |
132 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDBz_RI), 0|OPFL_Chain|OPFL_MemRefs, |
133 | MVT::i32, 3, 2, 3, 4, |
134 | 14, |
135 | OPC_CheckPredicate5, |
136 | OPC_CheckPredicate2, |
137 | OPC_CheckComplexPat1, /*#*/1, |
138 | OPC_EmitMergeInputChains1_0, |
139 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDBs_RI), 0|OPFL_Chain|OPFL_MemRefs, |
140 | MVT::i32, 3, 2, 3, 4, |
141 | 32, |
142 | OPC_CheckPredicate, 16, |
143 | OPC_Scope, 13, |
144 | OPC_CheckPredicate2, |
145 | OPC_CheckComplexPat1, /*#*/1, |
146 | OPC_EmitMergeInputChains1_0, |
147 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDBz_RI), 0|OPFL_Chain|OPFL_MemRefs, |
148 | MVT::i32, 3, 2, 3, 4, |
149 | 13, |
150 | OPC_CheckPredicate3, |
151 | OPC_CheckComplexPat1, /*#*/1, |
152 | OPC_EmitMergeInputChains1_0, |
153 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDHz_RI), 0|OPFL_Chain|OPFL_MemRefs, |
154 | MVT::i32, 3, 2, 3, 4, |
155 | 0, |
156 | 12, |
157 | OPC_CheckPredicate, 9, |
158 | OPC_CheckComplexPat3, /*#*/1, |
159 | OPC_EmitMergeInputChains1_0, |
160 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDADDR), 0|OPFL_Chain|OPFL_MemRefs, |
161 | MVT::i32, 1, 2, |
162 | 0, |
163 | 119, TARGET_VAL(ISD::STORE), |
164 | OPC_RecordMemRef, |
165 | OPC_RecordNode, |
166 | OPC_RecordChild1, |
167 | OPC_CheckChild1TypeI32, |
168 | OPC_RecordChild2, |
169 | OPC_CheckChild2TypeI32, |
170 | OPC_CheckPredicate, 17, |
171 | OPC_Scope, 30, |
172 | OPC_CheckPredicate, 10, |
173 | OPC_Scope, 12, |
174 | OPC_CheckComplexPat0, /*#*/2, |
175 | OPC_EmitMergeInputChains1_0, |
176 | OPC_MorphNodeTo0, TARGET_VAL(Lanai::SW_RR), 0|OPFL_Chain|OPFL_MemRefs, |
177 | 4, 1, 3, 4, 5, |
178 | 12, |
179 | OPC_CheckComplexPat2, /*#*/2, |
180 | OPC_EmitMergeInputChains1_0, |
181 | OPC_MorphNodeTo0, TARGET_VAL(Lanai::SW_RI), 0|OPFL_Chain|OPFL_MemRefs, |
182 | 4, 1, 3, 4, 5, |
183 | 0, |
184 | 64, |
185 | OPC_CheckPredicate, 18, |
186 | OPC_Scope, 14, |
187 | OPC_CheckPredicate, 11, |
188 | OPC_CheckComplexPat0, /*#*/2, |
189 | OPC_EmitMergeInputChains1_0, |
190 | OPC_MorphNodeTo0, TARGET_VAL(Lanai::STH_RR), 0|OPFL_Chain|OPFL_MemRefs, |
191 | 4, 1, 3, 4, 5, |
192 | 14, |
193 | OPC_CheckPredicate, 12, |
194 | OPC_CheckComplexPat0, /*#*/2, |
195 | OPC_EmitMergeInputChains1_0, |
196 | OPC_MorphNodeTo0, TARGET_VAL(Lanai::STB_RR), 0|OPFL_Chain|OPFL_MemRefs, |
197 | 4, 1, 3, 4, 5, |
198 | 14, |
199 | OPC_CheckPredicate, 11, |
200 | OPC_CheckComplexPat1, /*#*/2, |
201 | OPC_EmitMergeInputChains1_0, |
202 | OPC_MorphNodeTo0, TARGET_VAL(Lanai::STH_RI), 0|OPFL_Chain|OPFL_MemRefs, |
203 | 4, 1, 3, 4, 5, |
204 | 14, |
205 | OPC_CheckPredicate, 12, |
206 | OPC_CheckComplexPat1, /*#*/2, |
207 | OPC_EmitMergeInputChains1_0, |
208 | OPC_MorphNodeTo0, TARGET_VAL(Lanai::STB_RI), 0|OPFL_Chain|OPFL_MemRefs, |
209 | 4, 1, 3, 4, 5, |
210 | 0, |
211 | 12, |
212 | OPC_CheckPredicate, 10, |
213 | OPC_CheckComplexPat3, /*#*/2, |
214 | OPC_EmitMergeInputChains1_0, |
215 | OPC_MorphNodeTo0, TARGET_VAL(Lanai::STADDR), 0|OPFL_Chain|OPFL_MemRefs, |
216 | 2, 1, 3, |
217 | 0, |
218 | 18, TARGET_VAL(ISD::ATOMIC_LOAD), |
219 | OPC_RecordMemRef, |
220 | OPC_RecordNode, |
221 | OPC_RecordChild1, |
222 | OPC_CheckChild1TypeI32, |
223 | OPC_CheckPredicate2, |
224 | OPC_CheckTypeI32, |
225 | OPC_CheckComplexPat1, /*#*/1, |
226 | OPC_EmitMergeInputChains1_0, |
227 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDBz_RI), 0|OPFL_Chain|OPFL_MemRefs, |
228 | MVT::i32, 3, 2, 3, 4, |
229 | 21, TARGET_VAL(ISD::CALLSEQ_START), |
230 | OPC_RecordNode, |
231 | OPC_RecordChild1, |
232 | OPC_MoveChild1, |
233 | OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant), |
234 | OPC_MoveSibling2, |
235 | OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant), |
236 | OPC_RecordNode, |
237 | OPC_MoveParent, |
238 | OPC_EmitMergeInputChains1_0, |
239 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::ADJCALLSTACKDOWN), 0|OPFL_Chain|OPFL_GlueOutput, |
240 | MVT::i32, 2, 1, 2, |
241 | 22, TARGET_VAL(ISD::CALLSEQ_END), |
242 | OPC_RecordNode, |
243 | OPC_CaptureGlueInput, |
244 | OPC_RecordChild1, |
245 | OPC_MoveChild1, |
246 | OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant), |
247 | OPC_MoveSibling2, |
248 | OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant), |
249 | OPC_RecordNode, |
250 | OPC_MoveParent, |
251 | OPC_EmitMergeInputChains1_0, |
252 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::ADJCALLSTACKUP), 0|OPFL_Chain|OPFL_GlueInput|OPFL_GlueOutput, |
253 | MVT::i32, 2, 1, 2, |
254 | 74|128,2, TARGET_VAL(ISD::OR), |
255 | OPC_Scope, 25|128,1, |
256 | OPC_RecordChild0, |
257 | OPC_MoveChild1, |
258 | OPC_SwitchOpcode , 69, TARGET_VAL(LanaiISD::LO), |
259 | OPC_RecordChild0, |
260 | OPC_MoveChild0, |
261 | OPC_SwitchOpcode , 10, TARGET_VAL(ISD::TargetGlobalAddress), |
262 | OPC_MoveParent, |
263 | OPC_MoveParent, |
264 | OPC_CheckTypeI32, |
265 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
266 | MVT::i32, 2, 0, 1, |
267 | 10, TARGET_VAL(ISD::TargetExternalSymbol), |
268 | OPC_MoveParent, |
269 | OPC_MoveParent, |
270 | OPC_CheckTypeI32, |
271 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
272 | MVT::i32, 2, 0, 1, |
273 | 10, TARGET_VAL(ISD::TargetBlockAddress), |
274 | OPC_MoveParent, |
275 | OPC_MoveParent, |
276 | OPC_CheckTypeI32, |
277 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
278 | MVT::i32, 2, 0, 1, |
279 | 10, TARGET_VAL(ISD::TargetJumpTable), |
280 | OPC_MoveParent, |
281 | OPC_MoveParent, |
282 | OPC_CheckTypeI32, |
283 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
284 | MVT::i32, 2, 0, 1, |
285 | 10, TARGET_VAL(ISD::TargetConstantPool), |
286 | OPC_MoveParent, |
287 | OPC_MoveParent, |
288 | OPC_CheckTypeI32, |
289 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
290 | MVT::i32, 2, 0, 1, |
291 | 0, |
292 | 74, TARGET_VAL(LanaiISD::SMALL), |
293 | OPC_RecordChild0, |
294 | OPC_MoveChild0, |
295 | OPC_SwitchOpcode , 11, TARGET_VAL(ISD::TargetGlobalAddress), |
296 | OPC_MoveParent, |
297 | OPC_MoveParent, |
298 | OPC_CheckTypeI32, |
299 | OPC_EmitCopyToReg0, Lanai::R0, |
300 | OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SLI), |
301 | MVT::i32, 1, 1, |
302 | 11, TARGET_VAL(ISD::TargetExternalSymbol), |
303 | OPC_MoveParent, |
304 | OPC_MoveParent, |
305 | OPC_CheckTypeI32, |
306 | OPC_EmitCopyToReg0, Lanai::R0, |
307 | OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SLI), |
308 | MVT::i32, 1, 1, |
309 | 11, TARGET_VAL(ISD::TargetBlockAddress), |
310 | OPC_MoveParent, |
311 | OPC_MoveParent, |
312 | OPC_CheckTypeI32, |
313 | OPC_EmitCopyToReg0, Lanai::R0, |
314 | OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SLI), |
315 | MVT::i32, 1, 1, |
316 | 11, TARGET_VAL(ISD::TargetJumpTable), |
317 | OPC_MoveParent, |
318 | OPC_MoveParent, |
319 | OPC_CheckTypeI32, |
320 | OPC_EmitCopyToReg0, Lanai::R0, |
321 | OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SLI), |
322 | MVT::i32, 1, 1, |
323 | 11, TARGET_VAL(ISD::TargetConstantPool), |
324 | OPC_MoveParent, |
325 | OPC_MoveParent, |
326 | OPC_CheckTypeI32, |
327 | OPC_EmitCopyToReg0, Lanai::R0, |
328 | OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SLI), |
329 | MVT::i32, 1, 1, |
330 | 0, |
331 | 0, |
332 | 78, |
333 | OPC_MoveChild0, |
334 | OPC_CheckOpcode, TARGET_VAL(LanaiISD::LO), |
335 | OPC_RecordChild0, |
336 | OPC_MoveChild0, |
337 | OPC_SwitchOpcode , 11, TARGET_VAL(ISD::TargetGlobalAddress), |
338 | OPC_MoveParent, |
339 | OPC_MoveParent, |
340 | OPC_RecordChild1, |
341 | OPC_CheckTypeI32, |
342 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
343 | MVT::i32, 2, 1, 0, |
344 | 11, TARGET_VAL(ISD::TargetExternalSymbol), |
345 | OPC_MoveParent, |
346 | OPC_MoveParent, |
347 | OPC_RecordChild1, |
348 | OPC_CheckTypeI32, |
349 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
350 | MVT::i32, 2, 1, 0, |
351 | 11, TARGET_VAL(ISD::TargetBlockAddress), |
352 | OPC_MoveParent, |
353 | OPC_MoveParent, |
354 | OPC_RecordChild1, |
355 | OPC_CheckTypeI32, |
356 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
357 | MVT::i32, 2, 1, 0, |
358 | 11, TARGET_VAL(ISD::TargetJumpTable), |
359 | OPC_MoveParent, |
360 | OPC_MoveParent, |
361 | OPC_RecordChild1, |
362 | OPC_CheckTypeI32, |
363 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
364 | MVT::i32, 2, 1, 0, |
365 | 11, TARGET_VAL(ISD::TargetConstantPool), |
366 | OPC_MoveParent, |
367 | OPC_MoveParent, |
368 | OPC_RecordChild1, |
369 | OPC_CheckTypeI32, |
370 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
371 | MVT::i32, 2, 1, 0, |
372 | 0, |
373 | 93, |
374 | OPC_RecordChild0, |
375 | OPC_RecordChild1, |
376 | OPC_Scope, 64, |
377 | OPC_MoveChild1, |
378 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
379 | OPC_Scope, 13, |
380 | OPC_CheckPredicate0, |
381 | OPC_MoveParent, |
382 | OPC_EmitConvertToTarget1, |
383 | OPC_EmitNodeXForm, 0, 2, |
384 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
385 | MVT::i32, 2, 0, 3, |
386 | 13, |
387 | OPC_CheckPredicate1, |
388 | OPC_MoveParent, |
389 | OPC_EmitConvertToTarget1, |
390 | OPC_EmitNodeXForm, 1, 2, |
391 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_HI), |
392 | MVT::i32, 2, 0, 3, |
393 | 14, |
394 | OPC_CheckPredicate0, |
395 | OPC_MoveParent, |
396 | OPC_EmitConvertToTarget1, |
397 | OPC_EmitNodeXForm, 0, 2, |
398 | OPC_MorphNodeTo2None, TARGET_VAL(Lanai::OR_F_I_LO), |
399 | MVT::i32, MVT::i32, 2, 0, 3, |
400 | 14, |
401 | OPC_CheckPredicate1, |
402 | OPC_MoveParent, |
403 | OPC_EmitConvertToTarget1, |
404 | OPC_EmitNodeXForm, 1, 2, |
405 | OPC_MorphNodeTo2None, TARGET_VAL(Lanai::OR_F_I_HI), |
406 | MVT::i32, MVT::i32, 2, 0, 3, |
407 | 0, |
408 | 23, |
409 | OPC_EmitInteger32, 0, |
410 | OPC_Scope, 8, |
411 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_R), |
412 | MVT::i32, 3, 0, 1, 2, |
413 | 9, |
414 | OPC_MorphNodeTo2None, TARGET_VAL(Lanai::OR_F_R), |
415 | MVT::i32, MVT::i32, 3, 0, 1, 2, |
416 | 0, |
417 | 0, |
418 | 0, |
419 | 93, TARGET_VAL(ISD::AND), |
420 | OPC_RecordChild0, |
421 | OPC_RecordChild1, |
422 | OPC_Scope, 64, |
423 | OPC_MoveChild1, |
424 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
425 | OPC_Scope, 13, |
426 | OPC_CheckPredicate6, |
427 | OPC_MoveParent, |
428 | OPC_EmitConvertToTarget1, |
429 | OPC_EmitNodeXForm, 0, 2, |
430 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::AND_I_LO), |
431 | MVT::i32, 2, 0, 3, |
432 | 13, |
433 | OPC_CheckPredicate7, |
434 | OPC_MoveParent, |
435 | OPC_EmitConvertToTarget1, |
436 | OPC_EmitNodeXForm, 1, 2, |
437 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::AND_I_HI), |
438 | MVT::i32, 2, 0, 3, |
439 | 14, |
440 | OPC_CheckPredicate6, |
441 | OPC_MoveParent, |
442 | OPC_EmitConvertToTarget1, |
443 | OPC_EmitNodeXForm, 0, 2, |
444 | OPC_MorphNodeTo2None, TARGET_VAL(Lanai::AND_F_I_LO), |
445 | MVT::i32, MVT::i32, 2, 0, 3, |
446 | 14, |
447 | OPC_CheckPredicate7, |
448 | OPC_MoveParent, |
449 | OPC_EmitConvertToTarget1, |
450 | OPC_EmitNodeXForm, 1, 2, |
451 | OPC_MorphNodeTo2None, TARGET_VAL(Lanai::AND_F_I_HI), |
452 | MVT::i32, MVT::i32, 2, 0, 3, |
453 | 0, |
454 | 23, |
455 | OPC_EmitInteger32, 0, |
456 | OPC_Scope, 8, |
457 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::AND_R), |
458 | MVT::i32, 3, 0, 1, 2, |
459 | 9, |
460 | OPC_MorphNodeTo2None, TARGET_VAL(Lanai::AND_F_R), |
461 | MVT::i32, MVT::i32, 3, 0, 1, 2, |
462 | 0, |
463 | 0, |
464 | 93, TARGET_VAL(ISD::XOR), |
465 | OPC_RecordChild0, |
466 | OPC_RecordChild1, |
467 | OPC_Scope, 64, |
468 | OPC_MoveChild1, |
469 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
470 | OPC_Scope, 13, |
471 | OPC_CheckPredicate0, |
472 | OPC_MoveParent, |
473 | OPC_EmitConvertToTarget1, |
474 | OPC_EmitNodeXForm, 0, 2, |
475 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::XOR_I_LO), |
476 | MVT::i32, 2, 0, 3, |
477 | 13, |
478 | OPC_CheckPredicate1, |
479 | OPC_MoveParent, |
480 | OPC_EmitConvertToTarget1, |
481 | OPC_EmitNodeXForm, 1, 2, |
482 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::XOR_I_HI), |
483 | MVT::i32, 2, 0, 3, |
484 | 14, |
485 | OPC_CheckPredicate0, |
486 | OPC_MoveParent, |
487 | OPC_EmitConvertToTarget1, |
488 | OPC_EmitNodeXForm, 0, 2, |
489 | OPC_MorphNodeTo2None, TARGET_VAL(Lanai::XOR_F_I_LO), |
490 | MVT::i32, MVT::i32, 2, 0, 3, |
491 | 14, |
492 | OPC_CheckPredicate1, |
493 | OPC_MoveParent, |
494 | OPC_EmitConvertToTarget1, |
495 | OPC_EmitNodeXForm, 1, 2, |
496 | OPC_MorphNodeTo2None, TARGET_VAL(Lanai::XOR_F_I_HI), |
497 | MVT::i32, MVT::i32, 2, 0, 3, |
498 | 0, |
499 | 23, |
500 | OPC_EmitInteger32, 0, |
501 | OPC_Scope, 8, |
502 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::XOR_R), |
503 | MVT::i32, 3, 0, 1, 2, |
504 | 9, |
505 | OPC_MorphNodeTo2None, TARGET_VAL(Lanai::XOR_F_R), |
506 | MVT::i32, MVT::i32, 3, 0, 1, 2, |
507 | 0, |
508 | 0, |
509 | 64, TARGET_VAL(ISD::ADD), |
510 | OPC_RecordChild0, |
511 | OPC_RecordChild1, |
512 | OPC_Scope, 48, |
513 | OPC_MoveChild1, |
514 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
515 | OPC_Scope, 13, |
516 | OPC_CheckPredicate0, |
517 | OPC_MoveParent, |
518 | OPC_EmitConvertToTarget1, |
519 | OPC_EmitNodeXForm, 0, 2, |
520 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::ADD_I_LO), |
521 | MVT::i32, 2, 0, 3, |
522 | 13, |
523 | OPC_CheckPredicate1, |
524 | OPC_MoveParent, |
525 | OPC_EmitConvertToTarget1, |
526 | OPC_EmitNodeXForm, 1, 2, |
527 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::ADD_I_HI), |
528 | MVT::i32, 2, 0, 3, |
529 | 13, |
530 | OPC_CheckPredicate, 13, |
531 | OPC_MoveParent, |
532 | OPC_EmitNodeXForm, 2, 1, |
533 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SUB_I_LO), |
534 | MVT::i32, 2, 0, 2, |
535 | 0, |
536 | 10, |
537 | OPC_EmitInteger32, 0, |
538 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::ADD_R), |
539 | MVT::i32, 3, 0, 1, 2, |
540 | 0, |
541 | 64, TARGET_VAL(ISD::SUB), |
542 | OPC_RecordChild0, |
543 | OPC_RecordChild1, |
544 | OPC_Scope, 48, |
545 | OPC_MoveChild1, |
546 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
547 | OPC_Scope, 13, |
548 | OPC_CheckPredicate0, |
549 | OPC_MoveParent, |
550 | OPC_EmitConvertToTarget1, |
551 | OPC_EmitNodeXForm, 0, 2, |
552 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SUB_I_LO), |
553 | MVT::i32, 2, 0, 3, |
554 | 13, |
555 | OPC_CheckPredicate1, |
556 | OPC_MoveParent, |
557 | OPC_EmitConvertToTarget1, |
558 | OPC_EmitNodeXForm, 1, 2, |
559 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SUB_I_HI), |
560 | MVT::i32, 2, 0, 3, |
561 | 13, |
562 | OPC_CheckPredicate, 13, |
563 | OPC_MoveParent, |
564 | OPC_EmitNodeXForm, 2, 1, |
565 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::ADD_I_LO), |
566 | MVT::i32, 2, 0, 2, |
567 | 0, |
568 | 10, |
569 | OPC_EmitInteger32, 0, |
570 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SUB_R), |
571 | MVT::i32, 3, 0, 1, 2, |
572 | 0, |
573 | 53, TARGET_VAL(ISD::ADDC), |
574 | OPC_RecordChild0, |
575 | OPC_RecordChild1, |
576 | OPC_Scope, 36, |
577 | OPC_MoveChild1, |
578 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
579 | OPC_Scope, 14, |
580 | OPC_CheckPredicate0, |
581 | OPC_MoveParent, |
582 | OPC_EmitConvertToTarget1, |
583 | OPC_EmitNodeXForm, 0, 2, |
584 | OPC_MorphNodeTo2GlueOutput, TARGET_VAL(Lanai::ADD_F_I_LO), |
585 | MVT::i32, MVT::i32, 2, 0, 3, |
586 | 14, |
587 | OPC_CheckPredicate1, |
588 | OPC_MoveParent, |
589 | OPC_EmitConvertToTarget1, |
590 | OPC_EmitNodeXForm, 1, 2, |
591 | OPC_MorphNodeTo2GlueOutput, TARGET_VAL(Lanai::ADD_F_I_HI), |
592 | MVT::i32, MVT::i32, 2, 0, 3, |
593 | 0, |
594 | 11, |
595 | OPC_EmitInteger32, 0, |
596 | OPC_MorphNodeTo2GlueOutput, TARGET_VAL(Lanai::ADD_F_R), |
597 | MVT::i32, MVT::i32, 3, 0, 1, 2, |
598 | 0, |
599 | 53, TARGET_VAL(ISD::SUBC), |
600 | OPC_RecordChild0, |
601 | OPC_RecordChild1, |
602 | OPC_Scope, 36, |
603 | OPC_MoveChild1, |
604 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
605 | OPC_Scope, 14, |
606 | OPC_CheckPredicate0, |
607 | OPC_MoveParent, |
608 | OPC_EmitConvertToTarget1, |
609 | OPC_EmitNodeXForm, 0, 2, |
610 | OPC_MorphNodeTo2GlueOutput, TARGET_VAL(Lanai::SUB_F_I_LO), |
611 | MVT::i32, MVT::i32, 2, 0, 3, |
612 | 14, |
613 | OPC_CheckPredicate1, |
614 | OPC_MoveParent, |
615 | OPC_EmitConvertToTarget1, |
616 | OPC_EmitNodeXForm, 1, 2, |
617 | OPC_MorphNodeTo2GlueOutput, TARGET_VAL(Lanai::SUB_F_I_HI), |
618 | MVT::i32, MVT::i32, 2, 0, 3, |
619 | 0, |
620 | 11, |
621 | OPC_EmitInteger32, 0, |
622 | OPC_MorphNodeTo2GlueOutput, TARGET_VAL(Lanai::SUB_F_R), |
623 | MVT::i32, MVT::i32, 3, 0, 1, 2, |
624 | 0, |
625 | 68, TARGET_VAL(ISD::ADDE), |
626 | OPC_CaptureGlueInput, |
627 | OPC_RecordChild0, |
628 | OPC_RecordChild1, |
629 | OPC_Scope, 36, |
630 | OPC_MoveChild1, |
631 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
632 | OPC_Scope, 14, |
633 | OPC_CheckPredicate0, |
634 | OPC_MoveParent, |
635 | OPC_EmitConvertToTarget1, |
636 | OPC_EmitNodeXForm, 0, 2, |
637 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::ADDC_I_LO), 0|OPFL_GlueInput|OPFL_GlueOutput, |
638 | MVT::i32, 2, 0, 3, |
639 | 14, |
640 | OPC_CheckPredicate1, |
641 | OPC_MoveParent, |
642 | OPC_EmitConvertToTarget1, |
643 | OPC_EmitNodeXForm, 1, 2, |
644 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::ADDC_I_HI), 0|OPFL_GlueInput|OPFL_GlueOutput, |
645 | MVT::i32, 2, 0, 3, |
646 | 0, |
647 | 25, |
648 | OPC_EmitInteger32, 0, |
649 | OPC_Scope, 9, |
650 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::ADDC_R), 0|OPFL_GlueInput|OPFL_GlueOutput, |
651 | MVT::i32, 3, 0, 1, 2, |
652 | 10, |
653 | OPC_MorphNodeTo2, TARGET_VAL(Lanai::ADDC_F_R), 0|OPFL_GlueInput|OPFL_GlueOutput, |
654 | MVT::i32, MVT::i32, 3, 0, 1, 2, |
655 | 0, |
656 | 0, |
657 | 68, TARGET_VAL(ISD::SUBE), |
658 | OPC_CaptureGlueInput, |
659 | OPC_RecordChild0, |
660 | OPC_RecordChild1, |
661 | OPC_Scope, 36, |
662 | OPC_MoveChild1, |
663 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
664 | OPC_Scope, 14, |
665 | OPC_CheckPredicate0, |
666 | OPC_MoveParent, |
667 | OPC_EmitConvertToTarget1, |
668 | OPC_EmitNodeXForm, 0, 2, |
669 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::SUBB_I_LO), 0|OPFL_GlueInput|OPFL_GlueOutput, |
670 | MVT::i32, 2, 0, 3, |
671 | 14, |
672 | OPC_CheckPredicate1, |
673 | OPC_MoveParent, |
674 | OPC_EmitConvertToTarget1, |
675 | OPC_EmitNodeXForm, 1, 2, |
676 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::SUBB_I_HI), 0|OPFL_GlueInput|OPFL_GlueOutput, |
677 | MVT::i32, 2, 0, 3, |
678 | 0, |
679 | 25, |
680 | OPC_EmitInteger32, 0, |
681 | OPC_Scope, 9, |
682 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::SUBB_R), 0|OPFL_GlueInput|OPFL_GlueOutput, |
683 | MVT::i32, 3, 0, 1, 2, |
684 | 10, |
685 | OPC_MorphNodeTo2, TARGET_VAL(Lanai::SUBB_F_R), 0|OPFL_GlueInput|OPFL_GlueOutput, |
686 | MVT::i32, MVT::i32, 3, 0, 1, 2, |
687 | 0, |
688 | 0, |
689 | 59, TARGET_VAL(LanaiISD::SUBBF), |
690 | OPC_CaptureGlueInput, |
691 | OPC_RecordChild0, |
692 | OPC_Scope, 39, |
693 | OPC_RecordChild1, |
694 | OPC_MoveChild1, |
695 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
696 | OPC_Scope, 15, |
697 | OPC_CheckPredicate0, |
698 | OPC_MoveParent, |
699 | OPC_EmitConvertToTarget1, |
700 | OPC_EmitNodeXForm, 0, 2, |
701 | OPC_MorphNodeTo2, TARGET_VAL(Lanai::SUBB_F_I_LO), 0|OPFL_GlueInput|OPFL_GlueOutput, |
702 | MVT::i32, MVT::i32, 2, 0, 3, |
703 | 15, |
704 | OPC_CheckPredicate1, |
705 | OPC_MoveParent, |
706 | OPC_EmitConvertToTarget1, |
707 | OPC_EmitNodeXForm, 1, 2, |
708 | OPC_MorphNodeTo2, TARGET_VAL(Lanai::SUBB_F_I_HI), 0|OPFL_GlueInput|OPFL_GlueOutput, |
709 | MVT::i32, MVT::i32, 2, 0, 3, |
710 | 0, |
711 | 14, |
712 | OPC_CheckChild0TypeI32, |
713 | OPC_RecordChild1, |
714 | OPC_EmitInteger32, 0, |
715 | OPC_MorphNodeTo2, TARGET_VAL(Lanai::SUBB_F_R), 0|OPFL_GlueInput|OPFL_GlueOutput, |
716 | MVT::i32, MVT::i32, 3, 0, 1, 2, |
717 | 0, |
718 | 31, TARGET_VAL(ISD::SHL), |
719 | OPC_RecordChild0, |
720 | OPC_RecordChild1, |
721 | OPC_Scope, 15, |
722 | OPC_MoveChild1, |
723 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
724 | OPC_CheckPredicate, 8, |
725 | OPC_MoveParent, |
726 | OPC_EmitConvertToTarget1, |
727 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SL_I), |
728 | MVT::i32, 2, 0, 2, |
729 | 10, |
730 | OPC_EmitInteger32, 0, |
731 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SHL_R), |
732 | MVT::i32, 3, 0, 1, 2, |
733 | 0, |
734 | 45, TARGET_VAL(ISD::SRL), |
735 | OPC_RecordChild0, |
736 | OPC_RecordChild1, |
737 | OPC_Scope, 17, |
738 | OPC_MoveChild1, |
739 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
740 | OPC_CheckPredicate, 8, |
741 | OPC_MoveParent, |
742 | OPC_EmitNodeXForm, 2, 1, |
743 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SL_I), |
744 | MVT::i32, 2, 0, 2, |
745 | 22, |
746 | OPC_EmitRegisterI32, Lanai::R0, |
747 | OPC_EmitInteger32, 0, |
748 | OPC_EmitNode1None, TARGET_VAL(Lanai::SUB_R), |
749 | MVT::i32, 3, 2, 1, 3, |
750 | OPC_EmitInteger32, 0, |
751 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SRL_R), |
752 | MVT::i32, 3, 0, 4, 5, |
753 | 0, |
754 | 45, TARGET_VAL(ISD::SRA), |
755 | OPC_RecordChild0, |
756 | OPC_RecordChild1, |
757 | OPC_Scope, 17, |
758 | OPC_MoveChild1, |
759 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
760 | OPC_CheckPredicate, 8, |
761 | OPC_MoveParent, |
762 | OPC_EmitNodeXForm, 2, 1, |
763 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SA_I), |
764 | MVT::i32, 2, 0, 2, |
765 | 22, |
766 | OPC_EmitRegisterI32, Lanai::R0, |
767 | OPC_EmitInteger32, 0, |
768 | OPC_EmitNode1None, TARGET_VAL(Lanai::SUB_R), |
769 | MVT::i32, 3, 2, 1, 3, |
770 | OPC_EmitInteger32, 0, |
771 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SRA_R), |
772 | MVT::i32, 3, 0, 4, 5, |
773 | 0, |
774 | 49, TARGET_VAL(LanaiISD::SET_FLAG), |
775 | OPC_RecordChild0, |
776 | OPC_Scope, 35, |
777 | OPC_RecordChild1, |
778 | OPC_MoveChild1, |
779 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
780 | OPC_Scope, 13, |
781 | OPC_CheckPredicate0, |
782 | OPC_MoveParent, |
783 | OPC_EmitConvertToTarget1, |
784 | OPC_EmitNodeXForm, 0, 2, |
785 | OPC_MorphNodeTo1GlueOutput, TARGET_VAL(Lanai::SFSUB_F_RI_LO), |
786 | MVT::i32, 2, 0, 3, |
787 | 13, |
788 | OPC_CheckPredicate1, |
789 | OPC_MoveParent, |
790 | OPC_EmitConvertToTarget1, |
791 | OPC_EmitNodeXForm, 1, 2, |
792 | OPC_MorphNodeTo1GlueOutput, TARGET_VAL(Lanai::SFSUB_F_RI_HI), |
793 | MVT::i32, 2, 0, 3, |
794 | 0, |
795 | 9, |
796 | OPC_CheckChild0TypeI32, |
797 | OPC_RecordChild1, |
798 | OPC_MorphNodeTo1GlueOutput, TARGET_VAL(Lanai::SFSUB_F_RR), |
799 | MVT::i32, 2, 0, 1, |
800 | 0, |
801 | 22, TARGET_VAL(LanaiISD::BR_CC), |
802 | OPC_RecordNode, |
803 | OPC_CaptureGlueInput, |
804 | OPC_RecordChild1, |
805 | OPC_MoveChild1, |
806 | OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock), |
807 | OPC_MoveSibling2, |
808 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
809 | OPC_RecordNode, |
810 | OPC_MoveParent, |
811 | OPC_EmitMergeInputChains1_0, |
812 | OPC_EmitConvertToTarget2, |
813 | OPC_MorphNodeTo0, TARGET_VAL(Lanai::BRCC), 0|OPFL_Chain|OPFL_GlueInput, |
814 | 2, 1, 3, |
815 | 14, TARGET_VAL(LanaiISD::SETCC), |
816 | OPC_CaptureGlueInput, |
817 | OPC_RecordChild0, |
818 | OPC_MoveChild0, |
819 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
820 | OPC_MoveParent, |
821 | OPC_EmitConvertToTarget0, |
822 | OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SCC), |
823 | MVT::i32, 1, 1, |
824 | 19, TARGET_VAL(LanaiISD::SELECT_CC), |
825 | OPC_CaptureGlueInput, |
826 | OPC_RecordChild0, |
827 | OPC_RecordChild1, |
828 | OPC_RecordChild2, |
829 | OPC_MoveChild2, |
830 | OPC_CheckOpcode, TARGET_VAL(ISD::Constant), |
831 | OPC_MoveParent, |
832 | OPC_CheckTypeI32, |
833 | OPC_EmitConvertToTarget2, |
834 | OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SELECT), |
835 | MVT::i32, 3, 0, 1, 3, |
836 | 42, TARGET_VAL(LanaiISD::CALL), |
837 | OPC_RecordNode, |
838 | OPC_CaptureGlueInput, |
839 | OPC_RecordChild1, |
840 | OPC_Scope, 27, |
841 | OPC_MoveChild1, |
842 | OPC_SwitchOpcode , 9, TARGET_VAL(ISD::TargetGlobalAddress), |
843 | OPC_MoveParent, |
844 | OPC_EmitMergeInputChains1_0, |
845 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::CALL), 0|OPFL_Chain|OPFL_GlueInput|OPFL_GlueOutput|OPFL_Variadic1, |
846 | MVT::i32, 1, 1, |
847 | 9, TARGET_VAL(ISD::TargetExternalSymbol), |
848 | OPC_MoveParent, |
849 | OPC_EmitMergeInputChains1_0, |
850 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::CALL), 0|OPFL_Chain|OPFL_GlueInput|OPFL_GlueOutput|OPFL_Variadic1, |
851 | MVT::i32, 1, 1, |
852 | 0, |
853 | 8, |
854 | OPC_EmitMergeInputChains1_0, |
855 | OPC_MorphNodeTo1, TARGET_VAL(Lanai::CALLR), 0|OPFL_Chain|OPFL_GlueInput|OPFL_GlueOutput|OPFL_Variadic1, |
856 | MVT::i32, 1, 1, |
857 | 0, |
858 | 59, TARGET_VAL(LanaiISD::HI), |
859 | OPC_RecordChild0, |
860 | OPC_MoveChild0, |
861 | OPC_SwitchOpcode , 8, TARGET_VAL(ISD::TargetGlobalAddress), |
862 | OPC_MoveParent, |
863 | OPC_CheckTypeI32, |
864 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::MOVHI), |
865 | MVT::i32, 1, 0, |
866 | 8, TARGET_VAL(ISD::TargetExternalSymbol), |
867 | OPC_MoveParent, |
868 | OPC_CheckTypeI32, |
869 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::MOVHI), |
870 | MVT::i32, 1, 0, |
871 | 8, TARGET_VAL(ISD::TargetBlockAddress), |
872 | OPC_MoveParent, |
873 | OPC_CheckTypeI32, |
874 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::MOVHI), |
875 | MVT::i32, 1, 0, |
876 | 8, TARGET_VAL(ISD::TargetJumpTable), |
877 | OPC_MoveParent, |
878 | OPC_CheckTypeI32, |
879 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::MOVHI), |
880 | MVT::i32, 1, 0, |
881 | 8, TARGET_VAL(ISD::TargetConstantPool), |
882 | OPC_MoveParent, |
883 | OPC_CheckTypeI32, |
884 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::MOVHI), |
885 | MVT::i32, 1, 0, |
886 | 0, |
887 | 74, TARGET_VAL(LanaiISD::LO), |
888 | OPC_RecordChild0, |
889 | OPC_MoveChild0, |
890 | OPC_SwitchOpcode , 11, TARGET_VAL(ISD::TargetGlobalAddress), |
891 | OPC_MoveParent, |
892 | OPC_CheckTypeI32, |
893 | OPC_EmitRegisterI32, Lanai::R0, |
894 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
895 | MVT::i32, 2, 1, 0, |
896 | 11, TARGET_VAL(ISD::TargetExternalSymbol), |
897 | OPC_MoveParent, |
898 | OPC_CheckTypeI32, |
899 | OPC_EmitRegisterI32, Lanai::R0, |
900 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
901 | MVT::i32, 2, 1, 0, |
902 | 11, TARGET_VAL(ISD::TargetBlockAddress), |
903 | OPC_MoveParent, |
904 | OPC_CheckTypeI32, |
905 | OPC_EmitRegisterI32, Lanai::R0, |
906 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
907 | MVT::i32, 2, 1, 0, |
908 | 11, TARGET_VAL(ISD::TargetJumpTable), |
909 | OPC_MoveParent, |
910 | OPC_CheckTypeI32, |
911 | OPC_EmitRegisterI32, Lanai::R0, |
912 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
913 | MVT::i32, 2, 1, 0, |
914 | 11, TARGET_VAL(ISD::TargetConstantPool), |
915 | OPC_MoveParent, |
916 | OPC_CheckTypeI32, |
917 | OPC_EmitRegisterI32, Lanai::R0, |
918 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
919 | MVT::i32, 2, 1, 0, |
920 | 0, |
921 | 59, TARGET_VAL(LanaiISD::SMALL), |
922 | OPC_RecordChild0, |
923 | OPC_MoveChild0, |
924 | OPC_SwitchOpcode , 8, TARGET_VAL(ISD::TargetGlobalAddress), |
925 | OPC_MoveParent, |
926 | OPC_CheckTypeI32, |
927 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SLI), |
928 | MVT::i32, 1, 0, |
929 | 8, TARGET_VAL(ISD::TargetExternalSymbol), |
930 | OPC_MoveParent, |
931 | OPC_CheckTypeI32, |
932 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SLI), |
933 | MVT::i32, 1, 0, |
934 | 8, TARGET_VAL(ISD::TargetBlockAddress), |
935 | OPC_MoveParent, |
936 | OPC_CheckTypeI32, |
937 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SLI), |
938 | MVT::i32, 1, 0, |
939 | 8, TARGET_VAL(ISD::TargetJumpTable), |
940 | OPC_MoveParent, |
941 | OPC_CheckTypeI32, |
942 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SLI), |
943 | MVT::i32, 1, 0, |
944 | 8, TARGET_VAL(ISD::TargetConstantPool), |
945 | OPC_MoveParent, |
946 | OPC_CheckTypeI32, |
947 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SLI), |
948 | MVT::i32, 1, 0, |
949 | 0, |
950 | 92, TARGET_VAL(ISD::Constant), |
951 | OPC_RecordNode, |
952 | OPC_Scope, 14, |
953 | OPC_CheckPredicate6, |
954 | OPC_EmitRegisterI32, Lanai::R1, |
955 | OPC_EmitConvertToTarget0, |
956 | OPC_EmitNodeXForm, 0, 2, |
957 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::AND_I_LO), |
958 | MVT::i32, 2, 1, 3, |
959 | 14, |
960 | OPC_CheckPredicate7, |
961 | OPC_EmitRegisterI32, Lanai::R1, |
962 | OPC_EmitConvertToTarget0, |
963 | OPC_EmitNodeXForm, 1, 2, |
964 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::AND_I_HI), |
965 | MVT::i32, 2, 1, 3, |
966 | 11, |
967 | OPC_CheckPredicate1, |
968 | OPC_EmitConvertToTarget0, |
969 | OPC_EmitNodeXForm, 1, 1, |
970 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::MOVHI), |
971 | MVT::i32, 1, 2, |
972 | 12, |
973 | OPC_CheckPredicate, 19, |
974 | OPC_EmitConvertToTarget0, |
975 | OPC_EmitNodeXForm, 3, 1, |
976 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SLI), |
977 | MVT::i32, 1, 2, |
978 | 11, |
979 | OPC_CheckPredicate0, |
980 | OPC_EmitRegisterI32, Lanai::R0, |
981 | OPC_EmitConvertToTarget0, |
982 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
983 | MVT::i32, 2, 1, 2, |
984 | 21, |
985 | OPC_EmitConvertToTarget0, |
986 | OPC_EmitNodeXForm, 1, 1, |
987 | OPC_EmitNode1None, TARGET_VAL(Lanai::MOVHI), |
988 | MVT::i32, 1, 2, |
989 | OPC_EmitConvertToTarget0, |
990 | OPC_EmitNodeXForm, 0, 4, |
991 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO), |
992 | MVT::i32, 2, 3, 5, |
993 | 0, |
994 | 13, TARGET_VAL(ISD::BR), |
995 | OPC_RecordNode, |
996 | OPC_RecordChild1, |
997 | OPC_MoveChild1, |
998 | OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock), |
999 | OPC_MoveParent, |
1000 | OPC_EmitMergeInputChains1_0, |
1001 | OPC_MorphNodeTo0Chain, TARGET_VAL(Lanai::BT), |
1002 | 1, 1, |
1003 | 9, TARGET_VAL(ISD::BRIND), |
1004 | OPC_RecordNode, |
1005 | OPC_RecordChild1, |
1006 | OPC_CheckChild1TypeI32, |
1007 | OPC_EmitMergeInputChains1_0, |
1008 | OPC_MorphNodeTo0Chain, TARGET_VAL(Lanai::JR), |
1009 | 1, 1, |
1010 | 8, TARGET_VAL(LanaiISD::RET_GLUE), |
1011 | OPC_RecordNode, |
1012 | OPC_CaptureGlueInput, |
1013 | OPC_EmitMergeInputChains1_0, |
1014 | OPC_MorphNodeTo0, TARGET_VAL(Lanai::RET), 0|OPFL_Chain|OPFL_GlueInput|OPFL_Variadic0, |
1015 | 0, |
1016 | 8, TARGET_VAL(LanaiISD::ADJDYNALLOC), |
1017 | OPC_RecordChild0, |
1018 | OPC_MorphNodeTo2None, TARGET_VAL(Lanai::ADJDYNALLOC), |
1019 | MVT::i32, MVT::i32, 1, 0, |
1020 | 7, TARGET_VAL(ISD::CTPOP), |
1021 | OPC_RecordChild0, |
1022 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::POPC), |
1023 | MVT::i32, 1, 0, |
1024 | 7, TARGET_VAL(ISD::CTLZ), |
1025 | OPC_RecordChild0, |
1026 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::LEADZ), |
1027 | MVT::i32, 1, 0, |
1028 | 7, TARGET_VAL(ISD::CTTZ), |
1029 | OPC_RecordChild0, |
1030 | OPC_MorphNodeTo1None, TARGET_VAL(Lanai::TRAILZ), |
1031 | MVT::i32, 1, 0, |
1032 | 0, |
1033 | 0 |
1034 | }; // Total Array size is 2067 bytes |
1035 | |
1036 | #undef TARGET_VAL |
1037 | SelectCodeCommon(NodeToMatch: N, MatcherTable, TableSize: sizeof(MatcherTable)); |
1038 | } |
1039 | #endif // GET_DAGISEL_BODY |
1040 | |
1041 | #ifdef GET_DAGISEL_DECL |
1042 | bool CheckNodePredicate(SDNode *Node, unsigned PredNo) const override; |
1043 | #endif |
1044 | #if defined(GET_DAGISEL_BODY) || DAGISEL_INLINE |
1045 | bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDNode *Node, unsigned PredNo) const |
1046 | #if DAGISEL_INLINE |
1047 | override |
1048 | #endif |
1049 | { |
1050 | switch (PredNo) { |
1051 | default: llvm_unreachable("Invalid predicate in table?" ); |
1052 | case 0: { |
1053 | // Predicate_i32lo16z |
1054 | auto *N = cast<ConstantSDNode>(Val: Node); |
1055 | (void)N; |
1056 | |
1057 | // i32lo16 predicate - true if the 32-bit immediate has only rightmost 16 |
1058 | // bits set. |
1059 | return ((N->getZExtValue() & 0xFFFFUL) == N->getZExtValue()); |
1060 | } |
1061 | case 1: { |
1062 | // Predicate_i32hi16 |
1063 | auto *N = cast<ConstantSDNode>(Val: Node); |
1064 | (void)N; |
1065 | |
1066 | // i32hi16 predicate - true if the 32-bit immediate has only leftmost 16 |
1067 | // bits set. |
1068 | return ((N->getZExtValue() & 0xFFFF0000UL) == N->getZExtValue()); |
1069 | } |
1070 | case 2: { |
1071 | // Predicate_atomic_load_8 |
1072 | // Predicate_extloadi8 |
1073 | // Predicate_sextloadi8 |
1074 | // Predicate_zextloadi8 |
1075 | SDNode *N = Node; |
1076 | (void)N; |
1077 | if (cast<MemSDNode>(Val: N)->getMemoryVT() != MVT::i8) return false; |
1078 | return true; |
1079 | |
1080 | } |
1081 | case 3: { |
1082 | // Predicate_extloadi16 |
1083 | // Predicate_sextloadi16 |
1084 | // Predicate_zextloadi16 |
1085 | SDNode *N = Node; |
1086 | (void)N; |
1087 | if (cast<MemSDNode>(Val: N)->getMemoryVT() != MVT::i16) return false; |
1088 | return true; |
1089 | |
1090 | } |
1091 | case 4: { |
1092 | // Predicate_zextload |
1093 | SDNode *N = Node; |
1094 | (void)N; |
1095 | if (cast<LoadSDNode>(Val: N)->getExtensionType() != ISD::ZEXTLOAD) return false; |
1096 | return true; |
1097 | |
1098 | } |
1099 | case 5: { |
1100 | // Predicate_sextload |
1101 | SDNode *N = Node; |
1102 | (void)N; |
1103 | if (cast<LoadSDNode>(Val: N)->getExtensionType() != ISD::SEXTLOAD) return false; |
1104 | return true; |
1105 | |
1106 | } |
1107 | case 6: { |
1108 | // Predicate_i32lo16and |
1109 | auto *N = cast<ConstantSDNode>(Val: Node); |
1110 | (void)N; |
1111 | |
1112 | // i32lo16 predicate - true if the 32-bit immediate has the rightmost 16 |
1113 | // bits set and the leftmost 16 bits 1's. |
1114 | return (N->getZExtValue() >= 0xFFFF0000UL); |
1115 | } |
1116 | case 7: { |
1117 | // Predicate_i32hi16and |
1118 | auto *N = cast<ConstantSDNode>(Val: Node); |
1119 | (void)N; |
1120 | |
1121 | // i32lo16 predicate - true if the 32-bit immediate has the leftmost 16 |
1122 | // bits set and the rightmost 16 bits 1's. |
1123 | return ((N->getZExtValue() & 0xFFFFUL) == 0xFFFFUL); |
1124 | } |
1125 | case 8: { |
1126 | // Predicate_immShift |
1127 | auto *N = cast<ConstantSDNode>(Val: Node); |
1128 | (void)N; |
1129 | |
1130 | int Imm = N->getSExtValue(); |
1131 | return Imm >= -31 && Imm <= 31; |
1132 | } |
1133 | case 9: { |
1134 | // Predicate_load |
1135 | SDNode *N = Node; |
1136 | (void)N; |
1137 | if (cast<LoadSDNode>(Val: N)->getExtensionType() != ISD::NON_EXTLOAD) return false; |
1138 | return true; |
1139 | |
1140 | } |
1141 | case 10: { |
1142 | // Predicate_store |
1143 | SDNode *N = Node; |
1144 | (void)N; |
1145 | if (cast<StoreSDNode>(Val: N)->isTruncatingStore()) return false; |
1146 | return true; |
1147 | |
1148 | } |
1149 | case 11: { |
1150 | // Predicate_truncstorei16 |
1151 | SDNode *N = Node; |
1152 | (void)N; |
1153 | if (cast<MemSDNode>(Val: N)->getMemoryVT() != MVT::i16) return false; |
1154 | if (!cast<StoreSDNode>(Val: N)->isTruncatingStore()) return false; |
1155 | return true; |
1156 | |
1157 | } |
1158 | case 12: { |
1159 | // Predicate_truncstorei8 |
1160 | SDNode *N = Node; |
1161 | (void)N; |
1162 | if (cast<MemSDNode>(Val: N)->getMemoryVT() != MVT::i8) return false; |
1163 | if (!cast<StoreSDNode>(Val: N)->isTruncatingStore()) return false; |
1164 | return true; |
1165 | |
1166 | } |
1167 | case 13: { |
1168 | // Predicate_i32neg16 |
1169 | auto *N = cast<ConstantSDNode>(Val: Node); |
1170 | (void)N; |
1171 | |
1172 | // i32neg16 predicate - true if the 32-bit immediate is negative and can |
1173 | // be represented by a 16 bit integer. |
1174 | int Imm = N->getSExtValue(); |
1175 | return (Imm < 0) && (isInt<16>(x: Imm)); |
1176 | } |
1177 | case 14: { |
1178 | // Predicate_unindexedload |
1179 | SDNode *N = Node; |
1180 | (void)N; |
1181 | if (cast<LoadSDNode>(Val: N)->getAddressingMode() != ISD::UNINDEXED) return false; |
1182 | return true; |
1183 | |
1184 | } |
1185 | case 15: { |
1186 | // Predicate_zextloadi32 |
1187 | SDNode *N = Node; |
1188 | (void)N; |
1189 | if (cast<MemSDNode>(Val: N)->getMemoryVT() != MVT::i32) return false; |
1190 | return true; |
1191 | |
1192 | } |
1193 | case 16: { |
1194 | // Predicate_extload |
1195 | SDNode *N = Node; |
1196 | (void)N; |
1197 | if (cast<LoadSDNode>(Val: N)->getExtensionType() != ISD::EXTLOAD) return false; |
1198 | return true; |
1199 | |
1200 | } |
1201 | case 17: { |
1202 | // Predicate_unindexedstore |
1203 | SDNode *N = Node; |
1204 | (void)N; |
1205 | if (cast<StoreSDNode>(Val: N)->getAddressingMode() != ISD::UNINDEXED) return false; |
1206 | return true; |
1207 | |
1208 | } |
1209 | case 18: { |
1210 | // Predicate_truncstore |
1211 | SDNode *N = Node; |
1212 | (void)N; |
1213 | if (!cast<StoreSDNode>(Val: N)->isTruncatingStore()) return false; |
1214 | return true; |
1215 | |
1216 | } |
1217 | case 19: { |
1218 | // Predicate_i32lo21 |
1219 | auto *N = cast<ConstantSDNode>(Val: Node); |
1220 | (void)N; |
1221 | |
1222 | // i32lo21 predicate - true if the 32-bit immediate has only rightmost 21 |
1223 | // bits set. |
1224 | return ((N->getZExtValue() & 0x1FFFFFUL) == N->getZExtValue()); |
1225 | } |
1226 | } |
1227 | } |
1228 | #endif // GET_DAGISEL_BODY |
1229 | |
1230 | #ifdef GET_DAGISEL_DECL |
1231 | bool CheckComplexPattern(SDNode *Root, SDNode *Parent, |
1232 | SDValue N, unsigned PatternNo, |
1233 | SmallVectorImpl<std::pair<SDValue, SDNode *>> &Result) override; |
1234 | #endif |
1235 | #if defined(GET_DAGISEL_BODY) || DAGISEL_INLINE |
1236 | bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent, |
1237 | SDValue N, unsigned PatternNo, |
1238 | SmallVectorImpl<std::pair<SDValue, SDNode *>> &Result) |
1239 | #if DAGISEL_INLINE |
1240 | override |
1241 | #endif |
1242 | { |
1243 | unsigned NextRes = Result.size(); |
1244 | switch (PatternNo) { |
1245 | default: llvm_unreachable("Invalid pattern # in table?" ); |
1246 | case 0: |
1247 | Result.resize(N: NextRes+3); |
1248 | return selectAddrRr(Addr: N, R1&: Result[NextRes+0].first, R2&: Result[NextRes+1].first, AluOp&: Result[NextRes+2].first); |
1249 | case 1: |
1250 | Result.resize(N: NextRes+3); |
1251 | return selectAddrSpls(Addr: N, Base&: Result[NextRes+0].first, Offset&: Result[NextRes+1].first, AluOp&: Result[NextRes+2].first); |
1252 | case 2: |
1253 | Result.resize(N: NextRes+3); |
1254 | return selectAddrRi(Addr: N, Base&: Result[NextRes+0].first, Offset&: Result[NextRes+1].first, AluOp&: Result[NextRes+2].first); |
1255 | case 3: |
1256 | Result.resize(N: NextRes+1); |
1257 | return selectAddrSls(Addr: N, Offset&: Result[NextRes+0].first); |
1258 | } |
1259 | } |
1260 | #endif // GET_DAGISEL_BODY |
1261 | |
1262 | #ifdef GET_DAGISEL_DECL |
1263 | SDValue RunSDNodeXForm(SDValue V, unsigned XFormNo) override; |
1264 | #endif |
1265 | #if defined(GET_DAGISEL_BODY) || DAGISEL_INLINE |
1266 | SDValue DAGISEL_CLASS_COLONCOLON RunSDNodeXForm(SDValue V, unsigned XFormNo) |
1267 | #if DAGISEL_INLINE |
1268 | override |
1269 | #endif |
1270 | { |
1271 | switch (XFormNo) { |
1272 | default: llvm_unreachable("Invalid xform # in table?" ); |
1273 | case 0: { |
1274 | ConstantSDNode *N = cast<ConstantSDNode>(Val: V.getNode()); |
1275 | |
1276 | return CurDAG->getTargetConstant(Val: (uint64_t)N->getZExtValue() & 0xffff, |
1277 | DL: SDLoc(N), VT: MVT::i32); |
1278 | |
1279 | } |
1280 | case 1: { |
1281 | ConstantSDNode *N = cast<ConstantSDNode>(Val: V.getNode()); |
1282 | |
1283 | return CurDAG->getTargetConstant(Val: (uint64_t)N->getZExtValue() >> 16, DL: SDLoc(N), |
1284 | VT: MVT::i32); |
1285 | |
1286 | } |
1287 | case 2: { |
1288 | ConstantSDNode *N = cast<ConstantSDNode>(Val: V.getNode()); |
1289 | |
1290 | return CurDAG->getTargetConstant(Val: -N->getSExtValue(), DL: SDLoc(N), VT: MVT::i32); |
1291 | |
1292 | } |
1293 | case 3: { |
1294 | ConstantSDNode *N = cast<ConstantSDNode>(Val: V.getNode()); |
1295 | |
1296 | return CurDAG->getTargetConstant(Val: (uint64_t)N->getZExtValue() & 0x1fffff, |
1297 | DL: SDLoc(N), VT: MVT::i32); |
1298 | |
1299 | } |
1300 | } |
1301 | } |
1302 | #endif // GET_DAGISEL_BODY |
1303 | |
1304 | |
1305 | #ifdef DAGISEL_INLINE |
1306 | #undef DAGISEL_INLINE |
1307 | #endif |
1308 | #ifdef DAGISEL_CLASS_COLONCOLON |
1309 | #undef DAGISEL_CLASS_COLONCOLON |
1310 | #endif |
1311 | #ifdef GET_DAGISEL_DECL |
1312 | #undef GET_DAGISEL_DECL |
1313 | #endif |
1314 | #ifdef GET_DAGISEL_BODY |
1315 | #undef GET_DAGISEL_BODY |
1316 | #endif |
1317 | |