1 | //=== lib/CodeGen/GlobalISel/AArch64O0PreLegalizerCombiner.cpp ------------===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // |
9 | // This pass does combining of machine instructions at the generic MI level, |
10 | // before the legalizer. |
11 | // |
12 | //===----------------------------------------------------------------------===// |
13 | |
14 | #include "AArch64GlobalISelUtils.h" |
15 | #include "AArch64TargetMachine.h" |
16 | #include "llvm/CodeGen/GlobalISel/Combiner.h" |
17 | #include "llvm/CodeGen/GlobalISel/CombinerHelper.h" |
18 | #include "llvm/CodeGen/GlobalISel/CombinerInfo.h" |
19 | #include "llvm/CodeGen/GlobalISel/GIMatchTableExecutorImpl.h" |
20 | #include "llvm/CodeGen/GlobalISel/GISelKnownBits.h" |
21 | #include "llvm/CodeGen/GlobalISel/MIPatternMatch.h" |
22 | #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h" |
23 | #include "llvm/CodeGen/MachineDominators.h" |
24 | #include "llvm/CodeGen/MachineFunction.h" |
25 | #include "llvm/CodeGen/MachineFunctionPass.h" |
26 | #include "llvm/CodeGen/MachineRegisterInfo.h" |
27 | #include "llvm/CodeGen/TargetPassConfig.h" |
28 | #include "llvm/IR/Instructions.h" |
29 | #include "llvm/Support/Debug.h" |
30 | |
31 | #define GET_GICOMBINER_DEPS |
32 | #include "AArch64GenO0PreLegalizeGICombiner.inc" |
33 | #undef GET_GICOMBINER_DEPS |
34 | |
35 | #define DEBUG_TYPE "aarch64-O0-prelegalizer-combiner" |
36 | |
37 | using namespace llvm; |
38 | using namespace MIPatternMatch; |
39 | namespace { |
40 | #define GET_GICOMBINER_TYPES |
41 | #include "AArch64GenO0PreLegalizeGICombiner.inc" |
42 | #undef GET_GICOMBINER_TYPES |
43 | |
44 | class AArch64O0PreLegalizerCombinerImpl : public Combiner { |
45 | protected: |
46 | // TODO: Make CombinerHelper methods const. |
47 | mutable CombinerHelper Helper; |
48 | const AArch64O0PreLegalizerCombinerImplRuleConfig &RuleConfig; |
49 | const AArch64Subtarget &STI; |
50 | |
51 | public: |
52 | AArch64O0PreLegalizerCombinerImpl( |
53 | MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC, |
54 | GISelKnownBits &KB, GISelCSEInfo *CSEInfo, |
55 | const AArch64O0PreLegalizerCombinerImplRuleConfig &RuleConfig, |
56 | const AArch64Subtarget &STI); |
57 | |
58 | static const char *getName() { return "AArch64O0PreLegalizerCombiner" ; } |
59 | |
60 | bool tryCombineAll(MachineInstr &I) const override; |
61 | |
62 | bool tryCombineAllImpl(MachineInstr &I) const; |
63 | |
64 | private: |
65 | #define GET_GICOMBINER_CLASS_MEMBERS |
66 | #include "AArch64GenO0PreLegalizeGICombiner.inc" |
67 | #undef GET_GICOMBINER_CLASS_MEMBERS |
68 | }; |
69 | |
70 | #define GET_GICOMBINER_IMPL |
71 | #include "AArch64GenO0PreLegalizeGICombiner.inc" |
72 | #undef GET_GICOMBINER_IMPL |
73 | |
74 | AArch64O0PreLegalizerCombinerImpl::AArch64O0PreLegalizerCombinerImpl( |
75 | MachineFunction &MF, CombinerInfo &CInfo, const TargetPassConfig *TPC, |
76 | GISelKnownBits &KB, GISelCSEInfo *CSEInfo, |
77 | const AArch64O0PreLegalizerCombinerImplRuleConfig &RuleConfig, |
78 | const AArch64Subtarget &STI) |
79 | : Combiner(MF, CInfo, TPC, &KB, CSEInfo), |
80 | Helper(Observer, B, /*IsPreLegalize*/ true, &KB), RuleConfig(RuleConfig), |
81 | STI(STI), |
82 | #define GET_GICOMBINER_CONSTRUCTOR_INITS |
83 | #include "AArch64GenO0PreLegalizeGICombiner.inc" |
84 | #undef GET_GICOMBINER_CONSTRUCTOR_INITS |
85 | { |
86 | } |
87 | |
88 | bool AArch64O0PreLegalizerCombinerImpl::tryCombineAll(MachineInstr &MI) const { |
89 | if (tryCombineAllImpl(I&: MI)) |
90 | return true; |
91 | |
92 | unsigned Opc = MI.getOpcode(); |
93 | switch (Opc) { |
94 | case TargetOpcode::G_SHUFFLE_VECTOR: |
95 | return Helper.tryCombineShuffleVector(MI); |
96 | case TargetOpcode::G_MEMCPY_INLINE: |
97 | return Helper.tryEmitMemcpyInline(MI); |
98 | case TargetOpcode::G_MEMCPY: |
99 | case TargetOpcode::G_MEMMOVE: |
100 | case TargetOpcode::G_MEMSET: { |
101 | // At -O0 set a maxlen of 32 to inline; |
102 | unsigned MaxLen = 32; |
103 | // Try to inline memcpy type calls if optimizations are enabled. |
104 | if (Helper.tryCombineMemCpyFamily(MI, MaxLen)) |
105 | return true; |
106 | if (Opc == TargetOpcode::G_MEMSET) |
107 | return llvm::AArch64GISelUtils::tryEmitBZero(MI, MIRBuilder&: B, MinSize: CInfo.EnableMinSize); |
108 | return false; |
109 | } |
110 | } |
111 | |
112 | return false; |
113 | } |
114 | |
115 | // Pass boilerplate |
116 | // ================ |
117 | |
118 | class AArch64O0PreLegalizerCombiner : public MachineFunctionPass { |
119 | public: |
120 | static char ID; |
121 | |
122 | AArch64O0PreLegalizerCombiner(); |
123 | |
124 | StringRef getPassName() const override { |
125 | return "AArch64O0PreLegalizerCombiner" ; |
126 | } |
127 | |
128 | bool runOnMachineFunction(MachineFunction &MF) override; |
129 | |
130 | void getAnalysisUsage(AnalysisUsage &AU) const override; |
131 | |
132 | private: |
133 | AArch64O0PreLegalizerCombinerImplRuleConfig RuleConfig; |
134 | }; |
135 | } // end anonymous namespace |
136 | |
137 | void AArch64O0PreLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU) const { |
138 | AU.addRequired<TargetPassConfig>(); |
139 | AU.setPreservesCFG(); |
140 | getSelectionDAGFallbackAnalysisUsage(AU); |
141 | AU.addRequired<GISelKnownBitsAnalysis>(); |
142 | AU.addPreserved<GISelKnownBitsAnalysis>(); |
143 | MachineFunctionPass::getAnalysisUsage(AU); |
144 | } |
145 | |
146 | AArch64O0PreLegalizerCombiner::AArch64O0PreLegalizerCombiner() |
147 | : MachineFunctionPass(ID) { |
148 | initializeAArch64O0PreLegalizerCombinerPass(*PassRegistry::getPassRegistry()); |
149 | |
150 | if (!RuleConfig.parseCommandLineOption()) |
151 | report_fatal_error(reason: "Invalid rule identifier" ); |
152 | } |
153 | |
154 | bool AArch64O0PreLegalizerCombiner::runOnMachineFunction(MachineFunction &MF) { |
155 | if (MF.getProperties().hasProperty( |
156 | P: MachineFunctionProperties::Property::FailedISel)) |
157 | return false; |
158 | auto &TPC = getAnalysis<TargetPassConfig>(); |
159 | |
160 | const Function &F = MF.getFunction(); |
161 | GISelKnownBits *KB = &getAnalysis<GISelKnownBitsAnalysis>().get(MF); |
162 | |
163 | const AArch64Subtarget &ST = MF.getSubtarget<AArch64Subtarget>(); |
164 | |
165 | CombinerInfo CInfo(/*AllowIllegalOps*/ true, /*ShouldLegalizeIllegal*/ false, |
166 | /*LegalizerInfo*/ nullptr, /*EnableOpt*/ false, |
167 | F.hasOptSize(), F.hasMinSize()); |
168 | // Disable fixed-point iteration in the Combiner. This improves compile-time |
169 | // at the cost of possibly missing optimizations. See PR#94291 for details. |
170 | CInfo.MaxIterations = 1; |
171 | |
172 | AArch64O0PreLegalizerCombinerImpl Impl(MF, CInfo, &TPC, *KB, |
173 | /*CSEInfo*/ nullptr, RuleConfig, ST); |
174 | return Impl.combineMachineInstrs(); |
175 | } |
176 | |
177 | char AArch64O0PreLegalizerCombiner::ID = 0; |
178 | INITIALIZE_PASS_BEGIN(AArch64O0PreLegalizerCombiner, DEBUG_TYPE, |
179 | "Combine AArch64 machine instrs before legalization" , |
180 | false, false) |
181 | INITIALIZE_PASS_DEPENDENCY(TargetPassConfig) |
182 | INITIALIZE_PASS_DEPENDENCY(GISelKnownBitsAnalysis) |
183 | INITIALIZE_PASS_DEPENDENCY(GISelCSEAnalysisWrapperPass) |
184 | INITIALIZE_PASS_END(AArch64O0PreLegalizerCombiner, DEBUG_TYPE, |
185 | "Combine AArch64 machine instrs before legalization" , false, |
186 | false) |
187 | |
188 | namespace llvm { |
189 | FunctionPass *createAArch64O0PreLegalizerCombiner() { |
190 | return new AArch64O0PreLegalizerCombiner(); |
191 | } |
192 | } // end namespace llvm |
193 | |