1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Calling Convention Implementation Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_CALLING_CONV_IMPL
10#undef GET_CALLING_CONV_IMPL
11
12static bool CC_AMDGPU(unsigned ValNo, MVT ValVT,
13 MVT LocVT, CCValAssign::LocInfo LocInfo,
14 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
15static bool CC_AMDGPU_CS_CHAIN(unsigned ValNo, MVT ValVT,
16 MVT LocVT, CCValAssign::LocInfo LocInfo,
17 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
18static bool CC_AMDGPU_Func(unsigned ValNo, MVT ValVT,
19 MVT LocVT, CCValAssign::LocInfo LocInfo,
20 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
21static bool CC_SI_Gfx(unsigned ValNo, MVT ValVT,
22 MVT LocVT, CCValAssign::LocInfo LocInfo,
23 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
24static bool CC_SI_SHADER(unsigned ValNo, MVT ValVT,
25 MVT LocVT, CCValAssign::LocInfo LocInfo,
26 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
27static bool RetCC_AMDGPU_Func(unsigned ValNo, MVT ValVT,
28 MVT LocVT, CCValAssign::LocInfo LocInfo,
29 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
30static bool RetCC_SI_Gfx(unsigned ValNo, MVT ValVT,
31 MVT LocVT, CCValAssign::LocInfo LocInfo,
32 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
33static bool RetCC_SI_Shader(unsigned ValNo, MVT ValVT,
34 MVT LocVT, CCValAssign::LocInfo LocInfo,
35 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
36
37
38static bool CC_AMDGPU(unsigned ValNo, MVT ValVT,
39 MVT LocVT, CCValAssign::LocInfo LocInfo,
40 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
41
42 if (State.getMachineFunction().getSubtarget<GCNSubtarget>().getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS) {
43 if (!CC_SI_SHADER(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
44 return false;
45 }
46
47 if (State.getMachineFunction().getSubtarget<GCNSubtarget>().getGeneration() >= AMDGPUSubtarget::SOUTHERN_ISLANDS && State.getCallingConv() == CallingConv::C) {
48 if (!CC_AMDGPU_Func(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
49 return false;
50 }
51
52 return true; // CC didn't match.
53}
54
55
56static bool CC_AMDGPU_CS_CHAIN(unsigned ValNo, MVT ValVT,
57 MVT LocVT, CCValAssign::LocInfo LocInfo,
58 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
59
60 if (ArgFlags.isInReg()) {
61 if (LocVT == MVT::f32 ||
62 LocVT == MVT::i32 ||
63 LocVT == MVT::f16 ||
64 LocVT == MVT::i16 ||
65 LocVT == MVT::v2i16 ||
66 LocVT == MVT::v2f16 ||
67 LocVT == MVT::bf16 ||
68 LocVT == MVT::v2bf16) {
69 static const MCPhysReg RegList1[] = {
70 AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR2, AMDGPU::SGPR3, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43, AMDGPU::SGPR44, AMDGPU::SGPR45, AMDGPU::SGPR46, AMDGPU::SGPR47, AMDGPU::SGPR48, AMDGPU::SGPR49, AMDGPU::SGPR50, AMDGPU::SGPR51, AMDGPU::SGPR52, AMDGPU::SGPR53, AMDGPU::SGPR54, AMDGPU::SGPR55, AMDGPU::SGPR56, AMDGPU::SGPR57, AMDGPU::SGPR58, AMDGPU::SGPR59, AMDGPU::SGPR60, AMDGPU::SGPR61, AMDGPU::SGPR62, AMDGPU::SGPR63, AMDGPU::SGPR64, AMDGPU::SGPR65, AMDGPU::SGPR66, AMDGPU::SGPR67, AMDGPU::SGPR68, AMDGPU::SGPR69, AMDGPU::SGPR70, AMDGPU::SGPR71, AMDGPU::SGPR72, AMDGPU::SGPR73, AMDGPU::SGPR74, AMDGPU::SGPR75, AMDGPU::SGPR76, AMDGPU::SGPR77, AMDGPU::SGPR78, AMDGPU::SGPR79, AMDGPU::SGPR80, AMDGPU::SGPR81, AMDGPU::SGPR82, AMDGPU::SGPR83, AMDGPU::SGPR84, AMDGPU::SGPR85, AMDGPU::SGPR86, AMDGPU::SGPR87, AMDGPU::SGPR88, AMDGPU::SGPR89, AMDGPU::SGPR90, AMDGPU::SGPR91, AMDGPU::SGPR92, AMDGPU::SGPR93, AMDGPU::SGPR94, AMDGPU::SGPR95, AMDGPU::SGPR96, AMDGPU::SGPR97, AMDGPU::SGPR98, AMDGPU::SGPR99, AMDGPU::SGPR100, AMDGPU::SGPR101, AMDGPU::SGPR102, AMDGPU::SGPR103, AMDGPU::SGPR104
71 };
72 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
73 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
74 return false;
75 }
76 }
77 }
78
79 if (!ArgFlags.isInReg()) {
80 if (LocVT == MVT::f32 ||
81 LocVT == MVT::i32 ||
82 LocVT == MVT::f16 ||
83 LocVT == MVT::i16 ||
84 LocVT == MVT::v2i16 ||
85 LocVT == MVT::v2f16 ||
86 LocVT == MVT::bf16 ||
87 LocVT == MVT::v2bf16) {
88 static const MCPhysReg RegList2[] = {
89 AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135, AMDGPU::VGPR136, AMDGPU::VGPR137, AMDGPU::VGPR138, AMDGPU::VGPR139, AMDGPU::VGPR140, AMDGPU::VGPR141, AMDGPU::VGPR142, AMDGPU::VGPR143, AMDGPU::VGPR144, AMDGPU::VGPR145, AMDGPU::VGPR146, AMDGPU::VGPR147, AMDGPU::VGPR148, AMDGPU::VGPR149, AMDGPU::VGPR150, AMDGPU::VGPR151, AMDGPU::VGPR152, AMDGPU::VGPR153, AMDGPU::VGPR154, AMDGPU::VGPR155, AMDGPU::VGPR156, AMDGPU::VGPR157, AMDGPU::VGPR158, AMDGPU::VGPR159, AMDGPU::VGPR160, AMDGPU::VGPR161, AMDGPU::VGPR162, AMDGPU::VGPR163, AMDGPU::VGPR164, AMDGPU::VGPR165, AMDGPU::VGPR166, AMDGPU::VGPR167, AMDGPU::VGPR168, AMDGPU::VGPR169, AMDGPU::VGPR170, AMDGPU::VGPR171, AMDGPU::VGPR172, AMDGPU::VGPR173, AMDGPU::VGPR174, AMDGPU::VGPR175, AMDGPU::VGPR176, AMDGPU::VGPR177, AMDGPU::VGPR178, AMDGPU::VGPR179, AMDGPU::VGPR180, AMDGPU::VGPR181, AMDGPU::VGPR182, AMDGPU::VGPR183, AMDGPU::VGPR184, AMDGPU::VGPR185, AMDGPU::VGPR186, AMDGPU::VGPR187, AMDGPU::VGPR188, AMDGPU::VGPR189, AMDGPU::VGPR190, AMDGPU::VGPR191, AMDGPU::VGPR192, AMDGPU::VGPR193, AMDGPU::VGPR194, AMDGPU::VGPR195, AMDGPU::VGPR196, AMDGPU::VGPR197, AMDGPU::VGPR198, AMDGPU::VGPR199, AMDGPU::VGPR200, AMDGPU::VGPR201, AMDGPU::VGPR202, AMDGPU::VGPR203, AMDGPU::VGPR204, AMDGPU::VGPR205, AMDGPU::VGPR206, AMDGPU::VGPR207, AMDGPU::VGPR208, AMDGPU::VGPR209, AMDGPU::VGPR210, AMDGPU::VGPR211, AMDGPU::VGPR212, AMDGPU::VGPR213, AMDGPU::VGPR214, AMDGPU::VGPR215, AMDGPU::VGPR216, AMDGPU::VGPR217, AMDGPU::VGPR218, AMDGPU::VGPR219, AMDGPU::VGPR220, AMDGPU::VGPR221, AMDGPU::VGPR222, AMDGPU::VGPR223, AMDGPU::VGPR224, AMDGPU::VGPR225, AMDGPU::VGPR226, AMDGPU::VGPR227, AMDGPU::VGPR228, AMDGPU::VGPR229, AMDGPU::VGPR230, AMDGPU::VGPR231, AMDGPU::VGPR232, AMDGPU::VGPR233, AMDGPU::VGPR234, AMDGPU::VGPR235, AMDGPU::VGPR236, AMDGPU::VGPR237, AMDGPU::VGPR238, AMDGPU::VGPR239, AMDGPU::VGPR240, AMDGPU::VGPR241, AMDGPU::VGPR242, AMDGPU::VGPR243, AMDGPU::VGPR244, AMDGPU::VGPR245, AMDGPU::VGPR246, AMDGPU::VGPR247, AMDGPU::VGPR248, AMDGPU::VGPR249, AMDGPU::VGPR250, AMDGPU::VGPR251, AMDGPU::VGPR252, AMDGPU::VGPR253, AMDGPU::VGPR254
90 };
91 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
92 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
93 return false;
94 }
95 }
96 }
97
98 return true; // CC didn't match.
99}
100
101
102static bool CC_AMDGPU_Func(unsigned ValNo, MVT ValVT,
103 MVT LocVT, CCValAssign::LocInfo LocInfo,
104 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
105
106 if (ArgFlags.isByVal()) {
107 State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, MinSize: 4, MinAlign: Align(4), ArgFlags);
108 return false;
109 }
110
111 if (LocVT == MVT::i1) {
112 LocVT = MVT::i32;
113 if (ArgFlags.isSExt())
114 LocInfo = CCValAssign::SExt;
115 else if (ArgFlags.isZExt())
116 LocInfo = CCValAssign::ZExt;
117 else
118 LocInfo = CCValAssign::AExt;
119 }
120
121 if (LocVT == MVT::i8 ||
122 LocVT == MVT::i16) {
123 if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
124 LocVT = MVT::i32;
125 if (ArgFlags.isSExt())
126 LocInfo = CCValAssign::SExt;
127 else if (ArgFlags.isZExt())
128 LocInfo = CCValAssign::ZExt;
129 else
130 LocInfo = CCValAssign::AExt;
131 }
132 }
133
134 if (ArgFlags.isInReg()) {
135 if (LocVT == MVT::f32 ||
136 LocVT == MVT::i32 ||
137 LocVT == MVT::f16 ||
138 LocVT == MVT::i16 ||
139 LocVT == MVT::v2i16 ||
140 LocVT == MVT::v2f16 ||
141 LocVT == MVT::bf16 ||
142 LocVT == MVT::v2bf16) {
143 static const MCPhysReg RegList1[] = {
144 AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR2, AMDGPU::SGPR3, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29
145 };
146 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
147 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
148 return false;
149 }
150 }
151 }
152
153 if (LocVT == MVT::i32 ||
154 LocVT == MVT::f32 ||
155 LocVT == MVT::i16 ||
156 LocVT == MVT::f16 ||
157 LocVT == MVT::v2i16 ||
158 LocVT == MVT::v2f16 ||
159 LocVT == MVT::i1 ||
160 LocVT == MVT::bf16 ||
161 LocVT == MVT::v2bf16) {
162 static const MCPhysReg RegList2[] = {
163 AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31
164 };
165 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
166 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
167 return false;
168 }
169 }
170
171 if (LocVT == MVT::i32 ||
172 LocVT == MVT::f32 ||
173 LocVT == MVT::v2i16 ||
174 LocVT == MVT::v2f16 ||
175 LocVT == MVT::i16 ||
176 LocVT == MVT::f16 ||
177 LocVT == MVT::i1 ||
178 LocVT == MVT::bf16 ||
179 LocVT == MVT::v2bf16) {
180 int64_t Offset3 = State.AllocateStack(Size: 4, Alignment: Align(4));
181 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset3, LocVT, HTP: LocInfo));
182 return false;
183 }
184
185 return true; // CC didn't match.
186}
187
188
189static bool CC_SI_Gfx(unsigned ValNo, MVT ValVT,
190 MVT LocVT, CCValAssign::LocInfo LocInfo,
191 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
192
193 if (ArgFlags.isInReg()) {
194 if (LocVT == MVT::f32 ||
195 LocVT == MVT::i32 ||
196 LocVT == MVT::f16 ||
197 LocVT == MVT::i16 ||
198 LocVT == MVT::v2i16 ||
199 LocVT == MVT::v2f16 ||
200 LocVT == MVT::bf16 ||
201 LocVT == MVT::v2bf16) {
202 static const MCPhysReg RegList1[] = {
203 AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29
204 };
205 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
206 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
207 return false;
208 }
209 }
210 }
211
212 if (!ArgFlags.isInReg()) {
213 if (LocVT == MVT::f32 ||
214 LocVT == MVT::i32 ||
215 LocVT == MVT::f16 ||
216 LocVT == MVT::i16 ||
217 LocVT == MVT::v2i16 ||
218 LocVT == MVT::v2f16 ||
219 LocVT == MVT::bf16 ||
220 LocVT == MVT::v2bf16) {
221 static const MCPhysReg RegList2[] = {
222 AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31
223 };
224 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
225 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
226 return false;
227 }
228 }
229 }
230
231 if (LocVT == MVT::i32 ||
232 LocVT == MVT::f32 ||
233 LocVT == MVT::v2i16 ||
234 LocVT == MVT::v2f16 ||
235 LocVT == MVT::i16 ||
236 LocVT == MVT::f16 ||
237 LocVT == MVT::i1 ||
238 LocVT == MVT::bf16 ||
239 LocVT == MVT::v2bf16) {
240 int64_t Offset3 = State.AllocateStack(Size: 4, Alignment: Align(4));
241 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset3, LocVT, HTP: LocInfo));
242 return false;
243 }
244
245 return true; // CC didn't match.
246}
247
248
249static bool CC_SI_SHADER(unsigned ValNo, MVT ValVT,
250 MVT LocVT, CCValAssign::LocInfo LocInfo,
251 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
252
253 if (LocVT == MVT::i1) {
254 LocVT = MVT::i32;
255 if (ArgFlags.isSExt())
256 LocInfo = CCValAssign::SExt;
257 else if (ArgFlags.isZExt())
258 LocInfo = CCValAssign::ZExt;
259 else
260 LocInfo = CCValAssign::AExt;
261 }
262
263 if (ArgFlags.isInReg()) {
264 if (LocVT == MVT::f32 ||
265 LocVT == MVT::i32 ||
266 LocVT == MVT::f16 ||
267 LocVT == MVT::i16 ||
268 LocVT == MVT::v2i16 ||
269 LocVT == MVT::v2f16 ||
270 LocVT == MVT::bf16 ||
271 LocVT == MVT::v2bf16) {
272 static const MCPhysReg RegList1[] = {
273 AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR2, AMDGPU::SGPR3, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43
274 };
275 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
276 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
277 return false;
278 }
279 }
280 }
281
282 if (!ArgFlags.isInReg()) {
283 if (LocVT == MVT::f32 ||
284 LocVT == MVT::i32 ||
285 LocVT == MVT::f16 ||
286 LocVT == MVT::i16 ||
287 LocVT == MVT::v2i16 ||
288 LocVT == MVT::v2f16 ||
289 LocVT == MVT::bf16 ||
290 LocVT == MVT::v2bf16) {
291 static const MCPhysReg RegList2[] = {
292 AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135
293 };
294 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
295 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
296 return false;
297 }
298 }
299 }
300
301 return true; // CC didn't match.
302}
303
304
305static bool RetCC_AMDGPU_Func(unsigned ValNo, MVT ValVT,
306 MVT LocVT, CCValAssign::LocInfo LocInfo,
307 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
308
309 if (LocVT == MVT::i1) {
310 LocVT = MVT::i32;
311 if (ArgFlags.isSExt())
312 LocInfo = CCValAssign::SExt;
313 else if (ArgFlags.isZExt())
314 LocInfo = CCValAssign::ZExt;
315 else
316 LocInfo = CCValAssign::AExt;
317 }
318
319 if (LocVT == MVT::i1 ||
320 LocVT == MVT::i16) {
321 if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
322 LocVT = MVT::i32;
323 if (ArgFlags.isSExt())
324 LocInfo = CCValAssign::SExt;
325 else if (ArgFlags.isZExt())
326 LocInfo = CCValAssign::ZExt;
327 else
328 LocInfo = CCValAssign::AExt;
329 }
330 }
331
332 if (LocVT == MVT::i32 ||
333 LocVT == MVT::f32 ||
334 LocVT == MVT::i16 ||
335 LocVT == MVT::f16 ||
336 LocVT == MVT::v2i16 ||
337 LocVT == MVT::v2f16 ||
338 LocVT == MVT::bf16 ||
339 LocVT == MVT::v2bf16) {
340 static const MCPhysReg RegList1[] = {
341 AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31
342 };
343 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
344 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
345 return false;
346 }
347 }
348
349 return true; // CC didn't match.
350}
351
352
353static bool RetCC_SI_Gfx(unsigned ValNo, MVT ValVT,
354 MVT LocVT, CCValAssign::LocInfo LocInfo,
355 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
356
357 if (LocVT == MVT::i1) {
358 LocVT = MVT::i32;
359 if (ArgFlags.isSExt())
360 LocInfo = CCValAssign::SExt;
361 else if (ArgFlags.isZExt())
362 LocInfo = CCValAssign::ZExt;
363 else
364 LocInfo = CCValAssign::AExt;
365 }
366
367 if (LocVT == MVT::i1 ||
368 LocVT == MVT::i16) {
369 if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
370 LocVT = MVT::i32;
371 if (ArgFlags.isSExt())
372 LocInfo = CCValAssign::SExt;
373 else if (ArgFlags.isZExt())
374 LocInfo = CCValAssign::ZExt;
375 else
376 LocInfo = CCValAssign::AExt;
377 }
378 }
379
380 if (!ArgFlags.isInReg()) {
381 if (LocVT == MVT::f32 ||
382 LocVT == MVT::i32 ||
383 LocVT == MVT::f16 ||
384 LocVT == MVT::i16 ||
385 LocVT == MVT::v2i16 ||
386 LocVT == MVT::v2f16 ||
387 LocVT == MVT::bf16 ||
388 LocVT == MVT::v2bf16) {
389 static const MCPhysReg RegList1[] = {
390 AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135
391 };
392 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
393 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
394 return false;
395 }
396 }
397 }
398
399 return true; // CC didn't match.
400}
401
402
403static bool RetCC_SI_Shader(unsigned ValNo, MVT ValVT,
404 MVT LocVT, CCValAssign::LocInfo LocInfo,
405 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
406
407 if (LocVT == MVT::i1 ||
408 LocVT == MVT::i16) {
409 if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
410 LocVT = MVT::i32;
411 if (ArgFlags.isSExt())
412 LocInfo = CCValAssign::SExt;
413 else if (ArgFlags.isZExt())
414 LocInfo = CCValAssign::ZExt;
415 else
416 LocInfo = CCValAssign::AExt;
417 }
418 }
419
420 if (LocVT == MVT::i32 ||
421 LocVT == MVT::i16 ||
422 LocVT == MVT::v2i16) {
423 if ((!OrigTy->getScalarType()->isFloatTy() &&
424 !OrigTy->getScalarType()->isHalfTy()) ) {
425 static const MCPhysReg RegList1[] = {
426 AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR2, AMDGPU::SGPR3, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43
427 };
428 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
429 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
430 return false;
431 }
432 }
433 }
434
435 if (LocVT == MVT::f32 ||
436 LocVT == MVT::f16 ||
437 LocVT == MVT::v2f16 ||
438 LocVT == MVT::bf16 ||
439 LocVT == MVT::v2bf16 ||
440 LocVT == MVT::i32 ||
441 LocVT == MVT::i16 ||
442 LocVT == MVT::v2i16) {
443 static const MCPhysReg RegList2[] = {
444 AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR2, AMDGPU::VGPR3, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135
445 };
446 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
447 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
448 return false;
449 }
450 }
451
452 return true; // CC didn't match.
453}
454
455#endif // GET_CALLING_CONV_IMPL
456
457#ifdef GET_CC_REGISTER_LISTS
458#undef GET_CC_REGISTER_LISTS
459
460const MCRegister CC_AMDGPU_ArgRegs[] = { 0 };
461const MCRegister CC_AMDGPU_CS_CHAIN_ArgRegs[] = { AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR10, AMDGPU::SGPR100, AMDGPU::SGPR101, AMDGPU::SGPR102, AMDGPU::SGPR103, AMDGPU::SGPR104, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR2, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR3, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR4, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43, AMDGPU::SGPR44, AMDGPU::SGPR45, AMDGPU::SGPR46, AMDGPU::SGPR47, AMDGPU::SGPR48, AMDGPU::SGPR49, AMDGPU::SGPR5, AMDGPU::SGPR50, AMDGPU::SGPR51, AMDGPU::SGPR52, AMDGPU::SGPR53, AMDGPU::SGPR54, AMDGPU::SGPR55, AMDGPU::SGPR56, AMDGPU::SGPR57, AMDGPU::SGPR58, AMDGPU::SGPR59, AMDGPU::SGPR6, AMDGPU::SGPR60, AMDGPU::SGPR61, AMDGPU::SGPR62, AMDGPU::SGPR63, AMDGPU::SGPR64, AMDGPU::SGPR65, AMDGPU::SGPR66, AMDGPU::SGPR67, AMDGPU::SGPR68, AMDGPU::SGPR69, AMDGPU::SGPR7, AMDGPU::SGPR70, AMDGPU::SGPR71, AMDGPU::SGPR72, AMDGPU::SGPR73, AMDGPU::SGPR74, AMDGPU::SGPR75, AMDGPU::SGPR76, AMDGPU::SGPR77, AMDGPU::SGPR78, AMDGPU::SGPR79, AMDGPU::SGPR8, AMDGPU::SGPR80, AMDGPU::SGPR81, AMDGPU::SGPR82, AMDGPU::SGPR83, AMDGPU::SGPR84, AMDGPU::SGPR85, AMDGPU::SGPR86, AMDGPU::SGPR87, AMDGPU::SGPR88, AMDGPU::SGPR89, AMDGPU::SGPR9, AMDGPU::SGPR90, AMDGPU::SGPR91, AMDGPU::SGPR92, AMDGPU::SGPR93, AMDGPU::SGPR94, AMDGPU::SGPR95, AMDGPU::SGPR96, AMDGPU::SGPR97, AMDGPU::SGPR98, AMDGPU::SGPR99, AMDGPU::VGPR10, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR11, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR12, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR13, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135, AMDGPU::VGPR136, AMDGPU::VGPR137, AMDGPU::VGPR138, AMDGPU::VGPR139, AMDGPU::VGPR14, AMDGPU::VGPR140, AMDGPU::VGPR141, AMDGPU::VGPR142, AMDGPU::VGPR143, AMDGPU::VGPR144, AMDGPU::VGPR145, AMDGPU::VGPR146, AMDGPU::VGPR147, AMDGPU::VGPR148, AMDGPU::VGPR149, AMDGPU::VGPR15, AMDGPU::VGPR150, AMDGPU::VGPR151, AMDGPU::VGPR152, AMDGPU::VGPR153, AMDGPU::VGPR154, AMDGPU::VGPR155, AMDGPU::VGPR156, AMDGPU::VGPR157, AMDGPU::VGPR158, AMDGPU::VGPR159, AMDGPU::VGPR16, AMDGPU::VGPR160, AMDGPU::VGPR161, AMDGPU::VGPR162, AMDGPU::VGPR163, AMDGPU::VGPR164, AMDGPU::VGPR165, AMDGPU::VGPR166, AMDGPU::VGPR167, AMDGPU::VGPR168, AMDGPU::VGPR169, AMDGPU::VGPR17, AMDGPU::VGPR170, AMDGPU::VGPR171, AMDGPU::VGPR172, AMDGPU::VGPR173, AMDGPU::VGPR174, AMDGPU::VGPR175, AMDGPU::VGPR176, AMDGPU::VGPR177, AMDGPU::VGPR178, AMDGPU::VGPR179, AMDGPU::VGPR18, AMDGPU::VGPR180, AMDGPU::VGPR181, AMDGPU::VGPR182, AMDGPU::VGPR183, AMDGPU::VGPR184, AMDGPU::VGPR185, AMDGPU::VGPR186, AMDGPU::VGPR187, AMDGPU::VGPR188, AMDGPU::VGPR189, AMDGPU::VGPR19, AMDGPU::VGPR190, AMDGPU::VGPR191, AMDGPU::VGPR192, AMDGPU::VGPR193, AMDGPU::VGPR194, AMDGPU::VGPR195, AMDGPU::VGPR196, AMDGPU::VGPR197, AMDGPU::VGPR198, AMDGPU::VGPR199, AMDGPU::VGPR20, AMDGPU::VGPR200, AMDGPU::VGPR201, AMDGPU::VGPR202, AMDGPU::VGPR203, AMDGPU::VGPR204, AMDGPU::VGPR205, AMDGPU::VGPR206, AMDGPU::VGPR207, AMDGPU::VGPR208, AMDGPU::VGPR209, AMDGPU::VGPR21, AMDGPU::VGPR210, AMDGPU::VGPR211, AMDGPU::VGPR212, AMDGPU::VGPR213, AMDGPU::VGPR214, AMDGPU::VGPR215, AMDGPU::VGPR216, AMDGPU::VGPR217, AMDGPU::VGPR218, AMDGPU::VGPR219, AMDGPU::VGPR22, AMDGPU::VGPR220, AMDGPU::VGPR221, AMDGPU::VGPR222, AMDGPU::VGPR223, AMDGPU::VGPR224, AMDGPU::VGPR225, AMDGPU::VGPR226, AMDGPU::VGPR227, AMDGPU::VGPR228, AMDGPU::VGPR229, AMDGPU::VGPR23, AMDGPU::VGPR230, AMDGPU::VGPR231, AMDGPU::VGPR232, AMDGPU::VGPR233, AMDGPU::VGPR234, AMDGPU::VGPR235, AMDGPU::VGPR236, AMDGPU::VGPR237, AMDGPU::VGPR238, AMDGPU::VGPR239, AMDGPU::VGPR24, AMDGPU::VGPR240, AMDGPU::VGPR241, AMDGPU::VGPR242, AMDGPU::VGPR243, AMDGPU::VGPR244, AMDGPU::VGPR245, AMDGPU::VGPR246, AMDGPU::VGPR247, AMDGPU::VGPR248, AMDGPU::VGPR249, AMDGPU::VGPR25, AMDGPU::VGPR250, AMDGPU::VGPR251, AMDGPU::VGPR252, AMDGPU::VGPR253, AMDGPU::VGPR254, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR8, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR9, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99 };
462const MCRegister CC_AMDGPU_Func_ArgRegs[] = { AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR2, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR3, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9 };
463const MCRegister CC_SI_Gfx_ArgRegs[] = { AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR4, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9 };
464const MCRegister CC_SI_SHADER_ArgRegs[] = { AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR2, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR3, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR4, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR11, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR12, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR13, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR4, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR5, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR6, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR7, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR8, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR9, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99 };
465const MCRegister RetCC_AMDGPU_Func_ArgRegs[] = { AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR11, AMDGPU::VGPR12, AMDGPU::VGPR13, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR4, AMDGPU::VGPR5, AMDGPU::VGPR6, AMDGPU::VGPR7, AMDGPU::VGPR8, AMDGPU::VGPR9 };
466const MCRegister RetCC_SI_Gfx_ArgRegs[] = { AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR11, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR12, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR13, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR4, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR5, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR6, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR7, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR8, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR9, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99 };
467const MCRegister RetCC_SI_Shader_ArgRegs[] = { AMDGPU::SGPR0, AMDGPU::SGPR1, AMDGPU::SGPR10, AMDGPU::SGPR11, AMDGPU::SGPR12, AMDGPU::SGPR13, AMDGPU::SGPR14, AMDGPU::SGPR15, AMDGPU::SGPR16, AMDGPU::SGPR17, AMDGPU::SGPR18, AMDGPU::SGPR19, AMDGPU::SGPR2, AMDGPU::SGPR20, AMDGPU::SGPR21, AMDGPU::SGPR22, AMDGPU::SGPR23, AMDGPU::SGPR24, AMDGPU::SGPR25, AMDGPU::SGPR26, AMDGPU::SGPR27, AMDGPU::SGPR28, AMDGPU::SGPR29, AMDGPU::SGPR3, AMDGPU::SGPR30, AMDGPU::SGPR31, AMDGPU::SGPR32, AMDGPU::SGPR33, AMDGPU::SGPR34, AMDGPU::SGPR35, AMDGPU::SGPR36, AMDGPU::SGPR37, AMDGPU::SGPR38, AMDGPU::SGPR39, AMDGPU::SGPR4, AMDGPU::SGPR40, AMDGPU::SGPR41, AMDGPU::SGPR42, AMDGPU::SGPR43, AMDGPU::SGPR5, AMDGPU::SGPR6, AMDGPU::SGPR7, AMDGPU::SGPR8, AMDGPU::SGPR9, AMDGPU::VGPR0, AMDGPU::VGPR1, AMDGPU::VGPR10, AMDGPU::VGPR100, AMDGPU::VGPR101, AMDGPU::VGPR102, AMDGPU::VGPR103, AMDGPU::VGPR104, AMDGPU::VGPR105, AMDGPU::VGPR106, AMDGPU::VGPR107, AMDGPU::VGPR108, AMDGPU::VGPR109, AMDGPU::VGPR11, AMDGPU::VGPR110, AMDGPU::VGPR111, AMDGPU::VGPR112, AMDGPU::VGPR113, AMDGPU::VGPR114, AMDGPU::VGPR115, AMDGPU::VGPR116, AMDGPU::VGPR117, AMDGPU::VGPR118, AMDGPU::VGPR119, AMDGPU::VGPR12, AMDGPU::VGPR120, AMDGPU::VGPR121, AMDGPU::VGPR122, AMDGPU::VGPR123, AMDGPU::VGPR124, AMDGPU::VGPR125, AMDGPU::VGPR126, AMDGPU::VGPR127, AMDGPU::VGPR128, AMDGPU::VGPR129, AMDGPU::VGPR13, AMDGPU::VGPR130, AMDGPU::VGPR131, AMDGPU::VGPR132, AMDGPU::VGPR133, AMDGPU::VGPR134, AMDGPU::VGPR135, AMDGPU::VGPR14, AMDGPU::VGPR15, AMDGPU::VGPR16, AMDGPU::VGPR17, AMDGPU::VGPR18, AMDGPU::VGPR19, AMDGPU::VGPR2, AMDGPU::VGPR20, AMDGPU::VGPR21, AMDGPU::VGPR22, AMDGPU::VGPR23, AMDGPU::VGPR24, AMDGPU::VGPR25, AMDGPU::VGPR26, AMDGPU::VGPR27, AMDGPU::VGPR28, AMDGPU::VGPR29, AMDGPU::VGPR3, AMDGPU::VGPR30, AMDGPU::VGPR31, AMDGPU::VGPR32, AMDGPU::VGPR33, AMDGPU::VGPR34, AMDGPU::VGPR35, AMDGPU::VGPR36, AMDGPU::VGPR37, AMDGPU::VGPR38, AMDGPU::VGPR39, AMDGPU::VGPR4, AMDGPU::VGPR40, AMDGPU::VGPR41, AMDGPU::VGPR42, AMDGPU::VGPR43, AMDGPU::VGPR44, AMDGPU::VGPR45, AMDGPU::VGPR46, AMDGPU::VGPR47, AMDGPU::VGPR48, AMDGPU::VGPR49, AMDGPU::VGPR5, AMDGPU::VGPR50, AMDGPU::VGPR51, AMDGPU::VGPR52, AMDGPU::VGPR53, AMDGPU::VGPR54, AMDGPU::VGPR55, AMDGPU::VGPR56, AMDGPU::VGPR57, AMDGPU::VGPR58, AMDGPU::VGPR59, AMDGPU::VGPR6, AMDGPU::VGPR60, AMDGPU::VGPR61, AMDGPU::VGPR62, AMDGPU::VGPR63, AMDGPU::VGPR64, AMDGPU::VGPR65, AMDGPU::VGPR66, AMDGPU::VGPR67, AMDGPU::VGPR68, AMDGPU::VGPR69, AMDGPU::VGPR7, AMDGPU::VGPR70, AMDGPU::VGPR71, AMDGPU::VGPR72, AMDGPU::VGPR73, AMDGPU::VGPR74, AMDGPU::VGPR75, AMDGPU::VGPR76, AMDGPU::VGPR77, AMDGPU::VGPR78, AMDGPU::VGPR79, AMDGPU::VGPR8, AMDGPU::VGPR80, AMDGPU::VGPR81, AMDGPU::VGPR82, AMDGPU::VGPR83, AMDGPU::VGPR84, AMDGPU::VGPR85, AMDGPU::VGPR86, AMDGPU::VGPR87, AMDGPU::VGPR88, AMDGPU::VGPR89, AMDGPU::VGPR9, AMDGPU::VGPR90, AMDGPU::VGPR91, AMDGPU::VGPR92, AMDGPU::VGPR93, AMDGPU::VGPR94, AMDGPU::VGPR95, AMDGPU::VGPR96, AMDGPU::VGPR97, AMDGPU::VGPR98, AMDGPU::VGPR99 };
468
469#endif // GET_CC_REGISTER_LISTS
470
471