1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target SDNode descriptions *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* From: Hexagon.td *|
7|* *|
8\*===----------------------------------------------------------------------===*/
9
10#ifdef GET_SDNODE_ENUM
11#undef GET_SDNODE_ENUM
12
13namespace llvm::HexagonISD {
14
15enum GenNodeType : unsigned {
16 ADDC = ISD::BUILTIN_OP_END,
17 ALLOCA,
18 AT_GOT,
19 AT_PCREL,
20 BARRIER,
21 CALL,
22 CALLnr,
23 COMBINE,
24 CONST32,
25 CONST32_GP,
26 CP,
27 DCFETCH,
28 EH_RETURN,
29 EXTRACTU,
30 INSERT,
31 JT,
32 MFSHL,
33 MFSHR,
34 MULHUS,
35 PFALSE,
36 PTRUE,
37 QCAT,
38 QFALSE,
39 QTRUE,
40 RET_GLUE,
41 SMUL_LOHI,
42 SSAT,
43 SUBC,
44 TC_RETURN,
45 THREAD_POINTER,
46 TSTBIT,
47 UMUL_LOHI,
48 USAT,
49 USMUL_LOHI,
50 VALIGN,
51 VALIGNADDR,
52 VASL,
53 VASR,
54 VEXTRACTW,
55 VINSERTW0,
56 VLSR,
57};
58
59static constexpr unsigned GENERATED_OPCODE_END = VLSR + 1;
60
61} // namespace llvm::HexagonISD
62
63#endif // GET_SDNODE_ENUM
64
65#ifdef GET_SDNODE_DESC
66#undef GET_SDNODE_DESC
67
68namespace llvm {
69
70
71#ifdef __GNUC__
72#pragma GCC diagnostic push
73#pragma GCC diagnostic ignored "-Woverlength-strings"
74#endif
75static constexpr char HexagonSDNodeNamesStorage[] =
76 "\0"
77 "HexagonISD::ADDC\0"
78 "HexagonISD::ALLOCA\0"
79 "HexagonISD::AT_GOT\0"
80 "HexagonISD::AT_PCREL\0"
81 "HexagonISD::BARRIER\0"
82 "HexagonISD::CALL\0"
83 "HexagonISD::CALLnr\0"
84 "HexagonISD::COMBINE\0"
85 "HexagonISD::CONST32\0"
86 "HexagonISD::CONST32_GP\0"
87 "HexagonISD::CP\0"
88 "HexagonISD::DCFETCH\0"
89 "HexagonISD::EH_RETURN\0"
90 "HexagonISD::EXTRACTU\0"
91 "HexagonISD::INSERT\0"
92 "HexagonISD::JT\0"
93 "HexagonISD::MFSHL\0"
94 "HexagonISD::MFSHR\0"
95 "HexagonISD::MULHUS\0"
96 "HexagonISD::PFALSE\0"
97 "HexagonISD::PTRUE\0"
98 "HexagonISD::QCAT\0"
99 "HexagonISD::QFALSE\0"
100 "HexagonISD::QTRUE\0"
101 "HexagonISD::RET_GLUE\0"
102 "HexagonISD::SMUL_LOHI\0"
103 "HexagonISD::SSAT\0"
104 "HexagonISD::SUBC\0"
105 "HexagonISD::TC_RETURN\0"
106 "HexagonISD::THREAD_POINTER\0"
107 "HexagonISD::TSTBIT\0"
108 "HexagonISD::UMUL_LOHI\0"
109 "HexagonISD::USAT\0"
110 "HexagonISD::USMUL_LOHI\0"
111 "HexagonISD::VALIGN\0"
112 "HexagonISD::VALIGNADDR\0"
113 "HexagonISD::VASL\0"
114 "HexagonISD::VASR\0"
115 "HexagonISD::VEXTRACTW\0"
116 "HexagonISD::VINSERTW0\0"
117 "HexagonISD::VLSR\0"
118 ;
119#ifdef __GNUC__
120#pragma GCC diagnostic pop
121#endif
122
123static constexpr llvm::StringTable
124HexagonSDNodeNames = HexagonSDNodeNamesStorage;
125
126static const VTByHwModePair HexagonVTByHwModeTable[] = {
127 /* dummy */ {0, MVT::INVALID_SIMPLE_VALUE_TYPE}
128};
129
130static const SDTypeConstraint HexagonSDTypeConstraints[] = {
131 /* 0 */ {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i1},
132 /* 3 */ {SDTCisPtrTy, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
133 /* 6 */ {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i32},
134 /* 9 */ {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 0, 0, 0, MVT::i32},
135 /* 12 */ {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i32}, {SDTCisVT, 0, 0, 0, MVT::i64},
136 /* 15 */ {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisPtrTy, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
137 /* 17 */ {SDTCisVT, 4, 0, 0, MVT::i1}, {SDTCisSameAs, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 2, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVT, 1, 0, 0, MVT::i1}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
138 /* 22 */ {SDTCisVT, 2, 0, 0, MVT::Other}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
139 /* 25 */ {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
140 /* 28 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisSameAs, 1, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
141 /* 32 */ {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisInt, 1, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
142 /* 37 */ {SDTCisVT, 2, 0, 0, MVT::i32}, {SDTCisVec, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
143 /* 40 */ {SDTCisVT, 4, 0, 0, MVT::i32}, {SDTCisVT, 3, 0, 0, MVT::i32}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
144 /* 45 */ {SDTCisSameNumEltsAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 3, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
145 /* 50 */ {SDTCisInt, 0, 0, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 3, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 2, 0, MVT::INVALID_SIMPLE_VALUE_TYPE}, {SDTCisSameAs, 0, 1, 0, MVT::INVALID_SIMPLE_VALUE_TYPE},
146};
147
148static const SDNodeDesc HexagonSDNodeDescs[] = {
149 {2, 3, 0, 0, 0, 1, 17, 5}, // ADDC
150 {1, 2, 0|1<<SDNPHasChain, 0, 0, 18, 4, 2}, // ALLOCA
151 {1, 3, 0, 0, 0, 37, 6, 3}, // AT_GOT
152 {1, 1, 0, 0, 0, 56, 4, 2}, // AT_PCREL
153 {0, 0, 0|1<<SDNPHasChain, 0, 0, 77, 0, 0}, // BARRIER
154 {0, 1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 97, 5, 1}, // CALL
155 {0, 1, 0|1<<SDNPHasChain|1<<SDNPOutGlue|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 114, 5, 1}, // CALLnr
156 {1, 2, 0, 0, 0, 133, 12, 3}, // COMBINE
157 {1, 1, 0, 0, 0, 153, 3, 3}, // CONST32
158 {1, 1, 0, 0, 0, 173, 3, 3}, // CONST32_GP
159 {1, 1, 0, 0, 0, 196, 35, 2}, // CP
160 {0, 2, 0|1<<SDNPHasChain, 0, 0, 211, 15, 2}, // DCFETCH
161 {0, 0, 0|1<<SDNPHasChain, 0, 0, 231, 0, 0}, // EH_RETURN
162 {1, 3, 0, 0, 0, 253, 32, 5}, // EXTRACTU
163 {1, 4, 0, 0, 0, 274, 40, 5}, // INSERT
164 {1, 1, 0, 0, 0, 293, 35, 2}, // JT
165 {1, 3, 0, 0, 0, 308, 45, 5}, // MFSHL
166 {1, 3, 0, 0, 0, 326, 45, 5}, // MFSHR
167 {1, 2, 0, 0, 0, 344, 42, 3}, // MULHUS
168 {1, 0, 0, 0, 0, 363, 27, 1}, // PFALSE
169 {1, 0, 0, 0, 0, 382, 27, 1}, // PTRUE
170 {1, 2, 0, 0, 0, 400, 29, 3}, // QCAT
171 {1, 0, 0, 0, 0, 417, 27, 1}, // QFALSE
172 {1, 0, 0, 0, 0, 436, 27, 1}, // QTRUE
173 {0, 0, 0|1<<SDNPHasChain|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 454, 0, 0}, // RET_GLUE
174 {2, 2, 0, 0, 0, 475, 50, 4}, // SMUL_LOHI
175 {1, 2, 0, 0, 0, 497, 22, 3}, // SSAT
176 {2, 3, 0, 0, 0, 514, 17, 5}, // SUBC
177 {0, 1, 0|1<<SDNPHasChain|1<<SDNPOptInGlue|1<<SDNPVariadic, 0, 0, 531, 5, 1}, // TC_RETURN
178 {1, 0, 0, 0, 0, 553, 16, 1}, // THREAD_POINTER
179 {1, 2, 0, 0, 0, 580, 0, 3}, // TSTBIT
180 {2, 2, 0, 0, 0, 599, 50, 4}, // UMUL_LOHI
181 {1, 2, 0, 0, 0, 621, 22, 3}, // USAT
182 {2, 2, 0, 0, 0, 638, 50, 4}, // USMUL_LOHI
183 {1, 3, 0, 0, 0, 661, 28, 4}, // VALIGN
184 {1, 1, 0, 0, 0, 680, 35, 2}, // VALIGNADDR
185 {1, 2, 0, 0, 0, 703, 37, 3}, // VASL
186 {1, 2, 0, 0, 0, 720, 37, 3}, // VASR
187 {1, 2, 0, 0, 0, 737, 9, 3}, // VEXTRACTW
188 {1, 2, 0, 0, 0, 759, 25, 3}, // VINSERTW0
189 {1, 2, 0, 0, 0, 781, 37, 3}, // VLSR
190};
191
192static const SDNodeInfo HexagonGenSDNodeInfo(
193 /*NumOpcodes=*/41, HexagonSDNodeDescs, HexagonSDNodeNames,
194 HexagonVTByHwModeTable, HexagonSDTypeConstraints);
195
196} // namespace llvm
197
198#endif // GET_SDNODE_DESC
199
200