1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target Register and Register Classes Information *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9namespace llvm {
10
11extern const MCRegisterClass PPCMCRegisterClasses[];
12
13static const MVT::SimpleValueType VTLists[] = {
14 /* 0 */ MVT::i1, MVT::Other,
15 /* 2 */ MVT::i32, MVT::Other,
16 /* 4 */ MVT::i64, MVT::Other,
17 /* 6 */ MVT::i32, MVT::f32, MVT::Other,
18 /* 9 */ MVT::i64, MVT::f64, MVT::Other,
19 /* 12 */ MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v1i128, MVT::v4f32, MVT::v2f64, MVT::f128, MVT::Other,
20 /* 21 */ MVT::ppcf128, MVT::Other,
21 /* 23 */ MVT::v128i1, MVT::Other,
22 /* 25 */ MVT::v256i1, MVT::Other,
23 /* 27 */ MVT::v512i1, MVT::Other,
24 /* 29 */ MVT::v1024i1, MVT::Other,
25 /* 31 */ MVT::v2048i1, MVT::Other,
26 /* 33 */ MVT::v4i32, MVT::v4f32, MVT::v2f64, MVT::v2i64, MVT::Other,
27 /* 38 */ MVT::Untyped, MVT::Other,
28};
29
30static const char *SubRegIndexNameTable[] = { "sub_32", "sub_32_hi_phony", "sub_64", "sub_64_hi_phony", "sub_dmr0", "sub_dmr1", "sub_dmrrow0", "sub_dmrrow1", "sub_dmrrowp0", "sub_dmrrowp1", "sub_eq", "sub_fp0", "sub_fp1", "sub_gp8_x0", "sub_gp8_x1", "sub_gt", "sub_lt", "sub_pair0", "sub_pair1", "sub_un", "sub_vsx0", "sub_vsx1", "sub_wacc_hi", "sub_wacc_lo", "sub_vsx1_then_sub_64", "sub_vsx1_then_sub_64_hi_phony", "sub_pair1_then_sub_64", "sub_pair1_then_sub_64_hi_phony", "sub_pair1_then_sub_vsx0", "sub_pair1_then_sub_vsx1", "sub_pair1_then_sub_vsx1_then_sub_64", "sub_pair1_then_sub_vsx1_then_sub_64_hi_phony", "sub_dmrrowp1_then_sub_dmrrow0", "sub_dmrrowp1_then_sub_dmrrow1", "sub_wacc_hi_then_sub_dmrrow0", "sub_wacc_hi_then_sub_dmrrow1", "sub_wacc_hi_then_sub_dmrrowp0", "sub_wacc_hi_then_sub_dmrrowp1", "sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0", "sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1", "sub_dmr1_then_sub_dmrrow0", "sub_dmr1_then_sub_dmrrow1", "sub_dmr1_then_sub_dmrrowp0", "sub_dmr1_then_sub_dmrrowp1", "sub_dmr1_then_sub_wacc_hi", "sub_dmr1_then_sub_wacc_lo", "sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0", "sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1", "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0", "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1", "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0", "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1", "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0", "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1", "sub_gp8_x1_then_sub_32", "" };
31
32static const TargetRegisterInfo::SubRegCoveredBits SubRegIdxRangeTable[] = {
33 { .Offset: 65535, .Size: 65535 },
34 { .Offset: 0, .Size: 32 }, // sub_32
35 { .Offset: 32, .Size: 32 }, // sub_32_hi_phony
36 { .Offset: 0, .Size: 64 }, // sub_64
37 { .Offset: 64, .Size: 64 }, // sub_64_hi_phony
38 { .Offset: 0, .Size: 1024 }, // sub_dmr0
39 { .Offset: 1024, .Size: 1024 }, // sub_dmr1
40 { .Offset: 0, .Size: 128 }, // sub_dmrrow0
41 { .Offset: 128, .Size: 128 }, // sub_dmrrow1
42 { .Offset: 0, .Size: 256 }, // sub_dmrrowp0
43 { .Offset: 256, .Size: 256 }, // sub_dmrrowp1
44 { .Offset: 2, .Size: 1 }, // sub_eq
45 { .Offset: 0, .Size: 64 }, // sub_fp0
46 { .Offset: 64, .Size: 64 }, // sub_fp1
47 { .Offset: 0, .Size: 64 }, // sub_gp8_x0
48 { .Offset: 64, .Size: 64 }, // sub_gp8_x1
49 { .Offset: 1, .Size: 1 }, // sub_gt
50 { .Offset: 0, .Size: 1 }, // sub_lt
51 { .Offset: 0, .Size: 256 }, // sub_pair0
52 { .Offset: 256, .Size: 256 }, // sub_pair1
53 { .Offset: 3, .Size: 1 }, // sub_un
54 { .Offset: 0, .Size: 128 }, // sub_vsx0
55 { .Offset: 128, .Size: 128 }, // sub_vsx1
56 { .Offset: 512, .Size: 512 }, // sub_wacc_hi
57 { .Offset: 0, .Size: 512 }, // sub_wacc_lo
58 { .Offset: 128, .Size: 64 }, // sub_vsx1_then_sub_64
59 { .Offset: 192, .Size: 64 }, // sub_vsx1_then_sub_64_hi_phony
60 { .Offset: 256, .Size: 64 }, // sub_pair1_then_sub_64
61 { .Offset: 320, .Size: 64 }, // sub_pair1_then_sub_64_hi_phony
62 { .Offset: 256, .Size: 128 }, // sub_pair1_then_sub_vsx0
63 { .Offset: 384, .Size: 128 }, // sub_pair1_then_sub_vsx1
64 { .Offset: 384, .Size: 64 }, // sub_pair1_then_sub_vsx1_then_sub_64
65 { .Offset: 448, .Size: 64 }, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
66 { .Offset: 256, .Size: 128 }, // sub_dmrrowp1_then_sub_dmrrow0
67 { .Offset: 384, .Size: 128 }, // sub_dmrrowp1_then_sub_dmrrow1
68 { .Offset: 512, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrow0
69 { .Offset: 640, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrow1
70 { .Offset: 512, .Size: 256 }, // sub_wacc_hi_then_sub_dmrrowp0
71 { .Offset: 768, .Size: 256 }, // sub_wacc_hi_then_sub_dmrrowp1
72 { .Offset: 768, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
73 { .Offset: 896, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
74 { .Offset: 1024, .Size: 128 }, // sub_dmr1_then_sub_dmrrow0
75 { .Offset: 1152, .Size: 128 }, // sub_dmr1_then_sub_dmrrow1
76 { .Offset: 1024, .Size: 256 }, // sub_dmr1_then_sub_dmrrowp0
77 { .Offset: 1280, .Size: 256 }, // sub_dmr1_then_sub_dmrrowp1
78 { .Offset: 1536, .Size: 512 }, // sub_dmr1_then_sub_wacc_hi
79 { .Offset: 1024, .Size: 512 }, // sub_dmr1_then_sub_wacc_lo
80 { .Offset: 1280, .Size: 128 }, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
81 { .Offset: 1408, .Size: 128 }, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
82 { .Offset: 1536, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
83 { .Offset: 1664, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
84 { .Offset: 1536, .Size: 256 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
85 { .Offset: 1792, .Size: 256 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
86 { .Offset: 1792, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
87 { .Offset: 1920, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
88 { .Offset: 64, .Size: 32 }, // sub_gp8_x1_then_sub_32
89 { .Offset: 65535, .Size: 65535 },
90 { .Offset: 0, .Size: 32 }, // sub_32
91 { .Offset: 32, .Size: 32 }, // sub_32_hi_phony
92 { .Offset: 0, .Size: 64 }, // sub_64
93 { .Offset: 64, .Size: 64 }, // sub_64_hi_phony
94 { .Offset: 0, .Size: 1024 }, // sub_dmr0
95 { .Offset: 1024, .Size: 1024 }, // sub_dmr1
96 { .Offset: 0, .Size: 128 }, // sub_dmrrow0
97 { .Offset: 128, .Size: 128 }, // sub_dmrrow1
98 { .Offset: 0, .Size: 256 }, // sub_dmrrowp0
99 { .Offset: 256, .Size: 256 }, // sub_dmrrowp1
100 { .Offset: 2, .Size: 1 }, // sub_eq
101 { .Offset: 0, .Size: 64 }, // sub_fp0
102 { .Offset: 64, .Size: 64 }, // sub_fp1
103 { .Offset: 0, .Size: 64 }, // sub_gp8_x0
104 { .Offset: 64, .Size: 64 }, // sub_gp8_x1
105 { .Offset: 1, .Size: 1 }, // sub_gt
106 { .Offset: 0, .Size: 1 }, // sub_lt
107 { .Offset: 0, .Size: 256 }, // sub_pair0
108 { .Offset: 256, .Size: 256 }, // sub_pair1
109 { .Offset: 3, .Size: 1 }, // sub_un
110 { .Offset: 0, .Size: 128 }, // sub_vsx0
111 { .Offset: 128, .Size: 128 }, // sub_vsx1
112 { .Offset: 512, .Size: 512 }, // sub_wacc_hi
113 { .Offset: 0, .Size: 512 }, // sub_wacc_lo
114 { .Offset: 128, .Size: 64 }, // sub_vsx1_then_sub_64
115 { .Offset: 192, .Size: 64 }, // sub_vsx1_then_sub_64_hi_phony
116 { .Offset: 256, .Size: 64 }, // sub_pair1_then_sub_64
117 { .Offset: 320, .Size: 64 }, // sub_pair1_then_sub_64_hi_phony
118 { .Offset: 256, .Size: 128 }, // sub_pair1_then_sub_vsx0
119 { .Offset: 384, .Size: 128 }, // sub_pair1_then_sub_vsx1
120 { .Offset: 384, .Size: 64 }, // sub_pair1_then_sub_vsx1_then_sub_64
121 { .Offset: 448, .Size: 64 }, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
122 { .Offset: 256, .Size: 128 }, // sub_dmrrowp1_then_sub_dmrrow0
123 { .Offset: 384, .Size: 128 }, // sub_dmrrowp1_then_sub_dmrrow1
124 { .Offset: 512, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrow0
125 { .Offset: 640, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrow1
126 { .Offset: 512, .Size: 256 }, // sub_wacc_hi_then_sub_dmrrowp0
127 { .Offset: 768, .Size: 256 }, // sub_wacc_hi_then_sub_dmrrowp1
128 { .Offset: 768, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
129 { .Offset: 896, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
130 { .Offset: 1024, .Size: 128 }, // sub_dmr1_then_sub_dmrrow0
131 { .Offset: 1152, .Size: 128 }, // sub_dmr1_then_sub_dmrrow1
132 { .Offset: 1024, .Size: 256 }, // sub_dmr1_then_sub_dmrrowp0
133 { .Offset: 1280, .Size: 256 }, // sub_dmr1_then_sub_dmrrowp1
134 { .Offset: 1536, .Size: 512 }, // sub_dmr1_then_sub_wacc_hi
135 { .Offset: 1024, .Size: 512 }, // sub_dmr1_then_sub_wacc_lo
136 { .Offset: 1280, .Size: 128 }, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
137 { .Offset: 1408, .Size: 128 }, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
138 { .Offset: 1536, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
139 { .Offset: 1664, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
140 { .Offset: 1536, .Size: 256 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
141 { .Offset: 1792, .Size: 256 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
142 { .Offset: 1792, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
143 { .Offset: 1920, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
144 { .Offset: 64, .Size: 32 }, // sub_gp8_x1_then_sub_32
145};
146
147
148static const LaneBitmask SubRegIndexLaneMaskTable[] = {
149 LaneBitmask::getAll(),
150 LaneBitmask(0x0000000000000001), // sub_32
151 LaneBitmask(0x0000000000000002), // sub_32_hi_phony
152 LaneBitmask(0x0000000000000004), // sub_64
153 LaneBitmask(0x0000000000000008), // sub_64_hi_phony
154 LaneBitmask(0x0000000000FC0030), // sub_dmr0
155 LaneBitmask(0x00000000FF000000), // sub_dmr1
156 LaneBitmask(0x0000000000000010), // sub_dmrrow0
157 LaneBitmask(0x0000000000000020), // sub_dmrrow1
158 LaneBitmask(0x0000000000000030), // sub_dmrrowp0
159 LaneBitmask(0x00000000000C0000), // sub_dmrrowp1
160 LaneBitmask(0x0000000000000040), // sub_eq
161 LaneBitmask(0x0000000000000080), // sub_fp0
162 LaneBitmask(0x0000000000000100), // sub_fp1
163 LaneBitmask(0x0000000000000001), // sub_gp8_x0
164 LaneBitmask(0x0000000100000000), // sub_gp8_x1
165 LaneBitmask(0x0000000000000200), // sub_gt
166 LaneBitmask(0x0000000000000400), // sub_lt
167 LaneBitmask(0x000000000000300C), // sub_pair0
168 LaneBitmask(0x000000000003C000), // sub_pair1
169 LaneBitmask(0x0000000000000800), // sub_un
170 LaneBitmask(0x000000000000000C), // sub_vsx0
171 LaneBitmask(0x0000000000003000), // sub_vsx1
172 LaneBitmask(0x0000000000F00000), // sub_wacc_hi
173 LaneBitmask(0x00000000000C0030), // sub_wacc_lo
174 LaneBitmask(0x0000000000001000), // sub_vsx1_then_sub_64
175 LaneBitmask(0x0000000000002000), // sub_vsx1_then_sub_64_hi_phony
176 LaneBitmask(0x0000000000004000), // sub_pair1_then_sub_64
177 LaneBitmask(0x0000000000008000), // sub_pair1_then_sub_64_hi_phony
178 LaneBitmask(0x000000000000C000), // sub_pair1_then_sub_vsx0
179 LaneBitmask(0x0000000000030000), // sub_pair1_then_sub_vsx1
180 LaneBitmask(0x0000000000010000), // sub_pair1_then_sub_vsx1_then_sub_64
181 LaneBitmask(0x0000000000020000), // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
182 LaneBitmask(0x0000000000040000), // sub_dmrrowp1_then_sub_dmrrow0
183 LaneBitmask(0x0000000000080000), // sub_dmrrowp1_then_sub_dmrrow1
184 LaneBitmask(0x0000000000100000), // sub_wacc_hi_then_sub_dmrrow0
185 LaneBitmask(0x0000000000200000), // sub_wacc_hi_then_sub_dmrrow1
186 LaneBitmask(0x0000000000300000), // sub_wacc_hi_then_sub_dmrrowp0
187 LaneBitmask(0x0000000000C00000), // sub_wacc_hi_then_sub_dmrrowp1
188 LaneBitmask(0x0000000000400000), // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
189 LaneBitmask(0x0000000000800000), // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
190 LaneBitmask(0x0000000001000000), // sub_dmr1_then_sub_dmrrow0
191 LaneBitmask(0x0000000002000000), // sub_dmr1_then_sub_dmrrow1
192 LaneBitmask(0x0000000003000000), // sub_dmr1_then_sub_dmrrowp0
193 LaneBitmask(0x000000000C000000), // sub_dmr1_then_sub_dmrrowp1
194 LaneBitmask(0x00000000F0000000), // sub_dmr1_then_sub_wacc_hi
195 LaneBitmask(0x000000000F000000), // sub_dmr1_then_sub_wacc_lo
196 LaneBitmask(0x0000000004000000), // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
197 LaneBitmask(0x0000000008000000), // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
198 LaneBitmask(0x0000000010000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
199 LaneBitmask(0x0000000020000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
200 LaneBitmask(0x0000000030000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
201 LaneBitmask(0x00000000C0000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
202 LaneBitmask(0x0000000040000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
203 LaneBitmask(0x0000000080000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
204 LaneBitmask(0x0000000100000000), // sub_gp8_x1_then_sub_32
205 };
206
207
208
209static const TargetRegisterInfo::RegClassInfo RegClassInfos[] = {
210 // Mode = 0 (Default)
211 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 7 }, // VSSRC
212 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 6 }, // GPRC
213 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 6 }, // GPRC_NOR0
214 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 6 }, // GPRC_and_GPRC_NOR0
215 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 0 }, // CRBITRC
216 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 7 }, // F4RC
217 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 6 }, // GPRC32
218 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 2 }, // CRRC
219 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 2 }, // CARRYRC
220 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 2 }, // CTRRC
221 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 2 }, // LRRC
222 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 2 }, // VRSAVERC
223 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 9 }, // SPILLTOVSRRC
224 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // VSFRC
225 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 4 }, // G8RC
226 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 4 }, // G8RC_NOX0
227 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_VSFRC
228 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 4 }, // G8RC_and_G8RC_NOX0
229 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // F8RC
230 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // FHRC
231 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // SPERC
232 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // VFHRC
233 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // VFRC
234 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // SPERC_with_sub_32_in_GPRC_NOR0
235 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_VFRC
236 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_F4RC
237 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 4 }, // CTRRC8
238 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 4 }, // LR8RC
239 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 23 }, // DMRROWRC
240 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 33 }, // VSRC
241 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 33 }, // VSRC_with_sub_64_in_SPILLTOVSRRC
242 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 12 }, // VRRC
243 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 33 }, // VSLRC
244 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 12 }, // VRRC_with_sub_64_in_SPILLTOVSRRC
245 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 21 }, // FpRC
246 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 38 }, // G8pRC
247 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 38 }, // G8pRC_with_sub_32_in_GPRC_NOR0
248 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 33 }, // VSLRC_with_sub_64_in_SPILLTOVSRRC
249 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 21 }, // FpRC_with_sub_fp0_in_SPILLTOVSRRC
250 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // DMRROWpRC
251 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC
252 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC
253 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_F4RC
254 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_VFRC
255 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
256 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
257 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // ACCRC
258 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // UACCRC
259 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // WACCRC
260 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // WACC_HIRC
261 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // ACCRC_with_sub_64_in_SPILLTOVSRRC
262 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // UACCRC_with_sub_64_in_SPILLTOVSRRC
263 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
264 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
265 { .RegSize: 1024, .SpillSize: 1024, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 29 }, // DMRRC
266 { .RegSize: 2048, .SpillSize: 2048, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 31 }, // DMRpRC
267 // Mode = 1 (PPC64)
268 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 7 }, // VSSRC
269 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 6 }, // GPRC
270 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 6 }, // GPRC_NOR0
271 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 6 }, // GPRC_and_GPRC_NOR0
272 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 0 }, // CRBITRC
273 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 7 }, // F4RC
274 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 6 }, // GPRC32
275 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 2 }, // CRRC
276 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 2 }, // CARRYRC
277 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 2 }, // CTRRC
278 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 2 }, // LRRC
279 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 2 }, // VRSAVERC
280 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 9 }, // SPILLTOVSRRC
281 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // VSFRC
282 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 4 }, // G8RC
283 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 4 }, // G8RC_NOX0
284 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_VSFRC
285 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 4 }, // G8RC_and_G8RC_NOX0
286 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // F8RC
287 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // FHRC
288 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // SPERC
289 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // VFHRC
290 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // VFRC
291 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // SPERC_with_sub_32_in_GPRC_NOR0
292 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_VFRC
293 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_F4RC
294 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 4 }, // CTRRC8
295 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 4 }, // LR8RC
296 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 23 }, // DMRROWRC
297 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 33 }, // VSRC
298 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 33 }, // VSRC_with_sub_64_in_SPILLTOVSRRC
299 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 12 }, // VRRC
300 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 33 }, // VSLRC
301 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 12 }, // VRRC_with_sub_64_in_SPILLTOVSRRC
302 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 21 }, // FpRC
303 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 38 }, // G8pRC
304 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 38 }, // G8pRC_with_sub_32_in_GPRC_NOR0
305 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 33 }, // VSLRC_with_sub_64_in_SPILLTOVSRRC
306 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 21 }, // FpRC_with_sub_fp0_in_SPILLTOVSRRC
307 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // DMRROWpRC
308 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC
309 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC
310 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_F4RC
311 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_VFRC
312 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
313 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
314 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // ACCRC
315 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // UACCRC
316 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // WACCRC
317 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // WACC_HIRC
318 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // ACCRC_with_sub_64_in_SPILLTOVSRRC
319 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // UACCRC_with_sub_64_in_SPILLTOVSRRC
320 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
321 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
322 { .RegSize: 1024, .SpillSize: 1024, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 29 }, // DMRRC
323 { .RegSize: 2048, .SpillSize: 2048, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 31 }, // DMRpRC
324};
325static const uint32_t VSSRCSubClassMask[] = {
326 0x03452021, 0x00000000,
327 0xe0000000, 0x003cff23, // sub_64
328 0x00000000, 0x00000044, // sub_fp0
329 0x00000000, 0x00000044, // sub_fp1
330 0x00000000, 0x003cff00, // sub_vsx1_then_sub_64
331 0x00000000, 0x003cc000, // sub_pair1_then_sub_64
332 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1_then_sub_64
333};
334
335static const uint32_t GPRCSubClassMask[] = {
336 0x0000000a, 0x00000000,
337 0x00924000, 0x00000018, // sub_32
338 0x00000000, 0x00000018, // sub_gp8_x1_then_sub_32
339};
340
341static const uint32_t GPRC_NOR0SubClassMask[] = {
342 0x0000000c, 0x00000000,
343 0x00828000, 0x00000010, // sub_32
344 0x00000000, 0x00000018, // sub_gp8_x1_then_sub_32
345};
346
347static const uint32_t GPRC_and_GPRC_NOR0SubClassMask[] = {
348 0x00000008, 0x00000000,
349 0x00820000, 0x00000010, // sub_32
350 0x00000000, 0x00000018, // sub_gp8_x1_then_sub_32
351};
352
353static const uint32_t CRBITRCSubClassMask[] = {
354 0x00000010, 0x00000000,
355 0x00000080, 0x00000000, // sub_eq
356 0x00000080, 0x00000000, // sub_gt
357 0x00000080, 0x00000000, // sub_lt
358 0x00000080, 0x00000000, // sub_un
359};
360
361static const uint32_t F4RCSubClassMask[] = {
362 0x02040020, 0x00000000,
363 0x00000000, 0x003ce421, // sub_64
364 0x00000000, 0x00000044, // sub_fp0
365 0x00000000, 0x00000044, // sub_fp1
366 0x00000000, 0x003ce400, // sub_vsx1_then_sub_64
367 0x00000000, 0x003cc000, // sub_pair1_then_sub_64
368 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1_then_sub_64
369};
370
371static const uint32_t GPRC32SubClassMask[] = {
372 0x00000040, 0x00000000,
373};
374
375static const uint32_t CRRCSubClassMask[] = {
376 0x00000080, 0x00000000,
377};
378
379static const uint32_t CARRYRCSubClassMask[] = {
380 0x00000100, 0x00000000,
381};
382
383static const uint32_t CTRRCSubClassMask[] = {
384 0x00000200, 0x00000000,
385};
386
387static const uint32_t LRRCSubClassMask[] = {
388 0x00000400, 0x00000000,
389};
390
391static const uint32_t VRSAVERCSubClassMask[] = {
392 0x00000800, 0x00000000,
393};
394
395static const uint32_t SPILLTOVSRRCSubClassMask[] = {
396 0x03035000, 0x00000000,
397 0x40000000, 0x003c3222, // sub_64
398 0x00000000, 0x00000040, // sub_fp0
399 0x00000000, 0x00000040, // sub_fp1
400 0x00000000, 0x00000018, // sub_gp8_x0
401 0x00000000, 0x00000018, // sub_gp8_x1
402 0x00000000, 0x003c3200, // sub_vsx1_then_sub_64
403 0x00000000, 0x00300000, // sub_pair1_then_sub_64
404 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx1_then_sub_64
405};
406
407static const uint32_t VSFRCSubClassMask[] = {
408 0x03452000, 0x00000000,
409 0xe0000000, 0x003cff23, // sub_64
410 0x00000000, 0x00000044, // sub_fp0
411 0x00000000, 0x00000044, // sub_fp1
412 0x00000000, 0x003cff00, // sub_vsx1_then_sub_64
413 0x00000000, 0x003cc000, // sub_pair1_then_sub_64
414 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1_then_sub_64
415};
416
417static const uint32_t G8RCSubClassMask[] = {
418 0x00024000, 0x00000000,
419 0x00000000, 0x00000018, // sub_gp8_x0
420 0x00000000, 0x00000018, // sub_gp8_x1
421};
422
423static const uint32_t G8RC_NOX0SubClassMask[] = {
424 0x00028000, 0x00000000,
425 0x00000000, 0x00000010, // sub_gp8_x0
426 0x00000000, 0x00000018, // sub_gp8_x1
427};
428
429static const uint32_t SPILLTOVSRRC_and_VSFRCSubClassMask[] = {
430 0x03010000, 0x00000000,
431 0x40000000, 0x003c3222, // sub_64
432 0x00000000, 0x00000040, // sub_fp0
433 0x00000000, 0x00000040, // sub_fp1
434 0x00000000, 0x003c3200, // sub_vsx1_then_sub_64
435 0x00000000, 0x00300000, // sub_pair1_then_sub_64
436 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx1_then_sub_64
437};
438
439static const uint32_t G8RC_and_G8RC_NOX0SubClassMask[] = {
440 0x00020000, 0x00000000,
441 0x00000000, 0x00000010, // sub_gp8_x0
442 0x00000000, 0x00000018, // sub_gp8_x1
443};
444
445static const uint32_t F8RCSubClassMask[] = {
446 0x02040000, 0x00000000,
447 0x00000000, 0x003ce421, // sub_64
448 0x00000000, 0x00000044, // sub_fp0
449 0x00000000, 0x00000044, // sub_fp1
450 0x00000000, 0x003ce400, // sub_vsx1_then_sub_64
451 0x00000000, 0x003cc000, // sub_pair1_then_sub_64
452 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1_then_sub_64
453};
454
455static const uint32_t FHRCSubClassMask[] = {
456 0x00080000, 0x00000000,
457};
458
459static const uint32_t SPERCSubClassMask[] = {
460 0x00900000, 0x00000000,
461};
462
463static const uint32_t VFHRCSubClassMask[] = {
464 0x00200000, 0x00000000,
465};
466
467static const uint32_t VFRCSubClassMask[] = {
468 0x01400000, 0x00000000,
469 0x80000000, 0x00001802, // sub_64
470 0x00000000, 0x00001800, // sub_vsx1_then_sub_64
471};
472
473static const uint32_t SPERC_with_sub_32_in_GPRC_NOR0SubClassMask[] = {
474 0x00800000, 0x00000000,
475};
476
477static const uint32_t SPILLTOVSRRC_and_VFRCSubClassMask[] = {
478 0x01000000, 0x00000000,
479 0x00000000, 0x00001002, // sub_64
480 0x00000000, 0x00001000, // sub_vsx1_then_sub_64
481};
482
483static const uint32_t SPILLTOVSRRC_and_F4RCSubClassMask[] = {
484 0x02000000, 0x00000000,
485 0x00000000, 0x003c2020, // sub_64
486 0x00000000, 0x00000040, // sub_fp0
487 0x00000000, 0x00000040, // sub_fp1
488 0x00000000, 0x003c2000, // sub_vsx1_then_sub_64
489 0x00000000, 0x00300000, // sub_pair1_then_sub_64
490 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx1_then_sub_64
491};
492
493static const uint32_t CTRRC8SubClassMask[] = {
494 0x04000000, 0x00000000,
495};
496
497static const uint32_t LR8RCSubClassMask[] = {
498 0x08000000, 0x00000000,
499};
500
501static const uint32_t DMRROWRCSubClassMask[] = {
502 0x10000000, 0x00000000,
503 0x00000000, 0x00c30080, // sub_dmrrow0
504 0x00000000, 0x00c30080, // sub_dmrrow1
505 0x00000000, 0x00c30000, // sub_dmrrowp1_then_sub_dmrrow0
506 0x00000000, 0x00c30000, // sub_dmrrowp1_then_sub_dmrrow1
507 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrow0
508 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrow1
509 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
510 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
511 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrow0
512 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrow1
513 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
514 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
515 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
516 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
517 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
518 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
519};
520
521static const uint32_t VSRCSubClassMask[] = {
522 0xe0000000, 0x00000023,
523 0x00000000, 0x003cff00, // sub_vsx0
524 0x00000000, 0x003cff00, // sub_vsx1
525 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx0
526 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1
527};
528
529static const uint32_t VSRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
530 0x40000000, 0x00000022,
531 0x00000000, 0x003c3200, // sub_vsx0
532 0x00000000, 0x003c3200, // sub_vsx1
533 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx0
534 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx1
535};
536
537static const uint32_t VRRCSubClassMask[] = {
538 0x80000000, 0x00000002,
539 0x00000000, 0x00001800, // sub_vsx0
540 0x00000000, 0x00001800, // sub_vsx1
541};
542
543static const uint32_t VSLRCSubClassMask[] = {
544 0x00000000, 0x00000021,
545 0x00000000, 0x003ce400, // sub_vsx0
546 0x00000000, 0x003ce400, // sub_vsx1
547 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx0
548 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1
549};
550
551static const uint32_t VRRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
552 0x00000000, 0x00000002,
553 0x00000000, 0x00001000, // sub_vsx0
554 0x00000000, 0x00001000, // sub_vsx1
555};
556
557static const uint32_t FpRCSubClassMask[] = {
558 0x00000000, 0x00000044,
559};
560
561static const uint32_t G8pRCSubClassMask[] = {
562 0x00000000, 0x00000018,
563};
564
565static const uint32_t G8pRC_with_sub_32_in_GPRC_NOR0SubClassMask[] = {
566 0x00000000, 0x00000010,
567};
568
569static const uint32_t VSLRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
570 0x00000000, 0x00000020,
571 0x00000000, 0x003c2000, // sub_vsx0
572 0x00000000, 0x003c2000, // sub_vsx1
573 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx0
574 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx1
575};
576
577static const uint32_t FpRC_with_sub_fp0_in_SPILLTOVSRRCSubClassMask[] = {
578 0x00000000, 0x00000040,
579};
580
581static const uint32_t DMRROWpRCSubClassMask[] = {
582 0x00000000, 0x00000080,
583 0x00000000, 0x00c30000, // sub_dmrrowp0
584 0x00000000, 0x00c30000, // sub_dmrrowp1
585 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrowp0
586 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrowp1
587 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrowp0
588 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrowp1
589 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
590 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
591};
592
593static const uint32_t VSRpRCSubClassMask[] = {
594 0x00000000, 0x00003f00,
595 0x00000000, 0x003cc000, // sub_pair0
596 0x00000000, 0x003cc000, // sub_pair1
597};
598
599static const uint32_t VSRpRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
600 0x00000000, 0x00003200,
601 0x00000000, 0x003c0000, // sub_pair0
602 0x00000000, 0x00300000, // sub_pair1
603};
604
605static const uint32_t VSRpRC_with_sub_64_in_F4RCSubClassMask[] = {
606 0x00000000, 0x00002400,
607 0x00000000, 0x003cc000, // sub_pair0
608 0x00000000, 0x003cc000, // sub_pair1
609};
610
611static const uint32_t VSRpRC_with_sub_64_in_VFRCSubClassMask[] = {
612 0x00000000, 0x00001800,
613};
614
615static const uint32_t VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCSubClassMask[] = {
616 0x00000000, 0x00001000,
617};
618
619static const uint32_t VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCSubClassMask[] = {
620 0x00000000, 0x00002000,
621 0x00000000, 0x003c0000, // sub_pair0
622 0x00000000, 0x00300000, // sub_pair1
623};
624
625static const uint32_t ACCRCSubClassMask[] = {
626 0x00000000, 0x00144000,
627};
628
629static const uint32_t UACCRCSubClassMask[] = {
630 0x00000000, 0x00288000,
631};
632
633static const uint32_t WACCRCSubClassMask[] = {
634 0x00000000, 0x00010000,
635 0x00000000, 0x00c00000, // sub_wacc_lo
636 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_lo
637};
638
639static const uint32_t WACC_HIRCSubClassMask[] = {
640 0x00000000, 0x00020000,
641 0x00000000, 0x00c00000, // sub_wacc_hi
642 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi
643};
644
645static const uint32_t ACCRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
646 0x00000000, 0x00140000,
647};
648
649static const uint32_t UACCRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
650 0x00000000, 0x00280000,
651};
652
653static const uint32_t ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
654 0x00000000, 0x00100000,
655};
656
657static const uint32_t UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
658 0x00000000, 0x00200000,
659};
660
661static const uint32_t DMRRCSubClassMask[] = {
662 0x00000000, 0x00400000,
663 0x00000000, 0x00800000, // sub_dmr0
664 0x00000000, 0x00800000, // sub_dmr1
665};
666
667static const uint32_t DMRpRCSubClassMask[] = {
668 0x00000000, 0x00800000,
669};
670
671static const uint16_t SuperRegIdxSeqs[] = {
672 /* 0 */ 5, 6, 0,
673 /* 3 */ 14, 15, 0,
674 /* 6 */ 18, 19, 0,
675 /* 9 */ 11, 16, 17, 20, 0,
676 /* 14 */ 21, 22, 0,
677 /* 17 */ 3, 25, 0,
678 /* 20 */ 21, 22, 29, 30, 0,
679 /* 25 */ 3, 12, 13, 25, 27, 31, 0,
680 /* 32 */ 3, 12, 13, 14, 15, 25, 27, 31, 0,
681 /* 41 */ 23, 45, 0,
682 /* 44 */ 24, 46, 0,
683 /* 47 */ 9, 10, 37, 38, 43, 44, 51, 52, 0,
684 /* 56 */ 7, 8, 33, 34, 35, 36, 39, 40, 41, 42, 47, 48, 49, 50, 53, 54, 0,
685 /* 73 */ 1, 55, 0,
686};
687
688static unsigned const GPRC_and_GPRC_NOR0Superclasses[] = {
689 PPC::GPRCRegClassID,
690 PPC::GPRC_NOR0RegClassID,
691};
692
693static unsigned const F4RCSuperclasses[] = {
694 PPC::VSSRCRegClassID,
695};
696
697static unsigned const VSFRCSuperclasses[] = {
698 PPC::VSSRCRegClassID,
699};
700
701static unsigned const G8RCSuperclasses[] = {
702 PPC::SPILLTOVSRRCRegClassID,
703};
704
705static unsigned const SPILLTOVSRRC_and_VSFRCSuperclasses[] = {
706 PPC::VSSRCRegClassID,
707 PPC::SPILLTOVSRRCRegClassID,
708 PPC::VSFRCRegClassID,
709};
710
711static unsigned const G8RC_and_G8RC_NOX0Superclasses[] = {
712 PPC::SPILLTOVSRRCRegClassID,
713 PPC::G8RCRegClassID,
714 PPC::G8RC_NOX0RegClassID,
715};
716
717static unsigned const F8RCSuperclasses[] = {
718 PPC::VSSRCRegClassID,
719 PPC::F4RCRegClassID,
720 PPC::VSFRCRegClassID,
721};
722
723static unsigned const VFRCSuperclasses[] = {
724 PPC::VSSRCRegClassID,
725 PPC::VSFRCRegClassID,
726};
727
728static unsigned const SPERC_with_sub_32_in_GPRC_NOR0Superclasses[] = {
729 PPC::SPERCRegClassID,
730};
731
732static unsigned const SPILLTOVSRRC_and_VFRCSuperclasses[] = {
733 PPC::VSSRCRegClassID,
734 PPC::SPILLTOVSRRCRegClassID,
735 PPC::VSFRCRegClassID,
736 PPC::SPILLTOVSRRC_and_VSFRCRegClassID,
737 PPC::VFRCRegClassID,
738};
739
740static unsigned const SPILLTOVSRRC_and_F4RCSuperclasses[] = {
741 PPC::VSSRCRegClassID,
742 PPC::F4RCRegClassID,
743 PPC::SPILLTOVSRRCRegClassID,
744 PPC::VSFRCRegClassID,
745 PPC::SPILLTOVSRRC_and_VSFRCRegClassID,
746 PPC::F8RCRegClassID,
747};
748
749static unsigned const VSRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
750 PPC::VSRCRegClassID,
751};
752
753static unsigned const VRRCSuperclasses[] = {
754 PPC::VSRCRegClassID,
755};
756
757static unsigned const VSLRCSuperclasses[] = {
758 PPC::VSRCRegClassID,
759};
760
761static unsigned const VRRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
762 PPC::VSRCRegClassID,
763 PPC::VSRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
764 PPC::VRRCRegClassID,
765};
766
767static unsigned const G8pRC_with_sub_32_in_GPRC_NOR0Superclasses[] = {
768 PPC::G8pRCRegClassID,
769};
770
771static unsigned const VSLRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
772 PPC::VSRCRegClassID,
773 PPC::VSRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
774 PPC::VSLRCRegClassID,
775};
776
777static unsigned const FpRC_with_sub_fp0_in_SPILLTOVSRRCSuperclasses[] = {
778 PPC::FpRCRegClassID,
779};
780
781static unsigned const VSRpRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
782 PPC::VSRpRCRegClassID,
783};
784
785static unsigned const VSRpRC_with_sub_64_in_F4RCSuperclasses[] = {
786 PPC::VSRpRCRegClassID,
787};
788
789static unsigned const VSRpRC_with_sub_64_in_VFRCSuperclasses[] = {
790 PPC::VSRpRCRegClassID,
791};
792
793static unsigned const VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCSuperclasses[] = {
794 PPC::VSRpRCRegClassID,
795 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
796 PPC::VSRpRC_with_sub_64_in_VFRCRegClassID,
797};
798
799static unsigned const VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCSuperclasses[] = {
800 PPC::VSRpRCRegClassID,
801 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
802 PPC::VSRpRC_with_sub_64_in_F4RCRegClassID,
803};
804
805static unsigned const ACCRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
806 PPC::ACCRCRegClassID,
807};
808
809static unsigned const UACCRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
810 PPC::UACCRCRegClassID,
811};
812
813static unsigned const ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
814 PPC::ACCRCRegClassID,
815 PPC::ACCRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
816};
817
818static unsigned const UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
819 PPC::UACCRCRegClassID,
820 PPC::UACCRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
821};
822
823
824static inline unsigned GPRCAltOrderSelect(const MachineFunction &MF, bool Rev) {
825 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
826 }
827
828static ArrayRef<MCPhysReg> GPRCGetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
829 static const MCPhysReg AltOrder1[] = { PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R31, PPC::R0, PPC::R1, PPC::FP, PPC::BP, PPC::R2 };
830 static const MCPhysReg AltOrder2[] = { PPC::R2, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R31, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R0, PPC::R1, PPC::FP, PPC::BP };
831 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::GPRCRegClassID];
832 const ArrayRef<MCPhysReg> Order[] = {
833 ArrayRef(MCR.begin(), MCR.getNumRegs()),
834 ArrayRef(AltOrder1),
835 ArrayRef(AltOrder2)
836 };
837 const unsigned Select = GPRCAltOrderSelect(MF, Rev);
838 assert(Select < 3);
839 return Order[Select];
840}
841
842static inline unsigned GPRC_NOR0AltOrderSelect(const MachineFunction &MF, bool Rev) {
843 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
844 }
845
846static ArrayRef<MCPhysReg> GPRC_NOR0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
847 static const MCPhysReg AltOrder1[] = { PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R31, PPC::R1, PPC::FP, PPC::BP, PPC::ZERO, PPC::R2 };
848 static const MCPhysReg AltOrder2[] = { PPC::R2, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R31, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R1, PPC::FP, PPC::BP, PPC::ZERO };
849 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::GPRC_NOR0RegClassID];
850 const ArrayRef<MCPhysReg> Order[] = {
851 ArrayRef(MCR.begin(), MCR.getNumRegs()),
852 ArrayRef(AltOrder1),
853 ArrayRef(AltOrder2)
854 };
855 const unsigned Select = GPRC_NOR0AltOrderSelect(MF, Rev);
856 assert(Select < 3);
857 return Order[Select];
858}
859
860static inline unsigned GPRC_and_GPRC_NOR0AltOrderSelect(const MachineFunction &MF, bool Rev) {
861 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
862 }
863
864static ArrayRef<MCPhysReg> GPRC_and_GPRC_NOR0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
865 static const MCPhysReg AltOrder1[] = { PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R31, PPC::R1, PPC::FP, PPC::BP, PPC::R2 };
866 static const MCPhysReg AltOrder2[] = { PPC::R2, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R31, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R1, PPC::FP, PPC::BP };
867 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::GPRC_and_GPRC_NOR0RegClassID];
868 const ArrayRef<MCPhysReg> Order[] = {
869 ArrayRef(MCR.begin(), MCR.getNumRegs()),
870 ArrayRef(AltOrder1),
871 ArrayRef(AltOrder2)
872 };
873 const unsigned Select = GPRC_and_GPRC_NOR0AltOrderSelect(MF, Rev);
874 assert(Select < 3);
875 return Order[Select];
876}
877
878static inline unsigned CRBITRCAltOrderSelect(const MachineFunction &MF, bool Rev) {
879 return MF.getSubtarget<PPCSubtarget>().isELFv2ABI() &&
880 MF.getInfo<PPCFunctionInfo>()->isNonVolatileCRDisabled();
881 }
882
883static ArrayRef<MCPhysReg> CRBITRCGetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
884 static const MCPhysReg AltOrder1[] = { PPC::CR5LT, PPC::CR5GT, PPC::CR5EQ, PPC::CR5UN, PPC::CR6LT, PPC::CR6GT, PPC::CR6EQ, PPC::CR6UN, PPC::CR7LT, PPC::CR7GT, PPC::CR7EQ, PPC::CR7UN, PPC::CR1LT, PPC::CR1GT, PPC::CR1EQ, PPC::CR1UN, PPC::CR0LT, PPC::CR0GT, PPC::CR0EQ, PPC::CR0UN };
885 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::CRBITRCRegClassID];
886 const ArrayRef<MCPhysReg> Order[] = {
887 ArrayRef(MCR.begin(), MCR.getNumRegs()),
888 ArrayRef(AltOrder1)
889 };
890 const unsigned Select = CRBITRCAltOrderSelect(MF, Rev);
891 assert(Select < 2);
892 return Order[Select];
893}
894
895static inline unsigned CRRCAltOrderSelect(const MachineFunction &MF, bool Rev) {
896 return MF.getSubtarget<PPCSubtarget>().isELFv2ABI() &&
897 MF.getInfo<PPCFunctionInfo>()->isNonVolatileCRDisabled();
898 }
899
900static ArrayRef<MCPhysReg> CRRCGetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
901 static const MCPhysReg AltOrder1[] = { PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7 };
902 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::CRRCRegClassID];
903 const ArrayRef<MCPhysReg> Order[] = {
904 ArrayRef(MCR.begin(), MCR.getNumRegs()),
905 ArrayRef(AltOrder1)
906 };
907 const unsigned Select = CRRCAltOrderSelect(MF, Rev);
908 assert(Select < 2);
909 return Order[Select];
910}
911
912static inline unsigned G8RCAltOrderSelect(const MachineFunction &MF, bool Rev) {
913 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
914 }
915
916static ArrayRef<MCPhysReg> G8RCGetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
917 static const MCPhysReg AltOrder1[] = { PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X31, PPC::X13, PPC::X0, PPC::X1, PPC::FP8, PPC::BP8, PPC::X2 };
918 static const MCPhysReg AltOrder2[] = { PPC::X2, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X31, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X13, PPC::X0, PPC::X1, PPC::FP8, PPC::BP8 };
919 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::G8RCRegClassID];
920 const ArrayRef<MCPhysReg> Order[] = {
921 ArrayRef(MCR.begin(), MCR.getNumRegs()),
922 ArrayRef(AltOrder1),
923 ArrayRef(AltOrder2)
924 };
925 const unsigned Select = G8RCAltOrderSelect(MF, Rev);
926 assert(Select < 3);
927 return Order[Select];
928}
929
930static inline unsigned G8RC_NOX0AltOrderSelect(const MachineFunction &MF, bool Rev) {
931 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
932 }
933
934static ArrayRef<MCPhysReg> G8RC_NOX0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
935 static const MCPhysReg AltOrder1[] = { PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X31, PPC::X13, PPC::X1, PPC::FP8, PPC::BP8, PPC::ZERO8, PPC::X2 };
936 static const MCPhysReg AltOrder2[] = { PPC::X2, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X31, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X13, PPC::X1, PPC::FP8, PPC::BP8, PPC::ZERO8 };
937 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::G8RC_NOX0RegClassID];
938 const ArrayRef<MCPhysReg> Order[] = {
939 ArrayRef(MCR.begin(), MCR.getNumRegs()),
940 ArrayRef(AltOrder1),
941 ArrayRef(AltOrder2)
942 };
943 const unsigned Select = G8RC_NOX0AltOrderSelect(MF, Rev);
944 assert(Select < 3);
945 return Order[Select];
946}
947
948static inline unsigned G8RC_and_G8RC_NOX0AltOrderSelect(const MachineFunction &MF, bool Rev) {
949 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
950 }
951
952static ArrayRef<MCPhysReg> G8RC_and_G8RC_NOX0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
953 static const MCPhysReg AltOrder1[] = { PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X31, PPC::X13, PPC::X1, PPC::FP8, PPC::BP8, PPC::X2 };
954 static const MCPhysReg AltOrder2[] = { PPC::X2, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X31, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X13, PPC::X1, PPC::FP8, PPC::BP8 };
955 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::G8RC_and_G8RC_NOX0RegClassID];
956 const ArrayRef<MCPhysReg> Order[] = {
957 ArrayRef(MCR.begin(), MCR.getNumRegs()),
958 ArrayRef(AltOrder1),
959 ArrayRef(AltOrder2)
960 };
961 const unsigned Select = G8RC_and_G8RC_NOX0AltOrderSelect(MF, Rev);
962 assert(Select < 3);
963 return Order[Select];
964}
965
966static inline unsigned G8pRCAltOrderSelect(const MachineFunction &MF, bool Rev) {
967 return MF.getSubtarget<PPCSubtarget>().is64BitELFABI();
968 }
969
970static ArrayRef<MCPhysReg> G8pRCGetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
971 static const MCPhysReg AltOrder1[] = { PPC::G8p2, PPC::G8p3, PPC::G8p4, PPC::G8p5, PPC::G8p14, PPC::G8p13, PPC::G8p12, PPC::G8p11, PPC::G8p10, PPC::G8p9, PPC::G8p8, PPC::G8p7, PPC::G8p15, PPC::G8p6, PPC::G8p0, PPC::G8p1 };
972 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::G8pRCRegClassID];
973 const ArrayRef<MCPhysReg> Order[] = {
974 ArrayRef(MCR.begin(), MCR.getNumRegs()),
975 ArrayRef(AltOrder1)
976 };
977 const unsigned Select = G8pRCAltOrderSelect(MF, Rev);
978 assert(Select < 2);
979 return Order[Select];
980}
981
982static inline unsigned G8pRC_with_sub_32_in_GPRC_NOR0AltOrderSelect(const MachineFunction &MF, bool Rev) {
983 return MF.getSubtarget<PPCSubtarget>().is64BitELFABI();
984 }
985
986static ArrayRef<MCPhysReg> G8pRC_with_sub_32_in_GPRC_NOR0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
987 static const MCPhysReg AltOrder1[] = { PPC::G8p2, PPC::G8p3, PPC::G8p4, PPC::G8p5, PPC::G8p14, PPC::G8p13, PPC::G8p12, PPC::G8p11, PPC::G8p10, PPC::G8p9, PPC::G8p8, PPC::G8p7, PPC::G8p15, PPC::G8p6, PPC::G8p1 };
988 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClassID];
989 const ArrayRef<MCPhysReg> Order[] = {
990 ArrayRef(MCR.begin(), MCR.getNumRegs()),
991 ArrayRef(AltOrder1)
992 };
993 const unsigned Select = G8pRC_with_sub_32_in_GPRC_NOR0AltOrderSelect(MF, Rev);
994 assert(Select < 2);
995 return Order[Select];
996}
997
998namespace PPC { // Register class instances
999 extern const TargetRegisterClass VSSRCRegClass = {
1000 .MC: &PPCMCRegisterClasses[VSSRCRegClassID],
1001 .SubClassMask: VSSRCSubClassMask,
1002 .SuperRegIndices: SuperRegIdxSeqs + 25,
1003 .LaneMask: LaneBitmask(0x0000000000000001),
1004 .AllocationPriority: 0,
1005 .GlobalPriority: false,
1006 .TSFlags: 0x00, /* TSFlags */
1007 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1008 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1009 .SuperClasses: nullptr, .SuperClassesSize: 0,
1010 .OrderFunc: nullptr
1011 };
1012
1013 extern const TargetRegisterClass GPRCRegClass = {
1014 .MC: &PPCMCRegisterClasses[GPRCRegClassID],
1015 .SubClassMask: GPRCSubClassMask,
1016 .SuperRegIndices: SuperRegIdxSeqs + 73,
1017 .LaneMask: LaneBitmask(0x0000000000000001),
1018 .AllocationPriority: 0,
1019 .GlobalPriority: false,
1020 .TSFlags: 0x00, /* TSFlags */
1021 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1022 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1023 .SuperClasses: nullptr, .SuperClassesSize: 0,
1024 .OrderFunc: GPRCGetRawAllocationOrder
1025 };
1026
1027 extern const TargetRegisterClass GPRC_NOR0RegClass = {
1028 .MC: &PPCMCRegisterClasses[GPRC_NOR0RegClassID],
1029 .SubClassMask: GPRC_NOR0SubClassMask,
1030 .SuperRegIndices: SuperRegIdxSeqs + 73,
1031 .LaneMask: LaneBitmask(0x0000000000000001),
1032 .AllocationPriority: 0,
1033 .GlobalPriority: false,
1034 .TSFlags: 0x00, /* TSFlags */
1035 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1036 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1037 .SuperClasses: nullptr, .SuperClassesSize: 0,
1038 .OrderFunc: GPRC_NOR0GetRawAllocationOrder
1039 };
1040
1041 extern const TargetRegisterClass GPRC_and_GPRC_NOR0RegClass = {
1042 .MC: &PPCMCRegisterClasses[GPRC_and_GPRC_NOR0RegClassID],
1043 .SubClassMask: GPRC_and_GPRC_NOR0SubClassMask,
1044 .SuperRegIndices: SuperRegIdxSeqs + 73,
1045 .LaneMask: LaneBitmask(0x0000000000000001),
1046 .AllocationPriority: 0,
1047 .GlobalPriority: false,
1048 .TSFlags: 0x00, /* TSFlags */
1049 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1050 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1051 .SuperClasses: GPRC_and_GPRC_NOR0Superclasses, .SuperClassesSize: 2,
1052 .OrderFunc: GPRC_and_GPRC_NOR0GetRawAllocationOrder
1053 };
1054
1055 extern const TargetRegisterClass CRBITRCRegClass = {
1056 .MC: &PPCMCRegisterClasses[CRBITRCRegClassID],
1057 .SubClassMask: CRBITRCSubClassMask,
1058 .SuperRegIndices: SuperRegIdxSeqs + 9,
1059 .LaneMask: LaneBitmask(0x0000000000000001),
1060 .AllocationPriority: 0,
1061 .GlobalPriority: false,
1062 .TSFlags: 0x00, /* TSFlags */
1063 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1064 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1065 .SuperClasses: nullptr, .SuperClassesSize: 0,
1066 .OrderFunc: CRBITRCGetRawAllocationOrder
1067 };
1068
1069 extern const TargetRegisterClass F4RCRegClass = {
1070 .MC: &PPCMCRegisterClasses[F4RCRegClassID],
1071 .SubClassMask: F4RCSubClassMask,
1072 .SuperRegIndices: SuperRegIdxSeqs + 25,
1073 .LaneMask: LaneBitmask(0x0000000000000001),
1074 .AllocationPriority: 0,
1075 .GlobalPriority: false,
1076 .TSFlags: 0x00, /* TSFlags */
1077 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1078 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1079 .SuperClasses: F4RCSuperclasses, .SuperClassesSize: 1,
1080 .OrderFunc: nullptr
1081 };
1082
1083 extern const TargetRegisterClass GPRC32RegClass = {
1084 .MC: &PPCMCRegisterClasses[GPRC32RegClassID],
1085 .SubClassMask: GPRC32SubClassMask,
1086 .SuperRegIndices: SuperRegIdxSeqs + 2,
1087 .LaneMask: LaneBitmask(0x0000000000000001),
1088 .AllocationPriority: 0,
1089 .GlobalPriority: false,
1090 .TSFlags: 0x00, /* TSFlags */
1091 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1092 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1093 .SuperClasses: nullptr, .SuperClassesSize: 0,
1094 .OrderFunc: nullptr
1095 };
1096
1097 extern const TargetRegisterClass CRRCRegClass = {
1098 .MC: &PPCMCRegisterClasses[CRRCRegClassID],
1099 .SubClassMask: CRRCSubClassMask,
1100 .SuperRegIndices: SuperRegIdxSeqs + 2,
1101 .LaneMask: LaneBitmask(0x0000000000000E40),
1102 .AllocationPriority: 0,
1103 .GlobalPriority: false,
1104 .TSFlags: 0x00, /* TSFlags */
1105 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1106 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1107 .SuperClasses: nullptr, .SuperClassesSize: 0,
1108 .OrderFunc: CRRCGetRawAllocationOrder
1109 };
1110
1111 extern const TargetRegisterClass CARRYRCRegClass = {
1112 .MC: &PPCMCRegisterClasses[CARRYRCRegClassID],
1113 .SubClassMask: CARRYRCSubClassMask,
1114 .SuperRegIndices: SuperRegIdxSeqs + 2,
1115 .LaneMask: LaneBitmask(0x0000000000000001),
1116 .AllocationPriority: 0,
1117 .GlobalPriority: false,
1118 .TSFlags: 0x00, /* TSFlags */
1119 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1120 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1121 .SuperClasses: nullptr, .SuperClassesSize: 0,
1122 .OrderFunc: nullptr
1123 };
1124
1125 extern const TargetRegisterClass CTRRCRegClass = {
1126 .MC: &PPCMCRegisterClasses[CTRRCRegClassID],
1127 .SubClassMask: CTRRCSubClassMask,
1128 .SuperRegIndices: SuperRegIdxSeqs + 2,
1129 .LaneMask: LaneBitmask(0x0000000000000001),
1130 .AllocationPriority: 0,
1131 .GlobalPriority: false,
1132 .TSFlags: 0x00, /* TSFlags */
1133 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1134 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1135 .SuperClasses: nullptr, .SuperClassesSize: 0,
1136 .OrderFunc: nullptr
1137 };
1138
1139 extern const TargetRegisterClass LRRCRegClass = {
1140 .MC: &PPCMCRegisterClasses[LRRCRegClassID],
1141 .SubClassMask: LRRCSubClassMask,
1142 .SuperRegIndices: SuperRegIdxSeqs + 2,
1143 .LaneMask: LaneBitmask(0x0000000000000001),
1144 .AllocationPriority: 0,
1145 .GlobalPriority: false,
1146 .TSFlags: 0x00, /* TSFlags */
1147 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1148 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1149 .SuperClasses: nullptr, .SuperClassesSize: 0,
1150 .OrderFunc: nullptr
1151 };
1152
1153 extern const TargetRegisterClass VRSAVERCRegClass = {
1154 .MC: &PPCMCRegisterClasses[VRSAVERCRegClassID],
1155 .SubClassMask: VRSAVERCSubClassMask,
1156 .SuperRegIndices: SuperRegIdxSeqs + 2,
1157 .LaneMask: LaneBitmask(0x0000000000000001),
1158 .AllocationPriority: 0,
1159 .GlobalPriority: false,
1160 .TSFlags: 0x00, /* TSFlags */
1161 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1162 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1163 .SuperClasses: nullptr, .SuperClassesSize: 0,
1164 .OrderFunc: nullptr
1165 };
1166
1167 extern const TargetRegisterClass SPILLTOVSRRCRegClass = {
1168 .MC: &PPCMCRegisterClasses[SPILLTOVSRRCRegClassID],
1169 .SubClassMask: SPILLTOVSRRCSubClassMask,
1170 .SuperRegIndices: SuperRegIdxSeqs + 32,
1171 .LaneMask: LaneBitmask(0x0000000000000001),
1172 .AllocationPriority: 0,
1173 .GlobalPriority: false,
1174 .TSFlags: 0x00, /* TSFlags */
1175 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1176 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1177 .SuperClasses: nullptr, .SuperClassesSize: 0,
1178 .OrderFunc: nullptr
1179 };
1180
1181 extern const TargetRegisterClass VSFRCRegClass = {
1182 .MC: &PPCMCRegisterClasses[VSFRCRegClassID],
1183 .SubClassMask: VSFRCSubClassMask,
1184 .SuperRegIndices: SuperRegIdxSeqs + 25,
1185 .LaneMask: LaneBitmask(0x0000000000000001),
1186 .AllocationPriority: 0,
1187 .GlobalPriority: false,
1188 .TSFlags: 0x00, /* TSFlags */
1189 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1190 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1191 .SuperClasses: VSFRCSuperclasses, .SuperClassesSize: 1,
1192 .OrderFunc: nullptr
1193 };
1194
1195 extern const TargetRegisterClass G8RCRegClass = {
1196 .MC: &PPCMCRegisterClasses[G8RCRegClassID],
1197 .SubClassMask: G8RCSubClassMask,
1198 .SuperRegIndices: SuperRegIdxSeqs + 3,
1199 .LaneMask: LaneBitmask(0x0000000000000001),
1200 .AllocationPriority: 0,
1201 .GlobalPriority: false,
1202 .TSFlags: 0x00, /* TSFlags */
1203 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1204 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1205 .SuperClasses: G8RCSuperclasses, .SuperClassesSize: 1,
1206 .OrderFunc: G8RCGetRawAllocationOrder
1207 };
1208
1209 extern const TargetRegisterClass G8RC_NOX0RegClass = {
1210 .MC: &PPCMCRegisterClasses[G8RC_NOX0RegClassID],
1211 .SubClassMask: G8RC_NOX0SubClassMask,
1212 .SuperRegIndices: SuperRegIdxSeqs + 3,
1213 .LaneMask: LaneBitmask(0x0000000000000001),
1214 .AllocationPriority: 0,
1215 .GlobalPriority: false,
1216 .TSFlags: 0x00, /* TSFlags */
1217 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1218 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1219 .SuperClasses: nullptr, .SuperClassesSize: 0,
1220 .OrderFunc: G8RC_NOX0GetRawAllocationOrder
1221 };
1222
1223 extern const TargetRegisterClass SPILLTOVSRRC_and_VSFRCRegClass = {
1224 .MC: &PPCMCRegisterClasses[SPILLTOVSRRC_and_VSFRCRegClassID],
1225 .SubClassMask: SPILLTOVSRRC_and_VSFRCSubClassMask,
1226 .SuperRegIndices: SuperRegIdxSeqs + 25,
1227 .LaneMask: LaneBitmask(0x0000000000000001),
1228 .AllocationPriority: 0,
1229 .GlobalPriority: false,
1230 .TSFlags: 0x00, /* TSFlags */
1231 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1232 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1233 .SuperClasses: SPILLTOVSRRC_and_VSFRCSuperclasses, .SuperClassesSize: 3,
1234 .OrderFunc: nullptr
1235 };
1236
1237 extern const TargetRegisterClass G8RC_and_G8RC_NOX0RegClass = {
1238 .MC: &PPCMCRegisterClasses[G8RC_and_G8RC_NOX0RegClassID],
1239 .SubClassMask: G8RC_and_G8RC_NOX0SubClassMask,
1240 .SuperRegIndices: SuperRegIdxSeqs + 3,
1241 .LaneMask: LaneBitmask(0x0000000000000001),
1242 .AllocationPriority: 0,
1243 .GlobalPriority: false,
1244 .TSFlags: 0x00, /* TSFlags */
1245 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1246 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1247 .SuperClasses: G8RC_and_G8RC_NOX0Superclasses, .SuperClassesSize: 3,
1248 .OrderFunc: G8RC_and_G8RC_NOX0GetRawAllocationOrder
1249 };
1250
1251 extern const TargetRegisterClass F8RCRegClass = {
1252 .MC: &PPCMCRegisterClasses[F8RCRegClassID],
1253 .SubClassMask: F8RCSubClassMask,
1254 .SuperRegIndices: SuperRegIdxSeqs + 25,
1255 .LaneMask: LaneBitmask(0x0000000000000001),
1256 .AllocationPriority: 0,
1257 .GlobalPriority: false,
1258 .TSFlags: 0x00, /* TSFlags */
1259 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1260 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1261 .SuperClasses: F8RCSuperclasses, .SuperClassesSize: 3,
1262 .OrderFunc: nullptr
1263 };
1264
1265 extern const TargetRegisterClass FHRCRegClass = {
1266 .MC: &PPCMCRegisterClasses[FHRCRegClassID],
1267 .SubClassMask: FHRCSubClassMask,
1268 .SuperRegIndices: SuperRegIdxSeqs + 2,
1269 .LaneMask: LaneBitmask(0x0000000000000001),
1270 .AllocationPriority: 0,
1271 .GlobalPriority: false,
1272 .TSFlags: 0x00, /* TSFlags */
1273 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1274 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1275 .SuperClasses: nullptr, .SuperClassesSize: 0,
1276 .OrderFunc: nullptr
1277 };
1278
1279 extern const TargetRegisterClass SPERCRegClass = {
1280 .MC: &PPCMCRegisterClasses[SPERCRegClassID],
1281 .SubClassMask: SPERCSubClassMask,
1282 .SuperRegIndices: SuperRegIdxSeqs + 2,
1283 .LaneMask: LaneBitmask(0x0000000000000003),
1284 .AllocationPriority: 0,
1285 .GlobalPriority: false,
1286 .TSFlags: 0x00, /* TSFlags */
1287 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1288 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1289 .SuperClasses: nullptr, .SuperClassesSize: 0,
1290 .OrderFunc: nullptr
1291 };
1292
1293 extern const TargetRegisterClass VFHRCRegClass = {
1294 .MC: &PPCMCRegisterClasses[VFHRCRegClassID],
1295 .SubClassMask: VFHRCSubClassMask,
1296 .SuperRegIndices: SuperRegIdxSeqs + 2,
1297 .LaneMask: LaneBitmask(0x0000000000000001),
1298 .AllocationPriority: 0,
1299 .GlobalPriority: false,
1300 .TSFlags: 0x00, /* TSFlags */
1301 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1302 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1303 .SuperClasses: nullptr, .SuperClassesSize: 0,
1304 .OrderFunc: nullptr
1305 };
1306
1307 extern const TargetRegisterClass VFRCRegClass = {
1308 .MC: &PPCMCRegisterClasses[VFRCRegClassID],
1309 .SubClassMask: VFRCSubClassMask,
1310 .SuperRegIndices: SuperRegIdxSeqs + 17,
1311 .LaneMask: LaneBitmask(0x0000000000000001),
1312 .AllocationPriority: 0,
1313 .GlobalPriority: false,
1314 .TSFlags: 0x00, /* TSFlags */
1315 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1316 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1317 .SuperClasses: VFRCSuperclasses, .SuperClassesSize: 2,
1318 .OrderFunc: nullptr
1319 };
1320
1321 extern const TargetRegisterClass SPERC_with_sub_32_in_GPRC_NOR0RegClass = {
1322 .MC: &PPCMCRegisterClasses[SPERC_with_sub_32_in_GPRC_NOR0RegClassID],
1323 .SubClassMask: SPERC_with_sub_32_in_GPRC_NOR0SubClassMask,
1324 .SuperRegIndices: SuperRegIdxSeqs + 2,
1325 .LaneMask: LaneBitmask(0x0000000000000003),
1326 .AllocationPriority: 0,
1327 .GlobalPriority: false,
1328 .TSFlags: 0x00, /* TSFlags */
1329 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1330 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1331 .SuperClasses: SPERC_with_sub_32_in_GPRC_NOR0Superclasses, .SuperClassesSize: 1,
1332 .OrderFunc: nullptr
1333 };
1334
1335 extern const TargetRegisterClass SPILLTOVSRRC_and_VFRCRegClass = {
1336 .MC: &PPCMCRegisterClasses[SPILLTOVSRRC_and_VFRCRegClassID],
1337 .SubClassMask: SPILLTOVSRRC_and_VFRCSubClassMask,
1338 .SuperRegIndices: SuperRegIdxSeqs + 17,
1339 .LaneMask: LaneBitmask(0x0000000000000001),
1340 .AllocationPriority: 0,
1341 .GlobalPriority: false,
1342 .TSFlags: 0x00, /* TSFlags */
1343 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1344 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1345 .SuperClasses: SPILLTOVSRRC_and_VFRCSuperclasses, .SuperClassesSize: 5,
1346 .OrderFunc: nullptr
1347 };
1348
1349 extern const TargetRegisterClass SPILLTOVSRRC_and_F4RCRegClass = {
1350 .MC: &PPCMCRegisterClasses[SPILLTOVSRRC_and_F4RCRegClassID],
1351 .SubClassMask: SPILLTOVSRRC_and_F4RCSubClassMask,
1352 .SuperRegIndices: SuperRegIdxSeqs + 25,
1353 .LaneMask: LaneBitmask(0x0000000000000001),
1354 .AllocationPriority: 0,
1355 .GlobalPriority: false,
1356 .TSFlags: 0x00, /* TSFlags */
1357 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1358 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1359 .SuperClasses: SPILLTOVSRRC_and_F4RCSuperclasses, .SuperClassesSize: 6,
1360 .OrderFunc: nullptr
1361 };
1362
1363 extern const TargetRegisterClass CTRRC8RegClass = {
1364 .MC: &PPCMCRegisterClasses[CTRRC8RegClassID],
1365 .SubClassMask: CTRRC8SubClassMask,
1366 .SuperRegIndices: SuperRegIdxSeqs + 2,
1367 .LaneMask: LaneBitmask(0x0000000000000001),
1368 .AllocationPriority: 0,
1369 .GlobalPriority: false,
1370 .TSFlags: 0x00, /* TSFlags */
1371 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1372 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1373 .SuperClasses: nullptr, .SuperClassesSize: 0,
1374 .OrderFunc: nullptr
1375 };
1376
1377 extern const TargetRegisterClass LR8RCRegClass = {
1378 .MC: &PPCMCRegisterClasses[LR8RCRegClassID],
1379 .SubClassMask: LR8RCSubClassMask,
1380 .SuperRegIndices: SuperRegIdxSeqs + 2,
1381 .LaneMask: LaneBitmask(0x0000000000000001),
1382 .AllocationPriority: 0,
1383 .GlobalPriority: false,
1384 .TSFlags: 0x00, /* TSFlags */
1385 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1386 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1387 .SuperClasses: nullptr, .SuperClassesSize: 0,
1388 .OrderFunc: nullptr
1389 };
1390
1391 extern const TargetRegisterClass DMRROWRCRegClass = {
1392 .MC: &PPCMCRegisterClasses[DMRROWRCRegClassID],
1393 .SubClassMask: DMRROWRCSubClassMask,
1394 .SuperRegIndices: SuperRegIdxSeqs + 56,
1395 .LaneMask: LaneBitmask(0x0000000000000001),
1396 .AllocationPriority: 0,
1397 .GlobalPriority: false,
1398 .TSFlags: 0x00, /* TSFlags */
1399 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1400 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1401 .SuperClasses: nullptr, .SuperClassesSize: 0,
1402 .OrderFunc: nullptr
1403 };
1404
1405 extern const TargetRegisterClass VSRCRegClass = {
1406 .MC: &PPCMCRegisterClasses[VSRCRegClassID],
1407 .SubClassMask: VSRCSubClassMask,
1408 .SuperRegIndices: SuperRegIdxSeqs + 20,
1409 .LaneMask: LaneBitmask(0x000000000000000C),
1410 .AllocationPriority: 0,
1411 .GlobalPriority: false,
1412 .TSFlags: 0x00, /* TSFlags */
1413 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1414 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1415 .SuperClasses: nullptr, .SuperClassesSize: 0,
1416 .OrderFunc: nullptr
1417 };
1418
1419 extern const TargetRegisterClass VSRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1420 .MC: &PPCMCRegisterClasses[VSRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1421 .SubClassMask: VSRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1422 .SuperRegIndices: SuperRegIdxSeqs + 20,
1423 .LaneMask: LaneBitmask(0x000000000000000C),
1424 .AllocationPriority: 0,
1425 .GlobalPriority: false,
1426 .TSFlags: 0x00, /* TSFlags */
1427 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1428 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1429 .SuperClasses: VSRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 1,
1430 .OrderFunc: nullptr
1431 };
1432
1433 extern const TargetRegisterClass VRRCRegClass = {
1434 .MC: &PPCMCRegisterClasses[VRRCRegClassID],
1435 .SubClassMask: VRRCSubClassMask,
1436 .SuperRegIndices: SuperRegIdxSeqs + 14,
1437 .LaneMask: LaneBitmask(0x000000000000000C),
1438 .AllocationPriority: 0,
1439 .GlobalPriority: false,
1440 .TSFlags: 0x00, /* TSFlags */
1441 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1442 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1443 .SuperClasses: VRRCSuperclasses, .SuperClassesSize: 1,
1444 .OrderFunc: nullptr
1445 };
1446
1447 extern const TargetRegisterClass VSLRCRegClass = {
1448 .MC: &PPCMCRegisterClasses[VSLRCRegClassID],
1449 .SubClassMask: VSLRCSubClassMask,
1450 .SuperRegIndices: SuperRegIdxSeqs + 20,
1451 .LaneMask: LaneBitmask(0x000000000000000C),
1452 .AllocationPriority: 0,
1453 .GlobalPriority: false,
1454 .TSFlags: 0x00, /* TSFlags */
1455 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1456 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1457 .SuperClasses: VSLRCSuperclasses, .SuperClassesSize: 1,
1458 .OrderFunc: nullptr
1459 };
1460
1461 extern const TargetRegisterClass VRRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1462 .MC: &PPCMCRegisterClasses[VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1463 .SubClassMask: VRRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1464 .SuperRegIndices: SuperRegIdxSeqs + 14,
1465 .LaneMask: LaneBitmask(0x000000000000000C),
1466 .AllocationPriority: 0,
1467 .GlobalPriority: false,
1468 .TSFlags: 0x00, /* TSFlags */
1469 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1470 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1471 .SuperClasses: VRRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 3,
1472 .OrderFunc: nullptr
1473 };
1474
1475 extern const TargetRegisterClass FpRCRegClass = {
1476 .MC: &PPCMCRegisterClasses[FpRCRegClassID],
1477 .SubClassMask: FpRCSubClassMask,
1478 .SuperRegIndices: SuperRegIdxSeqs + 2,
1479 .LaneMask: LaneBitmask(0x0000000000000180),
1480 .AllocationPriority: 0,
1481 .GlobalPriority: false,
1482 .TSFlags: 0x00, /* TSFlags */
1483 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1484 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1485 .SuperClasses: nullptr, .SuperClassesSize: 0,
1486 .OrderFunc: nullptr
1487 };
1488
1489 extern const TargetRegisterClass G8pRCRegClass = {
1490 .MC: &PPCMCRegisterClasses[G8pRCRegClassID],
1491 .SubClassMask: G8pRCSubClassMask,
1492 .SuperRegIndices: SuperRegIdxSeqs + 2,
1493 .LaneMask: LaneBitmask(0x0000000100000001),
1494 .AllocationPriority: 0,
1495 .GlobalPriority: false,
1496 .TSFlags: 0x00, /* TSFlags */
1497 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1498 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1499 .SuperClasses: nullptr, .SuperClassesSize: 0,
1500 .OrderFunc: G8pRCGetRawAllocationOrder
1501 };
1502
1503 extern const TargetRegisterClass G8pRC_with_sub_32_in_GPRC_NOR0RegClass = {
1504 .MC: &PPCMCRegisterClasses[G8pRC_with_sub_32_in_GPRC_NOR0RegClassID],
1505 .SubClassMask: G8pRC_with_sub_32_in_GPRC_NOR0SubClassMask,
1506 .SuperRegIndices: SuperRegIdxSeqs + 2,
1507 .LaneMask: LaneBitmask(0x0000000100000001),
1508 .AllocationPriority: 0,
1509 .GlobalPriority: false,
1510 .TSFlags: 0x00, /* TSFlags */
1511 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1512 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1513 .SuperClasses: G8pRC_with_sub_32_in_GPRC_NOR0Superclasses, .SuperClassesSize: 1,
1514 .OrderFunc: G8pRC_with_sub_32_in_GPRC_NOR0GetRawAllocationOrder
1515 };
1516
1517 extern const TargetRegisterClass VSLRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1518 .MC: &PPCMCRegisterClasses[VSLRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1519 .SubClassMask: VSLRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1520 .SuperRegIndices: SuperRegIdxSeqs + 20,
1521 .LaneMask: LaneBitmask(0x000000000000000C),
1522 .AllocationPriority: 0,
1523 .GlobalPriority: false,
1524 .TSFlags: 0x00, /* TSFlags */
1525 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1526 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1527 .SuperClasses: VSLRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 3,
1528 .OrderFunc: nullptr
1529 };
1530
1531 extern const TargetRegisterClass FpRC_with_sub_fp0_in_SPILLTOVSRRCRegClass = {
1532 .MC: &PPCMCRegisterClasses[FpRC_with_sub_fp0_in_SPILLTOVSRRCRegClassID],
1533 .SubClassMask: FpRC_with_sub_fp0_in_SPILLTOVSRRCSubClassMask,
1534 .SuperRegIndices: SuperRegIdxSeqs + 2,
1535 .LaneMask: LaneBitmask(0x0000000000000180),
1536 .AllocationPriority: 0,
1537 .GlobalPriority: false,
1538 .TSFlags: 0x00, /* TSFlags */
1539 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1540 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1541 .SuperClasses: FpRC_with_sub_fp0_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 1,
1542 .OrderFunc: nullptr
1543 };
1544
1545 extern const TargetRegisterClass DMRROWpRCRegClass = {
1546 .MC: &PPCMCRegisterClasses[DMRROWpRCRegClassID],
1547 .SubClassMask: DMRROWpRCSubClassMask,
1548 .SuperRegIndices: SuperRegIdxSeqs + 47,
1549 .LaneMask: LaneBitmask(0x0000000000000030),
1550 .AllocationPriority: 0,
1551 .GlobalPriority: false,
1552 .TSFlags: 0x00, /* TSFlags */
1553 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1554 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1555 .SuperClasses: nullptr, .SuperClassesSize: 0,
1556 .OrderFunc: nullptr
1557 };
1558
1559 extern const TargetRegisterClass VSRpRCRegClass = {
1560 .MC: &PPCMCRegisterClasses[VSRpRCRegClassID],
1561 .SubClassMask: VSRpRCSubClassMask,
1562 .SuperRegIndices: SuperRegIdxSeqs + 6,
1563 .LaneMask: LaneBitmask(0x000000000000300C),
1564 .AllocationPriority: 2,
1565 .GlobalPriority: false,
1566 .TSFlags: 0x00, /* TSFlags */
1567 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1568 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1569 .SuperClasses: nullptr, .SuperClassesSize: 0,
1570 .OrderFunc: nullptr
1571 };
1572
1573 extern const TargetRegisterClass VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1574 .MC: &PPCMCRegisterClasses[VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1575 .SubClassMask: VSRpRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1576 .SuperRegIndices: SuperRegIdxSeqs + 6,
1577 .LaneMask: LaneBitmask(0x000000000000300C),
1578 .AllocationPriority: 2,
1579 .GlobalPriority: false,
1580 .TSFlags: 0x00, /* TSFlags */
1581 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1582 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1583 .SuperClasses: VSRpRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 1,
1584 .OrderFunc: nullptr
1585 };
1586
1587 extern const TargetRegisterClass VSRpRC_with_sub_64_in_F4RCRegClass = {
1588 .MC: &PPCMCRegisterClasses[VSRpRC_with_sub_64_in_F4RCRegClassID],
1589 .SubClassMask: VSRpRC_with_sub_64_in_F4RCSubClassMask,
1590 .SuperRegIndices: SuperRegIdxSeqs + 6,
1591 .LaneMask: LaneBitmask(0x000000000000300C),
1592 .AllocationPriority: 2,
1593 .GlobalPriority: false,
1594 .TSFlags: 0x00, /* TSFlags */
1595 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1596 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1597 .SuperClasses: VSRpRC_with_sub_64_in_F4RCSuperclasses, .SuperClassesSize: 1,
1598 .OrderFunc: nullptr
1599 };
1600
1601 extern const TargetRegisterClass VSRpRC_with_sub_64_in_VFRCRegClass = {
1602 .MC: &PPCMCRegisterClasses[VSRpRC_with_sub_64_in_VFRCRegClassID],
1603 .SubClassMask: VSRpRC_with_sub_64_in_VFRCSubClassMask,
1604 .SuperRegIndices: SuperRegIdxSeqs + 2,
1605 .LaneMask: LaneBitmask(0x000000000000300C),
1606 .AllocationPriority: 2,
1607 .GlobalPriority: false,
1608 .TSFlags: 0x00, /* TSFlags */
1609 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1610 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1611 .SuperClasses: VSRpRC_with_sub_64_in_VFRCSuperclasses, .SuperClassesSize: 1,
1612 .OrderFunc: nullptr
1613 };
1614
1615 extern const TargetRegisterClass VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClass = {
1616 .MC: &PPCMCRegisterClasses[VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClassID],
1617 .SubClassMask: VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCSubClassMask,
1618 .SuperRegIndices: SuperRegIdxSeqs + 2,
1619 .LaneMask: LaneBitmask(0x000000000000300C),
1620 .AllocationPriority: 2,
1621 .GlobalPriority: false,
1622 .TSFlags: 0x00, /* TSFlags */
1623 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1624 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1625 .SuperClasses: VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCSuperclasses, .SuperClassesSize: 3,
1626 .OrderFunc: nullptr
1627 };
1628
1629 extern const TargetRegisterClass VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCRegClass = {
1630 .MC: &PPCMCRegisterClasses[VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCRegClassID],
1631 .SubClassMask: VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCSubClassMask,
1632 .SuperRegIndices: SuperRegIdxSeqs + 6,
1633 .LaneMask: LaneBitmask(0x000000000000300C),
1634 .AllocationPriority: 2,
1635 .GlobalPriority: false,
1636 .TSFlags: 0x00, /* TSFlags */
1637 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1638 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1639 .SuperClasses: VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCSuperclasses, .SuperClassesSize: 3,
1640 .OrderFunc: nullptr
1641 };
1642
1643 extern const TargetRegisterClass ACCRCRegClass = {
1644 .MC: &PPCMCRegisterClasses[ACCRCRegClassID],
1645 .SubClassMask: ACCRCSubClassMask,
1646 .SuperRegIndices: SuperRegIdxSeqs + 2,
1647 .LaneMask: LaneBitmask(0x000000000003F00C),
1648 .AllocationPriority: 31,
1649 .GlobalPriority: true,
1650 .TSFlags: 0x00, /* TSFlags */
1651 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1652 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1653 .SuperClasses: nullptr, .SuperClassesSize: 0,
1654 .OrderFunc: nullptr
1655 };
1656
1657 extern const TargetRegisterClass UACCRCRegClass = {
1658 .MC: &PPCMCRegisterClasses[UACCRCRegClassID],
1659 .SubClassMask: UACCRCSubClassMask,
1660 .SuperRegIndices: SuperRegIdxSeqs + 2,
1661 .LaneMask: LaneBitmask(0x000000000003F00C),
1662 .AllocationPriority: 4,
1663 .GlobalPriority: true,
1664 .TSFlags: 0x00, /* TSFlags */
1665 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1666 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1667 .SuperClasses: nullptr, .SuperClassesSize: 0,
1668 .OrderFunc: nullptr
1669 };
1670
1671 extern const TargetRegisterClass WACCRCRegClass = {
1672 .MC: &PPCMCRegisterClasses[WACCRCRegClassID],
1673 .SubClassMask: WACCRCSubClassMask,
1674 .SuperRegIndices: SuperRegIdxSeqs + 44,
1675 .LaneMask: LaneBitmask(0x00000000000C0030),
1676 .AllocationPriority: 0,
1677 .GlobalPriority: false,
1678 .TSFlags: 0x00, /* TSFlags */
1679 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1680 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1681 .SuperClasses: nullptr, .SuperClassesSize: 0,
1682 .OrderFunc: nullptr
1683 };
1684
1685 extern const TargetRegisterClass WACC_HIRCRegClass = {
1686 .MC: &PPCMCRegisterClasses[WACC_HIRCRegClassID],
1687 .SubClassMask: WACC_HIRCSubClassMask,
1688 .SuperRegIndices: SuperRegIdxSeqs + 41,
1689 .LaneMask: LaneBitmask(0x00000000000C0030),
1690 .AllocationPriority: 0,
1691 .GlobalPriority: false,
1692 .TSFlags: 0x00, /* TSFlags */
1693 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1694 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1695 .SuperClasses: nullptr, .SuperClassesSize: 0,
1696 .OrderFunc: nullptr
1697 };
1698
1699 extern const TargetRegisterClass ACCRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1700 .MC: &PPCMCRegisterClasses[ACCRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1701 .SubClassMask: ACCRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1702 .SuperRegIndices: SuperRegIdxSeqs + 2,
1703 .LaneMask: LaneBitmask(0x000000000003F00C),
1704 .AllocationPriority: 31,
1705 .GlobalPriority: true,
1706 .TSFlags: 0x00, /* TSFlags */
1707 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1708 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1709 .SuperClasses: ACCRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 1,
1710 .OrderFunc: nullptr
1711 };
1712
1713 extern const TargetRegisterClass UACCRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1714 .MC: &PPCMCRegisterClasses[UACCRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1715 .SubClassMask: UACCRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1716 .SuperRegIndices: SuperRegIdxSeqs + 2,
1717 .LaneMask: LaneBitmask(0x000000000003F00C),
1718 .AllocationPriority: 4,
1719 .GlobalPriority: true,
1720 .TSFlags: 0x00, /* TSFlags */
1721 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1722 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1723 .SuperClasses: UACCRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 1,
1724 .OrderFunc: nullptr
1725 };
1726
1727 extern const TargetRegisterClass ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClass = {
1728 .MC: &PPCMCRegisterClasses[ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClassID],
1729 .SubClassMask: ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSubClassMask,
1730 .SuperRegIndices: SuperRegIdxSeqs + 2,
1731 .LaneMask: LaneBitmask(0x000000000003F00C),
1732 .AllocationPriority: 31,
1733 .GlobalPriority: true,
1734 .TSFlags: 0x00, /* TSFlags */
1735 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1736 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1737 .SuperClasses: ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 2,
1738 .OrderFunc: nullptr
1739 };
1740
1741 extern const TargetRegisterClass UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClass = {
1742 .MC: &PPCMCRegisterClasses[UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClassID],
1743 .SubClassMask: UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSubClassMask,
1744 .SuperRegIndices: SuperRegIdxSeqs + 2,
1745 .LaneMask: LaneBitmask(0x000000000003F00C),
1746 .AllocationPriority: 4,
1747 .GlobalPriority: true,
1748 .TSFlags: 0x00, /* TSFlags */
1749 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1750 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1751 .SuperClasses: UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 2,
1752 .OrderFunc: nullptr
1753 };
1754
1755 extern const TargetRegisterClass DMRRCRegClass = {
1756 .MC: &PPCMCRegisterClasses[DMRRCRegClassID],
1757 .SubClassMask: DMRRCSubClassMask,
1758 .SuperRegIndices: SuperRegIdxSeqs + 0,
1759 .LaneMask: LaneBitmask(0x0000000000FC0030),
1760 .AllocationPriority: 0,
1761 .GlobalPriority: false,
1762 .TSFlags: 0x00, /* TSFlags */
1763 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1764 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1765 .SuperClasses: nullptr, .SuperClassesSize: 0,
1766 .OrderFunc: nullptr
1767 };
1768
1769 extern const TargetRegisterClass DMRpRCRegClass = {
1770 .MC: &PPCMCRegisterClasses[DMRpRCRegClassID],
1771 .SubClassMask: DMRpRCSubClassMask,
1772 .SuperRegIndices: SuperRegIdxSeqs + 2,
1773 .LaneMask: LaneBitmask(0x00000000FFFC0030),
1774 .AllocationPriority: 0,
1775 .GlobalPriority: false,
1776 .TSFlags: 0x00, /* TSFlags */
1777 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1778 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1779 .SuperClasses: nullptr, .SuperClassesSize: 0,
1780 .OrderFunc: nullptr
1781 };
1782
1783} // end namespace PPC
1784
1785namespace {
1786 const TargetRegisterClass *const RegisterClasses[] = {
1787 &PPC::VSSRCRegClass,
1788 &PPC::GPRCRegClass,
1789 &PPC::GPRC_NOR0RegClass,
1790 &PPC::GPRC_and_GPRC_NOR0RegClass,
1791 &PPC::CRBITRCRegClass,
1792 &PPC::F4RCRegClass,
1793 &PPC::GPRC32RegClass,
1794 &PPC::CRRCRegClass,
1795 &PPC::CARRYRCRegClass,
1796 &PPC::CTRRCRegClass,
1797 &PPC::LRRCRegClass,
1798 &PPC::VRSAVERCRegClass,
1799 &PPC::SPILLTOVSRRCRegClass,
1800 &PPC::VSFRCRegClass,
1801 &PPC::G8RCRegClass,
1802 &PPC::G8RC_NOX0RegClass,
1803 &PPC::SPILLTOVSRRC_and_VSFRCRegClass,
1804 &PPC::G8RC_and_G8RC_NOX0RegClass,
1805 &PPC::F8RCRegClass,
1806 &PPC::FHRCRegClass,
1807 &PPC::SPERCRegClass,
1808 &PPC::VFHRCRegClass,
1809 &PPC::VFRCRegClass,
1810 &PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClass,
1811 &PPC::SPILLTOVSRRC_and_VFRCRegClass,
1812 &PPC::SPILLTOVSRRC_and_F4RCRegClass,
1813 &PPC::CTRRC8RegClass,
1814 &PPC::LR8RCRegClass,
1815 &PPC::DMRROWRCRegClass,
1816 &PPC::VSRCRegClass,
1817 &PPC::VSRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1818 &PPC::VRRCRegClass,
1819 &PPC::VSLRCRegClass,
1820 &PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1821 &PPC::FpRCRegClass,
1822 &PPC::G8pRCRegClass,
1823 &PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClass,
1824 &PPC::VSLRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1825 &PPC::FpRC_with_sub_fp0_in_SPILLTOVSRRCRegClass,
1826 &PPC::DMRROWpRCRegClass,
1827 &PPC::VSRpRCRegClass,
1828 &PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1829 &PPC::VSRpRC_with_sub_64_in_F4RCRegClass,
1830 &PPC::VSRpRC_with_sub_64_in_VFRCRegClass,
1831 &PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClass,
1832 &PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCRegClass,
1833 &PPC::ACCRCRegClass,
1834 &PPC::UACCRCRegClass,
1835 &PPC::WACCRCRegClass,
1836 &PPC::WACC_HIRCRegClass,
1837 &PPC::ACCRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1838 &PPC::UACCRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1839 &PPC::ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClass,
1840 &PPC::UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClass,
1841 &PPC::DMRRCRegClass,
1842 &PPC::DMRpRCRegClass,
1843 };
1844} // end anonymous namespace
1845
1846static const uint8_t CostPerUseTable[] = {
18470, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
1848
1849
1850static const bool InAllocatableClassTable[] = {
1851false, true, false, false, true, false, false, false, true, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, };
1852
1853
1854static const TargetRegisterInfoDesc PPCRegInfoDesc = { // Extra Descriptors
1855.CostPerUse: CostPerUseTable, .NumCosts: 1, .InAllocatableClass: InAllocatableClassTable};
1856
1857unsigned PPCGenRegisterInfo::composeSubRegIndicesImpl(unsigned IdxA, unsigned IdxB) const {
1858 static const uint8_t RowMap[55] = {
1859 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 2, 3, 0, 0, 0, 0, 0, 1, 3, 0, 0, 0, 0, 0, 0, 3, 4, 0, 0, 0, 0, 1, 5, 6, 1, 0, 0, 0, 0, 6, 7, 0, 0, 0,
1860 };
1861 static const uint8_t Rows[8][55] = {
1862 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1863 { PPC::sub_gp8_x1_then_sub_32, 0, PPC::sub_pair1_then_sub_64, PPC::sub_pair1_then_sub_64_hi_phony, 0, 0, PPC::sub_dmr1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_dmrrow1, PPC::sub_dmr1_then_sub_dmrrowp0, PPC::sub_dmr1_then_sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_pair1_then_sub_vsx0, PPC::sub_pair1_then_sub_vsx1, PPC::sub_dmr1_then_sub_wacc_hi, PPC::sub_dmr1_then_sub_wacc_lo, PPC::sub_pair1_then_sub_vsx1_then_sub_64, PPC::sub_pair1_then_sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1864 { 0, 0, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1865 { 0, 0, PPC::sub_pair1_then_sub_vsx1_then_sub_64, PPC::sub_pair1_then_sub_vsx1_then_sub_64_hi_phony, 0, 0, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1866 { 0, 0, 0, 0, 0, 0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1867 { 0, 0, 0, 0, 0, 0, PPC::sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1868 { 0, 0, 0, 0, 0, 0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1869 { 0, 0, 0, 0, 0, 0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1870 };
1871
1872 --IdxA; assert(IdxA < 55); (void) IdxA;
1873 --IdxB; assert(IdxB < 55);
1874 return Rows[RowMap[IdxA]][IdxB];
1875}
1876
1877unsigned PPCGenRegisterInfo::reverseComposeSubRegIndicesImpl(unsigned IdxA, unsigned IdxB) const {
1878 static const uint8_t Table[55][55] = {
1879 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1880 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1881 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1882 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1883 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1884 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
1885 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1886 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1887 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1888 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1889 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1890 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1891 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1892 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1893 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
1894 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1895 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1896 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1897 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
1898 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1899 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1900 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1901 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1902 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1903 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1904 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1905 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1906 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1907 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
1908 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1909 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1910 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1911 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1912 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1913 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1914 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1915 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1916 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1917 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1918 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1919 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1920 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1921 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
1922 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, },
1923 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, },
1924 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
1925 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1926 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1927 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1928 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1929 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, },
1930 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, 0, },
1931 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1932 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1933 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1934 };
1935
1936 --IdxA; assert(IdxA < 55);
1937 --IdxB; assert(IdxB < 55);
1938 return Table[IdxA][IdxB];
1939 }
1940
1941 struct MaskRolOp {
1942 LaneBitmask Mask;
1943 uint8_t RotateLeft;
1944 };
1945 static const MaskRolOp LaneMaskComposeSequences[] = {
1946 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 0 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 0
1947 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 1 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 2
1948 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 2 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 4
1949 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 3 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 6
1950 { .Mask: LaneBitmask(0x0000000000000030), .RotateLeft: 20 }, { .Mask: LaneBitmask(0x0000000000FC0000), .RotateLeft: 8 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 8
1951 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 4 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 11
1952 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 5 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 13
1953 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 14 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 15
1954 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 6 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 17
1955 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 7 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 19
1956 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 8 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 21
1957 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 32 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 23
1958 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 9 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 25
1959 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 10 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 27
1960 { .Mask: LaneBitmask(0x000000000000000C), .RotateLeft: 12 }, { .Mask: LaneBitmask(0x0000000000003000), .RotateLeft: 4 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 29
1961 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 11 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 32
1962 { .Mask: LaneBitmask(0x0000000000000030), .RotateLeft: 16 }, { .Mask: LaneBitmask(0x00000000000C0000), .RotateLeft: 4 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 34
1963 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 12 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 37
1964 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 13 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 39
1965 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 15 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 41
1966 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 16 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 43
1967 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 17 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 45
1968 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 18 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 47
1969 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 19 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 49
1970 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 20 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 51
1971 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 21 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 53
1972 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 22 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 55
1973 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 23 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 57
1974 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 24 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 59
1975 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 25 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 61
1976 { .Mask: LaneBitmask(0x0000000000000030), .RotateLeft: 24 }, { .Mask: LaneBitmask(0x00000000000C0000), .RotateLeft: 12 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 63
1977 { .Mask: LaneBitmask(0x0000000000000030), .RotateLeft: 20 }, { .Mask: LaneBitmask(0x00000000000C0000), .RotateLeft: 8 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 66
1978 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 26 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 69
1979 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 27 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 71
1980 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 28 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 73
1981 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 29 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 75
1982 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 30 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 77
1983 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 31 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 } // Sequence 79
1984 };
1985 static const uint8_t CompositeSequences[] = {
1986 0, // to sub_32
1987 2, // to sub_32_hi_phony
1988 4, // to sub_64
1989 6, // to sub_64_hi_phony
1990 0, // to sub_dmr0
1991 8, // to sub_dmr1
1992 11, // to sub_dmrrow0
1993 13, // to sub_dmrrow1
1994 0, // to sub_dmrrowp0
1995 15, // to sub_dmrrowp1
1996 17, // to sub_eq
1997 19, // to sub_fp0
1998 21, // to sub_fp1
1999 0, // to sub_gp8_x0
2000 23, // to sub_gp8_x1
2001 25, // to sub_gt
2002 27, // to sub_lt
2003 0, // to sub_pair0
2004 29, // to sub_pair1
2005 32, // to sub_un
2006 0, // to sub_vsx0
2007 27, // to sub_vsx1
2008 34, // to sub_wacc_hi
2009 0, // to sub_wacc_lo
2010 37, // to sub_vsx1_then_sub_64
2011 39, // to sub_vsx1_then_sub_64_hi_phony
2012 15, // to sub_pair1_then_sub_64
2013 41, // to sub_pair1_then_sub_64_hi_phony
2014 37, // to sub_pair1_then_sub_vsx0
2015 15, // to sub_pair1_then_sub_vsx1
2016 43, // to sub_pair1_then_sub_vsx1_then_sub_64
2017 45, // to sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2018 47, // to sub_dmrrowp1_then_sub_dmrrow0
2019 49, // to sub_dmrrowp1_then_sub_dmrrow1
2020 51, // to sub_wacc_hi_then_sub_dmrrow0
2021 53, // to sub_wacc_hi_then_sub_dmrrow1
2022 43, // to sub_wacc_hi_then_sub_dmrrowp0
2023 47, // to sub_wacc_hi_then_sub_dmrrowp1
2024 55, // to sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2025 57, // to sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2026 59, // to sub_dmr1_then_sub_dmrrow0
2027 61, // to sub_dmr1_then_sub_dmrrow1
2028 51, // to sub_dmr1_then_sub_dmrrowp0
2029 55, // to sub_dmr1_then_sub_dmrrowp1
2030 63, // to sub_dmr1_then_sub_wacc_hi
2031 66, // to sub_dmr1_then_sub_wacc_lo
2032 69, // to sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2033 71, // to sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2034 73, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2035 75, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2036 59, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2037 69, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2038 77, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2039 79, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2040 23 // to sub_gp8_x1_then_sub_32
2041 };
2042
2043LaneBitmask PPCGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
2044 --IdxA; assert(IdxA < 55 && "Subregister index out of bounds");
2045 LaneBitmask Result;
2046 for (const MaskRolOp *Ops =
2047 &LaneMaskComposeSequences[CompositeSequences[IdxA]];
2048 Ops->Mask.any(); ++Ops) {
2049 LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
2050 if (unsigned S = Ops->RotateLeft)
2051 Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
2052 else
2053 Result |= LaneBitmask(M);
2054 }
2055 return Result;
2056}
2057
2058LaneBitmask PPCGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
2059 LaneMask &= getSubRegIndexLaneMask(SubIdx: IdxA);
2060 --IdxA; assert(IdxA < 55 && "Subregister index out of bounds");
2061 LaneBitmask Result;
2062 for (const MaskRolOp *Ops =
2063 &LaneMaskComposeSequences[CompositeSequences[IdxA]];
2064 Ops->Mask.any(); ++Ops) {
2065 LaneBitmask::Type M = LaneMask.getAsInteger();
2066 if (unsigned S = Ops->RotateLeft)
2067 Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
2068 else
2069 Result |= LaneBitmask(M);
2070 }
2071 return Result;
2072}
2073
2074const TargetRegisterClass *PPCGenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
2075 static const uint8_t Table[56][55] = {
2076 { // VSSRC
2077 0, // sub_32
2078 0, // sub_32_hi_phony
2079 0, // sub_64
2080 0, // sub_64_hi_phony
2081 0, // sub_dmr0
2082 0, // sub_dmr1
2083 0, // sub_dmrrow0
2084 0, // sub_dmrrow1
2085 0, // sub_dmrrowp0
2086 0, // sub_dmrrowp1
2087 0, // sub_eq
2088 0, // sub_fp0
2089 0, // sub_fp1
2090 0, // sub_gp8_x0
2091 0, // sub_gp8_x1
2092 0, // sub_gt
2093 0, // sub_lt
2094 0, // sub_pair0
2095 0, // sub_pair1
2096 0, // sub_un
2097 0, // sub_vsx0
2098 0, // sub_vsx1
2099 0, // sub_wacc_hi
2100 0, // sub_wacc_lo
2101 0, // sub_vsx1_then_sub_64
2102 0, // sub_vsx1_then_sub_64_hi_phony
2103 0, // sub_pair1_then_sub_64
2104 0, // sub_pair1_then_sub_64_hi_phony
2105 0, // sub_pair1_then_sub_vsx0
2106 0, // sub_pair1_then_sub_vsx1
2107 0, // sub_pair1_then_sub_vsx1_then_sub_64
2108 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2109 0, // sub_dmrrowp1_then_sub_dmrrow0
2110 0, // sub_dmrrowp1_then_sub_dmrrow1
2111 0, // sub_wacc_hi_then_sub_dmrrow0
2112 0, // sub_wacc_hi_then_sub_dmrrow1
2113 0, // sub_wacc_hi_then_sub_dmrrowp0
2114 0, // sub_wacc_hi_then_sub_dmrrowp1
2115 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2116 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2117 0, // sub_dmr1_then_sub_dmrrow0
2118 0, // sub_dmr1_then_sub_dmrrow1
2119 0, // sub_dmr1_then_sub_dmrrowp0
2120 0, // sub_dmr1_then_sub_dmrrowp1
2121 0, // sub_dmr1_then_sub_wacc_hi
2122 0, // sub_dmr1_then_sub_wacc_lo
2123 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2124 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2125 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2126 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2127 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2128 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2129 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2130 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2131 0, // sub_gp8_x1_then_sub_32
2132 },
2133 { // GPRC
2134 0, // sub_32
2135 0, // sub_32_hi_phony
2136 0, // sub_64
2137 0, // sub_64_hi_phony
2138 0, // sub_dmr0
2139 0, // sub_dmr1
2140 0, // sub_dmrrow0
2141 0, // sub_dmrrow1
2142 0, // sub_dmrrowp0
2143 0, // sub_dmrrowp1
2144 0, // sub_eq
2145 0, // sub_fp0
2146 0, // sub_fp1
2147 0, // sub_gp8_x0
2148 0, // sub_gp8_x1
2149 0, // sub_gt
2150 0, // sub_lt
2151 0, // sub_pair0
2152 0, // sub_pair1
2153 0, // sub_un
2154 0, // sub_vsx0
2155 0, // sub_vsx1
2156 0, // sub_wacc_hi
2157 0, // sub_wacc_lo
2158 0, // sub_vsx1_then_sub_64
2159 0, // sub_vsx1_then_sub_64_hi_phony
2160 0, // sub_pair1_then_sub_64
2161 0, // sub_pair1_then_sub_64_hi_phony
2162 0, // sub_pair1_then_sub_vsx0
2163 0, // sub_pair1_then_sub_vsx1
2164 0, // sub_pair1_then_sub_vsx1_then_sub_64
2165 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2166 0, // sub_dmrrowp1_then_sub_dmrrow0
2167 0, // sub_dmrrowp1_then_sub_dmrrow1
2168 0, // sub_wacc_hi_then_sub_dmrrow0
2169 0, // sub_wacc_hi_then_sub_dmrrow1
2170 0, // sub_wacc_hi_then_sub_dmrrowp0
2171 0, // sub_wacc_hi_then_sub_dmrrowp1
2172 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2173 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2174 0, // sub_dmr1_then_sub_dmrrow0
2175 0, // sub_dmr1_then_sub_dmrrow1
2176 0, // sub_dmr1_then_sub_dmrrowp0
2177 0, // sub_dmr1_then_sub_dmrrowp1
2178 0, // sub_dmr1_then_sub_wacc_hi
2179 0, // sub_dmr1_then_sub_wacc_lo
2180 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2181 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2182 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2183 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2184 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2185 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2186 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2187 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2188 0, // sub_gp8_x1_then_sub_32
2189 },
2190 { // GPRC_NOR0
2191 0, // sub_32
2192 0, // sub_32_hi_phony
2193 0, // sub_64
2194 0, // sub_64_hi_phony
2195 0, // sub_dmr0
2196 0, // sub_dmr1
2197 0, // sub_dmrrow0
2198 0, // sub_dmrrow1
2199 0, // sub_dmrrowp0
2200 0, // sub_dmrrowp1
2201 0, // sub_eq
2202 0, // sub_fp0
2203 0, // sub_fp1
2204 0, // sub_gp8_x0
2205 0, // sub_gp8_x1
2206 0, // sub_gt
2207 0, // sub_lt
2208 0, // sub_pair0
2209 0, // sub_pair1
2210 0, // sub_un
2211 0, // sub_vsx0
2212 0, // sub_vsx1
2213 0, // sub_wacc_hi
2214 0, // sub_wacc_lo
2215 0, // sub_vsx1_then_sub_64
2216 0, // sub_vsx1_then_sub_64_hi_phony
2217 0, // sub_pair1_then_sub_64
2218 0, // sub_pair1_then_sub_64_hi_phony
2219 0, // sub_pair1_then_sub_vsx0
2220 0, // sub_pair1_then_sub_vsx1
2221 0, // sub_pair1_then_sub_vsx1_then_sub_64
2222 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2223 0, // sub_dmrrowp1_then_sub_dmrrow0
2224 0, // sub_dmrrowp1_then_sub_dmrrow1
2225 0, // sub_wacc_hi_then_sub_dmrrow0
2226 0, // sub_wacc_hi_then_sub_dmrrow1
2227 0, // sub_wacc_hi_then_sub_dmrrowp0
2228 0, // sub_wacc_hi_then_sub_dmrrowp1
2229 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2230 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2231 0, // sub_dmr1_then_sub_dmrrow0
2232 0, // sub_dmr1_then_sub_dmrrow1
2233 0, // sub_dmr1_then_sub_dmrrowp0
2234 0, // sub_dmr1_then_sub_dmrrowp1
2235 0, // sub_dmr1_then_sub_wacc_hi
2236 0, // sub_dmr1_then_sub_wacc_lo
2237 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2238 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2239 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2240 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2241 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2242 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2243 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2244 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2245 0, // sub_gp8_x1_then_sub_32
2246 },
2247 { // GPRC_and_GPRC_NOR0
2248 0, // sub_32
2249 0, // sub_32_hi_phony
2250 0, // sub_64
2251 0, // sub_64_hi_phony
2252 0, // sub_dmr0
2253 0, // sub_dmr1
2254 0, // sub_dmrrow0
2255 0, // sub_dmrrow1
2256 0, // sub_dmrrowp0
2257 0, // sub_dmrrowp1
2258 0, // sub_eq
2259 0, // sub_fp0
2260 0, // sub_fp1
2261 0, // sub_gp8_x0
2262 0, // sub_gp8_x1
2263 0, // sub_gt
2264 0, // sub_lt
2265 0, // sub_pair0
2266 0, // sub_pair1
2267 0, // sub_un
2268 0, // sub_vsx0
2269 0, // sub_vsx1
2270 0, // sub_wacc_hi
2271 0, // sub_wacc_lo
2272 0, // sub_vsx1_then_sub_64
2273 0, // sub_vsx1_then_sub_64_hi_phony
2274 0, // sub_pair1_then_sub_64
2275 0, // sub_pair1_then_sub_64_hi_phony
2276 0, // sub_pair1_then_sub_vsx0
2277 0, // sub_pair1_then_sub_vsx1
2278 0, // sub_pair1_then_sub_vsx1_then_sub_64
2279 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2280 0, // sub_dmrrowp1_then_sub_dmrrow0
2281 0, // sub_dmrrowp1_then_sub_dmrrow1
2282 0, // sub_wacc_hi_then_sub_dmrrow0
2283 0, // sub_wacc_hi_then_sub_dmrrow1
2284 0, // sub_wacc_hi_then_sub_dmrrowp0
2285 0, // sub_wacc_hi_then_sub_dmrrowp1
2286 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2287 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2288 0, // sub_dmr1_then_sub_dmrrow0
2289 0, // sub_dmr1_then_sub_dmrrow1
2290 0, // sub_dmr1_then_sub_dmrrowp0
2291 0, // sub_dmr1_then_sub_dmrrowp1
2292 0, // sub_dmr1_then_sub_wacc_hi
2293 0, // sub_dmr1_then_sub_wacc_lo
2294 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2295 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2296 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2297 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2298 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2299 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2300 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2301 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2302 0, // sub_gp8_x1_then_sub_32
2303 },
2304 { // CRBITRC
2305 0, // sub_32
2306 0, // sub_32_hi_phony
2307 0, // sub_64
2308 0, // sub_64_hi_phony
2309 0, // sub_dmr0
2310 0, // sub_dmr1
2311 0, // sub_dmrrow0
2312 0, // sub_dmrrow1
2313 0, // sub_dmrrowp0
2314 0, // sub_dmrrowp1
2315 0, // sub_eq
2316 0, // sub_fp0
2317 0, // sub_fp1
2318 0, // sub_gp8_x0
2319 0, // sub_gp8_x1
2320 0, // sub_gt
2321 0, // sub_lt
2322 0, // sub_pair0
2323 0, // sub_pair1
2324 0, // sub_un
2325 0, // sub_vsx0
2326 0, // sub_vsx1
2327 0, // sub_wacc_hi
2328 0, // sub_wacc_lo
2329 0, // sub_vsx1_then_sub_64
2330 0, // sub_vsx1_then_sub_64_hi_phony
2331 0, // sub_pair1_then_sub_64
2332 0, // sub_pair1_then_sub_64_hi_phony
2333 0, // sub_pair1_then_sub_vsx0
2334 0, // sub_pair1_then_sub_vsx1
2335 0, // sub_pair1_then_sub_vsx1_then_sub_64
2336 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2337 0, // sub_dmrrowp1_then_sub_dmrrow0
2338 0, // sub_dmrrowp1_then_sub_dmrrow1
2339 0, // sub_wacc_hi_then_sub_dmrrow0
2340 0, // sub_wacc_hi_then_sub_dmrrow1
2341 0, // sub_wacc_hi_then_sub_dmrrowp0
2342 0, // sub_wacc_hi_then_sub_dmrrowp1
2343 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2344 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2345 0, // sub_dmr1_then_sub_dmrrow0
2346 0, // sub_dmr1_then_sub_dmrrow1
2347 0, // sub_dmr1_then_sub_dmrrowp0
2348 0, // sub_dmr1_then_sub_dmrrowp1
2349 0, // sub_dmr1_then_sub_wacc_hi
2350 0, // sub_dmr1_then_sub_wacc_lo
2351 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2352 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2353 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2354 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2355 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2356 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2357 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2358 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2359 0, // sub_gp8_x1_then_sub_32
2360 },
2361 { // F4RC
2362 0, // sub_32
2363 0, // sub_32_hi_phony
2364 0, // sub_64
2365 0, // sub_64_hi_phony
2366 0, // sub_dmr0
2367 0, // sub_dmr1
2368 0, // sub_dmrrow0
2369 0, // sub_dmrrow1
2370 0, // sub_dmrrowp0
2371 0, // sub_dmrrowp1
2372 0, // sub_eq
2373 0, // sub_fp0
2374 0, // sub_fp1
2375 0, // sub_gp8_x0
2376 0, // sub_gp8_x1
2377 0, // sub_gt
2378 0, // sub_lt
2379 0, // sub_pair0
2380 0, // sub_pair1
2381 0, // sub_un
2382 0, // sub_vsx0
2383 0, // sub_vsx1
2384 0, // sub_wacc_hi
2385 0, // sub_wacc_lo
2386 0, // sub_vsx1_then_sub_64
2387 0, // sub_vsx1_then_sub_64_hi_phony
2388 0, // sub_pair1_then_sub_64
2389 0, // sub_pair1_then_sub_64_hi_phony
2390 0, // sub_pair1_then_sub_vsx0
2391 0, // sub_pair1_then_sub_vsx1
2392 0, // sub_pair1_then_sub_vsx1_then_sub_64
2393 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2394 0, // sub_dmrrowp1_then_sub_dmrrow0
2395 0, // sub_dmrrowp1_then_sub_dmrrow1
2396 0, // sub_wacc_hi_then_sub_dmrrow0
2397 0, // sub_wacc_hi_then_sub_dmrrow1
2398 0, // sub_wacc_hi_then_sub_dmrrowp0
2399 0, // sub_wacc_hi_then_sub_dmrrowp1
2400 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2401 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2402 0, // sub_dmr1_then_sub_dmrrow0
2403 0, // sub_dmr1_then_sub_dmrrow1
2404 0, // sub_dmr1_then_sub_dmrrowp0
2405 0, // sub_dmr1_then_sub_dmrrowp1
2406 0, // sub_dmr1_then_sub_wacc_hi
2407 0, // sub_dmr1_then_sub_wacc_lo
2408 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2409 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2410 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2411 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2412 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2413 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2414 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2415 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2416 0, // sub_gp8_x1_then_sub_32
2417 },
2418 { // GPRC32
2419 0, // sub_32
2420 0, // sub_32_hi_phony
2421 0, // sub_64
2422 0, // sub_64_hi_phony
2423 0, // sub_dmr0
2424 0, // sub_dmr1
2425 0, // sub_dmrrow0
2426 0, // sub_dmrrow1
2427 0, // sub_dmrrowp0
2428 0, // sub_dmrrowp1
2429 0, // sub_eq
2430 0, // sub_fp0
2431 0, // sub_fp1
2432 0, // sub_gp8_x0
2433 0, // sub_gp8_x1
2434 0, // sub_gt
2435 0, // sub_lt
2436 0, // sub_pair0
2437 0, // sub_pair1
2438 0, // sub_un
2439 0, // sub_vsx0
2440 0, // sub_vsx1
2441 0, // sub_wacc_hi
2442 0, // sub_wacc_lo
2443 0, // sub_vsx1_then_sub_64
2444 0, // sub_vsx1_then_sub_64_hi_phony
2445 0, // sub_pair1_then_sub_64
2446 0, // sub_pair1_then_sub_64_hi_phony
2447 0, // sub_pair1_then_sub_vsx0
2448 0, // sub_pair1_then_sub_vsx1
2449 0, // sub_pair1_then_sub_vsx1_then_sub_64
2450 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2451 0, // sub_dmrrowp1_then_sub_dmrrow0
2452 0, // sub_dmrrowp1_then_sub_dmrrow1
2453 0, // sub_wacc_hi_then_sub_dmrrow0
2454 0, // sub_wacc_hi_then_sub_dmrrow1
2455 0, // sub_wacc_hi_then_sub_dmrrowp0
2456 0, // sub_wacc_hi_then_sub_dmrrowp1
2457 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2458 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2459 0, // sub_dmr1_then_sub_dmrrow0
2460 0, // sub_dmr1_then_sub_dmrrow1
2461 0, // sub_dmr1_then_sub_dmrrowp0
2462 0, // sub_dmr1_then_sub_dmrrowp1
2463 0, // sub_dmr1_then_sub_wacc_hi
2464 0, // sub_dmr1_then_sub_wacc_lo
2465 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2466 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2467 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2468 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2469 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2470 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2471 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2472 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2473 0, // sub_gp8_x1_then_sub_32
2474 },
2475 { // CRRC
2476 0, // sub_32
2477 0, // sub_32_hi_phony
2478 0, // sub_64
2479 0, // sub_64_hi_phony
2480 0, // sub_dmr0
2481 0, // sub_dmr1
2482 0, // sub_dmrrow0
2483 0, // sub_dmrrow1
2484 0, // sub_dmrrowp0
2485 0, // sub_dmrrowp1
2486 8, // sub_eq -> CRRC
2487 0, // sub_fp0
2488 0, // sub_fp1
2489 0, // sub_gp8_x0
2490 0, // sub_gp8_x1
2491 8, // sub_gt -> CRRC
2492 8, // sub_lt -> CRRC
2493 0, // sub_pair0
2494 0, // sub_pair1
2495 8, // sub_un -> CRRC
2496 0, // sub_vsx0
2497 0, // sub_vsx1
2498 0, // sub_wacc_hi
2499 0, // sub_wacc_lo
2500 0, // sub_vsx1_then_sub_64
2501 0, // sub_vsx1_then_sub_64_hi_phony
2502 0, // sub_pair1_then_sub_64
2503 0, // sub_pair1_then_sub_64_hi_phony
2504 0, // sub_pair1_then_sub_vsx0
2505 0, // sub_pair1_then_sub_vsx1
2506 0, // sub_pair1_then_sub_vsx1_then_sub_64
2507 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2508 0, // sub_dmrrowp1_then_sub_dmrrow0
2509 0, // sub_dmrrowp1_then_sub_dmrrow1
2510 0, // sub_wacc_hi_then_sub_dmrrow0
2511 0, // sub_wacc_hi_then_sub_dmrrow1
2512 0, // sub_wacc_hi_then_sub_dmrrowp0
2513 0, // sub_wacc_hi_then_sub_dmrrowp1
2514 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2515 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2516 0, // sub_dmr1_then_sub_dmrrow0
2517 0, // sub_dmr1_then_sub_dmrrow1
2518 0, // sub_dmr1_then_sub_dmrrowp0
2519 0, // sub_dmr1_then_sub_dmrrowp1
2520 0, // sub_dmr1_then_sub_wacc_hi
2521 0, // sub_dmr1_then_sub_wacc_lo
2522 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2523 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2524 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2525 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2526 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2527 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2528 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2529 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2530 0, // sub_gp8_x1_then_sub_32
2531 },
2532 { // CARRYRC
2533 0, // sub_32
2534 0, // sub_32_hi_phony
2535 0, // sub_64
2536 0, // sub_64_hi_phony
2537 0, // sub_dmr0
2538 0, // sub_dmr1
2539 0, // sub_dmrrow0
2540 0, // sub_dmrrow1
2541 0, // sub_dmrrowp0
2542 0, // sub_dmrrowp1
2543 0, // sub_eq
2544 0, // sub_fp0
2545 0, // sub_fp1
2546 0, // sub_gp8_x0
2547 0, // sub_gp8_x1
2548 0, // sub_gt
2549 0, // sub_lt
2550 0, // sub_pair0
2551 0, // sub_pair1
2552 0, // sub_un
2553 0, // sub_vsx0
2554 0, // sub_vsx1
2555 0, // sub_wacc_hi
2556 0, // sub_wacc_lo
2557 0, // sub_vsx1_then_sub_64
2558 0, // sub_vsx1_then_sub_64_hi_phony
2559 0, // sub_pair1_then_sub_64
2560 0, // sub_pair1_then_sub_64_hi_phony
2561 0, // sub_pair1_then_sub_vsx0
2562 0, // sub_pair1_then_sub_vsx1
2563 0, // sub_pair1_then_sub_vsx1_then_sub_64
2564 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2565 0, // sub_dmrrowp1_then_sub_dmrrow0
2566 0, // sub_dmrrowp1_then_sub_dmrrow1
2567 0, // sub_wacc_hi_then_sub_dmrrow0
2568 0, // sub_wacc_hi_then_sub_dmrrow1
2569 0, // sub_wacc_hi_then_sub_dmrrowp0
2570 0, // sub_wacc_hi_then_sub_dmrrowp1
2571 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2572 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2573 0, // sub_dmr1_then_sub_dmrrow0
2574 0, // sub_dmr1_then_sub_dmrrow1
2575 0, // sub_dmr1_then_sub_dmrrowp0
2576 0, // sub_dmr1_then_sub_dmrrowp1
2577 0, // sub_dmr1_then_sub_wacc_hi
2578 0, // sub_dmr1_then_sub_wacc_lo
2579 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2580 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2581 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2582 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2583 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2584 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2585 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2586 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2587 0, // sub_gp8_x1_then_sub_32
2588 },
2589 { // CTRRC
2590 0, // sub_32
2591 0, // sub_32_hi_phony
2592 0, // sub_64
2593 0, // sub_64_hi_phony
2594 0, // sub_dmr0
2595 0, // sub_dmr1
2596 0, // sub_dmrrow0
2597 0, // sub_dmrrow1
2598 0, // sub_dmrrowp0
2599 0, // sub_dmrrowp1
2600 0, // sub_eq
2601 0, // sub_fp0
2602 0, // sub_fp1
2603 0, // sub_gp8_x0
2604 0, // sub_gp8_x1
2605 0, // sub_gt
2606 0, // sub_lt
2607 0, // sub_pair0
2608 0, // sub_pair1
2609 0, // sub_un
2610 0, // sub_vsx0
2611 0, // sub_vsx1
2612 0, // sub_wacc_hi
2613 0, // sub_wacc_lo
2614 0, // sub_vsx1_then_sub_64
2615 0, // sub_vsx1_then_sub_64_hi_phony
2616 0, // sub_pair1_then_sub_64
2617 0, // sub_pair1_then_sub_64_hi_phony
2618 0, // sub_pair1_then_sub_vsx0
2619 0, // sub_pair1_then_sub_vsx1
2620 0, // sub_pair1_then_sub_vsx1_then_sub_64
2621 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2622 0, // sub_dmrrowp1_then_sub_dmrrow0
2623 0, // sub_dmrrowp1_then_sub_dmrrow1
2624 0, // sub_wacc_hi_then_sub_dmrrow0
2625 0, // sub_wacc_hi_then_sub_dmrrow1
2626 0, // sub_wacc_hi_then_sub_dmrrowp0
2627 0, // sub_wacc_hi_then_sub_dmrrowp1
2628 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2629 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2630 0, // sub_dmr1_then_sub_dmrrow0
2631 0, // sub_dmr1_then_sub_dmrrow1
2632 0, // sub_dmr1_then_sub_dmrrowp0
2633 0, // sub_dmr1_then_sub_dmrrowp1
2634 0, // sub_dmr1_then_sub_wacc_hi
2635 0, // sub_dmr1_then_sub_wacc_lo
2636 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2637 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2638 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2639 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2640 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2641 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2642 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2643 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2644 0, // sub_gp8_x1_then_sub_32
2645 },
2646 { // LRRC
2647 0, // sub_32
2648 0, // sub_32_hi_phony
2649 0, // sub_64
2650 0, // sub_64_hi_phony
2651 0, // sub_dmr0
2652 0, // sub_dmr1
2653 0, // sub_dmrrow0
2654 0, // sub_dmrrow1
2655 0, // sub_dmrrowp0
2656 0, // sub_dmrrowp1
2657 0, // sub_eq
2658 0, // sub_fp0
2659 0, // sub_fp1
2660 0, // sub_gp8_x0
2661 0, // sub_gp8_x1
2662 0, // sub_gt
2663 0, // sub_lt
2664 0, // sub_pair0
2665 0, // sub_pair1
2666 0, // sub_un
2667 0, // sub_vsx0
2668 0, // sub_vsx1
2669 0, // sub_wacc_hi
2670 0, // sub_wacc_lo
2671 0, // sub_vsx1_then_sub_64
2672 0, // sub_vsx1_then_sub_64_hi_phony
2673 0, // sub_pair1_then_sub_64
2674 0, // sub_pair1_then_sub_64_hi_phony
2675 0, // sub_pair1_then_sub_vsx0
2676 0, // sub_pair1_then_sub_vsx1
2677 0, // sub_pair1_then_sub_vsx1_then_sub_64
2678 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2679 0, // sub_dmrrowp1_then_sub_dmrrow0
2680 0, // sub_dmrrowp1_then_sub_dmrrow1
2681 0, // sub_wacc_hi_then_sub_dmrrow0
2682 0, // sub_wacc_hi_then_sub_dmrrow1
2683 0, // sub_wacc_hi_then_sub_dmrrowp0
2684 0, // sub_wacc_hi_then_sub_dmrrowp1
2685 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2686 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2687 0, // sub_dmr1_then_sub_dmrrow0
2688 0, // sub_dmr1_then_sub_dmrrow1
2689 0, // sub_dmr1_then_sub_dmrrowp0
2690 0, // sub_dmr1_then_sub_dmrrowp1
2691 0, // sub_dmr1_then_sub_wacc_hi
2692 0, // sub_dmr1_then_sub_wacc_lo
2693 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2694 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2695 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2696 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2697 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2698 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2699 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2700 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2701 0, // sub_gp8_x1_then_sub_32
2702 },
2703 { // VRSAVERC
2704 0, // sub_32
2705 0, // sub_32_hi_phony
2706 0, // sub_64
2707 0, // sub_64_hi_phony
2708 0, // sub_dmr0
2709 0, // sub_dmr1
2710 0, // sub_dmrrow0
2711 0, // sub_dmrrow1
2712 0, // sub_dmrrowp0
2713 0, // sub_dmrrowp1
2714 0, // sub_eq
2715 0, // sub_fp0
2716 0, // sub_fp1
2717 0, // sub_gp8_x0
2718 0, // sub_gp8_x1
2719 0, // sub_gt
2720 0, // sub_lt
2721 0, // sub_pair0
2722 0, // sub_pair1
2723 0, // sub_un
2724 0, // sub_vsx0
2725 0, // sub_vsx1
2726 0, // sub_wacc_hi
2727 0, // sub_wacc_lo
2728 0, // sub_vsx1_then_sub_64
2729 0, // sub_vsx1_then_sub_64_hi_phony
2730 0, // sub_pair1_then_sub_64
2731 0, // sub_pair1_then_sub_64_hi_phony
2732 0, // sub_pair1_then_sub_vsx0
2733 0, // sub_pair1_then_sub_vsx1
2734 0, // sub_pair1_then_sub_vsx1_then_sub_64
2735 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2736 0, // sub_dmrrowp1_then_sub_dmrrow0
2737 0, // sub_dmrrowp1_then_sub_dmrrow1
2738 0, // sub_wacc_hi_then_sub_dmrrow0
2739 0, // sub_wacc_hi_then_sub_dmrrow1
2740 0, // sub_wacc_hi_then_sub_dmrrowp0
2741 0, // sub_wacc_hi_then_sub_dmrrowp1
2742 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2743 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2744 0, // sub_dmr1_then_sub_dmrrow0
2745 0, // sub_dmr1_then_sub_dmrrow1
2746 0, // sub_dmr1_then_sub_dmrrowp0
2747 0, // sub_dmr1_then_sub_dmrrowp1
2748 0, // sub_dmr1_then_sub_wacc_hi
2749 0, // sub_dmr1_then_sub_wacc_lo
2750 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2751 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2752 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2753 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2754 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2755 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2756 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2757 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2758 0, // sub_gp8_x1_then_sub_32
2759 },
2760 { // SPILLTOVSRRC
2761 15, // sub_32 -> G8RC
2762 0, // sub_32_hi_phony
2763 0, // sub_64
2764 0, // sub_64_hi_phony
2765 0, // sub_dmr0
2766 0, // sub_dmr1
2767 0, // sub_dmrrow0
2768 0, // sub_dmrrow1
2769 0, // sub_dmrrowp0
2770 0, // sub_dmrrowp1
2771 0, // sub_eq
2772 0, // sub_fp0
2773 0, // sub_fp1
2774 0, // sub_gp8_x0
2775 0, // sub_gp8_x1
2776 0, // sub_gt
2777 0, // sub_lt
2778 0, // sub_pair0
2779 0, // sub_pair1
2780 0, // sub_un
2781 0, // sub_vsx0
2782 0, // sub_vsx1
2783 0, // sub_wacc_hi
2784 0, // sub_wacc_lo
2785 0, // sub_vsx1_then_sub_64
2786 0, // sub_vsx1_then_sub_64_hi_phony
2787 0, // sub_pair1_then_sub_64
2788 0, // sub_pair1_then_sub_64_hi_phony
2789 0, // sub_pair1_then_sub_vsx0
2790 0, // sub_pair1_then_sub_vsx1
2791 0, // sub_pair1_then_sub_vsx1_then_sub_64
2792 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2793 0, // sub_dmrrowp1_then_sub_dmrrow0
2794 0, // sub_dmrrowp1_then_sub_dmrrow1
2795 0, // sub_wacc_hi_then_sub_dmrrow0
2796 0, // sub_wacc_hi_then_sub_dmrrow1
2797 0, // sub_wacc_hi_then_sub_dmrrowp0
2798 0, // sub_wacc_hi_then_sub_dmrrowp1
2799 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2800 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2801 0, // sub_dmr1_then_sub_dmrrow0
2802 0, // sub_dmr1_then_sub_dmrrow1
2803 0, // sub_dmr1_then_sub_dmrrowp0
2804 0, // sub_dmr1_then_sub_dmrrowp1
2805 0, // sub_dmr1_then_sub_wacc_hi
2806 0, // sub_dmr1_then_sub_wacc_lo
2807 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2808 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2809 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2810 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2811 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2812 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2813 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2814 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2815 0, // sub_gp8_x1_then_sub_32
2816 },
2817 { // VSFRC
2818 0, // sub_32
2819 0, // sub_32_hi_phony
2820 0, // sub_64
2821 0, // sub_64_hi_phony
2822 0, // sub_dmr0
2823 0, // sub_dmr1
2824 0, // sub_dmrrow0
2825 0, // sub_dmrrow1
2826 0, // sub_dmrrowp0
2827 0, // sub_dmrrowp1
2828 0, // sub_eq
2829 0, // sub_fp0
2830 0, // sub_fp1
2831 0, // sub_gp8_x0
2832 0, // sub_gp8_x1
2833 0, // sub_gt
2834 0, // sub_lt
2835 0, // sub_pair0
2836 0, // sub_pair1
2837 0, // sub_un
2838 0, // sub_vsx0
2839 0, // sub_vsx1
2840 0, // sub_wacc_hi
2841 0, // sub_wacc_lo
2842 0, // sub_vsx1_then_sub_64
2843 0, // sub_vsx1_then_sub_64_hi_phony
2844 0, // sub_pair1_then_sub_64
2845 0, // sub_pair1_then_sub_64_hi_phony
2846 0, // sub_pair1_then_sub_vsx0
2847 0, // sub_pair1_then_sub_vsx1
2848 0, // sub_pair1_then_sub_vsx1_then_sub_64
2849 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2850 0, // sub_dmrrowp1_then_sub_dmrrow0
2851 0, // sub_dmrrowp1_then_sub_dmrrow1
2852 0, // sub_wacc_hi_then_sub_dmrrow0
2853 0, // sub_wacc_hi_then_sub_dmrrow1
2854 0, // sub_wacc_hi_then_sub_dmrrowp0
2855 0, // sub_wacc_hi_then_sub_dmrrowp1
2856 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2857 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2858 0, // sub_dmr1_then_sub_dmrrow0
2859 0, // sub_dmr1_then_sub_dmrrow1
2860 0, // sub_dmr1_then_sub_dmrrowp0
2861 0, // sub_dmr1_then_sub_dmrrowp1
2862 0, // sub_dmr1_then_sub_wacc_hi
2863 0, // sub_dmr1_then_sub_wacc_lo
2864 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2865 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2866 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2867 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2868 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2869 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2870 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2871 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2872 0, // sub_gp8_x1_then_sub_32
2873 },
2874 { // G8RC
2875 15, // sub_32 -> G8RC
2876 0, // sub_32_hi_phony
2877 0, // sub_64
2878 0, // sub_64_hi_phony
2879 0, // sub_dmr0
2880 0, // sub_dmr1
2881 0, // sub_dmrrow0
2882 0, // sub_dmrrow1
2883 0, // sub_dmrrowp0
2884 0, // sub_dmrrowp1
2885 0, // sub_eq
2886 0, // sub_fp0
2887 0, // sub_fp1
2888 0, // sub_gp8_x0
2889 0, // sub_gp8_x1
2890 0, // sub_gt
2891 0, // sub_lt
2892 0, // sub_pair0
2893 0, // sub_pair1
2894 0, // sub_un
2895 0, // sub_vsx0
2896 0, // sub_vsx1
2897 0, // sub_wacc_hi
2898 0, // sub_wacc_lo
2899 0, // sub_vsx1_then_sub_64
2900 0, // sub_vsx1_then_sub_64_hi_phony
2901 0, // sub_pair1_then_sub_64
2902 0, // sub_pair1_then_sub_64_hi_phony
2903 0, // sub_pair1_then_sub_vsx0
2904 0, // sub_pair1_then_sub_vsx1
2905 0, // sub_pair1_then_sub_vsx1_then_sub_64
2906 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2907 0, // sub_dmrrowp1_then_sub_dmrrow0
2908 0, // sub_dmrrowp1_then_sub_dmrrow1
2909 0, // sub_wacc_hi_then_sub_dmrrow0
2910 0, // sub_wacc_hi_then_sub_dmrrow1
2911 0, // sub_wacc_hi_then_sub_dmrrowp0
2912 0, // sub_wacc_hi_then_sub_dmrrowp1
2913 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2914 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2915 0, // sub_dmr1_then_sub_dmrrow0
2916 0, // sub_dmr1_then_sub_dmrrow1
2917 0, // sub_dmr1_then_sub_dmrrowp0
2918 0, // sub_dmr1_then_sub_dmrrowp1
2919 0, // sub_dmr1_then_sub_wacc_hi
2920 0, // sub_dmr1_then_sub_wacc_lo
2921 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2922 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2923 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2924 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2925 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2926 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2927 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2928 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2929 0, // sub_gp8_x1_then_sub_32
2930 },
2931 { // G8RC_NOX0
2932 16, // sub_32 -> G8RC_NOX0
2933 0, // sub_32_hi_phony
2934 0, // sub_64
2935 0, // sub_64_hi_phony
2936 0, // sub_dmr0
2937 0, // sub_dmr1
2938 0, // sub_dmrrow0
2939 0, // sub_dmrrow1
2940 0, // sub_dmrrowp0
2941 0, // sub_dmrrowp1
2942 0, // sub_eq
2943 0, // sub_fp0
2944 0, // sub_fp1
2945 0, // sub_gp8_x0
2946 0, // sub_gp8_x1
2947 0, // sub_gt
2948 0, // sub_lt
2949 0, // sub_pair0
2950 0, // sub_pair1
2951 0, // sub_un
2952 0, // sub_vsx0
2953 0, // sub_vsx1
2954 0, // sub_wacc_hi
2955 0, // sub_wacc_lo
2956 0, // sub_vsx1_then_sub_64
2957 0, // sub_vsx1_then_sub_64_hi_phony
2958 0, // sub_pair1_then_sub_64
2959 0, // sub_pair1_then_sub_64_hi_phony
2960 0, // sub_pair1_then_sub_vsx0
2961 0, // sub_pair1_then_sub_vsx1
2962 0, // sub_pair1_then_sub_vsx1_then_sub_64
2963 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2964 0, // sub_dmrrowp1_then_sub_dmrrow0
2965 0, // sub_dmrrowp1_then_sub_dmrrow1
2966 0, // sub_wacc_hi_then_sub_dmrrow0
2967 0, // sub_wacc_hi_then_sub_dmrrow1
2968 0, // sub_wacc_hi_then_sub_dmrrowp0
2969 0, // sub_wacc_hi_then_sub_dmrrowp1
2970 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2971 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2972 0, // sub_dmr1_then_sub_dmrrow0
2973 0, // sub_dmr1_then_sub_dmrrow1
2974 0, // sub_dmr1_then_sub_dmrrowp0
2975 0, // sub_dmr1_then_sub_dmrrowp1
2976 0, // sub_dmr1_then_sub_wacc_hi
2977 0, // sub_dmr1_then_sub_wacc_lo
2978 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2979 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2980 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2981 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2982 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2983 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2984 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2985 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2986 0, // sub_gp8_x1_then_sub_32
2987 },
2988 { // SPILLTOVSRRC_and_VSFRC
2989 0, // sub_32
2990 0, // sub_32_hi_phony
2991 0, // sub_64
2992 0, // sub_64_hi_phony
2993 0, // sub_dmr0
2994 0, // sub_dmr1
2995 0, // sub_dmrrow0
2996 0, // sub_dmrrow1
2997 0, // sub_dmrrowp0
2998 0, // sub_dmrrowp1
2999 0, // sub_eq
3000 0, // sub_fp0
3001 0, // sub_fp1
3002 0, // sub_gp8_x0
3003 0, // sub_gp8_x1
3004 0, // sub_gt
3005 0, // sub_lt
3006 0, // sub_pair0
3007 0, // sub_pair1
3008 0, // sub_un
3009 0, // sub_vsx0
3010 0, // sub_vsx1
3011 0, // sub_wacc_hi
3012 0, // sub_wacc_lo
3013 0, // sub_vsx1_then_sub_64
3014 0, // sub_vsx1_then_sub_64_hi_phony
3015 0, // sub_pair1_then_sub_64
3016 0, // sub_pair1_then_sub_64_hi_phony
3017 0, // sub_pair1_then_sub_vsx0
3018 0, // sub_pair1_then_sub_vsx1
3019 0, // sub_pair1_then_sub_vsx1_then_sub_64
3020 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3021 0, // sub_dmrrowp1_then_sub_dmrrow0
3022 0, // sub_dmrrowp1_then_sub_dmrrow1
3023 0, // sub_wacc_hi_then_sub_dmrrow0
3024 0, // sub_wacc_hi_then_sub_dmrrow1
3025 0, // sub_wacc_hi_then_sub_dmrrowp0
3026 0, // sub_wacc_hi_then_sub_dmrrowp1
3027 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3028 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3029 0, // sub_dmr1_then_sub_dmrrow0
3030 0, // sub_dmr1_then_sub_dmrrow1
3031 0, // sub_dmr1_then_sub_dmrrowp0
3032 0, // sub_dmr1_then_sub_dmrrowp1
3033 0, // sub_dmr1_then_sub_wacc_hi
3034 0, // sub_dmr1_then_sub_wacc_lo
3035 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3036 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3037 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3038 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3039 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3040 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3041 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3042 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3043 0, // sub_gp8_x1_then_sub_32
3044 },
3045 { // G8RC_and_G8RC_NOX0
3046 18, // sub_32 -> G8RC_and_G8RC_NOX0
3047 0, // sub_32_hi_phony
3048 0, // sub_64
3049 0, // sub_64_hi_phony
3050 0, // sub_dmr0
3051 0, // sub_dmr1
3052 0, // sub_dmrrow0
3053 0, // sub_dmrrow1
3054 0, // sub_dmrrowp0
3055 0, // sub_dmrrowp1
3056 0, // sub_eq
3057 0, // sub_fp0
3058 0, // sub_fp1
3059 0, // sub_gp8_x0
3060 0, // sub_gp8_x1
3061 0, // sub_gt
3062 0, // sub_lt
3063 0, // sub_pair0
3064 0, // sub_pair1
3065 0, // sub_un
3066 0, // sub_vsx0
3067 0, // sub_vsx1
3068 0, // sub_wacc_hi
3069 0, // sub_wacc_lo
3070 0, // sub_vsx1_then_sub_64
3071 0, // sub_vsx1_then_sub_64_hi_phony
3072 0, // sub_pair1_then_sub_64
3073 0, // sub_pair1_then_sub_64_hi_phony
3074 0, // sub_pair1_then_sub_vsx0
3075 0, // sub_pair1_then_sub_vsx1
3076 0, // sub_pair1_then_sub_vsx1_then_sub_64
3077 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3078 0, // sub_dmrrowp1_then_sub_dmrrow0
3079 0, // sub_dmrrowp1_then_sub_dmrrow1
3080 0, // sub_wacc_hi_then_sub_dmrrow0
3081 0, // sub_wacc_hi_then_sub_dmrrow1
3082 0, // sub_wacc_hi_then_sub_dmrrowp0
3083 0, // sub_wacc_hi_then_sub_dmrrowp1
3084 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3085 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3086 0, // sub_dmr1_then_sub_dmrrow0
3087 0, // sub_dmr1_then_sub_dmrrow1
3088 0, // sub_dmr1_then_sub_dmrrowp0
3089 0, // sub_dmr1_then_sub_dmrrowp1
3090 0, // sub_dmr1_then_sub_wacc_hi
3091 0, // sub_dmr1_then_sub_wacc_lo
3092 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3093 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3094 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3095 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3096 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3097 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3098 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3099 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3100 0, // sub_gp8_x1_then_sub_32
3101 },
3102 { // F8RC
3103 0, // sub_32
3104 0, // sub_32_hi_phony
3105 0, // sub_64
3106 0, // sub_64_hi_phony
3107 0, // sub_dmr0
3108 0, // sub_dmr1
3109 0, // sub_dmrrow0
3110 0, // sub_dmrrow1
3111 0, // sub_dmrrowp0
3112 0, // sub_dmrrowp1
3113 0, // sub_eq
3114 0, // sub_fp0
3115 0, // sub_fp1
3116 0, // sub_gp8_x0
3117 0, // sub_gp8_x1
3118 0, // sub_gt
3119 0, // sub_lt
3120 0, // sub_pair0
3121 0, // sub_pair1
3122 0, // sub_un
3123 0, // sub_vsx0
3124 0, // sub_vsx1
3125 0, // sub_wacc_hi
3126 0, // sub_wacc_lo
3127 0, // sub_vsx1_then_sub_64
3128 0, // sub_vsx1_then_sub_64_hi_phony
3129 0, // sub_pair1_then_sub_64
3130 0, // sub_pair1_then_sub_64_hi_phony
3131 0, // sub_pair1_then_sub_vsx0
3132 0, // sub_pair1_then_sub_vsx1
3133 0, // sub_pair1_then_sub_vsx1_then_sub_64
3134 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3135 0, // sub_dmrrowp1_then_sub_dmrrow0
3136 0, // sub_dmrrowp1_then_sub_dmrrow1
3137 0, // sub_wacc_hi_then_sub_dmrrow0
3138 0, // sub_wacc_hi_then_sub_dmrrow1
3139 0, // sub_wacc_hi_then_sub_dmrrowp0
3140 0, // sub_wacc_hi_then_sub_dmrrowp1
3141 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3142 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3143 0, // sub_dmr1_then_sub_dmrrow0
3144 0, // sub_dmr1_then_sub_dmrrow1
3145 0, // sub_dmr1_then_sub_dmrrowp0
3146 0, // sub_dmr1_then_sub_dmrrowp1
3147 0, // sub_dmr1_then_sub_wacc_hi
3148 0, // sub_dmr1_then_sub_wacc_lo
3149 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3150 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3151 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3152 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3153 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3154 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3155 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3156 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3157 0, // sub_gp8_x1_then_sub_32
3158 },
3159 { // FHRC
3160 0, // sub_32
3161 0, // sub_32_hi_phony
3162 0, // sub_64
3163 0, // sub_64_hi_phony
3164 0, // sub_dmr0
3165 0, // sub_dmr1
3166 0, // sub_dmrrow0
3167 0, // sub_dmrrow1
3168 0, // sub_dmrrowp0
3169 0, // sub_dmrrowp1
3170 0, // sub_eq
3171 0, // sub_fp0
3172 0, // sub_fp1
3173 0, // sub_gp8_x0
3174 0, // sub_gp8_x1
3175 0, // sub_gt
3176 0, // sub_lt
3177 0, // sub_pair0
3178 0, // sub_pair1
3179 0, // sub_un
3180 0, // sub_vsx0
3181 0, // sub_vsx1
3182 0, // sub_wacc_hi
3183 0, // sub_wacc_lo
3184 0, // sub_vsx1_then_sub_64
3185 0, // sub_vsx1_then_sub_64_hi_phony
3186 0, // sub_pair1_then_sub_64
3187 0, // sub_pair1_then_sub_64_hi_phony
3188 0, // sub_pair1_then_sub_vsx0
3189 0, // sub_pair1_then_sub_vsx1
3190 0, // sub_pair1_then_sub_vsx1_then_sub_64
3191 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3192 0, // sub_dmrrowp1_then_sub_dmrrow0
3193 0, // sub_dmrrowp1_then_sub_dmrrow1
3194 0, // sub_wacc_hi_then_sub_dmrrow0
3195 0, // sub_wacc_hi_then_sub_dmrrow1
3196 0, // sub_wacc_hi_then_sub_dmrrowp0
3197 0, // sub_wacc_hi_then_sub_dmrrowp1
3198 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3199 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3200 0, // sub_dmr1_then_sub_dmrrow0
3201 0, // sub_dmr1_then_sub_dmrrow1
3202 0, // sub_dmr1_then_sub_dmrrowp0
3203 0, // sub_dmr1_then_sub_dmrrowp1
3204 0, // sub_dmr1_then_sub_wacc_hi
3205 0, // sub_dmr1_then_sub_wacc_lo
3206 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3207 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3208 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3209 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3210 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3211 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3212 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3213 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3214 0, // sub_gp8_x1_then_sub_32
3215 },
3216 { // SPERC
3217 21, // sub_32 -> SPERC
3218 21, // sub_32_hi_phony -> SPERC
3219 0, // sub_64
3220 0, // sub_64_hi_phony
3221 0, // sub_dmr0
3222 0, // sub_dmr1
3223 0, // sub_dmrrow0
3224 0, // sub_dmrrow1
3225 0, // sub_dmrrowp0
3226 0, // sub_dmrrowp1
3227 0, // sub_eq
3228 0, // sub_fp0
3229 0, // sub_fp1
3230 0, // sub_gp8_x0
3231 0, // sub_gp8_x1
3232 0, // sub_gt
3233 0, // sub_lt
3234 0, // sub_pair0
3235 0, // sub_pair1
3236 0, // sub_un
3237 0, // sub_vsx0
3238 0, // sub_vsx1
3239 0, // sub_wacc_hi
3240 0, // sub_wacc_lo
3241 0, // sub_vsx1_then_sub_64
3242 0, // sub_vsx1_then_sub_64_hi_phony
3243 0, // sub_pair1_then_sub_64
3244 0, // sub_pair1_then_sub_64_hi_phony
3245 0, // sub_pair1_then_sub_vsx0
3246 0, // sub_pair1_then_sub_vsx1
3247 0, // sub_pair1_then_sub_vsx1_then_sub_64
3248 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3249 0, // sub_dmrrowp1_then_sub_dmrrow0
3250 0, // sub_dmrrowp1_then_sub_dmrrow1
3251 0, // sub_wacc_hi_then_sub_dmrrow0
3252 0, // sub_wacc_hi_then_sub_dmrrow1
3253 0, // sub_wacc_hi_then_sub_dmrrowp0
3254 0, // sub_wacc_hi_then_sub_dmrrowp1
3255 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3256 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3257 0, // sub_dmr1_then_sub_dmrrow0
3258 0, // sub_dmr1_then_sub_dmrrow1
3259 0, // sub_dmr1_then_sub_dmrrowp0
3260 0, // sub_dmr1_then_sub_dmrrowp1
3261 0, // sub_dmr1_then_sub_wacc_hi
3262 0, // sub_dmr1_then_sub_wacc_lo
3263 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3264 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3265 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3266 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3267 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3268 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3269 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3270 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3271 0, // sub_gp8_x1_then_sub_32
3272 },
3273 { // VFHRC
3274 0, // sub_32
3275 0, // sub_32_hi_phony
3276 0, // sub_64
3277 0, // sub_64_hi_phony
3278 0, // sub_dmr0
3279 0, // sub_dmr1
3280 0, // sub_dmrrow0
3281 0, // sub_dmrrow1
3282 0, // sub_dmrrowp0
3283 0, // sub_dmrrowp1
3284 0, // sub_eq
3285 0, // sub_fp0
3286 0, // sub_fp1
3287 0, // sub_gp8_x0
3288 0, // sub_gp8_x1
3289 0, // sub_gt
3290 0, // sub_lt
3291 0, // sub_pair0
3292 0, // sub_pair1
3293 0, // sub_un
3294 0, // sub_vsx0
3295 0, // sub_vsx1
3296 0, // sub_wacc_hi
3297 0, // sub_wacc_lo
3298 0, // sub_vsx1_then_sub_64
3299 0, // sub_vsx1_then_sub_64_hi_phony
3300 0, // sub_pair1_then_sub_64
3301 0, // sub_pair1_then_sub_64_hi_phony
3302 0, // sub_pair1_then_sub_vsx0
3303 0, // sub_pair1_then_sub_vsx1
3304 0, // sub_pair1_then_sub_vsx1_then_sub_64
3305 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3306 0, // sub_dmrrowp1_then_sub_dmrrow0
3307 0, // sub_dmrrowp1_then_sub_dmrrow1
3308 0, // sub_wacc_hi_then_sub_dmrrow0
3309 0, // sub_wacc_hi_then_sub_dmrrow1
3310 0, // sub_wacc_hi_then_sub_dmrrowp0
3311 0, // sub_wacc_hi_then_sub_dmrrowp1
3312 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3313 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3314 0, // sub_dmr1_then_sub_dmrrow0
3315 0, // sub_dmr1_then_sub_dmrrow1
3316 0, // sub_dmr1_then_sub_dmrrowp0
3317 0, // sub_dmr1_then_sub_dmrrowp1
3318 0, // sub_dmr1_then_sub_wacc_hi
3319 0, // sub_dmr1_then_sub_wacc_lo
3320 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3321 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3322 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3323 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3324 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3325 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3326 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3327 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3328 0, // sub_gp8_x1_then_sub_32
3329 },
3330 { // VFRC
3331 0, // sub_32
3332 0, // sub_32_hi_phony
3333 0, // sub_64
3334 0, // sub_64_hi_phony
3335 0, // sub_dmr0
3336 0, // sub_dmr1
3337 0, // sub_dmrrow0
3338 0, // sub_dmrrow1
3339 0, // sub_dmrrowp0
3340 0, // sub_dmrrowp1
3341 0, // sub_eq
3342 0, // sub_fp0
3343 0, // sub_fp1
3344 0, // sub_gp8_x0
3345 0, // sub_gp8_x1
3346 0, // sub_gt
3347 0, // sub_lt
3348 0, // sub_pair0
3349 0, // sub_pair1
3350 0, // sub_un
3351 0, // sub_vsx0
3352 0, // sub_vsx1
3353 0, // sub_wacc_hi
3354 0, // sub_wacc_lo
3355 0, // sub_vsx1_then_sub_64
3356 0, // sub_vsx1_then_sub_64_hi_phony
3357 0, // sub_pair1_then_sub_64
3358 0, // sub_pair1_then_sub_64_hi_phony
3359 0, // sub_pair1_then_sub_vsx0
3360 0, // sub_pair1_then_sub_vsx1
3361 0, // sub_pair1_then_sub_vsx1_then_sub_64
3362 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3363 0, // sub_dmrrowp1_then_sub_dmrrow0
3364 0, // sub_dmrrowp1_then_sub_dmrrow1
3365 0, // sub_wacc_hi_then_sub_dmrrow0
3366 0, // sub_wacc_hi_then_sub_dmrrow1
3367 0, // sub_wacc_hi_then_sub_dmrrowp0
3368 0, // sub_wacc_hi_then_sub_dmrrowp1
3369 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3370 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3371 0, // sub_dmr1_then_sub_dmrrow0
3372 0, // sub_dmr1_then_sub_dmrrow1
3373 0, // sub_dmr1_then_sub_dmrrowp0
3374 0, // sub_dmr1_then_sub_dmrrowp1
3375 0, // sub_dmr1_then_sub_wacc_hi
3376 0, // sub_dmr1_then_sub_wacc_lo
3377 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3378 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3379 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3380 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3381 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3382 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3383 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3384 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3385 0, // sub_gp8_x1_then_sub_32
3386 },
3387 { // SPERC_with_sub_32_in_GPRC_NOR0
3388 24, // sub_32 -> SPERC_with_sub_32_in_GPRC_NOR0
3389 24, // sub_32_hi_phony -> SPERC_with_sub_32_in_GPRC_NOR0
3390 0, // sub_64
3391 0, // sub_64_hi_phony
3392 0, // sub_dmr0
3393 0, // sub_dmr1
3394 0, // sub_dmrrow0
3395 0, // sub_dmrrow1
3396 0, // sub_dmrrowp0
3397 0, // sub_dmrrowp1
3398 0, // sub_eq
3399 0, // sub_fp0
3400 0, // sub_fp1
3401 0, // sub_gp8_x0
3402 0, // sub_gp8_x1
3403 0, // sub_gt
3404 0, // sub_lt
3405 0, // sub_pair0
3406 0, // sub_pair1
3407 0, // sub_un
3408 0, // sub_vsx0
3409 0, // sub_vsx1
3410 0, // sub_wacc_hi
3411 0, // sub_wacc_lo
3412 0, // sub_vsx1_then_sub_64
3413 0, // sub_vsx1_then_sub_64_hi_phony
3414 0, // sub_pair1_then_sub_64
3415 0, // sub_pair1_then_sub_64_hi_phony
3416 0, // sub_pair1_then_sub_vsx0
3417 0, // sub_pair1_then_sub_vsx1
3418 0, // sub_pair1_then_sub_vsx1_then_sub_64
3419 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3420 0, // sub_dmrrowp1_then_sub_dmrrow0
3421 0, // sub_dmrrowp1_then_sub_dmrrow1
3422 0, // sub_wacc_hi_then_sub_dmrrow0
3423 0, // sub_wacc_hi_then_sub_dmrrow1
3424 0, // sub_wacc_hi_then_sub_dmrrowp0
3425 0, // sub_wacc_hi_then_sub_dmrrowp1
3426 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3427 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3428 0, // sub_dmr1_then_sub_dmrrow0
3429 0, // sub_dmr1_then_sub_dmrrow1
3430 0, // sub_dmr1_then_sub_dmrrowp0
3431 0, // sub_dmr1_then_sub_dmrrowp1
3432 0, // sub_dmr1_then_sub_wacc_hi
3433 0, // sub_dmr1_then_sub_wacc_lo
3434 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3435 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3436 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3437 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3438 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3439 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3440 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3441 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3442 0, // sub_gp8_x1_then_sub_32
3443 },
3444 { // SPILLTOVSRRC_and_VFRC
3445 0, // sub_32
3446 0, // sub_32_hi_phony
3447 0, // sub_64
3448 0, // sub_64_hi_phony
3449 0, // sub_dmr0
3450 0, // sub_dmr1
3451 0, // sub_dmrrow0
3452 0, // sub_dmrrow1
3453 0, // sub_dmrrowp0
3454 0, // sub_dmrrowp1
3455 0, // sub_eq
3456 0, // sub_fp0
3457 0, // sub_fp1
3458 0, // sub_gp8_x0
3459 0, // sub_gp8_x1
3460 0, // sub_gt
3461 0, // sub_lt
3462 0, // sub_pair0
3463 0, // sub_pair1
3464 0, // sub_un
3465 0, // sub_vsx0
3466 0, // sub_vsx1
3467 0, // sub_wacc_hi
3468 0, // sub_wacc_lo
3469 0, // sub_vsx1_then_sub_64
3470 0, // sub_vsx1_then_sub_64_hi_phony
3471 0, // sub_pair1_then_sub_64
3472 0, // sub_pair1_then_sub_64_hi_phony
3473 0, // sub_pair1_then_sub_vsx0
3474 0, // sub_pair1_then_sub_vsx1
3475 0, // sub_pair1_then_sub_vsx1_then_sub_64
3476 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3477 0, // sub_dmrrowp1_then_sub_dmrrow0
3478 0, // sub_dmrrowp1_then_sub_dmrrow1
3479 0, // sub_wacc_hi_then_sub_dmrrow0
3480 0, // sub_wacc_hi_then_sub_dmrrow1
3481 0, // sub_wacc_hi_then_sub_dmrrowp0
3482 0, // sub_wacc_hi_then_sub_dmrrowp1
3483 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3484 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3485 0, // sub_dmr1_then_sub_dmrrow0
3486 0, // sub_dmr1_then_sub_dmrrow1
3487 0, // sub_dmr1_then_sub_dmrrowp0
3488 0, // sub_dmr1_then_sub_dmrrowp1
3489 0, // sub_dmr1_then_sub_wacc_hi
3490 0, // sub_dmr1_then_sub_wacc_lo
3491 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3492 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3493 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3494 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3495 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3496 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3497 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3498 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3499 0, // sub_gp8_x1_then_sub_32
3500 },
3501 { // SPILLTOVSRRC_and_F4RC
3502 0, // sub_32
3503 0, // sub_32_hi_phony
3504 0, // sub_64
3505 0, // sub_64_hi_phony
3506 0, // sub_dmr0
3507 0, // sub_dmr1
3508 0, // sub_dmrrow0
3509 0, // sub_dmrrow1
3510 0, // sub_dmrrowp0
3511 0, // sub_dmrrowp1
3512 0, // sub_eq
3513 0, // sub_fp0
3514 0, // sub_fp1
3515 0, // sub_gp8_x0
3516 0, // sub_gp8_x1
3517 0, // sub_gt
3518 0, // sub_lt
3519 0, // sub_pair0
3520 0, // sub_pair1
3521 0, // sub_un
3522 0, // sub_vsx0
3523 0, // sub_vsx1
3524 0, // sub_wacc_hi
3525 0, // sub_wacc_lo
3526 0, // sub_vsx1_then_sub_64
3527 0, // sub_vsx1_then_sub_64_hi_phony
3528 0, // sub_pair1_then_sub_64
3529 0, // sub_pair1_then_sub_64_hi_phony
3530 0, // sub_pair1_then_sub_vsx0
3531 0, // sub_pair1_then_sub_vsx1
3532 0, // sub_pair1_then_sub_vsx1_then_sub_64
3533 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3534 0, // sub_dmrrowp1_then_sub_dmrrow0
3535 0, // sub_dmrrowp1_then_sub_dmrrow1
3536 0, // sub_wacc_hi_then_sub_dmrrow0
3537 0, // sub_wacc_hi_then_sub_dmrrow1
3538 0, // sub_wacc_hi_then_sub_dmrrowp0
3539 0, // sub_wacc_hi_then_sub_dmrrowp1
3540 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3541 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3542 0, // sub_dmr1_then_sub_dmrrow0
3543 0, // sub_dmr1_then_sub_dmrrow1
3544 0, // sub_dmr1_then_sub_dmrrowp0
3545 0, // sub_dmr1_then_sub_dmrrowp1
3546 0, // sub_dmr1_then_sub_wacc_hi
3547 0, // sub_dmr1_then_sub_wacc_lo
3548 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3549 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3550 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3551 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3552 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3553 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3554 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3555 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3556 0, // sub_gp8_x1_then_sub_32
3557 },
3558 { // CTRRC8
3559 0, // sub_32
3560 0, // sub_32_hi_phony
3561 0, // sub_64
3562 0, // sub_64_hi_phony
3563 0, // sub_dmr0
3564 0, // sub_dmr1
3565 0, // sub_dmrrow0
3566 0, // sub_dmrrow1
3567 0, // sub_dmrrowp0
3568 0, // sub_dmrrowp1
3569 0, // sub_eq
3570 0, // sub_fp0
3571 0, // sub_fp1
3572 0, // sub_gp8_x0
3573 0, // sub_gp8_x1
3574 0, // sub_gt
3575 0, // sub_lt
3576 0, // sub_pair0
3577 0, // sub_pair1
3578 0, // sub_un
3579 0, // sub_vsx0
3580 0, // sub_vsx1
3581 0, // sub_wacc_hi
3582 0, // sub_wacc_lo
3583 0, // sub_vsx1_then_sub_64
3584 0, // sub_vsx1_then_sub_64_hi_phony
3585 0, // sub_pair1_then_sub_64
3586 0, // sub_pair1_then_sub_64_hi_phony
3587 0, // sub_pair1_then_sub_vsx0
3588 0, // sub_pair1_then_sub_vsx1
3589 0, // sub_pair1_then_sub_vsx1_then_sub_64
3590 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3591 0, // sub_dmrrowp1_then_sub_dmrrow0
3592 0, // sub_dmrrowp1_then_sub_dmrrow1
3593 0, // sub_wacc_hi_then_sub_dmrrow0
3594 0, // sub_wacc_hi_then_sub_dmrrow1
3595 0, // sub_wacc_hi_then_sub_dmrrowp0
3596 0, // sub_wacc_hi_then_sub_dmrrowp1
3597 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3598 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3599 0, // sub_dmr1_then_sub_dmrrow0
3600 0, // sub_dmr1_then_sub_dmrrow1
3601 0, // sub_dmr1_then_sub_dmrrowp0
3602 0, // sub_dmr1_then_sub_dmrrowp1
3603 0, // sub_dmr1_then_sub_wacc_hi
3604 0, // sub_dmr1_then_sub_wacc_lo
3605 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3606 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3607 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3608 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3609 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3610 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3611 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3612 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3613 0, // sub_gp8_x1_then_sub_32
3614 },
3615 { // LR8RC
3616 0, // sub_32
3617 0, // sub_32_hi_phony
3618 0, // sub_64
3619 0, // sub_64_hi_phony
3620 0, // sub_dmr0
3621 0, // sub_dmr1
3622 0, // sub_dmrrow0
3623 0, // sub_dmrrow1
3624 0, // sub_dmrrowp0
3625 0, // sub_dmrrowp1
3626 0, // sub_eq
3627 0, // sub_fp0
3628 0, // sub_fp1
3629 0, // sub_gp8_x0
3630 0, // sub_gp8_x1
3631 0, // sub_gt
3632 0, // sub_lt
3633 0, // sub_pair0
3634 0, // sub_pair1
3635 0, // sub_un
3636 0, // sub_vsx0
3637 0, // sub_vsx1
3638 0, // sub_wacc_hi
3639 0, // sub_wacc_lo
3640 0, // sub_vsx1_then_sub_64
3641 0, // sub_vsx1_then_sub_64_hi_phony
3642 0, // sub_pair1_then_sub_64
3643 0, // sub_pair1_then_sub_64_hi_phony
3644 0, // sub_pair1_then_sub_vsx0
3645 0, // sub_pair1_then_sub_vsx1
3646 0, // sub_pair1_then_sub_vsx1_then_sub_64
3647 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3648 0, // sub_dmrrowp1_then_sub_dmrrow0
3649 0, // sub_dmrrowp1_then_sub_dmrrow1
3650 0, // sub_wacc_hi_then_sub_dmrrow0
3651 0, // sub_wacc_hi_then_sub_dmrrow1
3652 0, // sub_wacc_hi_then_sub_dmrrowp0
3653 0, // sub_wacc_hi_then_sub_dmrrowp1
3654 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3655 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3656 0, // sub_dmr1_then_sub_dmrrow0
3657 0, // sub_dmr1_then_sub_dmrrow1
3658 0, // sub_dmr1_then_sub_dmrrowp0
3659 0, // sub_dmr1_then_sub_dmrrowp1
3660 0, // sub_dmr1_then_sub_wacc_hi
3661 0, // sub_dmr1_then_sub_wacc_lo
3662 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3663 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3664 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3665 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3666 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3667 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3668 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3669 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3670 0, // sub_gp8_x1_then_sub_32
3671 },
3672 { // DMRROWRC
3673 0, // sub_32
3674 0, // sub_32_hi_phony
3675 0, // sub_64
3676 0, // sub_64_hi_phony
3677 0, // sub_dmr0
3678 0, // sub_dmr1
3679 0, // sub_dmrrow0
3680 0, // sub_dmrrow1
3681 0, // sub_dmrrowp0
3682 0, // sub_dmrrowp1
3683 0, // sub_eq
3684 0, // sub_fp0
3685 0, // sub_fp1
3686 0, // sub_gp8_x0
3687 0, // sub_gp8_x1
3688 0, // sub_gt
3689 0, // sub_lt
3690 0, // sub_pair0
3691 0, // sub_pair1
3692 0, // sub_un
3693 0, // sub_vsx0
3694 0, // sub_vsx1
3695 0, // sub_wacc_hi
3696 0, // sub_wacc_lo
3697 0, // sub_vsx1_then_sub_64
3698 0, // sub_vsx1_then_sub_64_hi_phony
3699 0, // sub_pair1_then_sub_64
3700 0, // sub_pair1_then_sub_64_hi_phony
3701 0, // sub_pair1_then_sub_vsx0
3702 0, // sub_pair1_then_sub_vsx1
3703 0, // sub_pair1_then_sub_vsx1_then_sub_64
3704 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3705 0, // sub_dmrrowp1_then_sub_dmrrow0
3706 0, // sub_dmrrowp1_then_sub_dmrrow1
3707 0, // sub_wacc_hi_then_sub_dmrrow0
3708 0, // sub_wacc_hi_then_sub_dmrrow1
3709 0, // sub_wacc_hi_then_sub_dmrrowp0
3710 0, // sub_wacc_hi_then_sub_dmrrowp1
3711 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3712 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3713 0, // sub_dmr1_then_sub_dmrrow0
3714 0, // sub_dmr1_then_sub_dmrrow1
3715 0, // sub_dmr1_then_sub_dmrrowp0
3716 0, // sub_dmr1_then_sub_dmrrowp1
3717 0, // sub_dmr1_then_sub_wacc_hi
3718 0, // sub_dmr1_then_sub_wacc_lo
3719 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3720 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3721 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3722 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3723 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3724 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3725 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3726 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3727 0, // sub_gp8_x1_then_sub_32
3728 },
3729 { // VSRC
3730 0, // sub_32
3731 0, // sub_32_hi_phony
3732 30, // sub_64 -> VSRC
3733 30, // sub_64_hi_phony -> VSRC
3734 0, // sub_dmr0
3735 0, // sub_dmr1
3736 0, // sub_dmrrow0
3737 0, // sub_dmrrow1
3738 0, // sub_dmrrowp0
3739 0, // sub_dmrrowp1
3740 0, // sub_eq
3741 0, // sub_fp0
3742 0, // sub_fp1
3743 0, // sub_gp8_x0
3744 0, // sub_gp8_x1
3745 0, // sub_gt
3746 0, // sub_lt
3747 0, // sub_pair0
3748 0, // sub_pair1
3749 0, // sub_un
3750 0, // sub_vsx0
3751 0, // sub_vsx1
3752 0, // sub_wacc_hi
3753 0, // sub_wacc_lo
3754 0, // sub_vsx1_then_sub_64
3755 0, // sub_vsx1_then_sub_64_hi_phony
3756 0, // sub_pair1_then_sub_64
3757 0, // sub_pair1_then_sub_64_hi_phony
3758 0, // sub_pair1_then_sub_vsx0
3759 0, // sub_pair1_then_sub_vsx1
3760 0, // sub_pair1_then_sub_vsx1_then_sub_64
3761 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3762 0, // sub_dmrrowp1_then_sub_dmrrow0
3763 0, // sub_dmrrowp1_then_sub_dmrrow1
3764 0, // sub_wacc_hi_then_sub_dmrrow0
3765 0, // sub_wacc_hi_then_sub_dmrrow1
3766 0, // sub_wacc_hi_then_sub_dmrrowp0
3767 0, // sub_wacc_hi_then_sub_dmrrowp1
3768 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3769 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3770 0, // sub_dmr1_then_sub_dmrrow0
3771 0, // sub_dmr1_then_sub_dmrrow1
3772 0, // sub_dmr1_then_sub_dmrrowp0
3773 0, // sub_dmr1_then_sub_dmrrowp1
3774 0, // sub_dmr1_then_sub_wacc_hi
3775 0, // sub_dmr1_then_sub_wacc_lo
3776 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3777 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3778 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3779 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3780 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3781 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3782 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3783 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3784 0, // sub_gp8_x1_then_sub_32
3785 },
3786 { // VSRC_with_sub_64_in_SPILLTOVSRRC
3787 0, // sub_32
3788 0, // sub_32_hi_phony
3789 31, // sub_64 -> VSRC_with_sub_64_in_SPILLTOVSRRC
3790 31, // sub_64_hi_phony -> VSRC_with_sub_64_in_SPILLTOVSRRC
3791 0, // sub_dmr0
3792 0, // sub_dmr1
3793 0, // sub_dmrrow0
3794 0, // sub_dmrrow1
3795 0, // sub_dmrrowp0
3796 0, // sub_dmrrowp1
3797 0, // sub_eq
3798 0, // sub_fp0
3799 0, // sub_fp1
3800 0, // sub_gp8_x0
3801 0, // sub_gp8_x1
3802 0, // sub_gt
3803 0, // sub_lt
3804 0, // sub_pair0
3805 0, // sub_pair1
3806 0, // sub_un
3807 0, // sub_vsx0
3808 0, // sub_vsx1
3809 0, // sub_wacc_hi
3810 0, // sub_wacc_lo
3811 0, // sub_vsx1_then_sub_64
3812 0, // sub_vsx1_then_sub_64_hi_phony
3813 0, // sub_pair1_then_sub_64
3814 0, // sub_pair1_then_sub_64_hi_phony
3815 0, // sub_pair1_then_sub_vsx0
3816 0, // sub_pair1_then_sub_vsx1
3817 0, // sub_pair1_then_sub_vsx1_then_sub_64
3818 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3819 0, // sub_dmrrowp1_then_sub_dmrrow0
3820 0, // sub_dmrrowp1_then_sub_dmrrow1
3821 0, // sub_wacc_hi_then_sub_dmrrow0
3822 0, // sub_wacc_hi_then_sub_dmrrow1
3823 0, // sub_wacc_hi_then_sub_dmrrowp0
3824 0, // sub_wacc_hi_then_sub_dmrrowp1
3825 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3826 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3827 0, // sub_dmr1_then_sub_dmrrow0
3828 0, // sub_dmr1_then_sub_dmrrow1
3829 0, // sub_dmr1_then_sub_dmrrowp0
3830 0, // sub_dmr1_then_sub_dmrrowp1
3831 0, // sub_dmr1_then_sub_wacc_hi
3832 0, // sub_dmr1_then_sub_wacc_lo
3833 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3834 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3835 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3836 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3837 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3838 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3839 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3840 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3841 0, // sub_gp8_x1_then_sub_32
3842 },
3843 { // VRRC
3844 0, // sub_32
3845 0, // sub_32_hi_phony
3846 32, // sub_64 -> VRRC
3847 32, // sub_64_hi_phony -> VRRC
3848 0, // sub_dmr0
3849 0, // sub_dmr1
3850 0, // sub_dmrrow0
3851 0, // sub_dmrrow1
3852 0, // sub_dmrrowp0
3853 0, // sub_dmrrowp1
3854 0, // sub_eq
3855 0, // sub_fp0
3856 0, // sub_fp1
3857 0, // sub_gp8_x0
3858 0, // sub_gp8_x1
3859 0, // sub_gt
3860 0, // sub_lt
3861 0, // sub_pair0
3862 0, // sub_pair1
3863 0, // sub_un
3864 0, // sub_vsx0
3865 0, // sub_vsx1
3866 0, // sub_wacc_hi
3867 0, // sub_wacc_lo
3868 0, // sub_vsx1_then_sub_64
3869 0, // sub_vsx1_then_sub_64_hi_phony
3870 0, // sub_pair1_then_sub_64
3871 0, // sub_pair1_then_sub_64_hi_phony
3872 0, // sub_pair1_then_sub_vsx0
3873 0, // sub_pair1_then_sub_vsx1
3874 0, // sub_pair1_then_sub_vsx1_then_sub_64
3875 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3876 0, // sub_dmrrowp1_then_sub_dmrrow0
3877 0, // sub_dmrrowp1_then_sub_dmrrow1
3878 0, // sub_wacc_hi_then_sub_dmrrow0
3879 0, // sub_wacc_hi_then_sub_dmrrow1
3880 0, // sub_wacc_hi_then_sub_dmrrowp0
3881 0, // sub_wacc_hi_then_sub_dmrrowp1
3882 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3883 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3884 0, // sub_dmr1_then_sub_dmrrow0
3885 0, // sub_dmr1_then_sub_dmrrow1
3886 0, // sub_dmr1_then_sub_dmrrowp0
3887 0, // sub_dmr1_then_sub_dmrrowp1
3888 0, // sub_dmr1_then_sub_wacc_hi
3889 0, // sub_dmr1_then_sub_wacc_lo
3890 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3891 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3892 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3893 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3894 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3895 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3896 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3897 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3898 0, // sub_gp8_x1_then_sub_32
3899 },
3900 { // VSLRC
3901 0, // sub_32
3902 0, // sub_32_hi_phony
3903 33, // sub_64 -> VSLRC
3904 33, // sub_64_hi_phony -> VSLRC
3905 0, // sub_dmr0
3906 0, // sub_dmr1
3907 0, // sub_dmrrow0
3908 0, // sub_dmrrow1
3909 0, // sub_dmrrowp0
3910 0, // sub_dmrrowp1
3911 0, // sub_eq
3912 0, // sub_fp0
3913 0, // sub_fp1
3914 0, // sub_gp8_x0
3915 0, // sub_gp8_x1
3916 0, // sub_gt
3917 0, // sub_lt
3918 0, // sub_pair0
3919 0, // sub_pair1
3920 0, // sub_un
3921 0, // sub_vsx0
3922 0, // sub_vsx1
3923 0, // sub_wacc_hi
3924 0, // sub_wacc_lo
3925 0, // sub_vsx1_then_sub_64
3926 0, // sub_vsx1_then_sub_64_hi_phony
3927 0, // sub_pair1_then_sub_64
3928 0, // sub_pair1_then_sub_64_hi_phony
3929 0, // sub_pair1_then_sub_vsx0
3930 0, // sub_pair1_then_sub_vsx1
3931 0, // sub_pair1_then_sub_vsx1_then_sub_64
3932 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3933 0, // sub_dmrrowp1_then_sub_dmrrow0
3934 0, // sub_dmrrowp1_then_sub_dmrrow1
3935 0, // sub_wacc_hi_then_sub_dmrrow0
3936 0, // sub_wacc_hi_then_sub_dmrrow1
3937 0, // sub_wacc_hi_then_sub_dmrrowp0
3938 0, // sub_wacc_hi_then_sub_dmrrowp1
3939 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3940 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3941 0, // sub_dmr1_then_sub_dmrrow0
3942 0, // sub_dmr1_then_sub_dmrrow1
3943 0, // sub_dmr1_then_sub_dmrrowp0
3944 0, // sub_dmr1_then_sub_dmrrowp1
3945 0, // sub_dmr1_then_sub_wacc_hi
3946 0, // sub_dmr1_then_sub_wacc_lo
3947 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3948 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3949 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3950 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3951 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3952 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3953 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3954 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3955 0, // sub_gp8_x1_then_sub_32
3956 },
3957 { // VRRC_with_sub_64_in_SPILLTOVSRRC
3958 0, // sub_32
3959 0, // sub_32_hi_phony
3960 34, // sub_64 -> VRRC_with_sub_64_in_SPILLTOVSRRC
3961 34, // sub_64_hi_phony -> VRRC_with_sub_64_in_SPILLTOVSRRC
3962 0, // sub_dmr0
3963 0, // sub_dmr1
3964 0, // sub_dmrrow0
3965 0, // sub_dmrrow1
3966 0, // sub_dmrrowp0
3967 0, // sub_dmrrowp1
3968 0, // sub_eq
3969 0, // sub_fp0
3970 0, // sub_fp1
3971 0, // sub_gp8_x0
3972 0, // sub_gp8_x1
3973 0, // sub_gt
3974 0, // sub_lt
3975 0, // sub_pair0
3976 0, // sub_pair1
3977 0, // sub_un
3978 0, // sub_vsx0
3979 0, // sub_vsx1
3980 0, // sub_wacc_hi
3981 0, // sub_wacc_lo
3982 0, // sub_vsx1_then_sub_64
3983 0, // sub_vsx1_then_sub_64_hi_phony
3984 0, // sub_pair1_then_sub_64
3985 0, // sub_pair1_then_sub_64_hi_phony
3986 0, // sub_pair1_then_sub_vsx0
3987 0, // sub_pair1_then_sub_vsx1
3988 0, // sub_pair1_then_sub_vsx1_then_sub_64
3989 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3990 0, // sub_dmrrowp1_then_sub_dmrrow0
3991 0, // sub_dmrrowp1_then_sub_dmrrow1
3992 0, // sub_wacc_hi_then_sub_dmrrow0
3993 0, // sub_wacc_hi_then_sub_dmrrow1
3994 0, // sub_wacc_hi_then_sub_dmrrowp0
3995 0, // sub_wacc_hi_then_sub_dmrrowp1
3996 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3997 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3998 0, // sub_dmr1_then_sub_dmrrow0
3999 0, // sub_dmr1_then_sub_dmrrow1
4000 0, // sub_dmr1_then_sub_dmrrowp0
4001 0, // sub_dmr1_then_sub_dmrrowp1
4002 0, // sub_dmr1_then_sub_wacc_hi
4003 0, // sub_dmr1_then_sub_wacc_lo
4004 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4005 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4006 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4007 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4008 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4009 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4010 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4011 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4012 0, // sub_gp8_x1_then_sub_32
4013 },
4014 { // FpRC
4015 0, // sub_32
4016 0, // sub_32_hi_phony
4017 0, // sub_64
4018 0, // sub_64_hi_phony
4019 0, // sub_dmr0
4020 0, // sub_dmr1
4021 0, // sub_dmrrow0
4022 0, // sub_dmrrow1
4023 0, // sub_dmrrowp0
4024 0, // sub_dmrrowp1
4025 0, // sub_eq
4026 35, // sub_fp0 -> FpRC
4027 35, // sub_fp1 -> FpRC
4028 0, // sub_gp8_x0
4029 0, // sub_gp8_x1
4030 0, // sub_gt
4031 0, // sub_lt
4032 0, // sub_pair0
4033 0, // sub_pair1
4034 0, // sub_un
4035 0, // sub_vsx0
4036 0, // sub_vsx1
4037 0, // sub_wacc_hi
4038 0, // sub_wacc_lo
4039 0, // sub_vsx1_then_sub_64
4040 0, // sub_vsx1_then_sub_64_hi_phony
4041 0, // sub_pair1_then_sub_64
4042 0, // sub_pair1_then_sub_64_hi_phony
4043 0, // sub_pair1_then_sub_vsx0
4044 0, // sub_pair1_then_sub_vsx1
4045 0, // sub_pair1_then_sub_vsx1_then_sub_64
4046 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4047 0, // sub_dmrrowp1_then_sub_dmrrow0
4048 0, // sub_dmrrowp1_then_sub_dmrrow1
4049 0, // sub_wacc_hi_then_sub_dmrrow0
4050 0, // sub_wacc_hi_then_sub_dmrrow1
4051 0, // sub_wacc_hi_then_sub_dmrrowp0
4052 0, // sub_wacc_hi_then_sub_dmrrowp1
4053 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4054 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4055 0, // sub_dmr1_then_sub_dmrrow0
4056 0, // sub_dmr1_then_sub_dmrrow1
4057 0, // sub_dmr1_then_sub_dmrrowp0
4058 0, // sub_dmr1_then_sub_dmrrowp1
4059 0, // sub_dmr1_then_sub_wacc_hi
4060 0, // sub_dmr1_then_sub_wacc_lo
4061 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4062 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4063 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4064 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4065 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4066 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4067 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4068 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4069 0, // sub_gp8_x1_then_sub_32
4070 },
4071 { // G8pRC
4072 36, // sub_32 -> G8pRC
4073 0, // sub_32_hi_phony
4074 0, // sub_64
4075 0, // sub_64_hi_phony
4076 0, // sub_dmr0
4077 0, // sub_dmr1
4078 0, // sub_dmrrow0
4079 0, // sub_dmrrow1
4080 0, // sub_dmrrowp0
4081 0, // sub_dmrrowp1
4082 0, // sub_eq
4083 0, // sub_fp0
4084 0, // sub_fp1
4085 36, // sub_gp8_x0 -> G8pRC
4086 36, // sub_gp8_x1 -> G8pRC
4087 0, // sub_gt
4088 0, // sub_lt
4089 0, // sub_pair0
4090 0, // sub_pair1
4091 0, // sub_un
4092 0, // sub_vsx0
4093 0, // sub_vsx1
4094 0, // sub_wacc_hi
4095 0, // sub_wacc_lo
4096 0, // sub_vsx1_then_sub_64
4097 0, // sub_vsx1_then_sub_64_hi_phony
4098 0, // sub_pair1_then_sub_64
4099 0, // sub_pair1_then_sub_64_hi_phony
4100 0, // sub_pair1_then_sub_vsx0
4101 0, // sub_pair1_then_sub_vsx1
4102 0, // sub_pair1_then_sub_vsx1_then_sub_64
4103 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4104 0, // sub_dmrrowp1_then_sub_dmrrow0
4105 0, // sub_dmrrowp1_then_sub_dmrrow1
4106 0, // sub_wacc_hi_then_sub_dmrrow0
4107 0, // sub_wacc_hi_then_sub_dmrrow1
4108 0, // sub_wacc_hi_then_sub_dmrrowp0
4109 0, // sub_wacc_hi_then_sub_dmrrowp1
4110 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4111 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4112 0, // sub_dmr1_then_sub_dmrrow0
4113 0, // sub_dmr1_then_sub_dmrrow1
4114 0, // sub_dmr1_then_sub_dmrrowp0
4115 0, // sub_dmr1_then_sub_dmrrowp1
4116 0, // sub_dmr1_then_sub_wacc_hi
4117 0, // sub_dmr1_then_sub_wacc_lo
4118 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4119 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4120 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4121 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4122 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4123 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4124 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4125 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4126 36, // sub_gp8_x1_then_sub_32 -> G8pRC
4127 },
4128 { // G8pRC_with_sub_32_in_GPRC_NOR0
4129 37, // sub_32 -> G8pRC_with_sub_32_in_GPRC_NOR0
4130 0, // sub_32_hi_phony
4131 0, // sub_64
4132 0, // sub_64_hi_phony
4133 0, // sub_dmr0
4134 0, // sub_dmr1
4135 0, // sub_dmrrow0
4136 0, // sub_dmrrow1
4137 0, // sub_dmrrowp0
4138 0, // sub_dmrrowp1
4139 0, // sub_eq
4140 0, // sub_fp0
4141 0, // sub_fp1
4142 37, // sub_gp8_x0 -> G8pRC_with_sub_32_in_GPRC_NOR0
4143 37, // sub_gp8_x1 -> G8pRC_with_sub_32_in_GPRC_NOR0
4144 0, // sub_gt
4145 0, // sub_lt
4146 0, // sub_pair0
4147 0, // sub_pair1
4148 0, // sub_un
4149 0, // sub_vsx0
4150 0, // sub_vsx1
4151 0, // sub_wacc_hi
4152 0, // sub_wacc_lo
4153 0, // sub_vsx1_then_sub_64
4154 0, // sub_vsx1_then_sub_64_hi_phony
4155 0, // sub_pair1_then_sub_64
4156 0, // sub_pair1_then_sub_64_hi_phony
4157 0, // sub_pair1_then_sub_vsx0
4158 0, // sub_pair1_then_sub_vsx1
4159 0, // sub_pair1_then_sub_vsx1_then_sub_64
4160 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4161 0, // sub_dmrrowp1_then_sub_dmrrow0
4162 0, // sub_dmrrowp1_then_sub_dmrrow1
4163 0, // sub_wacc_hi_then_sub_dmrrow0
4164 0, // sub_wacc_hi_then_sub_dmrrow1
4165 0, // sub_wacc_hi_then_sub_dmrrowp0
4166 0, // sub_wacc_hi_then_sub_dmrrowp1
4167 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4168 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4169 0, // sub_dmr1_then_sub_dmrrow0
4170 0, // sub_dmr1_then_sub_dmrrow1
4171 0, // sub_dmr1_then_sub_dmrrowp0
4172 0, // sub_dmr1_then_sub_dmrrowp1
4173 0, // sub_dmr1_then_sub_wacc_hi
4174 0, // sub_dmr1_then_sub_wacc_lo
4175 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4176 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4177 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4178 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4179 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4180 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4181 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4182 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4183 37, // sub_gp8_x1_then_sub_32 -> G8pRC_with_sub_32_in_GPRC_NOR0
4184 },
4185 { // VSLRC_with_sub_64_in_SPILLTOVSRRC
4186 0, // sub_32
4187 0, // sub_32_hi_phony
4188 38, // sub_64 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
4189 38, // sub_64_hi_phony -> VSLRC_with_sub_64_in_SPILLTOVSRRC
4190 0, // sub_dmr0
4191 0, // sub_dmr1
4192 0, // sub_dmrrow0
4193 0, // sub_dmrrow1
4194 0, // sub_dmrrowp0
4195 0, // sub_dmrrowp1
4196 0, // sub_eq
4197 0, // sub_fp0
4198 0, // sub_fp1
4199 0, // sub_gp8_x0
4200 0, // sub_gp8_x1
4201 0, // sub_gt
4202 0, // sub_lt
4203 0, // sub_pair0
4204 0, // sub_pair1
4205 0, // sub_un
4206 0, // sub_vsx0
4207 0, // sub_vsx1
4208 0, // sub_wacc_hi
4209 0, // sub_wacc_lo
4210 0, // sub_vsx1_then_sub_64
4211 0, // sub_vsx1_then_sub_64_hi_phony
4212 0, // sub_pair1_then_sub_64
4213 0, // sub_pair1_then_sub_64_hi_phony
4214 0, // sub_pair1_then_sub_vsx0
4215 0, // sub_pair1_then_sub_vsx1
4216 0, // sub_pair1_then_sub_vsx1_then_sub_64
4217 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4218 0, // sub_dmrrowp1_then_sub_dmrrow0
4219 0, // sub_dmrrowp1_then_sub_dmrrow1
4220 0, // sub_wacc_hi_then_sub_dmrrow0
4221 0, // sub_wacc_hi_then_sub_dmrrow1
4222 0, // sub_wacc_hi_then_sub_dmrrowp0
4223 0, // sub_wacc_hi_then_sub_dmrrowp1
4224 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4225 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4226 0, // sub_dmr1_then_sub_dmrrow0
4227 0, // sub_dmr1_then_sub_dmrrow1
4228 0, // sub_dmr1_then_sub_dmrrowp0
4229 0, // sub_dmr1_then_sub_dmrrowp1
4230 0, // sub_dmr1_then_sub_wacc_hi
4231 0, // sub_dmr1_then_sub_wacc_lo
4232 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4233 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4234 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4235 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4236 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4237 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4238 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4239 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4240 0, // sub_gp8_x1_then_sub_32
4241 },
4242 { // FpRC_with_sub_fp0_in_SPILLTOVSRRC
4243 0, // sub_32
4244 0, // sub_32_hi_phony
4245 0, // sub_64
4246 0, // sub_64_hi_phony
4247 0, // sub_dmr0
4248 0, // sub_dmr1
4249 0, // sub_dmrrow0
4250 0, // sub_dmrrow1
4251 0, // sub_dmrrowp0
4252 0, // sub_dmrrowp1
4253 0, // sub_eq
4254 39, // sub_fp0 -> FpRC_with_sub_fp0_in_SPILLTOVSRRC
4255 39, // sub_fp1 -> FpRC_with_sub_fp0_in_SPILLTOVSRRC
4256 0, // sub_gp8_x0
4257 0, // sub_gp8_x1
4258 0, // sub_gt
4259 0, // sub_lt
4260 0, // sub_pair0
4261 0, // sub_pair1
4262 0, // sub_un
4263 0, // sub_vsx0
4264 0, // sub_vsx1
4265 0, // sub_wacc_hi
4266 0, // sub_wacc_lo
4267 0, // sub_vsx1_then_sub_64
4268 0, // sub_vsx1_then_sub_64_hi_phony
4269 0, // sub_pair1_then_sub_64
4270 0, // sub_pair1_then_sub_64_hi_phony
4271 0, // sub_pair1_then_sub_vsx0
4272 0, // sub_pair1_then_sub_vsx1
4273 0, // sub_pair1_then_sub_vsx1_then_sub_64
4274 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4275 0, // sub_dmrrowp1_then_sub_dmrrow0
4276 0, // sub_dmrrowp1_then_sub_dmrrow1
4277 0, // sub_wacc_hi_then_sub_dmrrow0
4278 0, // sub_wacc_hi_then_sub_dmrrow1
4279 0, // sub_wacc_hi_then_sub_dmrrowp0
4280 0, // sub_wacc_hi_then_sub_dmrrowp1
4281 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4282 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4283 0, // sub_dmr1_then_sub_dmrrow0
4284 0, // sub_dmr1_then_sub_dmrrow1
4285 0, // sub_dmr1_then_sub_dmrrowp0
4286 0, // sub_dmr1_then_sub_dmrrowp1
4287 0, // sub_dmr1_then_sub_wacc_hi
4288 0, // sub_dmr1_then_sub_wacc_lo
4289 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4290 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4291 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4292 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4293 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4294 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4295 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4296 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4297 0, // sub_gp8_x1_then_sub_32
4298 },
4299 { // DMRROWpRC
4300 0, // sub_32
4301 0, // sub_32_hi_phony
4302 0, // sub_64
4303 0, // sub_64_hi_phony
4304 0, // sub_dmr0
4305 0, // sub_dmr1
4306 40, // sub_dmrrow0 -> DMRROWpRC
4307 40, // sub_dmrrow1 -> DMRROWpRC
4308 0, // sub_dmrrowp0
4309 0, // sub_dmrrowp1
4310 0, // sub_eq
4311 0, // sub_fp0
4312 0, // sub_fp1
4313 0, // sub_gp8_x0
4314 0, // sub_gp8_x1
4315 0, // sub_gt
4316 0, // sub_lt
4317 0, // sub_pair0
4318 0, // sub_pair1
4319 0, // sub_un
4320 0, // sub_vsx0
4321 0, // sub_vsx1
4322 0, // sub_wacc_hi
4323 0, // sub_wacc_lo
4324 0, // sub_vsx1_then_sub_64
4325 0, // sub_vsx1_then_sub_64_hi_phony
4326 0, // sub_pair1_then_sub_64
4327 0, // sub_pair1_then_sub_64_hi_phony
4328 0, // sub_pair1_then_sub_vsx0
4329 0, // sub_pair1_then_sub_vsx1
4330 0, // sub_pair1_then_sub_vsx1_then_sub_64
4331 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4332 0, // sub_dmrrowp1_then_sub_dmrrow0
4333 0, // sub_dmrrowp1_then_sub_dmrrow1
4334 0, // sub_wacc_hi_then_sub_dmrrow0
4335 0, // sub_wacc_hi_then_sub_dmrrow1
4336 0, // sub_wacc_hi_then_sub_dmrrowp0
4337 0, // sub_wacc_hi_then_sub_dmrrowp1
4338 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4339 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4340 0, // sub_dmr1_then_sub_dmrrow0
4341 0, // sub_dmr1_then_sub_dmrrow1
4342 0, // sub_dmr1_then_sub_dmrrowp0
4343 0, // sub_dmr1_then_sub_dmrrowp1
4344 0, // sub_dmr1_then_sub_wacc_hi
4345 0, // sub_dmr1_then_sub_wacc_lo
4346 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4347 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4348 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4349 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4350 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4351 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4352 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4353 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4354 0, // sub_gp8_x1_then_sub_32
4355 },
4356 { // VSRpRC
4357 0, // sub_32
4358 0, // sub_32_hi_phony
4359 41, // sub_64 -> VSRpRC
4360 41, // sub_64_hi_phony -> VSRpRC
4361 0, // sub_dmr0
4362 0, // sub_dmr1
4363 0, // sub_dmrrow0
4364 0, // sub_dmrrow1
4365 0, // sub_dmrrowp0
4366 0, // sub_dmrrowp1
4367 0, // sub_eq
4368 0, // sub_fp0
4369 0, // sub_fp1
4370 0, // sub_gp8_x0
4371 0, // sub_gp8_x1
4372 0, // sub_gt
4373 0, // sub_lt
4374 0, // sub_pair0
4375 0, // sub_pair1
4376 0, // sub_un
4377 41, // sub_vsx0 -> VSRpRC
4378 41, // sub_vsx1 -> VSRpRC
4379 0, // sub_wacc_hi
4380 0, // sub_wacc_lo
4381 41, // sub_vsx1_then_sub_64 -> VSRpRC
4382 41, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC
4383 0, // sub_pair1_then_sub_64
4384 0, // sub_pair1_then_sub_64_hi_phony
4385 0, // sub_pair1_then_sub_vsx0
4386 0, // sub_pair1_then_sub_vsx1
4387 0, // sub_pair1_then_sub_vsx1_then_sub_64
4388 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4389 0, // sub_dmrrowp1_then_sub_dmrrow0
4390 0, // sub_dmrrowp1_then_sub_dmrrow1
4391 0, // sub_wacc_hi_then_sub_dmrrow0
4392 0, // sub_wacc_hi_then_sub_dmrrow1
4393 0, // sub_wacc_hi_then_sub_dmrrowp0
4394 0, // sub_wacc_hi_then_sub_dmrrowp1
4395 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4396 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4397 0, // sub_dmr1_then_sub_dmrrow0
4398 0, // sub_dmr1_then_sub_dmrrow1
4399 0, // sub_dmr1_then_sub_dmrrowp0
4400 0, // sub_dmr1_then_sub_dmrrowp1
4401 0, // sub_dmr1_then_sub_wacc_hi
4402 0, // sub_dmr1_then_sub_wacc_lo
4403 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4404 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4405 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4406 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4407 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4408 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4409 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4410 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4411 0, // sub_gp8_x1_then_sub_32
4412 },
4413 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC
4414 0, // sub_32
4415 0, // sub_32_hi_phony
4416 42, // sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4417 42, // sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4418 0, // sub_dmr0
4419 0, // sub_dmr1
4420 0, // sub_dmrrow0
4421 0, // sub_dmrrow1
4422 0, // sub_dmrrowp0
4423 0, // sub_dmrrowp1
4424 0, // sub_eq
4425 0, // sub_fp0
4426 0, // sub_fp1
4427 0, // sub_gp8_x0
4428 0, // sub_gp8_x1
4429 0, // sub_gt
4430 0, // sub_lt
4431 0, // sub_pair0
4432 0, // sub_pair1
4433 0, // sub_un
4434 42, // sub_vsx0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4435 42, // sub_vsx1 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4436 0, // sub_wacc_hi
4437 0, // sub_wacc_lo
4438 42, // sub_vsx1_then_sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4439 42, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4440 0, // sub_pair1_then_sub_64
4441 0, // sub_pair1_then_sub_64_hi_phony
4442 0, // sub_pair1_then_sub_vsx0
4443 0, // sub_pair1_then_sub_vsx1
4444 0, // sub_pair1_then_sub_vsx1_then_sub_64
4445 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4446 0, // sub_dmrrowp1_then_sub_dmrrow0
4447 0, // sub_dmrrowp1_then_sub_dmrrow1
4448 0, // sub_wacc_hi_then_sub_dmrrow0
4449 0, // sub_wacc_hi_then_sub_dmrrow1
4450 0, // sub_wacc_hi_then_sub_dmrrowp0
4451 0, // sub_wacc_hi_then_sub_dmrrowp1
4452 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4453 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4454 0, // sub_dmr1_then_sub_dmrrow0
4455 0, // sub_dmr1_then_sub_dmrrow1
4456 0, // sub_dmr1_then_sub_dmrrowp0
4457 0, // sub_dmr1_then_sub_dmrrowp1
4458 0, // sub_dmr1_then_sub_wacc_hi
4459 0, // sub_dmr1_then_sub_wacc_lo
4460 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4461 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4462 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4463 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4464 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4465 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4466 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4467 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4468 0, // sub_gp8_x1_then_sub_32
4469 },
4470 { // VSRpRC_with_sub_64_in_F4RC
4471 0, // sub_32
4472 0, // sub_32_hi_phony
4473 43, // sub_64 -> VSRpRC_with_sub_64_in_F4RC
4474 43, // sub_64_hi_phony -> VSRpRC_with_sub_64_in_F4RC
4475 0, // sub_dmr0
4476 0, // sub_dmr1
4477 0, // sub_dmrrow0
4478 0, // sub_dmrrow1
4479 0, // sub_dmrrowp0
4480 0, // sub_dmrrowp1
4481 0, // sub_eq
4482 0, // sub_fp0
4483 0, // sub_fp1
4484 0, // sub_gp8_x0
4485 0, // sub_gp8_x1
4486 0, // sub_gt
4487 0, // sub_lt
4488 0, // sub_pair0
4489 0, // sub_pair1
4490 0, // sub_un
4491 43, // sub_vsx0 -> VSRpRC_with_sub_64_in_F4RC
4492 43, // sub_vsx1 -> VSRpRC_with_sub_64_in_F4RC
4493 0, // sub_wacc_hi
4494 0, // sub_wacc_lo
4495 43, // sub_vsx1_then_sub_64 -> VSRpRC_with_sub_64_in_F4RC
4496 43, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC_with_sub_64_in_F4RC
4497 0, // sub_pair1_then_sub_64
4498 0, // sub_pair1_then_sub_64_hi_phony
4499 0, // sub_pair1_then_sub_vsx0
4500 0, // sub_pair1_then_sub_vsx1
4501 0, // sub_pair1_then_sub_vsx1_then_sub_64
4502 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4503 0, // sub_dmrrowp1_then_sub_dmrrow0
4504 0, // sub_dmrrowp1_then_sub_dmrrow1
4505 0, // sub_wacc_hi_then_sub_dmrrow0
4506 0, // sub_wacc_hi_then_sub_dmrrow1
4507 0, // sub_wacc_hi_then_sub_dmrrowp0
4508 0, // sub_wacc_hi_then_sub_dmrrowp1
4509 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4510 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4511 0, // sub_dmr1_then_sub_dmrrow0
4512 0, // sub_dmr1_then_sub_dmrrow1
4513 0, // sub_dmr1_then_sub_dmrrowp0
4514 0, // sub_dmr1_then_sub_dmrrowp1
4515 0, // sub_dmr1_then_sub_wacc_hi
4516 0, // sub_dmr1_then_sub_wacc_lo
4517 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4518 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4519 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4520 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4521 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4522 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4523 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4524 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4525 0, // sub_gp8_x1_then_sub_32
4526 },
4527 { // VSRpRC_with_sub_64_in_VFRC
4528 0, // sub_32
4529 0, // sub_32_hi_phony
4530 44, // sub_64 -> VSRpRC_with_sub_64_in_VFRC
4531 44, // sub_64_hi_phony -> VSRpRC_with_sub_64_in_VFRC
4532 0, // sub_dmr0
4533 0, // sub_dmr1
4534 0, // sub_dmrrow0
4535 0, // sub_dmrrow1
4536 0, // sub_dmrrowp0
4537 0, // sub_dmrrowp1
4538 0, // sub_eq
4539 0, // sub_fp0
4540 0, // sub_fp1
4541 0, // sub_gp8_x0
4542 0, // sub_gp8_x1
4543 0, // sub_gt
4544 0, // sub_lt
4545 0, // sub_pair0
4546 0, // sub_pair1
4547 0, // sub_un
4548 44, // sub_vsx0 -> VSRpRC_with_sub_64_in_VFRC
4549 44, // sub_vsx1 -> VSRpRC_with_sub_64_in_VFRC
4550 0, // sub_wacc_hi
4551 0, // sub_wacc_lo
4552 44, // sub_vsx1_then_sub_64 -> VSRpRC_with_sub_64_in_VFRC
4553 44, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC_with_sub_64_in_VFRC
4554 0, // sub_pair1_then_sub_64
4555 0, // sub_pair1_then_sub_64_hi_phony
4556 0, // sub_pair1_then_sub_vsx0
4557 0, // sub_pair1_then_sub_vsx1
4558 0, // sub_pair1_then_sub_vsx1_then_sub_64
4559 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4560 0, // sub_dmrrowp1_then_sub_dmrrow0
4561 0, // sub_dmrrowp1_then_sub_dmrrow1
4562 0, // sub_wacc_hi_then_sub_dmrrow0
4563 0, // sub_wacc_hi_then_sub_dmrrow1
4564 0, // sub_wacc_hi_then_sub_dmrrowp0
4565 0, // sub_wacc_hi_then_sub_dmrrowp1
4566 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4567 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4568 0, // sub_dmr1_then_sub_dmrrow0
4569 0, // sub_dmr1_then_sub_dmrrow1
4570 0, // sub_dmr1_then_sub_dmrrowp0
4571 0, // sub_dmr1_then_sub_dmrrowp1
4572 0, // sub_dmr1_then_sub_wacc_hi
4573 0, // sub_dmr1_then_sub_wacc_lo
4574 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4575 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4576 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4577 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4578 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4579 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4580 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4581 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4582 0, // sub_gp8_x1_then_sub_32
4583 },
4584 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4585 0, // sub_32
4586 0, // sub_32_hi_phony
4587 45, // sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4588 45, // sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4589 0, // sub_dmr0
4590 0, // sub_dmr1
4591 0, // sub_dmrrow0
4592 0, // sub_dmrrow1
4593 0, // sub_dmrrowp0
4594 0, // sub_dmrrowp1
4595 0, // sub_eq
4596 0, // sub_fp0
4597 0, // sub_fp1
4598 0, // sub_gp8_x0
4599 0, // sub_gp8_x1
4600 0, // sub_gt
4601 0, // sub_lt
4602 0, // sub_pair0
4603 0, // sub_pair1
4604 0, // sub_un
4605 45, // sub_vsx0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4606 45, // sub_vsx1 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4607 0, // sub_wacc_hi
4608 0, // sub_wacc_lo
4609 45, // sub_vsx1_then_sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4610 45, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4611 0, // sub_pair1_then_sub_64
4612 0, // sub_pair1_then_sub_64_hi_phony
4613 0, // sub_pair1_then_sub_vsx0
4614 0, // sub_pair1_then_sub_vsx1
4615 0, // sub_pair1_then_sub_vsx1_then_sub_64
4616 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4617 0, // sub_dmrrowp1_then_sub_dmrrow0
4618 0, // sub_dmrrowp1_then_sub_dmrrow1
4619 0, // sub_wacc_hi_then_sub_dmrrow0
4620 0, // sub_wacc_hi_then_sub_dmrrow1
4621 0, // sub_wacc_hi_then_sub_dmrrowp0
4622 0, // sub_wacc_hi_then_sub_dmrrowp1
4623 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4624 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4625 0, // sub_dmr1_then_sub_dmrrow0
4626 0, // sub_dmr1_then_sub_dmrrow1
4627 0, // sub_dmr1_then_sub_dmrrowp0
4628 0, // sub_dmr1_then_sub_dmrrowp1
4629 0, // sub_dmr1_then_sub_wacc_hi
4630 0, // sub_dmr1_then_sub_wacc_lo
4631 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4632 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4633 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4634 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4635 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4636 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4637 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4638 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4639 0, // sub_gp8_x1_then_sub_32
4640 },
4641 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4642 0, // sub_32
4643 0, // sub_32_hi_phony
4644 46, // sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4645 46, // sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4646 0, // sub_dmr0
4647 0, // sub_dmr1
4648 0, // sub_dmrrow0
4649 0, // sub_dmrrow1
4650 0, // sub_dmrrowp0
4651 0, // sub_dmrrowp1
4652 0, // sub_eq
4653 0, // sub_fp0
4654 0, // sub_fp1
4655 0, // sub_gp8_x0
4656 0, // sub_gp8_x1
4657 0, // sub_gt
4658 0, // sub_lt
4659 0, // sub_pair0
4660 0, // sub_pair1
4661 0, // sub_un
4662 46, // sub_vsx0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4663 46, // sub_vsx1 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4664 0, // sub_wacc_hi
4665 0, // sub_wacc_lo
4666 46, // sub_vsx1_then_sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4667 46, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4668 0, // sub_pair1_then_sub_64
4669 0, // sub_pair1_then_sub_64_hi_phony
4670 0, // sub_pair1_then_sub_vsx0
4671 0, // sub_pair1_then_sub_vsx1
4672 0, // sub_pair1_then_sub_vsx1_then_sub_64
4673 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4674 0, // sub_dmrrowp1_then_sub_dmrrow0
4675 0, // sub_dmrrowp1_then_sub_dmrrow1
4676 0, // sub_wacc_hi_then_sub_dmrrow0
4677 0, // sub_wacc_hi_then_sub_dmrrow1
4678 0, // sub_wacc_hi_then_sub_dmrrowp0
4679 0, // sub_wacc_hi_then_sub_dmrrowp1
4680 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4681 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4682 0, // sub_dmr1_then_sub_dmrrow0
4683 0, // sub_dmr1_then_sub_dmrrow1
4684 0, // sub_dmr1_then_sub_dmrrowp0
4685 0, // sub_dmr1_then_sub_dmrrowp1
4686 0, // sub_dmr1_then_sub_wacc_hi
4687 0, // sub_dmr1_then_sub_wacc_lo
4688 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4689 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4690 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4691 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4692 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4693 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4694 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4695 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4696 0, // sub_gp8_x1_then_sub_32
4697 },
4698 { // ACCRC
4699 0, // sub_32
4700 0, // sub_32_hi_phony
4701 47, // sub_64 -> ACCRC
4702 47, // sub_64_hi_phony -> ACCRC
4703 0, // sub_dmr0
4704 0, // sub_dmr1
4705 0, // sub_dmrrow0
4706 0, // sub_dmrrow1
4707 0, // sub_dmrrowp0
4708 0, // sub_dmrrowp1
4709 0, // sub_eq
4710 0, // sub_fp0
4711 0, // sub_fp1
4712 0, // sub_gp8_x0
4713 0, // sub_gp8_x1
4714 0, // sub_gt
4715 0, // sub_lt
4716 47, // sub_pair0 -> ACCRC
4717 47, // sub_pair1 -> ACCRC
4718 0, // sub_un
4719 47, // sub_vsx0 -> ACCRC
4720 47, // sub_vsx1 -> ACCRC
4721 0, // sub_wacc_hi
4722 0, // sub_wacc_lo
4723 47, // sub_vsx1_then_sub_64 -> ACCRC
4724 47, // sub_vsx1_then_sub_64_hi_phony -> ACCRC
4725 47, // sub_pair1_then_sub_64 -> ACCRC
4726 47, // sub_pair1_then_sub_64_hi_phony -> ACCRC
4727 47, // sub_pair1_then_sub_vsx0 -> ACCRC
4728 47, // sub_pair1_then_sub_vsx1 -> ACCRC
4729 47, // sub_pair1_then_sub_vsx1_then_sub_64 -> ACCRC
4730 47, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> ACCRC
4731 0, // sub_dmrrowp1_then_sub_dmrrow0
4732 0, // sub_dmrrowp1_then_sub_dmrrow1
4733 0, // sub_wacc_hi_then_sub_dmrrow0
4734 0, // sub_wacc_hi_then_sub_dmrrow1
4735 0, // sub_wacc_hi_then_sub_dmrrowp0
4736 0, // sub_wacc_hi_then_sub_dmrrowp1
4737 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4738 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4739 0, // sub_dmr1_then_sub_dmrrow0
4740 0, // sub_dmr1_then_sub_dmrrow1
4741 0, // sub_dmr1_then_sub_dmrrowp0
4742 0, // sub_dmr1_then_sub_dmrrowp1
4743 0, // sub_dmr1_then_sub_wacc_hi
4744 0, // sub_dmr1_then_sub_wacc_lo
4745 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4746 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4747 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4748 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4749 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4750 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4751 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4752 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4753 0, // sub_gp8_x1_then_sub_32
4754 },
4755 { // UACCRC
4756 0, // sub_32
4757 0, // sub_32_hi_phony
4758 48, // sub_64 -> UACCRC
4759 48, // sub_64_hi_phony -> UACCRC
4760 0, // sub_dmr0
4761 0, // sub_dmr1
4762 0, // sub_dmrrow0
4763 0, // sub_dmrrow1
4764 0, // sub_dmrrowp0
4765 0, // sub_dmrrowp1
4766 0, // sub_eq
4767 0, // sub_fp0
4768 0, // sub_fp1
4769 0, // sub_gp8_x0
4770 0, // sub_gp8_x1
4771 0, // sub_gt
4772 0, // sub_lt
4773 48, // sub_pair0 -> UACCRC
4774 48, // sub_pair1 -> UACCRC
4775 0, // sub_un
4776 48, // sub_vsx0 -> UACCRC
4777 48, // sub_vsx1 -> UACCRC
4778 0, // sub_wacc_hi
4779 0, // sub_wacc_lo
4780 48, // sub_vsx1_then_sub_64 -> UACCRC
4781 48, // sub_vsx1_then_sub_64_hi_phony -> UACCRC
4782 48, // sub_pair1_then_sub_64 -> UACCRC
4783 48, // sub_pair1_then_sub_64_hi_phony -> UACCRC
4784 48, // sub_pair1_then_sub_vsx0 -> UACCRC
4785 48, // sub_pair1_then_sub_vsx1 -> UACCRC
4786 48, // sub_pair1_then_sub_vsx1_then_sub_64 -> UACCRC
4787 48, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> UACCRC
4788 0, // sub_dmrrowp1_then_sub_dmrrow0
4789 0, // sub_dmrrowp1_then_sub_dmrrow1
4790 0, // sub_wacc_hi_then_sub_dmrrow0
4791 0, // sub_wacc_hi_then_sub_dmrrow1
4792 0, // sub_wacc_hi_then_sub_dmrrowp0
4793 0, // sub_wacc_hi_then_sub_dmrrowp1
4794 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4795 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4796 0, // sub_dmr1_then_sub_dmrrow0
4797 0, // sub_dmr1_then_sub_dmrrow1
4798 0, // sub_dmr1_then_sub_dmrrowp0
4799 0, // sub_dmr1_then_sub_dmrrowp1
4800 0, // sub_dmr1_then_sub_wacc_hi
4801 0, // sub_dmr1_then_sub_wacc_lo
4802 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4803 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4804 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4805 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4806 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4807 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4808 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4809 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4810 0, // sub_gp8_x1_then_sub_32
4811 },
4812 { // WACCRC
4813 0, // sub_32
4814 0, // sub_32_hi_phony
4815 0, // sub_64
4816 0, // sub_64_hi_phony
4817 0, // sub_dmr0
4818 0, // sub_dmr1
4819 49, // sub_dmrrow0 -> WACCRC
4820 49, // sub_dmrrow1 -> WACCRC
4821 49, // sub_dmrrowp0 -> WACCRC
4822 49, // sub_dmrrowp1 -> WACCRC
4823 0, // sub_eq
4824 0, // sub_fp0
4825 0, // sub_fp1
4826 0, // sub_gp8_x0
4827 0, // sub_gp8_x1
4828 0, // sub_gt
4829 0, // sub_lt
4830 0, // sub_pair0
4831 0, // sub_pair1
4832 0, // sub_un
4833 0, // sub_vsx0
4834 0, // sub_vsx1
4835 0, // sub_wacc_hi
4836 0, // sub_wacc_lo
4837 0, // sub_vsx1_then_sub_64
4838 0, // sub_vsx1_then_sub_64_hi_phony
4839 0, // sub_pair1_then_sub_64
4840 0, // sub_pair1_then_sub_64_hi_phony
4841 0, // sub_pair1_then_sub_vsx0
4842 0, // sub_pair1_then_sub_vsx1
4843 0, // sub_pair1_then_sub_vsx1_then_sub_64
4844 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4845 49, // sub_dmrrowp1_then_sub_dmrrow0 -> WACCRC
4846 49, // sub_dmrrowp1_then_sub_dmrrow1 -> WACCRC
4847 0, // sub_wacc_hi_then_sub_dmrrow0
4848 0, // sub_wacc_hi_then_sub_dmrrow1
4849 0, // sub_wacc_hi_then_sub_dmrrowp0
4850 0, // sub_wacc_hi_then_sub_dmrrowp1
4851 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4852 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4853 0, // sub_dmr1_then_sub_dmrrow0
4854 0, // sub_dmr1_then_sub_dmrrow1
4855 0, // sub_dmr1_then_sub_dmrrowp0
4856 0, // sub_dmr1_then_sub_dmrrowp1
4857 0, // sub_dmr1_then_sub_wacc_hi
4858 0, // sub_dmr1_then_sub_wacc_lo
4859 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4860 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4861 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4862 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4863 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4864 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4865 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4866 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4867 0, // sub_gp8_x1_then_sub_32
4868 },
4869 { // WACC_HIRC
4870 0, // sub_32
4871 0, // sub_32_hi_phony
4872 0, // sub_64
4873 0, // sub_64_hi_phony
4874 0, // sub_dmr0
4875 0, // sub_dmr1
4876 50, // sub_dmrrow0 -> WACC_HIRC
4877 50, // sub_dmrrow1 -> WACC_HIRC
4878 50, // sub_dmrrowp0 -> WACC_HIRC
4879 50, // sub_dmrrowp1 -> WACC_HIRC
4880 0, // sub_eq
4881 0, // sub_fp0
4882 0, // sub_fp1
4883 0, // sub_gp8_x0
4884 0, // sub_gp8_x1
4885 0, // sub_gt
4886 0, // sub_lt
4887 0, // sub_pair0
4888 0, // sub_pair1
4889 0, // sub_un
4890 0, // sub_vsx0
4891 0, // sub_vsx1
4892 0, // sub_wacc_hi
4893 0, // sub_wacc_lo
4894 0, // sub_vsx1_then_sub_64
4895 0, // sub_vsx1_then_sub_64_hi_phony
4896 0, // sub_pair1_then_sub_64
4897 0, // sub_pair1_then_sub_64_hi_phony
4898 0, // sub_pair1_then_sub_vsx0
4899 0, // sub_pair1_then_sub_vsx1
4900 0, // sub_pair1_then_sub_vsx1_then_sub_64
4901 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4902 50, // sub_dmrrowp1_then_sub_dmrrow0 -> WACC_HIRC
4903 50, // sub_dmrrowp1_then_sub_dmrrow1 -> WACC_HIRC
4904 0, // sub_wacc_hi_then_sub_dmrrow0
4905 0, // sub_wacc_hi_then_sub_dmrrow1
4906 0, // sub_wacc_hi_then_sub_dmrrowp0
4907 0, // sub_wacc_hi_then_sub_dmrrowp1
4908 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4909 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4910 0, // sub_dmr1_then_sub_dmrrow0
4911 0, // sub_dmr1_then_sub_dmrrow1
4912 0, // sub_dmr1_then_sub_dmrrowp0
4913 0, // sub_dmr1_then_sub_dmrrowp1
4914 0, // sub_dmr1_then_sub_wacc_hi
4915 0, // sub_dmr1_then_sub_wacc_lo
4916 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4917 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4918 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4919 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4920 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4921 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4922 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4923 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4924 0, // sub_gp8_x1_then_sub_32
4925 },
4926 { // ACCRC_with_sub_64_in_SPILLTOVSRRC
4927 0, // sub_32
4928 0, // sub_32_hi_phony
4929 51, // sub_64 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
4930 51, // sub_64_hi_phony -> ACCRC_with_sub_64_in_SPILLTOVSRRC
4931 0, // sub_dmr0
4932 0, // sub_dmr1
4933 0, // sub_dmrrow0
4934 0, // sub_dmrrow1
4935 0, // sub_dmrrowp0
4936 0, // sub_dmrrowp1
4937 0, // sub_eq
4938 0, // sub_fp0
4939 0, // sub_fp1
4940 0, // sub_gp8_x0
4941 0, // sub_gp8_x1
4942 0, // sub_gt
4943 0, // sub_lt
4944 51, // sub_pair0 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
4945 51, // sub_pair1 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
4946 0, // sub_un
4947 51, // sub_vsx0 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
4948 51, // sub_vsx1 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
4949 0, // sub_wacc_hi
4950 0, // sub_wacc_lo
4951 51, // sub_vsx1_then_sub_64 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
4952 51, // sub_vsx1_then_sub_64_hi_phony -> ACCRC_with_sub_64_in_SPILLTOVSRRC
4953 51, // sub_pair1_then_sub_64 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
4954 51, // sub_pair1_then_sub_64_hi_phony -> ACCRC_with_sub_64_in_SPILLTOVSRRC
4955 51, // sub_pair1_then_sub_vsx0 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
4956 51, // sub_pair1_then_sub_vsx1 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
4957 51, // sub_pair1_then_sub_vsx1_then_sub_64 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
4958 51, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> ACCRC_with_sub_64_in_SPILLTOVSRRC
4959 0, // sub_dmrrowp1_then_sub_dmrrow0
4960 0, // sub_dmrrowp1_then_sub_dmrrow1
4961 0, // sub_wacc_hi_then_sub_dmrrow0
4962 0, // sub_wacc_hi_then_sub_dmrrow1
4963 0, // sub_wacc_hi_then_sub_dmrrowp0
4964 0, // sub_wacc_hi_then_sub_dmrrowp1
4965 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4966 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4967 0, // sub_dmr1_then_sub_dmrrow0
4968 0, // sub_dmr1_then_sub_dmrrow1
4969 0, // sub_dmr1_then_sub_dmrrowp0
4970 0, // sub_dmr1_then_sub_dmrrowp1
4971 0, // sub_dmr1_then_sub_wacc_hi
4972 0, // sub_dmr1_then_sub_wacc_lo
4973 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4974 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4975 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4976 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4977 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4978 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4979 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4980 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4981 0, // sub_gp8_x1_then_sub_32
4982 },
4983 { // UACCRC_with_sub_64_in_SPILLTOVSRRC
4984 0, // sub_32
4985 0, // sub_32_hi_phony
4986 52, // sub_64 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
4987 52, // sub_64_hi_phony -> UACCRC_with_sub_64_in_SPILLTOVSRRC
4988 0, // sub_dmr0
4989 0, // sub_dmr1
4990 0, // sub_dmrrow0
4991 0, // sub_dmrrow1
4992 0, // sub_dmrrowp0
4993 0, // sub_dmrrowp1
4994 0, // sub_eq
4995 0, // sub_fp0
4996 0, // sub_fp1
4997 0, // sub_gp8_x0
4998 0, // sub_gp8_x1
4999 0, // sub_gt
5000 0, // sub_lt
5001 52, // sub_pair0 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5002 52, // sub_pair1 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5003 0, // sub_un
5004 52, // sub_vsx0 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5005 52, // sub_vsx1 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5006 0, // sub_wacc_hi
5007 0, // sub_wacc_lo
5008 52, // sub_vsx1_then_sub_64 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5009 52, // sub_vsx1_then_sub_64_hi_phony -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5010 52, // sub_pair1_then_sub_64 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5011 52, // sub_pair1_then_sub_64_hi_phony -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5012 52, // sub_pair1_then_sub_vsx0 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5013 52, // sub_pair1_then_sub_vsx1 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5014 52, // sub_pair1_then_sub_vsx1_then_sub_64 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5015 52, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5016 0, // sub_dmrrowp1_then_sub_dmrrow0
5017 0, // sub_dmrrowp1_then_sub_dmrrow1
5018 0, // sub_wacc_hi_then_sub_dmrrow0
5019 0, // sub_wacc_hi_then_sub_dmrrow1
5020 0, // sub_wacc_hi_then_sub_dmrrowp0
5021 0, // sub_wacc_hi_then_sub_dmrrowp1
5022 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5023 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5024 0, // sub_dmr1_then_sub_dmrrow0
5025 0, // sub_dmr1_then_sub_dmrrow1
5026 0, // sub_dmr1_then_sub_dmrrowp0
5027 0, // sub_dmr1_then_sub_dmrrowp1
5028 0, // sub_dmr1_then_sub_wacc_hi
5029 0, // sub_dmr1_then_sub_wacc_lo
5030 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5031 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5032 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5033 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5034 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5035 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5036 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5037 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5038 0, // sub_gp8_x1_then_sub_32
5039 },
5040 { // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5041 0, // sub_32
5042 0, // sub_32_hi_phony
5043 53, // sub_64 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5044 53, // sub_64_hi_phony -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5045 0, // sub_dmr0
5046 0, // sub_dmr1
5047 0, // sub_dmrrow0
5048 0, // sub_dmrrow1
5049 0, // sub_dmrrowp0
5050 0, // sub_dmrrowp1
5051 0, // sub_eq
5052 0, // sub_fp0
5053 0, // sub_fp1
5054 0, // sub_gp8_x0
5055 0, // sub_gp8_x1
5056 0, // sub_gt
5057 0, // sub_lt
5058 53, // sub_pair0 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5059 53, // sub_pair1 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5060 0, // sub_un
5061 53, // sub_vsx0 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5062 53, // sub_vsx1 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5063 0, // sub_wacc_hi
5064 0, // sub_wacc_lo
5065 53, // sub_vsx1_then_sub_64 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5066 53, // sub_vsx1_then_sub_64_hi_phony -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5067 53, // sub_pair1_then_sub_64 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5068 53, // sub_pair1_then_sub_64_hi_phony -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5069 53, // sub_pair1_then_sub_vsx0 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5070 53, // sub_pair1_then_sub_vsx1 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5071 53, // sub_pair1_then_sub_vsx1_then_sub_64 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5072 53, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5073 0, // sub_dmrrowp1_then_sub_dmrrow0
5074 0, // sub_dmrrowp1_then_sub_dmrrow1
5075 0, // sub_wacc_hi_then_sub_dmrrow0
5076 0, // sub_wacc_hi_then_sub_dmrrow1
5077 0, // sub_wacc_hi_then_sub_dmrrowp0
5078 0, // sub_wacc_hi_then_sub_dmrrowp1
5079 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5080 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5081 0, // sub_dmr1_then_sub_dmrrow0
5082 0, // sub_dmr1_then_sub_dmrrow1
5083 0, // sub_dmr1_then_sub_dmrrowp0
5084 0, // sub_dmr1_then_sub_dmrrowp1
5085 0, // sub_dmr1_then_sub_wacc_hi
5086 0, // sub_dmr1_then_sub_wacc_lo
5087 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5088 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5089 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5090 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5091 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5092 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5093 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5094 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5095 0, // sub_gp8_x1_then_sub_32
5096 },
5097 { // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5098 0, // sub_32
5099 0, // sub_32_hi_phony
5100 54, // sub_64 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5101 54, // sub_64_hi_phony -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5102 0, // sub_dmr0
5103 0, // sub_dmr1
5104 0, // sub_dmrrow0
5105 0, // sub_dmrrow1
5106 0, // sub_dmrrowp0
5107 0, // sub_dmrrowp1
5108 0, // sub_eq
5109 0, // sub_fp0
5110 0, // sub_fp1
5111 0, // sub_gp8_x0
5112 0, // sub_gp8_x1
5113 0, // sub_gt
5114 0, // sub_lt
5115 54, // sub_pair0 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5116 54, // sub_pair1 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5117 0, // sub_un
5118 54, // sub_vsx0 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5119 54, // sub_vsx1 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5120 0, // sub_wacc_hi
5121 0, // sub_wacc_lo
5122 54, // sub_vsx1_then_sub_64 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5123 54, // sub_vsx1_then_sub_64_hi_phony -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5124 54, // sub_pair1_then_sub_64 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5125 54, // sub_pair1_then_sub_64_hi_phony -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5126 54, // sub_pair1_then_sub_vsx0 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5127 54, // sub_pair1_then_sub_vsx1 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5128 54, // sub_pair1_then_sub_vsx1_then_sub_64 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5129 54, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5130 0, // sub_dmrrowp1_then_sub_dmrrow0
5131 0, // sub_dmrrowp1_then_sub_dmrrow1
5132 0, // sub_wacc_hi_then_sub_dmrrow0
5133 0, // sub_wacc_hi_then_sub_dmrrow1
5134 0, // sub_wacc_hi_then_sub_dmrrowp0
5135 0, // sub_wacc_hi_then_sub_dmrrowp1
5136 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5137 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5138 0, // sub_dmr1_then_sub_dmrrow0
5139 0, // sub_dmr1_then_sub_dmrrow1
5140 0, // sub_dmr1_then_sub_dmrrowp0
5141 0, // sub_dmr1_then_sub_dmrrowp1
5142 0, // sub_dmr1_then_sub_wacc_hi
5143 0, // sub_dmr1_then_sub_wacc_lo
5144 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5145 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5146 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5147 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5148 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5149 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5150 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5151 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5152 0, // sub_gp8_x1_then_sub_32
5153 },
5154 { // DMRRC
5155 0, // sub_32
5156 0, // sub_32_hi_phony
5157 0, // sub_64
5158 0, // sub_64_hi_phony
5159 0, // sub_dmr0
5160 0, // sub_dmr1
5161 55, // sub_dmrrow0 -> DMRRC
5162 55, // sub_dmrrow1 -> DMRRC
5163 55, // sub_dmrrowp0 -> DMRRC
5164 55, // sub_dmrrowp1 -> DMRRC
5165 0, // sub_eq
5166 0, // sub_fp0
5167 0, // sub_fp1
5168 0, // sub_gp8_x0
5169 0, // sub_gp8_x1
5170 0, // sub_gt
5171 0, // sub_lt
5172 0, // sub_pair0
5173 0, // sub_pair1
5174 0, // sub_un
5175 0, // sub_vsx0
5176 0, // sub_vsx1
5177 55, // sub_wacc_hi -> DMRRC
5178 55, // sub_wacc_lo -> DMRRC
5179 0, // sub_vsx1_then_sub_64
5180 0, // sub_vsx1_then_sub_64_hi_phony
5181 0, // sub_pair1_then_sub_64
5182 0, // sub_pair1_then_sub_64_hi_phony
5183 0, // sub_pair1_then_sub_vsx0
5184 0, // sub_pair1_then_sub_vsx1
5185 0, // sub_pair1_then_sub_vsx1_then_sub_64
5186 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5187 55, // sub_dmrrowp1_then_sub_dmrrow0 -> DMRRC
5188 55, // sub_dmrrowp1_then_sub_dmrrow1 -> DMRRC
5189 55, // sub_wacc_hi_then_sub_dmrrow0 -> DMRRC
5190 55, // sub_wacc_hi_then_sub_dmrrow1 -> DMRRC
5191 55, // sub_wacc_hi_then_sub_dmrrowp0 -> DMRRC
5192 55, // sub_wacc_hi_then_sub_dmrrowp1 -> DMRRC
5193 55, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRRC
5194 55, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRRC
5195 0, // sub_dmr1_then_sub_dmrrow0
5196 0, // sub_dmr1_then_sub_dmrrow1
5197 0, // sub_dmr1_then_sub_dmrrowp0
5198 0, // sub_dmr1_then_sub_dmrrowp1
5199 0, // sub_dmr1_then_sub_wacc_hi
5200 0, // sub_dmr1_then_sub_wacc_lo
5201 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5202 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5203 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5204 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5205 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5206 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5207 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5208 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5209 0, // sub_gp8_x1_then_sub_32
5210 },
5211 { // DMRpRC
5212 0, // sub_32
5213 0, // sub_32_hi_phony
5214 0, // sub_64
5215 0, // sub_64_hi_phony
5216 56, // sub_dmr0 -> DMRpRC
5217 56, // sub_dmr1 -> DMRpRC
5218 56, // sub_dmrrow0 -> DMRpRC
5219 56, // sub_dmrrow1 -> DMRpRC
5220 56, // sub_dmrrowp0 -> DMRpRC
5221 56, // sub_dmrrowp1 -> DMRpRC
5222 0, // sub_eq
5223 0, // sub_fp0
5224 0, // sub_fp1
5225 0, // sub_gp8_x0
5226 0, // sub_gp8_x1
5227 0, // sub_gt
5228 0, // sub_lt
5229 0, // sub_pair0
5230 0, // sub_pair1
5231 0, // sub_un
5232 0, // sub_vsx0
5233 0, // sub_vsx1
5234 56, // sub_wacc_hi -> DMRpRC
5235 56, // sub_wacc_lo -> DMRpRC
5236 0, // sub_vsx1_then_sub_64
5237 0, // sub_vsx1_then_sub_64_hi_phony
5238 0, // sub_pair1_then_sub_64
5239 0, // sub_pair1_then_sub_64_hi_phony
5240 0, // sub_pair1_then_sub_vsx0
5241 0, // sub_pair1_then_sub_vsx1
5242 0, // sub_pair1_then_sub_vsx1_then_sub_64
5243 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5244 56, // sub_dmrrowp1_then_sub_dmrrow0 -> DMRpRC
5245 56, // sub_dmrrowp1_then_sub_dmrrow1 -> DMRpRC
5246 56, // sub_wacc_hi_then_sub_dmrrow0 -> DMRpRC
5247 56, // sub_wacc_hi_then_sub_dmrrow1 -> DMRpRC
5248 56, // sub_wacc_hi_then_sub_dmrrowp0 -> DMRpRC
5249 56, // sub_wacc_hi_then_sub_dmrrowp1 -> DMRpRC
5250 56, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRpRC
5251 56, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRpRC
5252 56, // sub_dmr1_then_sub_dmrrow0 -> DMRpRC
5253 56, // sub_dmr1_then_sub_dmrrow1 -> DMRpRC
5254 56, // sub_dmr1_then_sub_dmrrowp0 -> DMRpRC
5255 56, // sub_dmr1_then_sub_dmrrowp1 -> DMRpRC
5256 56, // sub_dmr1_then_sub_wacc_hi -> DMRpRC
5257 56, // sub_dmr1_then_sub_wacc_lo -> DMRpRC
5258 56, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRpRC
5259 56, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRpRC
5260 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0 -> DMRpRC
5261 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1 -> DMRpRC
5262 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0 -> DMRpRC
5263 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1 -> DMRpRC
5264 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRpRC
5265 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRpRC
5266 0, // sub_gp8_x1_then_sub_32
5267 },
5268 };
5269 assert(RC && "Missing regclass");
5270 if (!Idx) return RC;
5271 --Idx;
5272 assert(Idx < 55 && "Bad subreg");
5273 unsigned TV = Table[RC->getID()][Idx];
5274 return TV ? getRegClass(i: TV - 1) : nullptr;
5275}
5276
5277const TargetRegisterClass *PPCGenRegisterInfo::getSubRegisterClass(const TargetRegisterClass *RC, unsigned Idx) const {
5278 static const uint8_t Table[56][55] = {
5279 { // VSSRC
5280 0, // VSSRC:sub_32
5281 0, // VSSRC:sub_32_hi_phony
5282 0, // VSSRC:sub_64
5283 0, // VSSRC:sub_64_hi_phony
5284 0, // VSSRC:sub_dmr0
5285 0, // VSSRC:sub_dmr1
5286 0, // VSSRC:sub_dmrrow0
5287 0, // VSSRC:sub_dmrrow1
5288 0, // VSSRC:sub_dmrrowp0
5289 0, // VSSRC:sub_dmrrowp1
5290 0, // VSSRC:sub_eq
5291 0, // VSSRC:sub_fp0
5292 0, // VSSRC:sub_fp1
5293 0, // VSSRC:sub_gp8_x0
5294 0, // VSSRC:sub_gp8_x1
5295 0, // VSSRC:sub_gt
5296 0, // VSSRC:sub_lt
5297 0, // VSSRC:sub_pair0
5298 0, // VSSRC:sub_pair1
5299 0, // VSSRC:sub_un
5300 0, // VSSRC:sub_vsx0
5301 0, // VSSRC:sub_vsx1
5302 0, // VSSRC:sub_wacc_hi
5303 0, // VSSRC:sub_wacc_lo
5304 0, // VSSRC:sub_vsx1_then_sub_64
5305 0, // VSSRC:sub_vsx1_then_sub_64_hi_phony
5306 0, // VSSRC:sub_pair1_then_sub_64
5307 0, // VSSRC:sub_pair1_then_sub_64_hi_phony
5308 0, // VSSRC:sub_pair1_then_sub_vsx0
5309 0, // VSSRC:sub_pair1_then_sub_vsx1
5310 0, // VSSRC:sub_pair1_then_sub_vsx1_then_sub_64
5311 0, // VSSRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5312 0, // VSSRC:sub_dmrrowp1_then_sub_dmrrow0
5313 0, // VSSRC:sub_dmrrowp1_then_sub_dmrrow1
5314 0, // VSSRC:sub_wacc_hi_then_sub_dmrrow0
5315 0, // VSSRC:sub_wacc_hi_then_sub_dmrrow1
5316 0, // VSSRC:sub_wacc_hi_then_sub_dmrrowp0
5317 0, // VSSRC:sub_wacc_hi_then_sub_dmrrowp1
5318 0, // VSSRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5319 0, // VSSRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5320 0, // VSSRC:sub_dmr1_then_sub_dmrrow0
5321 0, // VSSRC:sub_dmr1_then_sub_dmrrow1
5322 0, // VSSRC:sub_dmr1_then_sub_dmrrowp0
5323 0, // VSSRC:sub_dmr1_then_sub_dmrrowp1
5324 0, // VSSRC:sub_dmr1_then_sub_wacc_hi
5325 0, // VSSRC:sub_dmr1_then_sub_wacc_lo
5326 0, // VSSRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5327 0, // VSSRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5328 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5329 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5330 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5331 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5332 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5333 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5334 0, // VSSRC:sub_gp8_x1_then_sub_32
5335 },
5336 { // GPRC
5337 0, // GPRC:sub_32
5338 0, // GPRC:sub_32_hi_phony
5339 0, // GPRC:sub_64
5340 0, // GPRC:sub_64_hi_phony
5341 0, // GPRC:sub_dmr0
5342 0, // GPRC:sub_dmr1
5343 0, // GPRC:sub_dmrrow0
5344 0, // GPRC:sub_dmrrow1
5345 0, // GPRC:sub_dmrrowp0
5346 0, // GPRC:sub_dmrrowp1
5347 0, // GPRC:sub_eq
5348 0, // GPRC:sub_fp0
5349 0, // GPRC:sub_fp1
5350 0, // GPRC:sub_gp8_x0
5351 0, // GPRC:sub_gp8_x1
5352 0, // GPRC:sub_gt
5353 0, // GPRC:sub_lt
5354 0, // GPRC:sub_pair0
5355 0, // GPRC:sub_pair1
5356 0, // GPRC:sub_un
5357 0, // GPRC:sub_vsx0
5358 0, // GPRC:sub_vsx1
5359 0, // GPRC:sub_wacc_hi
5360 0, // GPRC:sub_wacc_lo
5361 0, // GPRC:sub_vsx1_then_sub_64
5362 0, // GPRC:sub_vsx1_then_sub_64_hi_phony
5363 0, // GPRC:sub_pair1_then_sub_64
5364 0, // GPRC:sub_pair1_then_sub_64_hi_phony
5365 0, // GPRC:sub_pair1_then_sub_vsx0
5366 0, // GPRC:sub_pair1_then_sub_vsx1
5367 0, // GPRC:sub_pair1_then_sub_vsx1_then_sub_64
5368 0, // GPRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5369 0, // GPRC:sub_dmrrowp1_then_sub_dmrrow0
5370 0, // GPRC:sub_dmrrowp1_then_sub_dmrrow1
5371 0, // GPRC:sub_wacc_hi_then_sub_dmrrow0
5372 0, // GPRC:sub_wacc_hi_then_sub_dmrrow1
5373 0, // GPRC:sub_wacc_hi_then_sub_dmrrowp0
5374 0, // GPRC:sub_wacc_hi_then_sub_dmrrowp1
5375 0, // GPRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5376 0, // GPRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5377 0, // GPRC:sub_dmr1_then_sub_dmrrow0
5378 0, // GPRC:sub_dmr1_then_sub_dmrrow1
5379 0, // GPRC:sub_dmr1_then_sub_dmrrowp0
5380 0, // GPRC:sub_dmr1_then_sub_dmrrowp1
5381 0, // GPRC:sub_dmr1_then_sub_wacc_hi
5382 0, // GPRC:sub_dmr1_then_sub_wacc_lo
5383 0, // GPRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5384 0, // GPRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5385 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5386 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5387 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5388 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5389 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5390 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5391 0, // GPRC:sub_gp8_x1_then_sub_32
5392 },
5393 { // GPRC_NOR0
5394 0, // GPRC_NOR0:sub_32
5395 0, // GPRC_NOR0:sub_32_hi_phony
5396 0, // GPRC_NOR0:sub_64
5397 0, // GPRC_NOR0:sub_64_hi_phony
5398 0, // GPRC_NOR0:sub_dmr0
5399 0, // GPRC_NOR0:sub_dmr1
5400 0, // GPRC_NOR0:sub_dmrrow0
5401 0, // GPRC_NOR0:sub_dmrrow1
5402 0, // GPRC_NOR0:sub_dmrrowp0
5403 0, // GPRC_NOR0:sub_dmrrowp1
5404 0, // GPRC_NOR0:sub_eq
5405 0, // GPRC_NOR0:sub_fp0
5406 0, // GPRC_NOR0:sub_fp1
5407 0, // GPRC_NOR0:sub_gp8_x0
5408 0, // GPRC_NOR0:sub_gp8_x1
5409 0, // GPRC_NOR0:sub_gt
5410 0, // GPRC_NOR0:sub_lt
5411 0, // GPRC_NOR0:sub_pair0
5412 0, // GPRC_NOR0:sub_pair1
5413 0, // GPRC_NOR0:sub_un
5414 0, // GPRC_NOR0:sub_vsx0
5415 0, // GPRC_NOR0:sub_vsx1
5416 0, // GPRC_NOR0:sub_wacc_hi
5417 0, // GPRC_NOR0:sub_wacc_lo
5418 0, // GPRC_NOR0:sub_vsx1_then_sub_64
5419 0, // GPRC_NOR0:sub_vsx1_then_sub_64_hi_phony
5420 0, // GPRC_NOR0:sub_pair1_then_sub_64
5421 0, // GPRC_NOR0:sub_pair1_then_sub_64_hi_phony
5422 0, // GPRC_NOR0:sub_pair1_then_sub_vsx0
5423 0, // GPRC_NOR0:sub_pair1_then_sub_vsx1
5424 0, // GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64
5425 0, // GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5426 0, // GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow0
5427 0, // GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow1
5428 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow0
5429 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow1
5430 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp0
5431 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1
5432 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5433 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5434 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrow0
5435 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrow1
5436 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrowp0
5437 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1
5438 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi
5439 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_lo
5440 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5441 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5442 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5443 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5444 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5445 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5446 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5447 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5448 0, // GPRC_NOR0:sub_gp8_x1_then_sub_32
5449 },
5450 { // GPRC_and_GPRC_NOR0
5451 0, // GPRC_and_GPRC_NOR0:sub_32
5452 0, // GPRC_and_GPRC_NOR0:sub_32_hi_phony
5453 0, // GPRC_and_GPRC_NOR0:sub_64
5454 0, // GPRC_and_GPRC_NOR0:sub_64_hi_phony
5455 0, // GPRC_and_GPRC_NOR0:sub_dmr0
5456 0, // GPRC_and_GPRC_NOR0:sub_dmr1
5457 0, // GPRC_and_GPRC_NOR0:sub_dmrrow0
5458 0, // GPRC_and_GPRC_NOR0:sub_dmrrow1
5459 0, // GPRC_and_GPRC_NOR0:sub_dmrrowp0
5460 0, // GPRC_and_GPRC_NOR0:sub_dmrrowp1
5461 0, // GPRC_and_GPRC_NOR0:sub_eq
5462 0, // GPRC_and_GPRC_NOR0:sub_fp0
5463 0, // GPRC_and_GPRC_NOR0:sub_fp1
5464 0, // GPRC_and_GPRC_NOR0:sub_gp8_x0
5465 0, // GPRC_and_GPRC_NOR0:sub_gp8_x1
5466 0, // GPRC_and_GPRC_NOR0:sub_gt
5467 0, // GPRC_and_GPRC_NOR0:sub_lt
5468 0, // GPRC_and_GPRC_NOR0:sub_pair0
5469 0, // GPRC_and_GPRC_NOR0:sub_pair1
5470 0, // GPRC_and_GPRC_NOR0:sub_un
5471 0, // GPRC_and_GPRC_NOR0:sub_vsx0
5472 0, // GPRC_and_GPRC_NOR0:sub_vsx1
5473 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi
5474 0, // GPRC_and_GPRC_NOR0:sub_wacc_lo
5475 0, // GPRC_and_GPRC_NOR0:sub_vsx1_then_sub_64
5476 0, // GPRC_and_GPRC_NOR0:sub_vsx1_then_sub_64_hi_phony
5477 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_64
5478 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_64_hi_phony
5479 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_vsx0
5480 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_vsx1
5481 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64
5482 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5483 0, // GPRC_and_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow0
5484 0, // GPRC_and_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow1
5485 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow0
5486 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow1
5487 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp0
5488 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1
5489 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5490 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5491 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrow0
5492 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrow1
5493 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp0
5494 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1
5495 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi
5496 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_lo
5497 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5498 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5499 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5500 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5501 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5502 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5503 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5504 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5505 0, // GPRC_and_GPRC_NOR0:sub_gp8_x1_then_sub_32
5506 },
5507 { // CRBITRC
5508 0, // CRBITRC:sub_32
5509 0, // CRBITRC:sub_32_hi_phony
5510 0, // CRBITRC:sub_64
5511 0, // CRBITRC:sub_64_hi_phony
5512 0, // CRBITRC:sub_dmr0
5513 0, // CRBITRC:sub_dmr1
5514 0, // CRBITRC:sub_dmrrow0
5515 0, // CRBITRC:sub_dmrrow1
5516 0, // CRBITRC:sub_dmrrowp0
5517 0, // CRBITRC:sub_dmrrowp1
5518 0, // CRBITRC:sub_eq
5519 0, // CRBITRC:sub_fp0
5520 0, // CRBITRC:sub_fp1
5521 0, // CRBITRC:sub_gp8_x0
5522 0, // CRBITRC:sub_gp8_x1
5523 0, // CRBITRC:sub_gt
5524 0, // CRBITRC:sub_lt
5525 0, // CRBITRC:sub_pair0
5526 0, // CRBITRC:sub_pair1
5527 0, // CRBITRC:sub_un
5528 0, // CRBITRC:sub_vsx0
5529 0, // CRBITRC:sub_vsx1
5530 0, // CRBITRC:sub_wacc_hi
5531 0, // CRBITRC:sub_wacc_lo
5532 0, // CRBITRC:sub_vsx1_then_sub_64
5533 0, // CRBITRC:sub_vsx1_then_sub_64_hi_phony
5534 0, // CRBITRC:sub_pair1_then_sub_64
5535 0, // CRBITRC:sub_pair1_then_sub_64_hi_phony
5536 0, // CRBITRC:sub_pair1_then_sub_vsx0
5537 0, // CRBITRC:sub_pair1_then_sub_vsx1
5538 0, // CRBITRC:sub_pair1_then_sub_vsx1_then_sub_64
5539 0, // CRBITRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5540 0, // CRBITRC:sub_dmrrowp1_then_sub_dmrrow0
5541 0, // CRBITRC:sub_dmrrowp1_then_sub_dmrrow1
5542 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrow0
5543 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrow1
5544 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrowp0
5545 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrowp1
5546 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5547 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5548 0, // CRBITRC:sub_dmr1_then_sub_dmrrow0
5549 0, // CRBITRC:sub_dmr1_then_sub_dmrrow1
5550 0, // CRBITRC:sub_dmr1_then_sub_dmrrowp0
5551 0, // CRBITRC:sub_dmr1_then_sub_dmrrowp1
5552 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi
5553 0, // CRBITRC:sub_dmr1_then_sub_wacc_lo
5554 0, // CRBITRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5555 0, // CRBITRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5556 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5557 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5558 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5559 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5560 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5561 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5562 0, // CRBITRC:sub_gp8_x1_then_sub_32
5563 },
5564 { // F4RC
5565 0, // F4RC:sub_32
5566 0, // F4RC:sub_32_hi_phony
5567 0, // F4RC:sub_64
5568 0, // F4RC:sub_64_hi_phony
5569 0, // F4RC:sub_dmr0
5570 0, // F4RC:sub_dmr1
5571 0, // F4RC:sub_dmrrow0
5572 0, // F4RC:sub_dmrrow1
5573 0, // F4RC:sub_dmrrowp0
5574 0, // F4RC:sub_dmrrowp1
5575 0, // F4RC:sub_eq
5576 0, // F4RC:sub_fp0
5577 0, // F4RC:sub_fp1
5578 0, // F4RC:sub_gp8_x0
5579 0, // F4RC:sub_gp8_x1
5580 0, // F4RC:sub_gt
5581 0, // F4RC:sub_lt
5582 0, // F4RC:sub_pair0
5583 0, // F4RC:sub_pair1
5584 0, // F4RC:sub_un
5585 0, // F4RC:sub_vsx0
5586 0, // F4RC:sub_vsx1
5587 0, // F4RC:sub_wacc_hi
5588 0, // F4RC:sub_wacc_lo
5589 0, // F4RC:sub_vsx1_then_sub_64
5590 0, // F4RC:sub_vsx1_then_sub_64_hi_phony
5591 0, // F4RC:sub_pair1_then_sub_64
5592 0, // F4RC:sub_pair1_then_sub_64_hi_phony
5593 0, // F4RC:sub_pair1_then_sub_vsx0
5594 0, // F4RC:sub_pair1_then_sub_vsx1
5595 0, // F4RC:sub_pair1_then_sub_vsx1_then_sub_64
5596 0, // F4RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5597 0, // F4RC:sub_dmrrowp1_then_sub_dmrrow0
5598 0, // F4RC:sub_dmrrowp1_then_sub_dmrrow1
5599 0, // F4RC:sub_wacc_hi_then_sub_dmrrow0
5600 0, // F4RC:sub_wacc_hi_then_sub_dmrrow1
5601 0, // F4RC:sub_wacc_hi_then_sub_dmrrowp0
5602 0, // F4RC:sub_wacc_hi_then_sub_dmrrowp1
5603 0, // F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5604 0, // F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5605 0, // F4RC:sub_dmr1_then_sub_dmrrow0
5606 0, // F4RC:sub_dmr1_then_sub_dmrrow1
5607 0, // F4RC:sub_dmr1_then_sub_dmrrowp0
5608 0, // F4RC:sub_dmr1_then_sub_dmrrowp1
5609 0, // F4RC:sub_dmr1_then_sub_wacc_hi
5610 0, // F4RC:sub_dmr1_then_sub_wacc_lo
5611 0, // F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5612 0, // F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5613 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5614 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5615 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5616 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5617 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5618 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5619 0, // F4RC:sub_gp8_x1_then_sub_32
5620 },
5621 { // GPRC32
5622 0, // GPRC32:sub_32
5623 0, // GPRC32:sub_32_hi_phony
5624 0, // GPRC32:sub_64
5625 0, // GPRC32:sub_64_hi_phony
5626 0, // GPRC32:sub_dmr0
5627 0, // GPRC32:sub_dmr1
5628 0, // GPRC32:sub_dmrrow0
5629 0, // GPRC32:sub_dmrrow1
5630 0, // GPRC32:sub_dmrrowp0
5631 0, // GPRC32:sub_dmrrowp1
5632 0, // GPRC32:sub_eq
5633 0, // GPRC32:sub_fp0
5634 0, // GPRC32:sub_fp1
5635 0, // GPRC32:sub_gp8_x0
5636 0, // GPRC32:sub_gp8_x1
5637 0, // GPRC32:sub_gt
5638 0, // GPRC32:sub_lt
5639 0, // GPRC32:sub_pair0
5640 0, // GPRC32:sub_pair1
5641 0, // GPRC32:sub_un
5642 0, // GPRC32:sub_vsx0
5643 0, // GPRC32:sub_vsx1
5644 0, // GPRC32:sub_wacc_hi
5645 0, // GPRC32:sub_wacc_lo
5646 0, // GPRC32:sub_vsx1_then_sub_64
5647 0, // GPRC32:sub_vsx1_then_sub_64_hi_phony
5648 0, // GPRC32:sub_pair1_then_sub_64
5649 0, // GPRC32:sub_pair1_then_sub_64_hi_phony
5650 0, // GPRC32:sub_pair1_then_sub_vsx0
5651 0, // GPRC32:sub_pair1_then_sub_vsx1
5652 0, // GPRC32:sub_pair1_then_sub_vsx1_then_sub_64
5653 0, // GPRC32:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5654 0, // GPRC32:sub_dmrrowp1_then_sub_dmrrow0
5655 0, // GPRC32:sub_dmrrowp1_then_sub_dmrrow1
5656 0, // GPRC32:sub_wacc_hi_then_sub_dmrrow0
5657 0, // GPRC32:sub_wacc_hi_then_sub_dmrrow1
5658 0, // GPRC32:sub_wacc_hi_then_sub_dmrrowp0
5659 0, // GPRC32:sub_wacc_hi_then_sub_dmrrowp1
5660 0, // GPRC32:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5661 0, // GPRC32:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5662 0, // GPRC32:sub_dmr1_then_sub_dmrrow0
5663 0, // GPRC32:sub_dmr1_then_sub_dmrrow1
5664 0, // GPRC32:sub_dmr1_then_sub_dmrrowp0
5665 0, // GPRC32:sub_dmr1_then_sub_dmrrowp1
5666 0, // GPRC32:sub_dmr1_then_sub_wacc_hi
5667 0, // GPRC32:sub_dmr1_then_sub_wacc_lo
5668 0, // GPRC32:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5669 0, // GPRC32:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5670 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5671 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5672 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5673 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5674 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5675 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5676 0, // GPRC32:sub_gp8_x1_then_sub_32
5677 },
5678 { // CRRC
5679 0, // CRRC:sub_32
5680 0, // CRRC:sub_32_hi_phony
5681 0, // CRRC:sub_64
5682 0, // CRRC:sub_64_hi_phony
5683 0, // CRRC:sub_dmr0
5684 0, // CRRC:sub_dmr1
5685 0, // CRRC:sub_dmrrow0
5686 0, // CRRC:sub_dmrrow1
5687 0, // CRRC:sub_dmrrowp0
5688 0, // CRRC:sub_dmrrowp1
5689 5, // CRRC:sub_eq -> CRBITRC
5690 0, // CRRC:sub_fp0
5691 0, // CRRC:sub_fp1
5692 0, // CRRC:sub_gp8_x0
5693 0, // CRRC:sub_gp8_x1
5694 5, // CRRC:sub_gt -> CRBITRC
5695 5, // CRRC:sub_lt -> CRBITRC
5696 0, // CRRC:sub_pair0
5697 0, // CRRC:sub_pair1
5698 5, // CRRC:sub_un -> CRBITRC
5699 0, // CRRC:sub_vsx0
5700 0, // CRRC:sub_vsx1
5701 0, // CRRC:sub_wacc_hi
5702 0, // CRRC:sub_wacc_lo
5703 0, // CRRC:sub_vsx1_then_sub_64
5704 0, // CRRC:sub_vsx1_then_sub_64_hi_phony
5705 0, // CRRC:sub_pair1_then_sub_64
5706 0, // CRRC:sub_pair1_then_sub_64_hi_phony
5707 0, // CRRC:sub_pair1_then_sub_vsx0
5708 0, // CRRC:sub_pair1_then_sub_vsx1
5709 0, // CRRC:sub_pair1_then_sub_vsx1_then_sub_64
5710 0, // CRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5711 0, // CRRC:sub_dmrrowp1_then_sub_dmrrow0
5712 0, // CRRC:sub_dmrrowp1_then_sub_dmrrow1
5713 0, // CRRC:sub_wacc_hi_then_sub_dmrrow0
5714 0, // CRRC:sub_wacc_hi_then_sub_dmrrow1
5715 0, // CRRC:sub_wacc_hi_then_sub_dmrrowp0
5716 0, // CRRC:sub_wacc_hi_then_sub_dmrrowp1
5717 0, // CRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5718 0, // CRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5719 0, // CRRC:sub_dmr1_then_sub_dmrrow0
5720 0, // CRRC:sub_dmr1_then_sub_dmrrow1
5721 0, // CRRC:sub_dmr1_then_sub_dmrrowp0
5722 0, // CRRC:sub_dmr1_then_sub_dmrrowp1
5723 0, // CRRC:sub_dmr1_then_sub_wacc_hi
5724 0, // CRRC:sub_dmr1_then_sub_wacc_lo
5725 0, // CRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5726 0, // CRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5727 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5728 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5729 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5730 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5731 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5732 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5733 0, // CRRC:sub_gp8_x1_then_sub_32
5734 },
5735 { // CARRYRC
5736 0, // CARRYRC:sub_32
5737 0, // CARRYRC:sub_32_hi_phony
5738 0, // CARRYRC:sub_64
5739 0, // CARRYRC:sub_64_hi_phony
5740 0, // CARRYRC:sub_dmr0
5741 0, // CARRYRC:sub_dmr1
5742 0, // CARRYRC:sub_dmrrow0
5743 0, // CARRYRC:sub_dmrrow1
5744 0, // CARRYRC:sub_dmrrowp0
5745 0, // CARRYRC:sub_dmrrowp1
5746 0, // CARRYRC:sub_eq
5747 0, // CARRYRC:sub_fp0
5748 0, // CARRYRC:sub_fp1
5749 0, // CARRYRC:sub_gp8_x0
5750 0, // CARRYRC:sub_gp8_x1
5751 0, // CARRYRC:sub_gt
5752 0, // CARRYRC:sub_lt
5753 0, // CARRYRC:sub_pair0
5754 0, // CARRYRC:sub_pair1
5755 0, // CARRYRC:sub_un
5756 0, // CARRYRC:sub_vsx0
5757 0, // CARRYRC:sub_vsx1
5758 0, // CARRYRC:sub_wacc_hi
5759 0, // CARRYRC:sub_wacc_lo
5760 0, // CARRYRC:sub_vsx1_then_sub_64
5761 0, // CARRYRC:sub_vsx1_then_sub_64_hi_phony
5762 0, // CARRYRC:sub_pair1_then_sub_64
5763 0, // CARRYRC:sub_pair1_then_sub_64_hi_phony
5764 0, // CARRYRC:sub_pair1_then_sub_vsx0
5765 0, // CARRYRC:sub_pair1_then_sub_vsx1
5766 0, // CARRYRC:sub_pair1_then_sub_vsx1_then_sub_64
5767 0, // CARRYRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5768 0, // CARRYRC:sub_dmrrowp1_then_sub_dmrrow0
5769 0, // CARRYRC:sub_dmrrowp1_then_sub_dmrrow1
5770 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrow0
5771 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrow1
5772 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrowp0
5773 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrowp1
5774 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5775 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5776 0, // CARRYRC:sub_dmr1_then_sub_dmrrow0
5777 0, // CARRYRC:sub_dmr1_then_sub_dmrrow1
5778 0, // CARRYRC:sub_dmr1_then_sub_dmrrowp0
5779 0, // CARRYRC:sub_dmr1_then_sub_dmrrowp1
5780 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi
5781 0, // CARRYRC:sub_dmr1_then_sub_wacc_lo
5782 0, // CARRYRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5783 0, // CARRYRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5784 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5785 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5786 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5787 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5788 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5789 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5790 0, // CARRYRC:sub_gp8_x1_then_sub_32
5791 },
5792 { // CTRRC
5793 0, // CTRRC:sub_32
5794 0, // CTRRC:sub_32_hi_phony
5795 0, // CTRRC:sub_64
5796 0, // CTRRC:sub_64_hi_phony
5797 0, // CTRRC:sub_dmr0
5798 0, // CTRRC:sub_dmr1
5799 0, // CTRRC:sub_dmrrow0
5800 0, // CTRRC:sub_dmrrow1
5801 0, // CTRRC:sub_dmrrowp0
5802 0, // CTRRC:sub_dmrrowp1
5803 0, // CTRRC:sub_eq
5804 0, // CTRRC:sub_fp0
5805 0, // CTRRC:sub_fp1
5806 0, // CTRRC:sub_gp8_x0
5807 0, // CTRRC:sub_gp8_x1
5808 0, // CTRRC:sub_gt
5809 0, // CTRRC:sub_lt
5810 0, // CTRRC:sub_pair0
5811 0, // CTRRC:sub_pair1
5812 0, // CTRRC:sub_un
5813 0, // CTRRC:sub_vsx0
5814 0, // CTRRC:sub_vsx1
5815 0, // CTRRC:sub_wacc_hi
5816 0, // CTRRC:sub_wacc_lo
5817 0, // CTRRC:sub_vsx1_then_sub_64
5818 0, // CTRRC:sub_vsx1_then_sub_64_hi_phony
5819 0, // CTRRC:sub_pair1_then_sub_64
5820 0, // CTRRC:sub_pair1_then_sub_64_hi_phony
5821 0, // CTRRC:sub_pair1_then_sub_vsx0
5822 0, // CTRRC:sub_pair1_then_sub_vsx1
5823 0, // CTRRC:sub_pair1_then_sub_vsx1_then_sub_64
5824 0, // CTRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5825 0, // CTRRC:sub_dmrrowp1_then_sub_dmrrow0
5826 0, // CTRRC:sub_dmrrowp1_then_sub_dmrrow1
5827 0, // CTRRC:sub_wacc_hi_then_sub_dmrrow0
5828 0, // CTRRC:sub_wacc_hi_then_sub_dmrrow1
5829 0, // CTRRC:sub_wacc_hi_then_sub_dmrrowp0
5830 0, // CTRRC:sub_wacc_hi_then_sub_dmrrowp1
5831 0, // CTRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5832 0, // CTRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5833 0, // CTRRC:sub_dmr1_then_sub_dmrrow0
5834 0, // CTRRC:sub_dmr1_then_sub_dmrrow1
5835 0, // CTRRC:sub_dmr1_then_sub_dmrrowp0
5836 0, // CTRRC:sub_dmr1_then_sub_dmrrowp1
5837 0, // CTRRC:sub_dmr1_then_sub_wacc_hi
5838 0, // CTRRC:sub_dmr1_then_sub_wacc_lo
5839 0, // CTRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5840 0, // CTRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5841 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5842 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5843 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5844 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5845 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5846 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5847 0, // CTRRC:sub_gp8_x1_then_sub_32
5848 },
5849 { // LRRC
5850 0, // LRRC:sub_32
5851 0, // LRRC:sub_32_hi_phony
5852 0, // LRRC:sub_64
5853 0, // LRRC:sub_64_hi_phony
5854 0, // LRRC:sub_dmr0
5855 0, // LRRC:sub_dmr1
5856 0, // LRRC:sub_dmrrow0
5857 0, // LRRC:sub_dmrrow1
5858 0, // LRRC:sub_dmrrowp0
5859 0, // LRRC:sub_dmrrowp1
5860 0, // LRRC:sub_eq
5861 0, // LRRC:sub_fp0
5862 0, // LRRC:sub_fp1
5863 0, // LRRC:sub_gp8_x0
5864 0, // LRRC:sub_gp8_x1
5865 0, // LRRC:sub_gt
5866 0, // LRRC:sub_lt
5867 0, // LRRC:sub_pair0
5868 0, // LRRC:sub_pair1
5869 0, // LRRC:sub_un
5870 0, // LRRC:sub_vsx0
5871 0, // LRRC:sub_vsx1
5872 0, // LRRC:sub_wacc_hi
5873 0, // LRRC:sub_wacc_lo
5874 0, // LRRC:sub_vsx1_then_sub_64
5875 0, // LRRC:sub_vsx1_then_sub_64_hi_phony
5876 0, // LRRC:sub_pair1_then_sub_64
5877 0, // LRRC:sub_pair1_then_sub_64_hi_phony
5878 0, // LRRC:sub_pair1_then_sub_vsx0
5879 0, // LRRC:sub_pair1_then_sub_vsx1
5880 0, // LRRC:sub_pair1_then_sub_vsx1_then_sub_64
5881 0, // LRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5882 0, // LRRC:sub_dmrrowp1_then_sub_dmrrow0
5883 0, // LRRC:sub_dmrrowp1_then_sub_dmrrow1
5884 0, // LRRC:sub_wacc_hi_then_sub_dmrrow0
5885 0, // LRRC:sub_wacc_hi_then_sub_dmrrow1
5886 0, // LRRC:sub_wacc_hi_then_sub_dmrrowp0
5887 0, // LRRC:sub_wacc_hi_then_sub_dmrrowp1
5888 0, // LRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5889 0, // LRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5890 0, // LRRC:sub_dmr1_then_sub_dmrrow0
5891 0, // LRRC:sub_dmr1_then_sub_dmrrow1
5892 0, // LRRC:sub_dmr1_then_sub_dmrrowp0
5893 0, // LRRC:sub_dmr1_then_sub_dmrrowp1
5894 0, // LRRC:sub_dmr1_then_sub_wacc_hi
5895 0, // LRRC:sub_dmr1_then_sub_wacc_lo
5896 0, // LRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5897 0, // LRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5898 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5899 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5900 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5901 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5902 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5903 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5904 0, // LRRC:sub_gp8_x1_then_sub_32
5905 },
5906 { // VRSAVERC
5907 0, // VRSAVERC:sub_32
5908 0, // VRSAVERC:sub_32_hi_phony
5909 0, // VRSAVERC:sub_64
5910 0, // VRSAVERC:sub_64_hi_phony
5911 0, // VRSAVERC:sub_dmr0
5912 0, // VRSAVERC:sub_dmr1
5913 0, // VRSAVERC:sub_dmrrow0
5914 0, // VRSAVERC:sub_dmrrow1
5915 0, // VRSAVERC:sub_dmrrowp0
5916 0, // VRSAVERC:sub_dmrrowp1
5917 0, // VRSAVERC:sub_eq
5918 0, // VRSAVERC:sub_fp0
5919 0, // VRSAVERC:sub_fp1
5920 0, // VRSAVERC:sub_gp8_x0
5921 0, // VRSAVERC:sub_gp8_x1
5922 0, // VRSAVERC:sub_gt
5923 0, // VRSAVERC:sub_lt
5924 0, // VRSAVERC:sub_pair0
5925 0, // VRSAVERC:sub_pair1
5926 0, // VRSAVERC:sub_un
5927 0, // VRSAVERC:sub_vsx0
5928 0, // VRSAVERC:sub_vsx1
5929 0, // VRSAVERC:sub_wacc_hi
5930 0, // VRSAVERC:sub_wacc_lo
5931 0, // VRSAVERC:sub_vsx1_then_sub_64
5932 0, // VRSAVERC:sub_vsx1_then_sub_64_hi_phony
5933 0, // VRSAVERC:sub_pair1_then_sub_64
5934 0, // VRSAVERC:sub_pair1_then_sub_64_hi_phony
5935 0, // VRSAVERC:sub_pair1_then_sub_vsx0
5936 0, // VRSAVERC:sub_pair1_then_sub_vsx1
5937 0, // VRSAVERC:sub_pair1_then_sub_vsx1_then_sub_64
5938 0, // VRSAVERC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5939 0, // VRSAVERC:sub_dmrrowp1_then_sub_dmrrow0
5940 0, // VRSAVERC:sub_dmrrowp1_then_sub_dmrrow1
5941 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrow0
5942 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrow1
5943 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrowp0
5944 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrowp1
5945 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5946 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5947 0, // VRSAVERC:sub_dmr1_then_sub_dmrrow0
5948 0, // VRSAVERC:sub_dmr1_then_sub_dmrrow1
5949 0, // VRSAVERC:sub_dmr1_then_sub_dmrrowp0
5950 0, // VRSAVERC:sub_dmr1_then_sub_dmrrowp1
5951 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi
5952 0, // VRSAVERC:sub_dmr1_then_sub_wacc_lo
5953 0, // VRSAVERC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5954 0, // VRSAVERC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5955 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5956 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5957 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5958 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5959 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5960 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5961 0, // VRSAVERC:sub_gp8_x1_then_sub_32
5962 },
5963 { // SPILLTOVSRRC
5964 2, // SPILLTOVSRRC:sub_32 -> GPRC
5965 0, // SPILLTOVSRRC:sub_32_hi_phony
5966 0, // SPILLTOVSRRC:sub_64
5967 0, // SPILLTOVSRRC:sub_64_hi_phony
5968 0, // SPILLTOVSRRC:sub_dmr0
5969 0, // SPILLTOVSRRC:sub_dmr1
5970 0, // SPILLTOVSRRC:sub_dmrrow0
5971 0, // SPILLTOVSRRC:sub_dmrrow1
5972 0, // SPILLTOVSRRC:sub_dmrrowp0
5973 0, // SPILLTOVSRRC:sub_dmrrowp1
5974 0, // SPILLTOVSRRC:sub_eq
5975 0, // SPILLTOVSRRC:sub_fp0
5976 0, // SPILLTOVSRRC:sub_fp1
5977 0, // SPILLTOVSRRC:sub_gp8_x0
5978 0, // SPILLTOVSRRC:sub_gp8_x1
5979 0, // SPILLTOVSRRC:sub_gt
5980 0, // SPILLTOVSRRC:sub_lt
5981 0, // SPILLTOVSRRC:sub_pair0
5982 0, // SPILLTOVSRRC:sub_pair1
5983 0, // SPILLTOVSRRC:sub_un
5984 0, // SPILLTOVSRRC:sub_vsx0
5985 0, // SPILLTOVSRRC:sub_vsx1
5986 0, // SPILLTOVSRRC:sub_wacc_hi
5987 0, // SPILLTOVSRRC:sub_wacc_lo
5988 0, // SPILLTOVSRRC:sub_vsx1_then_sub_64
5989 0, // SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
5990 0, // SPILLTOVSRRC:sub_pair1_then_sub_64
5991 0, // SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
5992 0, // SPILLTOVSRRC:sub_pair1_then_sub_vsx0
5993 0, // SPILLTOVSRRC:sub_pair1_then_sub_vsx1
5994 0, // SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
5995 0, // SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5996 0, // SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
5997 0, // SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
5998 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
5999 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
6000 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
6001 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
6002 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6003 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6004 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
6005 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
6006 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
6007 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
6008 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
6009 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
6010 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6011 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6012 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6013 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6014 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6015 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6016 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6017 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6018 0, // SPILLTOVSRRC:sub_gp8_x1_then_sub_32
6019 },
6020 { // VSFRC
6021 0, // VSFRC:sub_32
6022 0, // VSFRC:sub_32_hi_phony
6023 0, // VSFRC:sub_64
6024 0, // VSFRC:sub_64_hi_phony
6025 0, // VSFRC:sub_dmr0
6026 0, // VSFRC:sub_dmr1
6027 0, // VSFRC:sub_dmrrow0
6028 0, // VSFRC:sub_dmrrow1
6029 0, // VSFRC:sub_dmrrowp0
6030 0, // VSFRC:sub_dmrrowp1
6031 0, // VSFRC:sub_eq
6032 0, // VSFRC:sub_fp0
6033 0, // VSFRC:sub_fp1
6034 0, // VSFRC:sub_gp8_x0
6035 0, // VSFRC:sub_gp8_x1
6036 0, // VSFRC:sub_gt
6037 0, // VSFRC:sub_lt
6038 0, // VSFRC:sub_pair0
6039 0, // VSFRC:sub_pair1
6040 0, // VSFRC:sub_un
6041 0, // VSFRC:sub_vsx0
6042 0, // VSFRC:sub_vsx1
6043 0, // VSFRC:sub_wacc_hi
6044 0, // VSFRC:sub_wacc_lo
6045 0, // VSFRC:sub_vsx1_then_sub_64
6046 0, // VSFRC:sub_vsx1_then_sub_64_hi_phony
6047 0, // VSFRC:sub_pair1_then_sub_64
6048 0, // VSFRC:sub_pair1_then_sub_64_hi_phony
6049 0, // VSFRC:sub_pair1_then_sub_vsx0
6050 0, // VSFRC:sub_pair1_then_sub_vsx1
6051 0, // VSFRC:sub_pair1_then_sub_vsx1_then_sub_64
6052 0, // VSFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6053 0, // VSFRC:sub_dmrrowp1_then_sub_dmrrow0
6054 0, // VSFRC:sub_dmrrowp1_then_sub_dmrrow1
6055 0, // VSFRC:sub_wacc_hi_then_sub_dmrrow0
6056 0, // VSFRC:sub_wacc_hi_then_sub_dmrrow1
6057 0, // VSFRC:sub_wacc_hi_then_sub_dmrrowp0
6058 0, // VSFRC:sub_wacc_hi_then_sub_dmrrowp1
6059 0, // VSFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6060 0, // VSFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6061 0, // VSFRC:sub_dmr1_then_sub_dmrrow0
6062 0, // VSFRC:sub_dmr1_then_sub_dmrrow1
6063 0, // VSFRC:sub_dmr1_then_sub_dmrrowp0
6064 0, // VSFRC:sub_dmr1_then_sub_dmrrowp1
6065 0, // VSFRC:sub_dmr1_then_sub_wacc_hi
6066 0, // VSFRC:sub_dmr1_then_sub_wacc_lo
6067 0, // VSFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6068 0, // VSFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6069 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6070 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6071 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6072 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6073 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6074 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6075 0, // VSFRC:sub_gp8_x1_then_sub_32
6076 },
6077 { // G8RC
6078 2, // G8RC:sub_32 -> GPRC
6079 0, // G8RC:sub_32_hi_phony
6080 0, // G8RC:sub_64
6081 0, // G8RC:sub_64_hi_phony
6082 0, // G8RC:sub_dmr0
6083 0, // G8RC:sub_dmr1
6084 0, // G8RC:sub_dmrrow0
6085 0, // G8RC:sub_dmrrow1
6086 0, // G8RC:sub_dmrrowp0
6087 0, // G8RC:sub_dmrrowp1
6088 0, // G8RC:sub_eq
6089 0, // G8RC:sub_fp0
6090 0, // G8RC:sub_fp1
6091 0, // G8RC:sub_gp8_x0
6092 0, // G8RC:sub_gp8_x1
6093 0, // G8RC:sub_gt
6094 0, // G8RC:sub_lt
6095 0, // G8RC:sub_pair0
6096 0, // G8RC:sub_pair1
6097 0, // G8RC:sub_un
6098 0, // G8RC:sub_vsx0
6099 0, // G8RC:sub_vsx1
6100 0, // G8RC:sub_wacc_hi
6101 0, // G8RC:sub_wacc_lo
6102 0, // G8RC:sub_vsx1_then_sub_64
6103 0, // G8RC:sub_vsx1_then_sub_64_hi_phony
6104 0, // G8RC:sub_pair1_then_sub_64
6105 0, // G8RC:sub_pair1_then_sub_64_hi_phony
6106 0, // G8RC:sub_pair1_then_sub_vsx0
6107 0, // G8RC:sub_pair1_then_sub_vsx1
6108 0, // G8RC:sub_pair1_then_sub_vsx1_then_sub_64
6109 0, // G8RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6110 0, // G8RC:sub_dmrrowp1_then_sub_dmrrow0
6111 0, // G8RC:sub_dmrrowp1_then_sub_dmrrow1
6112 0, // G8RC:sub_wacc_hi_then_sub_dmrrow0
6113 0, // G8RC:sub_wacc_hi_then_sub_dmrrow1
6114 0, // G8RC:sub_wacc_hi_then_sub_dmrrowp0
6115 0, // G8RC:sub_wacc_hi_then_sub_dmrrowp1
6116 0, // G8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6117 0, // G8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6118 0, // G8RC:sub_dmr1_then_sub_dmrrow0
6119 0, // G8RC:sub_dmr1_then_sub_dmrrow1
6120 0, // G8RC:sub_dmr1_then_sub_dmrrowp0
6121 0, // G8RC:sub_dmr1_then_sub_dmrrowp1
6122 0, // G8RC:sub_dmr1_then_sub_wacc_hi
6123 0, // G8RC:sub_dmr1_then_sub_wacc_lo
6124 0, // G8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6125 0, // G8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6126 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6127 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6128 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6129 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6130 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6131 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6132 0, // G8RC:sub_gp8_x1_then_sub_32
6133 },
6134 { // G8RC_NOX0
6135 3, // G8RC_NOX0:sub_32 -> GPRC_NOR0
6136 0, // G8RC_NOX0:sub_32_hi_phony
6137 0, // G8RC_NOX0:sub_64
6138 0, // G8RC_NOX0:sub_64_hi_phony
6139 0, // G8RC_NOX0:sub_dmr0
6140 0, // G8RC_NOX0:sub_dmr1
6141 0, // G8RC_NOX0:sub_dmrrow0
6142 0, // G8RC_NOX0:sub_dmrrow1
6143 0, // G8RC_NOX0:sub_dmrrowp0
6144 0, // G8RC_NOX0:sub_dmrrowp1
6145 0, // G8RC_NOX0:sub_eq
6146 0, // G8RC_NOX0:sub_fp0
6147 0, // G8RC_NOX0:sub_fp1
6148 0, // G8RC_NOX0:sub_gp8_x0
6149 0, // G8RC_NOX0:sub_gp8_x1
6150 0, // G8RC_NOX0:sub_gt
6151 0, // G8RC_NOX0:sub_lt
6152 0, // G8RC_NOX0:sub_pair0
6153 0, // G8RC_NOX0:sub_pair1
6154 0, // G8RC_NOX0:sub_un
6155 0, // G8RC_NOX0:sub_vsx0
6156 0, // G8RC_NOX0:sub_vsx1
6157 0, // G8RC_NOX0:sub_wacc_hi
6158 0, // G8RC_NOX0:sub_wacc_lo
6159 0, // G8RC_NOX0:sub_vsx1_then_sub_64
6160 0, // G8RC_NOX0:sub_vsx1_then_sub_64_hi_phony
6161 0, // G8RC_NOX0:sub_pair1_then_sub_64
6162 0, // G8RC_NOX0:sub_pair1_then_sub_64_hi_phony
6163 0, // G8RC_NOX0:sub_pair1_then_sub_vsx0
6164 0, // G8RC_NOX0:sub_pair1_then_sub_vsx1
6165 0, // G8RC_NOX0:sub_pair1_then_sub_vsx1_then_sub_64
6166 0, // G8RC_NOX0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6167 0, // G8RC_NOX0:sub_dmrrowp1_then_sub_dmrrow0
6168 0, // G8RC_NOX0:sub_dmrrowp1_then_sub_dmrrow1
6169 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrow0
6170 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrow1
6171 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp0
6172 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1
6173 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6174 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6175 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrow0
6176 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrow1
6177 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrowp0
6178 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1
6179 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi
6180 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_lo
6181 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6182 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6183 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6184 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6185 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6186 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6187 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6188 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6189 0, // G8RC_NOX0:sub_gp8_x1_then_sub_32
6190 },
6191 { // SPILLTOVSRRC_and_VSFRC
6192 0, // SPILLTOVSRRC_and_VSFRC:sub_32
6193 0, // SPILLTOVSRRC_and_VSFRC:sub_32_hi_phony
6194 0, // SPILLTOVSRRC_and_VSFRC:sub_64
6195 0, // SPILLTOVSRRC_and_VSFRC:sub_64_hi_phony
6196 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr0
6197 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1
6198 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrow0
6199 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrow1
6200 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrowp0
6201 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrowp1
6202 0, // SPILLTOVSRRC_and_VSFRC:sub_eq
6203 0, // SPILLTOVSRRC_and_VSFRC:sub_fp0
6204 0, // SPILLTOVSRRC_and_VSFRC:sub_fp1
6205 0, // SPILLTOVSRRC_and_VSFRC:sub_gp8_x0
6206 0, // SPILLTOVSRRC_and_VSFRC:sub_gp8_x1
6207 0, // SPILLTOVSRRC_and_VSFRC:sub_gt
6208 0, // SPILLTOVSRRC_and_VSFRC:sub_lt
6209 0, // SPILLTOVSRRC_and_VSFRC:sub_pair0
6210 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1
6211 0, // SPILLTOVSRRC_and_VSFRC:sub_un
6212 0, // SPILLTOVSRRC_and_VSFRC:sub_vsx0
6213 0, // SPILLTOVSRRC_and_VSFRC:sub_vsx1
6214 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi
6215 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_lo
6216 0, // SPILLTOVSRRC_and_VSFRC:sub_vsx1_then_sub_64
6217 0, // SPILLTOVSRRC_and_VSFRC:sub_vsx1_then_sub_64_hi_phony
6218 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_64
6219 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_64_hi_phony
6220 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_vsx0
6221 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_vsx1
6222 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_vsx1_then_sub_64
6223 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6224 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrowp1_then_sub_dmrrow0
6225 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrowp1_then_sub_dmrrow1
6226 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrow0
6227 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrow1
6228 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrowp0
6229 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrowp1
6230 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6231 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6232 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrow0
6233 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrow1
6234 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrowp0
6235 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrowp1
6236 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi
6237 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_lo
6238 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6239 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6240 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6241 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6242 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6243 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6244 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6245 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6246 0, // SPILLTOVSRRC_and_VSFRC:sub_gp8_x1_then_sub_32
6247 },
6248 { // G8RC_and_G8RC_NOX0
6249 4, // G8RC_and_G8RC_NOX0:sub_32 -> GPRC_and_GPRC_NOR0
6250 0, // G8RC_and_G8RC_NOX0:sub_32_hi_phony
6251 0, // G8RC_and_G8RC_NOX0:sub_64
6252 0, // G8RC_and_G8RC_NOX0:sub_64_hi_phony
6253 0, // G8RC_and_G8RC_NOX0:sub_dmr0
6254 0, // G8RC_and_G8RC_NOX0:sub_dmr1
6255 0, // G8RC_and_G8RC_NOX0:sub_dmrrow0
6256 0, // G8RC_and_G8RC_NOX0:sub_dmrrow1
6257 0, // G8RC_and_G8RC_NOX0:sub_dmrrowp0
6258 0, // G8RC_and_G8RC_NOX0:sub_dmrrowp1
6259 0, // G8RC_and_G8RC_NOX0:sub_eq
6260 0, // G8RC_and_G8RC_NOX0:sub_fp0
6261 0, // G8RC_and_G8RC_NOX0:sub_fp1
6262 0, // G8RC_and_G8RC_NOX0:sub_gp8_x0
6263 0, // G8RC_and_G8RC_NOX0:sub_gp8_x1
6264 0, // G8RC_and_G8RC_NOX0:sub_gt
6265 0, // G8RC_and_G8RC_NOX0:sub_lt
6266 0, // G8RC_and_G8RC_NOX0:sub_pair0
6267 0, // G8RC_and_G8RC_NOX0:sub_pair1
6268 0, // G8RC_and_G8RC_NOX0:sub_un
6269 0, // G8RC_and_G8RC_NOX0:sub_vsx0
6270 0, // G8RC_and_G8RC_NOX0:sub_vsx1
6271 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi
6272 0, // G8RC_and_G8RC_NOX0:sub_wacc_lo
6273 0, // G8RC_and_G8RC_NOX0:sub_vsx1_then_sub_64
6274 0, // G8RC_and_G8RC_NOX0:sub_vsx1_then_sub_64_hi_phony
6275 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_64
6276 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_64_hi_phony
6277 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_vsx0
6278 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_vsx1
6279 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_vsx1_then_sub_64
6280 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6281 0, // G8RC_and_G8RC_NOX0:sub_dmrrowp1_then_sub_dmrrow0
6282 0, // G8RC_and_G8RC_NOX0:sub_dmrrowp1_then_sub_dmrrow1
6283 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrow0
6284 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrow1
6285 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp0
6286 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1
6287 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6288 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6289 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrow0
6290 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrow1
6291 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrowp0
6292 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1
6293 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi
6294 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_lo
6295 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6296 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6297 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6298 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6299 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6300 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6301 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6302 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6303 0, // G8RC_and_G8RC_NOX0:sub_gp8_x1_then_sub_32
6304 },
6305 { // F8RC
6306 0, // F8RC:sub_32
6307 0, // F8RC:sub_32_hi_phony
6308 0, // F8RC:sub_64
6309 0, // F8RC:sub_64_hi_phony
6310 0, // F8RC:sub_dmr0
6311 0, // F8RC:sub_dmr1
6312 0, // F8RC:sub_dmrrow0
6313 0, // F8RC:sub_dmrrow1
6314 0, // F8RC:sub_dmrrowp0
6315 0, // F8RC:sub_dmrrowp1
6316 0, // F8RC:sub_eq
6317 0, // F8RC:sub_fp0
6318 0, // F8RC:sub_fp1
6319 0, // F8RC:sub_gp8_x0
6320 0, // F8RC:sub_gp8_x1
6321 0, // F8RC:sub_gt
6322 0, // F8RC:sub_lt
6323 0, // F8RC:sub_pair0
6324 0, // F8RC:sub_pair1
6325 0, // F8RC:sub_un
6326 0, // F8RC:sub_vsx0
6327 0, // F8RC:sub_vsx1
6328 0, // F8RC:sub_wacc_hi
6329 0, // F8RC:sub_wacc_lo
6330 0, // F8RC:sub_vsx1_then_sub_64
6331 0, // F8RC:sub_vsx1_then_sub_64_hi_phony
6332 0, // F8RC:sub_pair1_then_sub_64
6333 0, // F8RC:sub_pair1_then_sub_64_hi_phony
6334 0, // F8RC:sub_pair1_then_sub_vsx0
6335 0, // F8RC:sub_pair1_then_sub_vsx1
6336 0, // F8RC:sub_pair1_then_sub_vsx1_then_sub_64
6337 0, // F8RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6338 0, // F8RC:sub_dmrrowp1_then_sub_dmrrow0
6339 0, // F8RC:sub_dmrrowp1_then_sub_dmrrow1
6340 0, // F8RC:sub_wacc_hi_then_sub_dmrrow0
6341 0, // F8RC:sub_wacc_hi_then_sub_dmrrow1
6342 0, // F8RC:sub_wacc_hi_then_sub_dmrrowp0
6343 0, // F8RC:sub_wacc_hi_then_sub_dmrrowp1
6344 0, // F8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6345 0, // F8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6346 0, // F8RC:sub_dmr1_then_sub_dmrrow0
6347 0, // F8RC:sub_dmr1_then_sub_dmrrow1
6348 0, // F8RC:sub_dmr1_then_sub_dmrrowp0
6349 0, // F8RC:sub_dmr1_then_sub_dmrrowp1
6350 0, // F8RC:sub_dmr1_then_sub_wacc_hi
6351 0, // F8RC:sub_dmr1_then_sub_wacc_lo
6352 0, // F8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6353 0, // F8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6354 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6355 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6356 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6357 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6358 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6359 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6360 0, // F8RC:sub_gp8_x1_then_sub_32
6361 },
6362 { // FHRC
6363 0, // FHRC:sub_32
6364 0, // FHRC:sub_32_hi_phony
6365 0, // FHRC:sub_64
6366 0, // FHRC:sub_64_hi_phony
6367 0, // FHRC:sub_dmr0
6368 0, // FHRC:sub_dmr1
6369 0, // FHRC:sub_dmrrow0
6370 0, // FHRC:sub_dmrrow1
6371 0, // FHRC:sub_dmrrowp0
6372 0, // FHRC:sub_dmrrowp1
6373 0, // FHRC:sub_eq
6374 0, // FHRC:sub_fp0
6375 0, // FHRC:sub_fp1
6376 0, // FHRC:sub_gp8_x0
6377 0, // FHRC:sub_gp8_x1
6378 0, // FHRC:sub_gt
6379 0, // FHRC:sub_lt
6380 0, // FHRC:sub_pair0
6381 0, // FHRC:sub_pair1
6382 0, // FHRC:sub_un
6383 0, // FHRC:sub_vsx0
6384 0, // FHRC:sub_vsx1
6385 0, // FHRC:sub_wacc_hi
6386 0, // FHRC:sub_wacc_lo
6387 0, // FHRC:sub_vsx1_then_sub_64
6388 0, // FHRC:sub_vsx1_then_sub_64_hi_phony
6389 0, // FHRC:sub_pair1_then_sub_64
6390 0, // FHRC:sub_pair1_then_sub_64_hi_phony
6391 0, // FHRC:sub_pair1_then_sub_vsx0
6392 0, // FHRC:sub_pair1_then_sub_vsx1
6393 0, // FHRC:sub_pair1_then_sub_vsx1_then_sub_64
6394 0, // FHRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6395 0, // FHRC:sub_dmrrowp1_then_sub_dmrrow0
6396 0, // FHRC:sub_dmrrowp1_then_sub_dmrrow1
6397 0, // FHRC:sub_wacc_hi_then_sub_dmrrow0
6398 0, // FHRC:sub_wacc_hi_then_sub_dmrrow1
6399 0, // FHRC:sub_wacc_hi_then_sub_dmrrowp0
6400 0, // FHRC:sub_wacc_hi_then_sub_dmrrowp1
6401 0, // FHRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6402 0, // FHRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6403 0, // FHRC:sub_dmr1_then_sub_dmrrow0
6404 0, // FHRC:sub_dmr1_then_sub_dmrrow1
6405 0, // FHRC:sub_dmr1_then_sub_dmrrowp0
6406 0, // FHRC:sub_dmr1_then_sub_dmrrowp1
6407 0, // FHRC:sub_dmr1_then_sub_wacc_hi
6408 0, // FHRC:sub_dmr1_then_sub_wacc_lo
6409 0, // FHRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6410 0, // FHRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6411 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6412 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6413 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6414 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6415 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6416 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6417 0, // FHRC:sub_gp8_x1_then_sub_32
6418 },
6419 { // SPERC
6420 2, // SPERC:sub_32 -> GPRC
6421 0, // SPERC:sub_32_hi_phony
6422 0, // SPERC:sub_64
6423 0, // SPERC:sub_64_hi_phony
6424 0, // SPERC:sub_dmr0
6425 0, // SPERC:sub_dmr1
6426 0, // SPERC:sub_dmrrow0
6427 0, // SPERC:sub_dmrrow1
6428 0, // SPERC:sub_dmrrowp0
6429 0, // SPERC:sub_dmrrowp1
6430 0, // SPERC:sub_eq
6431 0, // SPERC:sub_fp0
6432 0, // SPERC:sub_fp1
6433 0, // SPERC:sub_gp8_x0
6434 0, // SPERC:sub_gp8_x1
6435 0, // SPERC:sub_gt
6436 0, // SPERC:sub_lt
6437 0, // SPERC:sub_pair0
6438 0, // SPERC:sub_pair1
6439 0, // SPERC:sub_un
6440 0, // SPERC:sub_vsx0
6441 0, // SPERC:sub_vsx1
6442 0, // SPERC:sub_wacc_hi
6443 0, // SPERC:sub_wacc_lo
6444 0, // SPERC:sub_vsx1_then_sub_64
6445 0, // SPERC:sub_vsx1_then_sub_64_hi_phony
6446 0, // SPERC:sub_pair1_then_sub_64
6447 0, // SPERC:sub_pair1_then_sub_64_hi_phony
6448 0, // SPERC:sub_pair1_then_sub_vsx0
6449 0, // SPERC:sub_pair1_then_sub_vsx1
6450 0, // SPERC:sub_pair1_then_sub_vsx1_then_sub_64
6451 0, // SPERC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6452 0, // SPERC:sub_dmrrowp1_then_sub_dmrrow0
6453 0, // SPERC:sub_dmrrowp1_then_sub_dmrrow1
6454 0, // SPERC:sub_wacc_hi_then_sub_dmrrow0
6455 0, // SPERC:sub_wacc_hi_then_sub_dmrrow1
6456 0, // SPERC:sub_wacc_hi_then_sub_dmrrowp0
6457 0, // SPERC:sub_wacc_hi_then_sub_dmrrowp1
6458 0, // SPERC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6459 0, // SPERC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6460 0, // SPERC:sub_dmr1_then_sub_dmrrow0
6461 0, // SPERC:sub_dmr1_then_sub_dmrrow1
6462 0, // SPERC:sub_dmr1_then_sub_dmrrowp0
6463 0, // SPERC:sub_dmr1_then_sub_dmrrowp1
6464 0, // SPERC:sub_dmr1_then_sub_wacc_hi
6465 0, // SPERC:sub_dmr1_then_sub_wacc_lo
6466 0, // SPERC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6467 0, // SPERC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6468 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6469 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6470 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6471 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6472 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6473 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6474 0, // SPERC:sub_gp8_x1_then_sub_32
6475 },
6476 { // VFHRC
6477 0, // VFHRC:sub_32
6478 0, // VFHRC:sub_32_hi_phony
6479 0, // VFHRC:sub_64
6480 0, // VFHRC:sub_64_hi_phony
6481 0, // VFHRC:sub_dmr0
6482 0, // VFHRC:sub_dmr1
6483 0, // VFHRC:sub_dmrrow0
6484 0, // VFHRC:sub_dmrrow1
6485 0, // VFHRC:sub_dmrrowp0
6486 0, // VFHRC:sub_dmrrowp1
6487 0, // VFHRC:sub_eq
6488 0, // VFHRC:sub_fp0
6489 0, // VFHRC:sub_fp1
6490 0, // VFHRC:sub_gp8_x0
6491 0, // VFHRC:sub_gp8_x1
6492 0, // VFHRC:sub_gt
6493 0, // VFHRC:sub_lt
6494 0, // VFHRC:sub_pair0
6495 0, // VFHRC:sub_pair1
6496 0, // VFHRC:sub_un
6497 0, // VFHRC:sub_vsx0
6498 0, // VFHRC:sub_vsx1
6499 0, // VFHRC:sub_wacc_hi
6500 0, // VFHRC:sub_wacc_lo
6501 0, // VFHRC:sub_vsx1_then_sub_64
6502 0, // VFHRC:sub_vsx1_then_sub_64_hi_phony
6503 0, // VFHRC:sub_pair1_then_sub_64
6504 0, // VFHRC:sub_pair1_then_sub_64_hi_phony
6505 0, // VFHRC:sub_pair1_then_sub_vsx0
6506 0, // VFHRC:sub_pair1_then_sub_vsx1
6507 0, // VFHRC:sub_pair1_then_sub_vsx1_then_sub_64
6508 0, // VFHRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6509 0, // VFHRC:sub_dmrrowp1_then_sub_dmrrow0
6510 0, // VFHRC:sub_dmrrowp1_then_sub_dmrrow1
6511 0, // VFHRC:sub_wacc_hi_then_sub_dmrrow0
6512 0, // VFHRC:sub_wacc_hi_then_sub_dmrrow1
6513 0, // VFHRC:sub_wacc_hi_then_sub_dmrrowp0
6514 0, // VFHRC:sub_wacc_hi_then_sub_dmrrowp1
6515 0, // VFHRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6516 0, // VFHRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6517 0, // VFHRC:sub_dmr1_then_sub_dmrrow0
6518 0, // VFHRC:sub_dmr1_then_sub_dmrrow1
6519 0, // VFHRC:sub_dmr1_then_sub_dmrrowp0
6520 0, // VFHRC:sub_dmr1_then_sub_dmrrowp1
6521 0, // VFHRC:sub_dmr1_then_sub_wacc_hi
6522 0, // VFHRC:sub_dmr1_then_sub_wacc_lo
6523 0, // VFHRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6524 0, // VFHRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6525 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6526 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6527 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6528 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6529 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6530 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6531 0, // VFHRC:sub_gp8_x1_then_sub_32
6532 },
6533 { // VFRC
6534 0, // VFRC:sub_32
6535 0, // VFRC:sub_32_hi_phony
6536 0, // VFRC:sub_64
6537 0, // VFRC:sub_64_hi_phony
6538 0, // VFRC:sub_dmr0
6539 0, // VFRC:sub_dmr1
6540 0, // VFRC:sub_dmrrow0
6541 0, // VFRC:sub_dmrrow1
6542 0, // VFRC:sub_dmrrowp0
6543 0, // VFRC:sub_dmrrowp1
6544 0, // VFRC:sub_eq
6545 0, // VFRC:sub_fp0
6546 0, // VFRC:sub_fp1
6547 0, // VFRC:sub_gp8_x0
6548 0, // VFRC:sub_gp8_x1
6549 0, // VFRC:sub_gt
6550 0, // VFRC:sub_lt
6551 0, // VFRC:sub_pair0
6552 0, // VFRC:sub_pair1
6553 0, // VFRC:sub_un
6554 0, // VFRC:sub_vsx0
6555 0, // VFRC:sub_vsx1
6556 0, // VFRC:sub_wacc_hi
6557 0, // VFRC:sub_wacc_lo
6558 0, // VFRC:sub_vsx1_then_sub_64
6559 0, // VFRC:sub_vsx1_then_sub_64_hi_phony
6560 0, // VFRC:sub_pair1_then_sub_64
6561 0, // VFRC:sub_pair1_then_sub_64_hi_phony
6562 0, // VFRC:sub_pair1_then_sub_vsx0
6563 0, // VFRC:sub_pair1_then_sub_vsx1
6564 0, // VFRC:sub_pair1_then_sub_vsx1_then_sub_64
6565 0, // VFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6566 0, // VFRC:sub_dmrrowp1_then_sub_dmrrow0
6567 0, // VFRC:sub_dmrrowp1_then_sub_dmrrow1
6568 0, // VFRC:sub_wacc_hi_then_sub_dmrrow0
6569 0, // VFRC:sub_wacc_hi_then_sub_dmrrow1
6570 0, // VFRC:sub_wacc_hi_then_sub_dmrrowp0
6571 0, // VFRC:sub_wacc_hi_then_sub_dmrrowp1
6572 0, // VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6573 0, // VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6574 0, // VFRC:sub_dmr1_then_sub_dmrrow0
6575 0, // VFRC:sub_dmr1_then_sub_dmrrow1
6576 0, // VFRC:sub_dmr1_then_sub_dmrrowp0
6577 0, // VFRC:sub_dmr1_then_sub_dmrrowp1
6578 0, // VFRC:sub_dmr1_then_sub_wacc_hi
6579 0, // VFRC:sub_dmr1_then_sub_wacc_lo
6580 0, // VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6581 0, // VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6582 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6583 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6584 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6585 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6586 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6587 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6588 0, // VFRC:sub_gp8_x1_then_sub_32
6589 },
6590 { // SPERC_with_sub_32_in_GPRC_NOR0
6591 4, // SPERC_with_sub_32_in_GPRC_NOR0:sub_32 -> GPRC_and_GPRC_NOR0
6592 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_32_hi_phony
6593 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_64
6594 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_64_hi_phony
6595 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr0
6596 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1
6597 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrow0
6598 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrow1
6599 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp0
6600 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1
6601 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_eq
6602 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_fp0
6603 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_fp1
6604 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_gp8_x0
6605 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_gp8_x1
6606 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_gt
6607 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_lt
6608 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair0
6609 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1
6610 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_un
6611 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_vsx0
6612 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_vsx1
6613 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi
6614 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_lo
6615 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_vsx1_then_sub_64
6616 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_vsx1_then_sub_64_hi_phony
6617 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_64
6618 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_64_hi_phony
6619 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx0
6620 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1
6621 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64
6622 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6623 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow0
6624 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow1
6625 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow0
6626 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow1
6627 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp0
6628 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1
6629 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6630 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6631 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrow0
6632 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrow1
6633 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp0
6634 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1
6635 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi
6636 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_lo
6637 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6638 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6639 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6640 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6641 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6642 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6643 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6644 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6645 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_gp8_x1_then_sub_32
6646 },
6647 { // SPILLTOVSRRC_and_VFRC
6648 0, // SPILLTOVSRRC_and_VFRC:sub_32
6649 0, // SPILLTOVSRRC_and_VFRC:sub_32_hi_phony
6650 0, // SPILLTOVSRRC_and_VFRC:sub_64
6651 0, // SPILLTOVSRRC_and_VFRC:sub_64_hi_phony
6652 0, // SPILLTOVSRRC_and_VFRC:sub_dmr0
6653 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1
6654 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrow0
6655 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrow1
6656 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrowp0
6657 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrowp1
6658 0, // SPILLTOVSRRC_and_VFRC:sub_eq
6659 0, // SPILLTOVSRRC_and_VFRC:sub_fp0
6660 0, // SPILLTOVSRRC_and_VFRC:sub_fp1
6661 0, // SPILLTOVSRRC_and_VFRC:sub_gp8_x0
6662 0, // SPILLTOVSRRC_and_VFRC:sub_gp8_x1
6663 0, // SPILLTOVSRRC_and_VFRC:sub_gt
6664 0, // SPILLTOVSRRC_and_VFRC:sub_lt
6665 0, // SPILLTOVSRRC_and_VFRC:sub_pair0
6666 0, // SPILLTOVSRRC_and_VFRC:sub_pair1
6667 0, // SPILLTOVSRRC_and_VFRC:sub_un
6668 0, // SPILLTOVSRRC_and_VFRC:sub_vsx0
6669 0, // SPILLTOVSRRC_and_VFRC:sub_vsx1
6670 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi
6671 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_lo
6672 0, // SPILLTOVSRRC_and_VFRC:sub_vsx1_then_sub_64
6673 0, // SPILLTOVSRRC_and_VFRC:sub_vsx1_then_sub_64_hi_phony
6674 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_64
6675 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_64_hi_phony
6676 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx0
6677 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1
6678 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1_then_sub_64
6679 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6680 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrowp1_then_sub_dmrrow0
6681 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrowp1_then_sub_dmrrow1
6682 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrow0
6683 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrow1
6684 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp0
6685 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1
6686 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6687 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6688 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrow0
6689 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrow1
6690 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp0
6691 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1
6692 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi
6693 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_lo
6694 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6695 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6696 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6697 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6698 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6699 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6700 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6701 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6702 0, // SPILLTOVSRRC_and_VFRC:sub_gp8_x1_then_sub_32
6703 },
6704 { // SPILLTOVSRRC_and_F4RC
6705 0, // SPILLTOVSRRC_and_F4RC:sub_32
6706 0, // SPILLTOVSRRC_and_F4RC:sub_32_hi_phony
6707 0, // SPILLTOVSRRC_and_F4RC:sub_64
6708 0, // SPILLTOVSRRC_and_F4RC:sub_64_hi_phony
6709 0, // SPILLTOVSRRC_and_F4RC:sub_dmr0
6710 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1
6711 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrow0
6712 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrow1
6713 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrowp0
6714 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrowp1
6715 0, // SPILLTOVSRRC_and_F4RC:sub_eq
6716 0, // SPILLTOVSRRC_and_F4RC:sub_fp0
6717 0, // SPILLTOVSRRC_and_F4RC:sub_fp1
6718 0, // SPILLTOVSRRC_and_F4RC:sub_gp8_x0
6719 0, // SPILLTOVSRRC_and_F4RC:sub_gp8_x1
6720 0, // SPILLTOVSRRC_and_F4RC:sub_gt
6721 0, // SPILLTOVSRRC_and_F4RC:sub_lt
6722 0, // SPILLTOVSRRC_and_F4RC:sub_pair0
6723 0, // SPILLTOVSRRC_and_F4RC:sub_pair1
6724 0, // SPILLTOVSRRC_and_F4RC:sub_un
6725 0, // SPILLTOVSRRC_and_F4RC:sub_vsx0
6726 0, // SPILLTOVSRRC_and_F4RC:sub_vsx1
6727 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi
6728 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_lo
6729 0, // SPILLTOVSRRC_and_F4RC:sub_vsx1_then_sub_64
6730 0, // SPILLTOVSRRC_and_F4RC:sub_vsx1_then_sub_64_hi_phony
6731 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_64
6732 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_64_hi_phony
6733 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx0
6734 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1
6735 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1_then_sub_64
6736 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6737 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrowp1_then_sub_dmrrow0
6738 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrowp1_then_sub_dmrrow1
6739 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrow0
6740 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrow1
6741 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp0
6742 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1
6743 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6744 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6745 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrow0
6746 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrow1
6747 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp0
6748 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1
6749 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi
6750 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_lo
6751 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6752 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6753 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6754 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6755 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6756 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6757 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6758 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6759 0, // SPILLTOVSRRC_and_F4RC:sub_gp8_x1_then_sub_32
6760 },
6761 { // CTRRC8
6762 0, // CTRRC8:sub_32
6763 0, // CTRRC8:sub_32_hi_phony
6764 0, // CTRRC8:sub_64
6765 0, // CTRRC8:sub_64_hi_phony
6766 0, // CTRRC8:sub_dmr0
6767 0, // CTRRC8:sub_dmr1
6768 0, // CTRRC8:sub_dmrrow0
6769 0, // CTRRC8:sub_dmrrow1
6770 0, // CTRRC8:sub_dmrrowp0
6771 0, // CTRRC8:sub_dmrrowp1
6772 0, // CTRRC8:sub_eq
6773 0, // CTRRC8:sub_fp0
6774 0, // CTRRC8:sub_fp1
6775 0, // CTRRC8:sub_gp8_x0
6776 0, // CTRRC8:sub_gp8_x1
6777 0, // CTRRC8:sub_gt
6778 0, // CTRRC8:sub_lt
6779 0, // CTRRC8:sub_pair0
6780 0, // CTRRC8:sub_pair1
6781 0, // CTRRC8:sub_un
6782 0, // CTRRC8:sub_vsx0
6783 0, // CTRRC8:sub_vsx1
6784 0, // CTRRC8:sub_wacc_hi
6785 0, // CTRRC8:sub_wacc_lo
6786 0, // CTRRC8:sub_vsx1_then_sub_64
6787 0, // CTRRC8:sub_vsx1_then_sub_64_hi_phony
6788 0, // CTRRC8:sub_pair1_then_sub_64
6789 0, // CTRRC8:sub_pair1_then_sub_64_hi_phony
6790 0, // CTRRC8:sub_pair1_then_sub_vsx0
6791 0, // CTRRC8:sub_pair1_then_sub_vsx1
6792 0, // CTRRC8:sub_pair1_then_sub_vsx1_then_sub_64
6793 0, // CTRRC8:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6794 0, // CTRRC8:sub_dmrrowp1_then_sub_dmrrow0
6795 0, // CTRRC8:sub_dmrrowp1_then_sub_dmrrow1
6796 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrow0
6797 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrow1
6798 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrowp0
6799 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrowp1
6800 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6801 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6802 0, // CTRRC8:sub_dmr1_then_sub_dmrrow0
6803 0, // CTRRC8:sub_dmr1_then_sub_dmrrow1
6804 0, // CTRRC8:sub_dmr1_then_sub_dmrrowp0
6805 0, // CTRRC8:sub_dmr1_then_sub_dmrrowp1
6806 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi
6807 0, // CTRRC8:sub_dmr1_then_sub_wacc_lo
6808 0, // CTRRC8:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6809 0, // CTRRC8:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6810 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6811 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6812 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6813 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6814 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6815 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6816 0, // CTRRC8:sub_gp8_x1_then_sub_32
6817 },
6818 { // LR8RC
6819 0, // LR8RC:sub_32
6820 0, // LR8RC:sub_32_hi_phony
6821 0, // LR8RC:sub_64
6822 0, // LR8RC:sub_64_hi_phony
6823 0, // LR8RC:sub_dmr0
6824 0, // LR8RC:sub_dmr1
6825 0, // LR8RC:sub_dmrrow0
6826 0, // LR8RC:sub_dmrrow1
6827 0, // LR8RC:sub_dmrrowp0
6828 0, // LR8RC:sub_dmrrowp1
6829 0, // LR8RC:sub_eq
6830 0, // LR8RC:sub_fp0
6831 0, // LR8RC:sub_fp1
6832 0, // LR8RC:sub_gp8_x0
6833 0, // LR8RC:sub_gp8_x1
6834 0, // LR8RC:sub_gt
6835 0, // LR8RC:sub_lt
6836 0, // LR8RC:sub_pair0
6837 0, // LR8RC:sub_pair1
6838 0, // LR8RC:sub_un
6839 0, // LR8RC:sub_vsx0
6840 0, // LR8RC:sub_vsx1
6841 0, // LR8RC:sub_wacc_hi
6842 0, // LR8RC:sub_wacc_lo
6843 0, // LR8RC:sub_vsx1_then_sub_64
6844 0, // LR8RC:sub_vsx1_then_sub_64_hi_phony
6845 0, // LR8RC:sub_pair1_then_sub_64
6846 0, // LR8RC:sub_pair1_then_sub_64_hi_phony
6847 0, // LR8RC:sub_pair1_then_sub_vsx0
6848 0, // LR8RC:sub_pair1_then_sub_vsx1
6849 0, // LR8RC:sub_pair1_then_sub_vsx1_then_sub_64
6850 0, // LR8RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6851 0, // LR8RC:sub_dmrrowp1_then_sub_dmrrow0
6852 0, // LR8RC:sub_dmrrowp1_then_sub_dmrrow1
6853 0, // LR8RC:sub_wacc_hi_then_sub_dmrrow0
6854 0, // LR8RC:sub_wacc_hi_then_sub_dmrrow1
6855 0, // LR8RC:sub_wacc_hi_then_sub_dmrrowp0
6856 0, // LR8RC:sub_wacc_hi_then_sub_dmrrowp1
6857 0, // LR8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6858 0, // LR8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6859 0, // LR8RC:sub_dmr1_then_sub_dmrrow0
6860 0, // LR8RC:sub_dmr1_then_sub_dmrrow1
6861 0, // LR8RC:sub_dmr1_then_sub_dmrrowp0
6862 0, // LR8RC:sub_dmr1_then_sub_dmrrowp1
6863 0, // LR8RC:sub_dmr1_then_sub_wacc_hi
6864 0, // LR8RC:sub_dmr1_then_sub_wacc_lo
6865 0, // LR8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6866 0, // LR8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6867 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6868 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6869 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6870 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6871 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6872 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6873 0, // LR8RC:sub_gp8_x1_then_sub_32
6874 },
6875 { // DMRROWRC
6876 0, // DMRROWRC:sub_32
6877 0, // DMRROWRC:sub_32_hi_phony
6878 0, // DMRROWRC:sub_64
6879 0, // DMRROWRC:sub_64_hi_phony
6880 0, // DMRROWRC:sub_dmr0
6881 0, // DMRROWRC:sub_dmr1
6882 0, // DMRROWRC:sub_dmrrow0
6883 0, // DMRROWRC:sub_dmrrow1
6884 0, // DMRROWRC:sub_dmrrowp0
6885 0, // DMRROWRC:sub_dmrrowp1
6886 0, // DMRROWRC:sub_eq
6887 0, // DMRROWRC:sub_fp0
6888 0, // DMRROWRC:sub_fp1
6889 0, // DMRROWRC:sub_gp8_x0
6890 0, // DMRROWRC:sub_gp8_x1
6891 0, // DMRROWRC:sub_gt
6892 0, // DMRROWRC:sub_lt
6893 0, // DMRROWRC:sub_pair0
6894 0, // DMRROWRC:sub_pair1
6895 0, // DMRROWRC:sub_un
6896 0, // DMRROWRC:sub_vsx0
6897 0, // DMRROWRC:sub_vsx1
6898 0, // DMRROWRC:sub_wacc_hi
6899 0, // DMRROWRC:sub_wacc_lo
6900 0, // DMRROWRC:sub_vsx1_then_sub_64
6901 0, // DMRROWRC:sub_vsx1_then_sub_64_hi_phony
6902 0, // DMRROWRC:sub_pair1_then_sub_64
6903 0, // DMRROWRC:sub_pair1_then_sub_64_hi_phony
6904 0, // DMRROWRC:sub_pair1_then_sub_vsx0
6905 0, // DMRROWRC:sub_pair1_then_sub_vsx1
6906 0, // DMRROWRC:sub_pair1_then_sub_vsx1_then_sub_64
6907 0, // DMRROWRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6908 0, // DMRROWRC:sub_dmrrowp1_then_sub_dmrrow0
6909 0, // DMRROWRC:sub_dmrrowp1_then_sub_dmrrow1
6910 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrow0
6911 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrow1
6912 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrowp0
6913 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrowp1
6914 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6915 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6916 0, // DMRROWRC:sub_dmr1_then_sub_dmrrow0
6917 0, // DMRROWRC:sub_dmr1_then_sub_dmrrow1
6918 0, // DMRROWRC:sub_dmr1_then_sub_dmrrowp0
6919 0, // DMRROWRC:sub_dmr1_then_sub_dmrrowp1
6920 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi
6921 0, // DMRROWRC:sub_dmr1_then_sub_wacc_lo
6922 0, // DMRROWRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6923 0, // DMRROWRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6924 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6925 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6926 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6927 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6928 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6929 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6930 0, // DMRROWRC:sub_gp8_x1_then_sub_32
6931 },
6932 { // VSRC
6933 0, // VSRC:sub_32
6934 0, // VSRC:sub_32_hi_phony
6935 1, // VSRC:sub_64 -> VSSRC
6936 0, // VSRC:sub_64_hi_phony
6937 0, // VSRC:sub_dmr0
6938 0, // VSRC:sub_dmr1
6939 0, // VSRC:sub_dmrrow0
6940 0, // VSRC:sub_dmrrow1
6941 0, // VSRC:sub_dmrrowp0
6942 0, // VSRC:sub_dmrrowp1
6943 0, // VSRC:sub_eq
6944 0, // VSRC:sub_fp0
6945 0, // VSRC:sub_fp1
6946 0, // VSRC:sub_gp8_x0
6947 0, // VSRC:sub_gp8_x1
6948 0, // VSRC:sub_gt
6949 0, // VSRC:sub_lt
6950 0, // VSRC:sub_pair0
6951 0, // VSRC:sub_pair1
6952 0, // VSRC:sub_un
6953 0, // VSRC:sub_vsx0
6954 0, // VSRC:sub_vsx1
6955 0, // VSRC:sub_wacc_hi
6956 0, // VSRC:sub_wacc_lo
6957 0, // VSRC:sub_vsx1_then_sub_64
6958 0, // VSRC:sub_vsx1_then_sub_64_hi_phony
6959 0, // VSRC:sub_pair1_then_sub_64
6960 0, // VSRC:sub_pair1_then_sub_64_hi_phony
6961 0, // VSRC:sub_pair1_then_sub_vsx0
6962 0, // VSRC:sub_pair1_then_sub_vsx1
6963 0, // VSRC:sub_pair1_then_sub_vsx1_then_sub_64
6964 0, // VSRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6965 0, // VSRC:sub_dmrrowp1_then_sub_dmrrow0
6966 0, // VSRC:sub_dmrrowp1_then_sub_dmrrow1
6967 0, // VSRC:sub_wacc_hi_then_sub_dmrrow0
6968 0, // VSRC:sub_wacc_hi_then_sub_dmrrow1
6969 0, // VSRC:sub_wacc_hi_then_sub_dmrrowp0
6970 0, // VSRC:sub_wacc_hi_then_sub_dmrrowp1
6971 0, // VSRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6972 0, // VSRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6973 0, // VSRC:sub_dmr1_then_sub_dmrrow0
6974 0, // VSRC:sub_dmr1_then_sub_dmrrow1
6975 0, // VSRC:sub_dmr1_then_sub_dmrrowp0
6976 0, // VSRC:sub_dmr1_then_sub_dmrrowp1
6977 0, // VSRC:sub_dmr1_then_sub_wacc_hi
6978 0, // VSRC:sub_dmr1_then_sub_wacc_lo
6979 0, // VSRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6980 0, // VSRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6981 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6982 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6983 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6984 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6985 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6986 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6987 0, // VSRC:sub_gp8_x1_then_sub_32
6988 },
6989 { // VSRC_with_sub_64_in_SPILLTOVSRRC
6990 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_32
6991 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
6992 17, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_VSFRC
6993 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
6994 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
6995 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
6996 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
6997 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
6998 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
6999 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
7000 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
7001 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
7002 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
7003 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
7004 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
7005 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
7006 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
7007 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0
7008 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1
7009 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_un
7010 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0
7011 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1
7012 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
7013 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
7014 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64
7015 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
7016 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64
7017 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
7018 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0
7019 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1
7020 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
7021 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7022 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
7023 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
7024 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
7025 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
7026 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
7027 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
7028 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7029 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7030 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
7031 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
7032 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
7033 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
7034 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
7035 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
7036 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7037 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7038 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7039 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7040 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7041 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7042 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7043 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7044 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
7045 },
7046 { // VRRC
7047 0, // VRRC:sub_32
7048 0, // VRRC:sub_32_hi_phony
7049 23, // VRRC:sub_64 -> VFRC
7050 0, // VRRC:sub_64_hi_phony
7051 0, // VRRC:sub_dmr0
7052 0, // VRRC:sub_dmr1
7053 0, // VRRC:sub_dmrrow0
7054 0, // VRRC:sub_dmrrow1
7055 0, // VRRC:sub_dmrrowp0
7056 0, // VRRC:sub_dmrrowp1
7057 0, // VRRC:sub_eq
7058 0, // VRRC:sub_fp0
7059 0, // VRRC:sub_fp1
7060 0, // VRRC:sub_gp8_x0
7061 0, // VRRC:sub_gp8_x1
7062 0, // VRRC:sub_gt
7063 0, // VRRC:sub_lt
7064 0, // VRRC:sub_pair0
7065 0, // VRRC:sub_pair1
7066 0, // VRRC:sub_un
7067 0, // VRRC:sub_vsx0
7068 0, // VRRC:sub_vsx1
7069 0, // VRRC:sub_wacc_hi
7070 0, // VRRC:sub_wacc_lo
7071 0, // VRRC:sub_vsx1_then_sub_64
7072 0, // VRRC:sub_vsx1_then_sub_64_hi_phony
7073 0, // VRRC:sub_pair1_then_sub_64
7074 0, // VRRC:sub_pair1_then_sub_64_hi_phony
7075 0, // VRRC:sub_pair1_then_sub_vsx0
7076 0, // VRRC:sub_pair1_then_sub_vsx1
7077 0, // VRRC:sub_pair1_then_sub_vsx1_then_sub_64
7078 0, // VRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7079 0, // VRRC:sub_dmrrowp1_then_sub_dmrrow0
7080 0, // VRRC:sub_dmrrowp1_then_sub_dmrrow1
7081 0, // VRRC:sub_wacc_hi_then_sub_dmrrow0
7082 0, // VRRC:sub_wacc_hi_then_sub_dmrrow1
7083 0, // VRRC:sub_wacc_hi_then_sub_dmrrowp0
7084 0, // VRRC:sub_wacc_hi_then_sub_dmrrowp1
7085 0, // VRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7086 0, // VRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7087 0, // VRRC:sub_dmr1_then_sub_dmrrow0
7088 0, // VRRC:sub_dmr1_then_sub_dmrrow1
7089 0, // VRRC:sub_dmr1_then_sub_dmrrowp0
7090 0, // VRRC:sub_dmr1_then_sub_dmrrowp1
7091 0, // VRRC:sub_dmr1_then_sub_wacc_hi
7092 0, // VRRC:sub_dmr1_then_sub_wacc_lo
7093 0, // VRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7094 0, // VRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7095 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7096 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7097 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7098 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7099 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7100 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7101 0, // VRRC:sub_gp8_x1_then_sub_32
7102 },
7103 { // VSLRC
7104 0, // VSLRC:sub_32
7105 0, // VSLRC:sub_32_hi_phony
7106 6, // VSLRC:sub_64 -> F4RC
7107 0, // VSLRC:sub_64_hi_phony
7108 0, // VSLRC:sub_dmr0
7109 0, // VSLRC:sub_dmr1
7110 0, // VSLRC:sub_dmrrow0
7111 0, // VSLRC:sub_dmrrow1
7112 0, // VSLRC:sub_dmrrowp0
7113 0, // VSLRC:sub_dmrrowp1
7114 0, // VSLRC:sub_eq
7115 0, // VSLRC:sub_fp0
7116 0, // VSLRC:sub_fp1
7117 0, // VSLRC:sub_gp8_x0
7118 0, // VSLRC:sub_gp8_x1
7119 0, // VSLRC:sub_gt
7120 0, // VSLRC:sub_lt
7121 0, // VSLRC:sub_pair0
7122 0, // VSLRC:sub_pair1
7123 0, // VSLRC:sub_un
7124 0, // VSLRC:sub_vsx0
7125 0, // VSLRC:sub_vsx1
7126 0, // VSLRC:sub_wacc_hi
7127 0, // VSLRC:sub_wacc_lo
7128 0, // VSLRC:sub_vsx1_then_sub_64
7129 0, // VSLRC:sub_vsx1_then_sub_64_hi_phony
7130 0, // VSLRC:sub_pair1_then_sub_64
7131 0, // VSLRC:sub_pair1_then_sub_64_hi_phony
7132 0, // VSLRC:sub_pair1_then_sub_vsx0
7133 0, // VSLRC:sub_pair1_then_sub_vsx1
7134 0, // VSLRC:sub_pair1_then_sub_vsx1_then_sub_64
7135 0, // VSLRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7136 0, // VSLRC:sub_dmrrowp1_then_sub_dmrrow0
7137 0, // VSLRC:sub_dmrrowp1_then_sub_dmrrow1
7138 0, // VSLRC:sub_wacc_hi_then_sub_dmrrow0
7139 0, // VSLRC:sub_wacc_hi_then_sub_dmrrow1
7140 0, // VSLRC:sub_wacc_hi_then_sub_dmrrowp0
7141 0, // VSLRC:sub_wacc_hi_then_sub_dmrrowp1
7142 0, // VSLRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7143 0, // VSLRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7144 0, // VSLRC:sub_dmr1_then_sub_dmrrow0
7145 0, // VSLRC:sub_dmr1_then_sub_dmrrow1
7146 0, // VSLRC:sub_dmr1_then_sub_dmrrowp0
7147 0, // VSLRC:sub_dmr1_then_sub_dmrrowp1
7148 0, // VSLRC:sub_dmr1_then_sub_wacc_hi
7149 0, // VSLRC:sub_dmr1_then_sub_wacc_lo
7150 0, // VSLRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7151 0, // VSLRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7152 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7153 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7154 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7155 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7156 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7157 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7158 0, // VSLRC:sub_gp8_x1_then_sub_32
7159 },
7160 { // VRRC_with_sub_64_in_SPILLTOVSRRC
7161 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_32
7162 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
7163 25, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_VFRC
7164 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
7165 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
7166 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
7167 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
7168 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
7169 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
7170 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
7171 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
7172 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
7173 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
7174 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
7175 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
7176 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
7177 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
7178 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0
7179 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1
7180 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_un
7181 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0
7182 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1
7183 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
7184 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
7185 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64
7186 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
7187 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64
7188 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
7189 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0
7190 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1
7191 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
7192 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7193 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
7194 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
7195 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
7196 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
7197 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
7198 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
7199 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7200 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7201 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
7202 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
7203 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
7204 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
7205 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
7206 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
7207 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7208 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7209 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7210 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7211 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7212 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7213 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7214 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7215 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
7216 },
7217 { // FpRC
7218 0, // FpRC:sub_32
7219 0, // FpRC:sub_32_hi_phony
7220 0, // FpRC:sub_64
7221 0, // FpRC:sub_64_hi_phony
7222 0, // FpRC:sub_dmr0
7223 0, // FpRC:sub_dmr1
7224 0, // FpRC:sub_dmrrow0
7225 0, // FpRC:sub_dmrrow1
7226 0, // FpRC:sub_dmrrowp0
7227 0, // FpRC:sub_dmrrowp1
7228 0, // FpRC:sub_eq
7229 19, // FpRC:sub_fp0 -> F8RC
7230 19, // FpRC:sub_fp1 -> F8RC
7231 0, // FpRC:sub_gp8_x0
7232 0, // FpRC:sub_gp8_x1
7233 0, // FpRC:sub_gt
7234 0, // FpRC:sub_lt
7235 0, // FpRC:sub_pair0
7236 0, // FpRC:sub_pair1
7237 0, // FpRC:sub_un
7238 0, // FpRC:sub_vsx0
7239 0, // FpRC:sub_vsx1
7240 0, // FpRC:sub_wacc_hi
7241 0, // FpRC:sub_wacc_lo
7242 0, // FpRC:sub_vsx1_then_sub_64
7243 0, // FpRC:sub_vsx1_then_sub_64_hi_phony
7244 0, // FpRC:sub_pair1_then_sub_64
7245 0, // FpRC:sub_pair1_then_sub_64_hi_phony
7246 0, // FpRC:sub_pair1_then_sub_vsx0
7247 0, // FpRC:sub_pair1_then_sub_vsx1
7248 0, // FpRC:sub_pair1_then_sub_vsx1_then_sub_64
7249 0, // FpRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7250 0, // FpRC:sub_dmrrowp1_then_sub_dmrrow0
7251 0, // FpRC:sub_dmrrowp1_then_sub_dmrrow1
7252 0, // FpRC:sub_wacc_hi_then_sub_dmrrow0
7253 0, // FpRC:sub_wacc_hi_then_sub_dmrrow1
7254 0, // FpRC:sub_wacc_hi_then_sub_dmrrowp0
7255 0, // FpRC:sub_wacc_hi_then_sub_dmrrowp1
7256 0, // FpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7257 0, // FpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7258 0, // FpRC:sub_dmr1_then_sub_dmrrow0
7259 0, // FpRC:sub_dmr1_then_sub_dmrrow1
7260 0, // FpRC:sub_dmr1_then_sub_dmrrowp0
7261 0, // FpRC:sub_dmr1_then_sub_dmrrowp1
7262 0, // FpRC:sub_dmr1_then_sub_wacc_hi
7263 0, // FpRC:sub_dmr1_then_sub_wacc_lo
7264 0, // FpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7265 0, // FpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7266 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7267 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7268 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7269 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7270 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7271 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7272 0, // FpRC:sub_gp8_x1_then_sub_32
7273 },
7274 { // G8pRC
7275 2, // G8pRC:sub_32 -> GPRC
7276 0, // G8pRC:sub_32_hi_phony
7277 0, // G8pRC:sub_64
7278 0, // G8pRC:sub_64_hi_phony
7279 0, // G8pRC:sub_dmr0
7280 0, // G8pRC:sub_dmr1
7281 0, // G8pRC:sub_dmrrow0
7282 0, // G8pRC:sub_dmrrow1
7283 0, // G8pRC:sub_dmrrowp0
7284 0, // G8pRC:sub_dmrrowp1
7285 0, // G8pRC:sub_eq
7286 0, // G8pRC:sub_fp0
7287 0, // G8pRC:sub_fp1
7288 15, // G8pRC:sub_gp8_x0 -> G8RC
7289 18, // G8pRC:sub_gp8_x1 -> G8RC_and_G8RC_NOX0
7290 0, // G8pRC:sub_gt
7291 0, // G8pRC:sub_lt
7292 0, // G8pRC:sub_pair0
7293 0, // G8pRC:sub_pair1
7294 0, // G8pRC:sub_un
7295 0, // G8pRC:sub_vsx0
7296 0, // G8pRC:sub_vsx1
7297 0, // G8pRC:sub_wacc_hi
7298 0, // G8pRC:sub_wacc_lo
7299 0, // G8pRC:sub_vsx1_then_sub_64
7300 0, // G8pRC:sub_vsx1_then_sub_64_hi_phony
7301 0, // G8pRC:sub_pair1_then_sub_64
7302 0, // G8pRC:sub_pair1_then_sub_64_hi_phony
7303 0, // G8pRC:sub_pair1_then_sub_vsx0
7304 0, // G8pRC:sub_pair1_then_sub_vsx1
7305 0, // G8pRC:sub_pair1_then_sub_vsx1_then_sub_64
7306 0, // G8pRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7307 0, // G8pRC:sub_dmrrowp1_then_sub_dmrrow0
7308 0, // G8pRC:sub_dmrrowp1_then_sub_dmrrow1
7309 0, // G8pRC:sub_wacc_hi_then_sub_dmrrow0
7310 0, // G8pRC:sub_wacc_hi_then_sub_dmrrow1
7311 0, // G8pRC:sub_wacc_hi_then_sub_dmrrowp0
7312 0, // G8pRC:sub_wacc_hi_then_sub_dmrrowp1
7313 0, // G8pRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7314 0, // G8pRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7315 0, // G8pRC:sub_dmr1_then_sub_dmrrow0
7316 0, // G8pRC:sub_dmr1_then_sub_dmrrow1
7317 0, // G8pRC:sub_dmr1_then_sub_dmrrowp0
7318 0, // G8pRC:sub_dmr1_then_sub_dmrrowp1
7319 0, // G8pRC:sub_dmr1_then_sub_wacc_hi
7320 0, // G8pRC:sub_dmr1_then_sub_wacc_lo
7321 0, // G8pRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7322 0, // G8pRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7323 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7324 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7325 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7326 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7327 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7328 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7329 4, // G8pRC:sub_gp8_x1_then_sub_32 -> GPRC_and_GPRC_NOR0
7330 },
7331 { // G8pRC_with_sub_32_in_GPRC_NOR0
7332 4, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_32 -> GPRC_and_GPRC_NOR0
7333 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_32_hi_phony
7334 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_64
7335 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_64_hi_phony
7336 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr0
7337 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1
7338 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrow0
7339 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrow1
7340 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp0
7341 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1
7342 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_eq
7343 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_fp0
7344 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_fp1
7345 18, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_gp8_x0 -> G8RC_and_G8RC_NOX0
7346 18, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_gp8_x1 -> G8RC_and_G8RC_NOX0
7347 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_gt
7348 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_lt
7349 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair0
7350 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1
7351 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_un
7352 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_vsx0
7353 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_vsx1
7354 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi
7355 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_lo
7356 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_vsx1_then_sub_64
7357 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_vsx1_then_sub_64_hi_phony
7358 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_64
7359 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_64_hi_phony
7360 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx0
7361 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1
7362 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64
7363 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7364 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow0
7365 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow1
7366 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow0
7367 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow1
7368 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp0
7369 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1
7370 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7371 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7372 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrow0
7373 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrow1
7374 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp0
7375 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1
7376 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi
7377 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_lo
7378 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7379 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7380 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7381 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7382 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7383 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7384 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7385 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7386 4, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_gp8_x1_then_sub_32 -> GPRC_and_GPRC_NOR0
7387 },
7388 { // VSLRC_with_sub_64_in_SPILLTOVSRRC
7389 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_32
7390 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
7391 26, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_F4RC
7392 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
7393 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
7394 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
7395 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
7396 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
7397 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
7398 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
7399 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
7400 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
7401 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
7402 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
7403 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
7404 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
7405 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
7406 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0
7407 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1
7408 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_un
7409 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0
7410 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1
7411 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
7412 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
7413 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64
7414 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
7415 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64
7416 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
7417 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0
7418 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1
7419 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
7420 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7421 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
7422 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
7423 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
7424 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
7425 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
7426 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
7427 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7428 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7429 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
7430 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
7431 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
7432 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
7433 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
7434 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
7435 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7436 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7437 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7438 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7439 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7440 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7441 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7442 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7443 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
7444 },
7445 { // FpRC_with_sub_fp0_in_SPILLTOVSRRC
7446 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_32
7447 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_32_hi_phony
7448 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_64
7449 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_64_hi_phony
7450 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr0
7451 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1
7452 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrow0
7453 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrow1
7454 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrowp0
7455 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrowp1
7456 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_eq
7457 26, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_fp0 -> SPILLTOVSRRC_and_F4RC
7458 26, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_fp1 -> SPILLTOVSRRC_and_F4RC
7459 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_gp8_x0
7460 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_gp8_x1
7461 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_gt
7462 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_lt
7463 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair0
7464 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1
7465 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_un
7466 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_vsx0
7467 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_vsx1
7468 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi
7469 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_lo
7470 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_vsx1_then_sub_64
7471 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
7472 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_64
7473 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
7474 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0
7475 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1
7476 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
7477 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7478 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
7479 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
7480 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
7481 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
7482 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
7483 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
7484 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7485 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7486 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
7487 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
7488 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
7489 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
7490 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
7491 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
7492 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7493 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7494 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7495 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7496 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7497 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7498 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7499 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7500 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
7501 },
7502 { // DMRROWpRC
7503 0, // DMRROWpRC:sub_32
7504 0, // DMRROWpRC:sub_32_hi_phony
7505 0, // DMRROWpRC:sub_64
7506 0, // DMRROWpRC:sub_64_hi_phony
7507 0, // DMRROWpRC:sub_dmr0
7508 0, // DMRROWpRC:sub_dmr1
7509 29, // DMRROWpRC:sub_dmrrow0 -> DMRROWRC
7510 29, // DMRROWpRC:sub_dmrrow1 -> DMRROWRC
7511 0, // DMRROWpRC:sub_dmrrowp0
7512 0, // DMRROWpRC:sub_dmrrowp1
7513 0, // DMRROWpRC:sub_eq
7514 0, // DMRROWpRC:sub_fp0
7515 0, // DMRROWpRC:sub_fp1
7516 0, // DMRROWpRC:sub_gp8_x0
7517 0, // DMRROWpRC:sub_gp8_x1
7518 0, // DMRROWpRC:sub_gt
7519 0, // DMRROWpRC:sub_lt
7520 0, // DMRROWpRC:sub_pair0
7521 0, // DMRROWpRC:sub_pair1
7522 0, // DMRROWpRC:sub_un
7523 0, // DMRROWpRC:sub_vsx0
7524 0, // DMRROWpRC:sub_vsx1
7525 0, // DMRROWpRC:sub_wacc_hi
7526 0, // DMRROWpRC:sub_wacc_lo
7527 0, // DMRROWpRC:sub_vsx1_then_sub_64
7528 0, // DMRROWpRC:sub_vsx1_then_sub_64_hi_phony
7529 0, // DMRROWpRC:sub_pair1_then_sub_64
7530 0, // DMRROWpRC:sub_pair1_then_sub_64_hi_phony
7531 0, // DMRROWpRC:sub_pair1_then_sub_vsx0
7532 0, // DMRROWpRC:sub_pair1_then_sub_vsx1
7533 0, // DMRROWpRC:sub_pair1_then_sub_vsx1_then_sub_64
7534 0, // DMRROWpRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7535 0, // DMRROWpRC:sub_dmrrowp1_then_sub_dmrrow0
7536 0, // DMRROWpRC:sub_dmrrowp1_then_sub_dmrrow1
7537 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrow0
7538 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrow1
7539 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrowp0
7540 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrowp1
7541 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7542 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7543 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrow0
7544 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrow1
7545 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrowp0
7546 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrowp1
7547 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi
7548 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_lo
7549 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7550 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7551 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7552 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7553 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7554 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7555 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7556 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7557 0, // DMRROWpRC:sub_gp8_x1_then_sub_32
7558 },
7559 { // VSRpRC
7560 0, // VSRpRC:sub_32
7561 0, // VSRpRC:sub_32_hi_phony
7562 14, // VSRpRC:sub_64 -> VSFRC
7563 0, // VSRpRC:sub_64_hi_phony
7564 0, // VSRpRC:sub_dmr0
7565 0, // VSRpRC:sub_dmr1
7566 0, // VSRpRC:sub_dmrrow0
7567 0, // VSRpRC:sub_dmrrow1
7568 0, // VSRpRC:sub_dmrrowp0
7569 0, // VSRpRC:sub_dmrrowp1
7570 0, // VSRpRC:sub_eq
7571 0, // VSRpRC:sub_fp0
7572 0, // VSRpRC:sub_fp1
7573 0, // VSRpRC:sub_gp8_x0
7574 0, // VSRpRC:sub_gp8_x1
7575 0, // VSRpRC:sub_gt
7576 0, // VSRpRC:sub_lt
7577 0, // VSRpRC:sub_pair0
7578 0, // VSRpRC:sub_pair1
7579 0, // VSRpRC:sub_un
7580 30, // VSRpRC:sub_vsx0 -> VSRC
7581 30, // VSRpRC:sub_vsx1 -> VSRC
7582 0, // VSRpRC:sub_wacc_hi
7583 0, // VSRpRC:sub_wacc_lo
7584 14, // VSRpRC:sub_vsx1_then_sub_64 -> VSFRC
7585 0, // VSRpRC:sub_vsx1_then_sub_64_hi_phony
7586 0, // VSRpRC:sub_pair1_then_sub_64
7587 0, // VSRpRC:sub_pair1_then_sub_64_hi_phony
7588 0, // VSRpRC:sub_pair1_then_sub_vsx0
7589 0, // VSRpRC:sub_pair1_then_sub_vsx1
7590 0, // VSRpRC:sub_pair1_then_sub_vsx1_then_sub_64
7591 0, // VSRpRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7592 0, // VSRpRC:sub_dmrrowp1_then_sub_dmrrow0
7593 0, // VSRpRC:sub_dmrrowp1_then_sub_dmrrow1
7594 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrow0
7595 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrow1
7596 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrowp0
7597 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrowp1
7598 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7599 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7600 0, // VSRpRC:sub_dmr1_then_sub_dmrrow0
7601 0, // VSRpRC:sub_dmr1_then_sub_dmrrow1
7602 0, // VSRpRC:sub_dmr1_then_sub_dmrrowp0
7603 0, // VSRpRC:sub_dmr1_then_sub_dmrrowp1
7604 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi
7605 0, // VSRpRC:sub_dmr1_then_sub_wacc_lo
7606 0, // VSRpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7607 0, // VSRpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7608 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7609 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7610 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7611 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7612 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7613 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7614 0, // VSRpRC:sub_gp8_x1_then_sub_32
7615 },
7616 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC
7617 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_32
7618 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
7619 17, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_VSFRC
7620 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
7621 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
7622 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
7623 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
7624 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
7625 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
7626 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
7627 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
7628 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
7629 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
7630 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
7631 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
7632 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
7633 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
7634 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0
7635 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1
7636 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_un
7637 31, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0 -> VSRC_with_sub_64_in_SPILLTOVSRRC
7638 31, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1 -> VSRC_with_sub_64_in_SPILLTOVSRRC
7639 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
7640 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
7641 17, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_VSFRC
7642 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
7643 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64
7644 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
7645 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0
7646 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1
7647 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
7648 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7649 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
7650 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
7651 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
7652 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
7653 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
7654 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
7655 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7656 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7657 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
7658 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
7659 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
7660 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
7661 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
7662 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
7663 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7664 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7665 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7666 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7667 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7668 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7669 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7670 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7671 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
7672 },
7673 { // VSRpRC_with_sub_64_in_F4RC
7674 0, // VSRpRC_with_sub_64_in_F4RC:sub_32
7675 0, // VSRpRC_with_sub_64_in_F4RC:sub_32_hi_phony
7676 19, // VSRpRC_with_sub_64_in_F4RC:sub_64 -> F8RC
7677 0, // VSRpRC_with_sub_64_in_F4RC:sub_64_hi_phony
7678 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr0
7679 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1
7680 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrow0
7681 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrow1
7682 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrowp0
7683 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrowp1
7684 0, // VSRpRC_with_sub_64_in_F4RC:sub_eq
7685 0, // VSRpRC_with_sub_64_in_F4RC:sub_fp0
7686 0, // VSRpRC_with_sub_64_in_F4RC:sub_fp1
7687 0, // VSRpRC_with_sub_64_in_F4RC:sub_gp8_x0
7688 0, // VSRpRC_with_sub_64_in_F4RC:sub_gp8_x1
7689 0, // VSRpRC_with_sub_64_in_F4RC:sub_gt
7690 0, // VSRpRC_with_sub_64_in_F4RC:sub_lt
7691 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair0
7692 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1
7693 0, // VSRpRC_with_sub_64_in_F4RC:sub_un
7694 33, // VSRpRC_with_sub_64_in_F4RC:sub_vsx0 -> VSLRC
7695 33, // VSRpRC_with_sub_64_in_F4RC:sub_vsx1 -> VSLRC
7696 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi
7697 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_lo
7698 19, // VSRpRC_with_sub_64_in_F4RC:sub_vsx1_then_sub_64 -> F8RC
7699 0, // VSRpRC_with_sub_64_in_F4RC:sub_vsx1_then_sub_64_hi_phony
7700 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_64
7701 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_64_hi_phony
7702 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_vsx0
7703 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_vsx1
7704 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_vsx1_then_sub_64
7705 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7706 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrowp1_then_sub_dmrrow0
7707 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrowp1_then_sub_dmrrow1
7708 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrow0
7709 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrow1
7710 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrowp0
7711 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrowp1
7712 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7713 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7714 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrow0
7715 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrow1
7716 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrowp0
7717 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrowp1
7718 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi
7719 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_lo
7720 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7721 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7722 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7723 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7724 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7725 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7726 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7727 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7728 0, // VSRpRC_with_sub_64_in_F4RC:sub_gp8_x1_then_sub_32
7729 },
7730 { // VSRpRC_with_sub_64_in_VFRC
7731 0, // VSRpRC_with_sub_64_in_VFRC:sub_32
7732 0, // VSRpRC_with_sub_64_in_VFRC:sub_32_hi_phony
7733 23, // VSRpRC_with_sub_64_in_VFRC:sub_64 -> VFRC
7734 0, // VSRpRC_with_sub_64_in_VFRC:sub_64_hi_phony
7735 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr0
7736 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1
7737 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrow0
7738 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrow1
7739 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrowp0
7740 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrowp1
7741 0, // VSRpRC_with_sub_64_in_VFRC:sub_eq
7742 0, // VSRpRC_with_sub_64_in_VFRC:sub_fp0
7743 0, // VSRpRC_with_sub_64_in_VFRC:sub_fp1
7744 0, // VSRpRC_with_sub_64_in_VFRC:sub_gp8_x0
7745 0, // VSRpRC_with_sub_64_in_VFRC:sub_gp8_x1
7746 0, // VSRpRC_with_sub_64_in_VFRC:sub_gt
7747 0, // VSRpRC_with_sub_64_in_VFRC:sub_lt
7748 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair0
7749 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1
7750 0, // VSRpRC_with_sub_64_in_VFRC:sub_un
7751 32, // VSRpRC_with_sub_64_in_VFRC:sub_vsx0 -> VRRC
7752 32, // VSRpRC_with_sub_64_in_VFRC:sub_vsx1 -> VRRC
7753 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi
7754 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_lo
7755 23, // VSRpRC_with_sub_64_in_VFRC:sub_vsx1_then_sub_64 -> VFRC
7756 0, // VSRpRC_with_sub_64_in_VFRC:sub_vsx1_then_sub_64_hi_phony
7757 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_64
7758 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_64_hi_phony
7759 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_vsx0
7760 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_vsx1
7761 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_vsx1_then_sub_64
7762 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7763 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrowp1_then_sub_dmrrow0
7764 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrowp1_then_sub_dmrrow1
7765 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrow0
7766 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrow1
7767 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrowp0
7768 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrowp1
7769 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7770 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7771 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrow0
7772 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrow1
7773 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrowp0
7774 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrowp1
7775 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi
7776 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_lo
7777 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7778 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7779 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7780 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7781 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7782 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7783 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7784 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7785 0, // VSRpRC_with_sub_64_in_VFRC:sub_gp8_x1_then_sub_32
7786 },
7787 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
7788 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_32
7789 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_32_hi_phony
7790 25, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_64 -> SPILLTOVSRRC_and_VFRC
7791 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_64_hi_phony
7792 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr0
7793 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1
7794 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrow0
7795 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrow1
7796 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrowp0
7797 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrowp1
7798 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_eq
7799 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_fp0
7800 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_fp1
7801 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_gp8_x0
7802 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_gp8_x1
7803 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_gt
7804 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_lt
7805 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair0
7806 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1
7807 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_un
7808 34, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_vsx0 -> VRRC_with_sub_64_in_SPILLTOVSRRC
7809 34, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_vsx1 -> VRRC_with_sub_64_in_SPILLTOVSRRC
7810 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi
7811 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_lo
7812 25, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_VFRC
7813 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_vsx1_then_sub_64_hi_phony
7814 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_64
7815 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_64_hi_phony
7816 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx0
7817 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1
7818 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1_then_sub_64
7819 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7820 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrowp1_then_sub_dmrrow0
7821 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrowp1_then_sub_dmrrow1
7822 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrow0
7823 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrow1
7824 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp0
7825 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1
7826 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7827 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7828 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrow0
7829 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrow1
7830 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp0
7831 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1
7832 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi
7833 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_lo
7834 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7835 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7836 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7837 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7838 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7839 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7840 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7841 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7842 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_gp8_x1_then_sub_32
7843 },
7844 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
7845 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_32
7846 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_32_hi_phony
7847 26, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_64 -> SPILLTOVSRRC_and_F4RC
7848 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_64_hi_phony
7849 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr0
7850 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1
7851 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrow0
7852 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrow1
7853 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrowp0
7854 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrowp1
7855 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_eq
7856 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_fp0
7857 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_fp1
7858 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_gp8_x0
7859 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_gp8_x1
7860 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_gt
7861 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_lt
7862 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair0
7863 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1
7864 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_un
7865 38, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
7866 38, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
7867 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi
7868 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_lo
7869 26, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
7870 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_vsx1_then_sub_64_hi_phony
7871 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_64
7872 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_64_hi_phony
7873 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx0
7874 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1
7875 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1_then_sub_64
7876 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7877 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrowp1_then_sub_dmrrow0
7878 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrowp1_then_sub_dmrrow1
7879 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrow0
7880 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrow1
7881 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp0
7882 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1
7883 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7884 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7885 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrow0
7886 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrow1
7887 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp0
7888 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1
7889 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi
7890 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_lo
7891 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7892 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7893 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7894 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7895 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7896 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7897 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7898 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7899 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_gp8_x1_then_sub_32
7900 },
7901 { // ACCRC
7902 0, // ACCRC:sub_32
7903 0, // ACCRC:sub_32_hi_phony
7904 19, // ACCRC:sub_64 -> F8RC
7905 0, // ACCRC:sub_64_hi_phony
7906 0, // ACCRC:sub_dmr0
7907 0, // ACCRC:sub_dmr1
7908 0, // ACCRC:sub_dmrrow0
7909 0, // ACCRC:sub_dmrrow1
7910 0, // ACCRC:sub_dmrrowp0
7911 0, // ACCRC:sub_dmrrowp1
7912 0, // ACCRC:sub_eq
7913 0, // ACCRC:sub_fp0
7914 0, // ACCRC:sub_fp1
7915 0, // ACCRC:sub_gp8_x0
7916 0, // ACCRC:sub_gp8_x1
7917 0, // ACCRC:sub_gt
7918 0, // ACCRC:sub_lt
7919 43, // ACCRC:sub_pair0 -> VSRpRC_with_sub_64_in_F4RC
7920 43, // ACCRC:sub_pair1 -> VSRpRC_with_sub_64_in_F4RC
7921 0, // ACCRC:sub_un
7922 33, // ACCRC:sub_vsx0 -> VSLRC
7923 33, // ACCRC:sub_vsx1 -> VSLRC
7924 0, // ACCRC:sub_wacc_hi
7925 0, // ACCRC:sub_wacc_lo
7926 19, // ACCRC:sub_vsx1_then_sub_64 -> F8RC
7927 0, // ACCRC:sub_vsx1_then_sub_64_hi_phony
7928 19, // ACCRC:sub_pair1_then_sub_64 -> F8RC
7929 0, // ACCRC:sub_pair1_then_sub_64_hi_phony
7930 33, // ACCRC:sub_pair1_then_sub_vsx0 -> VSLRC
7931 33, // ACCRC:sub_pair1_then_sub_vsx1 -> VSLRC
7932 19, // ACCRC:sub_pair1_then_sub_vsx1_then_sub_64 -> F8RC
7933 0, // ACCRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7934 0, // ACCRC:sub_dmrrowp1_then_sub_dmrrow0
7935 0, // ACCRC:sub_dmrrowp1_then_sub_dmrrow1
7936 0, // ACCRC:sub_wacc_hi_then_sub_dmrrow0
7937 0, // ACCRC:sub_wacc_hi_then_sub_dmrrow1
7938 0, // ACCRC:sub_wacc_hi_then_sub_dmrrowp0
7939 0, // ACCRC:sub_wacc_hi_then_sub_dmrrowp1
7940 0, // ACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7941 0, // ACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7942 0, // ACCRC:sub_dmr1_then_sub_dmrrow0
7943 0, // ACCRC:sub_dmr1_then_sub_dmrrow1
7944 0, // ACCRC:sub_dmr1_then_sub_dmrrowp0
7945 0, // ACCRC:sub_dmr1_then_sub_dmrrowp1
7946 0, // ACCRC:sub_dmr1_then_sub_wacc_hi
7947 0, // ACCRC:sub_dmr1_then_sub_wacc_lo
7948 0, // ACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7949 0, // ACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7950 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7951 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7952 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7953 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7954 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7955 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7956 0, // ACCRC:sub_gp8_x1_then_sub_32
7957 },
7958 { // UACCRC
7959 0, // UACCRC:sub_32
7960 0, // UACCRC:sub_32_hi_phony
7961 19, // UACCRC:sub_64 -> F8RC
7962 0, // UACCRC:sub_64_hi_phony
7963 0, // UACCRC:sub_dmr0
7964 0, // UACCRC:sub_dmr1
7965 0, // UACCRC:sub_dmrrow0
7966 0, // UACCRC:sub_dmrrow1
7967 0, // UACCRC:sub_dmrrowp0
7968 0, // UACCRC:sub_dmrrowp1
7969 0, // UACCRC:sub_eq
7970 0, // UACCRC:sub_fp0
7971 0, // UACCRC:sub_fp1
7972 0, // UACCRC:sub_gp8_x0
7973 0, // UACCRC:sub_gp8_x1
7974 0, // UACCRC:sub_gt
7975 0, // UACCRC:sub_lt
7976 43, // UACCRC:sub_pair0 -> VSRpRC_with_sub_64_in_F4RC
7977 43, // UACCRC:sub_pair1 -> VSRpRC_with_sub_64_in_F4RC
7978 0, // UACCRC:sub_un
7979 33, // UACCRC:sub_vsx0 -> VSLRC
7980 33, // UACCRC:sub_vsx1 -> VSLRC
7981 0, // UACCRC:sub_wacc_hi
7982 0, // UACCRC:sub_wacc_lo
7983 19, // UACCRC:sub_vsx1_then_sub_64 -> F8RC
7984 0, // UACCRC:sub_vsx1_then_sub_64_hi_phony
7985 19, // UACCRC:sub_pair1_then_sub_64 -> F8RC
7986 0, // UACCRC:sub_pair1_then_sub_64_hi_phony
7987 33, // UACCRC:sub_pair1_then_sub_vsx0 -> VSLRC
7988 33, // UACCRC:sub_pair1_then_sub_vsx1 -> VSLRC
7989 19, // UACCRC:sub_pair1_then_sub_vsx1_then_sub_64 -> F8RC
7990 0, // UACCRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7991 0, // UACCRC:sub_dmrrowp1_then_sub_dmrrow0
7992 0, // UACCRC:sub_dmrrowp1_then_sub_dmrrow1
7993 0, // UACCRC:sub_wacc_hi_then_sub_dmrrow0
7994 0, // UACCRC:sub_wacc_hi_then_sub_dmrrow1
7995 0, // UACCRC:sub_wacc_hi_then_sub_dmrrowp0
7996 0, // UACCRC:sub_wacc_hi_then_sub_dmrrowp1
7997 0, // UACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7998 0, // UACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7999 0, // UACCRC:sub_dmr1_then_sub_dmrrow0
8000 0, // UACCRC:sub_dmr1_then_sub_dmrrow1
8001 0, // UACCRC:sub_dmr1_then_sub_dmrrowp0
8002 0, // UACCRC:sub_dmr1_then_sub_dmrrowp1
8003 0, // UACCRC:sub_dmr1_then_sub_wacc_hi
8004 0, // UACCRC:sub_dmr1_then_sub_wacc_lo
8005 0, // UACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8006 0, // UACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8007 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8008 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8009 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8010 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8011 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8012 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8013 0, // UACCRC:sub_gp8_x1_then_sub_32
8014 },
8015 { // WACCRC
8016 0, // WACCRC:sub_32
8017 0, // WACCRC:sub_32_hi_phony
8018 0, // WACCRC:sub_64
8019 0, // WACCRC:sub_64_hi_phony
8020 0, // WACCRC:sub_dmr0
8021 0, // WACCRC:sub_dmr1
8022 29, // WACCRC:sub_dmrrow0 -> DMRROWRC
8023 29, // WACCRC:sub_dmrrow1 -> DMRROWRC
8024 40, // WACCRC:sub_dmrrowp0 -> DMRROWpRC
8025 40, // WACCRC:sub_dmrrowp1 -> DMRROWpRC
8026 0, // WACCRC:sub_eq
8027 0, // WACCRC:sub_fp0
8028 0, // WACCRC:sub_fp1
8029 0, // WACCRC:sub_gp8_x0
8030 0, // WACCRC:sub_gp8_x1
8031 0, // WACCRC:sub_gt
8032 0, // WACCRC:sub_lt
8033 0, // WACCRC:sub_pair0
8034 0, // WACCRC:sub_pair1
8035 0, // WACCRC:sub_un
8036 0, // WACCRC:sub_vsx0
8037 0, // WACCRC:sub_vsx1
8038 0, // WACCRC:sub_wacc_hi
8039 0, // WACCRC:sub_wacc_lo
8040 0, // WACCRC:sub_vsx1_then_sub_64
8041 0, // WACCRC:sub_vsx1_then_sub_64_hi_phony
8042 0, // WACCRC:sub_pair1_then_sub_64
8043 0, // WACCRC:sub_pair1_then_sub_64_hi_phony
8044 0, // WACCRC:sub_pair1_then_sub_vsx0
8045 0, // WACCRC:sub_pair1_then_sub_vsx1
8046 0, // WACCRC:sub_pair1_then_sub_vsx1_then_sub_64
8047 0, // WACCRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8048 29, // WACCRC:sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8049 29, // WACCRC:sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8050 0, // WACCRC:sub_wacc_hi_then_sub_dmrrow0
8051 0, // WACCRC:sub_wacc_hi_then_sub_dmrrow1
8052 0, // WACCRC:sub_wacc_hi_then_sub_dmrrowp0
8053 0, // WACCRC:sub_wacc_hi_then_sub_dmrrowp1
8054 0, // WACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8055 0, // WACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8056 0, // WACCRC:sub_dmr1_then_sub_dmrrow0
8057 0, // WACCRC:sub_dmr1_then_sub_dmrrow1
8058 0, // WACCRC:sub_dmr1_then_sub_dmrrowp0
8059 0, // WACCRC:sub_dmr1_then_sub_dmrrowp1
8060 0, // WACCRC:sub_dmr1_then_sub_wacc_hi
8061 0, // WACCRC:sub_dmr1_then_sub_wacc_lo
8062 0, // WACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8063 0, // WACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8064 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8065 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8066 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8067 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8068 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8069 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8070 0, // WACCRC:sub_gp8_x1_then_sub_32
8071 },
8072 { // WACC_HIRC
8073 0, // WACC_HIRC:sub_32
8074 0, // WACC_HIRC:sub_32_hi_phony
8075 0, // WACC_HIRC:sub_64
8076 0, // WACC_HIRC:sub_64_hi_phony
8077 0, // WACC_HIRC:sub_dmr0
8078 0, // WACC_HIRC:sub_dmr1
8079 29, // WACC_HIRC:sub_dmrrow0 -> DMRROWRC
8080 29, // WACC_HIRC:sub_dmrrow1 -> DMRROWRC
8081 40, // WACC_HIRC:sub_dmrrowp0 -> DMRROWpRC
8082 40, // WACC_HIRC:sub_dmrrowp1 -> DMRROWpRC
8083 0, // WACC_HIRC:sub_eq
8084 0, // WACC_HIRC:sub_fp0
8085 0, // WACC_HIRC:sub_fp1
8086 0, // WACC_HIRC:sub_gp8_x0
8087 0, // WACC_HIRC:sub_gp8_x1
8088 0, // WACC_HIRC:sub_gt
8089 0, // WACC_HIRC:sub_lt
8090 0, // WACC_HIRC:sub_pair0
8091 0, // WACC_HIRC:sub_pair1
8092 0, // WACC_HIRC:sub_un
8093 0, // WACC_HIRC:sub_vsx0
8094 0, // WACC_HIRC:sub_vsx1
8095 0, // WACC_HIRC:sub_wacc_hi
8096 0, // WACC_HIRC:sub_wacc_lo
8097 0, // WACC_HIRC:sub_vsx1_then_sub_64
8098 0, // WACC_HIRC:sub_vsx1_then_sub_64_hi_phony
8099 0, // WACC_HIRC:sub_pair1_then_sub_64
8100 0, // WACC_HIRC:sub_pair1_then_sub_64_hi_phony
8101 0, // WACC_HIRC:sub_pair1_then_sub_vsx0
8102 0, // WACC_HIRC:sub_pair1_then_sub_vsx1
8103 0, // WACC_HIRC:sub_pair1_then_sub_vsx1_then_sub_64
8104 0, // WACC_HIRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8105 29, // WACC_HIRC:sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8106 29, // WACC_HIRC:sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8107 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrow0
8108 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrow1
8109 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrowp0
8110 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrowp1
8111 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8112 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8113 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrow0
8114 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrow1
8115 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrowp0
8116 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrowp1
8117 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi
8118 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_lo
8119 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8120 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8121 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8122 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8123 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8124 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8125 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8126 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8127 0, // WACC_HIRC:sub_gp8_x1_then_sub_32
8128 },
8129 { // ACCRC_with_sub_64_in_SPILLTOVSRRC
8130 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_32
8131 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
8132 26, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_F4RC
8133 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
8134 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
8135 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
8136 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
8137 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
8138 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
8139 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
8140 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
8141 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
8142 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
8143 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
8144 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
8145 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
8146 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
8147 46, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8148 43, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1 -> VSRpRC_with_sub_64_in_F4RC
8149 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_un
8150 38, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8151 38, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8152 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
8153 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
8154 26, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8155 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
8156 19, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64 -> F8RC
8157 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
8158 33, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0 -> VSLRC
8159 33, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1 -> VSLRC
8160 19, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64 -> F8RC
8161 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8162 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
8163 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
8164 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
8165 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
8166 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
8167 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
8168 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8169 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8170 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
8171 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
8172 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
8173 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
8174 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
8175 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
8176 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8177 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8178 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8179 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8180 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8181 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8182 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8183 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8184 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
8185 },
8186 { // UACCRC_with_sub_64_in_SPILLTOVSRRC
8187 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_32
8188 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
8189 26, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_F4RC
8190 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
8191 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
8192 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
8193 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
8194 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
8195 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
8196 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
8197 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
8198 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
8199 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
8200 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
8201 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
8202 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
8203 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
8204 46, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8205 43, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1 -> VSRpRC_with_sub_64_in_F4RC
8206 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_un
8207 38, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8208 38, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8209 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
8210 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
8211 26, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8212 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
8213 19, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64 -> F8RC
8214 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
8215 33, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0 -> VSLRC
8216 33, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1 -> VSLRC
8217 19, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64 -> F8RC
8218 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8219 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
8220 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
8221 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
8222 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
8223 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
8224 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
8225 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8226 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8227 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
8228 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
8229 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
8230 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
8231 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
8232 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
8233 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8234 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8235 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8236 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8237 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8238 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8239 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8240 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8241 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
8242 },
8243 { // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
8244 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_32
8245 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
8246 26, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_F4RC
8247 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
8248 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr0
8249 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1
8250 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
8251 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
8252 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
8253 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
8254 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_eq
8255 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_fp0
8256 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_fp1
8257 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
8258 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
8259 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gt
8260 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_lt
8261 46, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8262 46, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8263 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_un
8264 38, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8265 38, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8266 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
8267 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
8268 26, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8269 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
8270 26, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8271 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
8272 38, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8273 38, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8274 26, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8275 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8276 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
8277 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
8278 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
8279 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
8280 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
8281 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
8282 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8283 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8284 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
8285 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
8286 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
8287 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
8288 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
8289 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
8290 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8291 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8292 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8293 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8294 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8295 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8296 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8297 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8298 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
8299 },
8300 { // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
8301 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_32
8302 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
8303 26, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_F4RC
8304 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
8305 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr0
8306 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1
8307 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
8308 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
8309 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
8310 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
8311 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_eq
8312 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_fp0
8313 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_fp1
8314 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
8315 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
8316 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gt
8317 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_lt
8318 46, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8319 46, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8320 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_un
8321 38, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8322 38, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8323 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
8324 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
8325 26, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8326 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
8327 26, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8328 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
8329 38, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8330 38, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8331 26, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8332 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8333 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
8334 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
8335 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
8336 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
8337 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
8338 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
8339 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8340 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8341 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
8342 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
8343 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
8344 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
8345 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
8346 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
8347 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8348 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8349 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8350 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8351 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8352 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8353 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8354 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8355 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
8356 },
8357 { // DMRRC
8358 0, // DMRRC:sub_32
8359 0, // DMRRC:sub_32_hi_phony
8360 0, // DMRRC:sub_64
8361 0, // DMRRC:sub_64_hi_phony
8362 0, // DMRRC:sub_dmr0
8363 0, // DMRRC:sub_dmr1
8364 29, // DMRRC:sub_dmrrow0 -> DMRROWRC
8365 29, // DMRRC:sub_dmrrow1 -> DMRROWRC
8366 40, // DMRRC:sub_dmrrowp0 -> DMRROWpRC
8367 40, // DMRRC:sub_dmrrowp1 -> DMRROWpRC
8368 0, // DMRRC:sub_eq
8369 0, // DMRRC:sub_fp0
8370 0, // DMRRC:sub_fp1
8371 0, // DMRRC:sub_gp8_x0
8372 0, // DMRRC:sub_gp8_x1
8373 0, // DMRRC:sub_gt
8374 0, // DMRRC:sub_lt
8375 0, // DMRRC:sub_pair0
8376 0, // DMRRC:sub_pair1
8377 0, // DMRRC:sub_un
8378 0, // DMRRC:sub_vsx0
8379 0, // DMRRC:sub_vsx1
8380 50, // DMRRC:sub_wacc_hi -> WACC_HIRC
8381 49, // DMRRC:sub_wacc_lo -> WACCRC
8382 0, // DMRRC:sub_vsx1_then_sub_64
8383 0, // DMRRC:sub_vsx1_then_sub_64_hi_phony
8384 0, // DMRRC:sub_pair1_then_sub_64
8385 0, // DMRRC:sub_pair1_then_sub_64_hi_phony
8386 0, // DMRRC:sub_pair1_then_sub_vsx0
8387 0, // DMRRC:sub_pair1_then_sub_vsx1
8388 0, // DMRRC:sub_pair1_then_sub_vsx1_then_sub_64
8389 0, // DMRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8390 29, // DMRRC:sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8391 29, // DMRRC:sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8392 29, // DMRRC:sub_wacc_hi_then_sub_dmrrow0 -> DMRROWRC
8393 29, // DMRRC:sub_wacc_hi_then_sub_dmrrow1 -> DMRROWRC
8394 40, // DMRRC:sub_wacc_hi_then_sub_dmrrowp0 -> DMRROWpRC
8395 40, // DMRRC:sub_wacc_hi_then_sub_dmrrowp1 -> DMRROWpRC
8396 29, // DMRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8397 29, // DMRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8398 0, // DMRRC:sub_dmr1_then_sub_dmrrow0
8399 0, // DMRRC:sub_dmr1_then_sub_dmrrow1
8400 0, // DMRRC:sub_dmr1_then_sub_dmrrowp0
8401 0, // DMRRC:sub_dmr1_then_sub_dmrrowp1
8402 0, // DMRRC:sub_dmr1_then_sub_wacc_hi
8403 0, // DMRRC:sub_dmr1_then_sub_wacc_lo
8404 0, // DMRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8405 0, // DMRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8406 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8407 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8408 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8409 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8410 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8411 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8412 0, // DMRRC:sub_gp8_x1_then_sub_32
8413 },
8414 { // DMRpRC
8415 0, // DMRpRC:sub_32
8416 0, // DMRpRC:sub_32_hi_phony
8417 0, // DMRpRC:sub_64
8418 0, // DMRpRC:sub_64_hi_phony
8419 55, // DMRpRC:sub_dmr0 -> DMRRC
8420 55, // DMRpRC:sub_dmr1 -> DMRRC
8421 29, // DMRpRC:sub_dmrrow0 -> DMRROWRC
8422 29, // DMRpRC:sub_dmrrow1 -> DMRROWRC
8423 40, // DMRpRC:sub_dmrrowp0 -> DMRROWpRC
8424 40, // DMRpRC:sub_dmrrowp1 -> DMRROWpRC
8425 0, // DMRpRC:sub_eq
8426 0, // DMRpRC:sub_fp0
8427 0, // DMRpRC:sub_fp1
8428 0, // DMRpRC:sub_gp8_x0
8429 0, // DMRpRC:sub_gp8_x1
8430 0, // DMRpRC:sub_gt
8431 0, // DMRpRC:sub_lt
8432 0, // DMRpRC:sub_pair0
8433 0, // DMRpRC:sub_pair1
8434 0, // DMRpRC:sub_un
8435 0, // DMRpRC:sub_vsx0
8436 0, // DMRpRC:sub_vsx1
8437 50, // DMRpRC:sub_wacc_hi -> WACC_HIRC
8438 49, // DMRpRC:sub_wacc_lo -> WACCRC
8439 0, // DMRpRC:sub_vsx1_then_sub_64
8440 0, // DMRpRC:sub_vsx1_then_sub_64_hi_phony
8441 0, // DMRpRC:sub_pair1_then_sub_64
8442 0, // DMRpRC:sub_pair1_then_sub_64_hi_phony
8443 0, // DMRpRC:sub_pair1_then_sub_vsx0
8444 0, // DMRpRC:sub_pair1_then_sub_vsx1
8445 0, // DMRpRC:sub_pair1_then_sub_vsx1_then_sub_64
8446 0, // DMRpRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8447 29, // DMRpRC:sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8448 29, // DMRpRC:sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8449 29, // DMRpRC:sub_wacc_hi_then_sub_dmrrow0 -> DMRROWRC
8450 29, // DMRpRC:sub_wacc_hi_then_sub_dmrrow1 -> DMRROWRC
8451 40, // DMRpRC:sub_wacc_hi_then_sub_dmrrowp0 -> DMRROWpRC
8452 40, // DMRpRC:sub_wacc_hi_then_sub_dmrrowp1 -> DMRROWpRC
8453 29, // DMRpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8454 29, // DMRpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8455 29, // DMRpRC:sub_dmr1_then_sub_dmrrow0 -> DMRROWRC
8456 29, // DMRpRC:sub_dmr1_then_sub_dmrrow1 -> DMRROWRC
8457 40, // DMRpRC:sub_dmr1_then_sub_dmrrowp0 -> DMRROWpRC
8458 40, // DMRpRC:sub_dmr1_then_sub_dmrrowp1 -> DMRROWpRC
8459 50, // DMRpRC:sub_dmr1_then_sub_wacc_hi -> WACC_HIRC
8460 49, // DMRpRC:sub_dmr1_then_sub_wacc_lo -> WACCRC
8461 29, // DMRpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8462 29, // DMRpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8463 29, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0 -> DMRROWRC
8464 29, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1 -> DMRROWRC
8465 40, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0 -> DMRROWpRC
8466 40, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1 -> DMRROWpRC
8467 29, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8468 29, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8469 0, // DMRpRC:sub_gp8_x1_then_sub_32
8470 },
8471 };
8472 assert(RC && "Missing regclass");
8473 if (!Idx) return RC;
8474 --Idx;
8475 assert(Idx < 55 && "Bad subreg");
8476 unsigned TV = Table[RC->getID()][Idx];
8477 return TV ? getRegClass(i: TV - 1) : nullptr;
8478}
8479
8480/// Get the weight in units of pressure for this register class.
8481const RegClassWeight &PPCGenRegisterInfo::
8482getRegClassWeight(const TargetRegisterClass *RC) const {
8483 static const RegClassWeight RCWeightTable[] = {
8484 {.RegWeight: 1, .WeightLimit: 64}, // VSSRC
8485 {.RegWeight: 1, .WeightLimit: 34}, // GPRC
8486 {.RegWeight: 1, .WeightLimit: 34}, // GPRC_NOR0
8487 {.RegWeight: 1, .WeightLimit: 33}, // GPRC_and_GPRC_NOR0
8488 {.RegWeight: 1, .WeightLimit: 32}, // CRBITRC
8489 {.RegWeight: 1, .WeightLimit: 32}, // F4RC
8490 {.RegWeight: 0, .WeightLimit: 0}, // GPRC32
8491 {.RegWeight: 4, .WeightLimit: 32}, // CRRC
8492 {.RegWeight: 0, .WeightLimit: 0}, // CARRYRC
8493 {.RegWeight: 0, .WeightLimit: 0}, // CTRRC
8494 {.RegWeight: 0, .WeightLimit: 0}, // LRRC
8495 {.RegWeight: 1, .WeightLimit: 1}, // VRSAVERC
8496 {.RegWeight: 1, .WeightLimit: 68}, // SPILLTOVSRRC
8497 {.RegWeight: 1, .WeightLimit: 64}, // VSFRC
8498 {.RegWeight: 1, .WeightLimit: 34}, // G8RC
8499 {.RegWeight: 1, .WeightLimit: 34}, // G8RC_NOX0
8500 {.RegWeight: 1, .WeightLimit: 34}, // SPILLTOVSRRC_and_VSFRC
8501 {.RegWeight: 1, .WeightLimit: 33}, // G8RC_and_G8RC_NOX0
8502 {.RegWeight: 1, .WeightLimit: 32}, // F8RC
8503 {.RegWeight: 0, .WeightLimit: 0}, // FHRC
8504 {.RegWeight: 1, .WeightLimit: 32}, // SPERC
8505 {.RegWeight: 0, .WeightLimit: 0}, // VFHRC
8506 {.RegWeight: 1, .WeightLimit: 32}, // VFRC
8507 {.RegWeight: 1, .WeightLimit: 31}, // SPERC_with_sub_32_in_GPRC_NOR0
8508 {.RegWeight: 1, .WeightLimit: 20}, // SPILLTOVSRRC_and_VFRC
8509 {.RegWeight: 1, .WeightLimit: 14}, // SPILLTOVSRRC_and_F4RC
8510 {.RegWeight: 0, .WeightLimit: 0}, // CTRRC8
8511 {.RegWeight: 0, .WeightLimit: 0}, // LR8RC
8512 {.RegWeight: 1, .WeightLimit: 64}, // DMRROWRC
8513 {.RegWeight: 1, .WeightLimit: 64}, // VSRC
8514 {.RegWeight: 1, .WeightLimit: 34}, // VSRC_with_sub_64_in_SPILLTOVSRRC
8515 {.RegWeight: 1, .WeightLimit: 32}, // VRRC
8516 {.RegWeight: 1, .WeightLimit: 32}, // VSLRC
8517 {.RegWeight: 1, .WeightLimit: 20}, // VRRC_with_sub_64_in_SPILLTOVSRRC
8518 {.RegWeight: 2, .WeightLimit: 32}, // FpRC
8519 {.RegWeight: 2, .WeightLimit: 32}, // G8pRC
8520 {.RegWeight: 2, .WeightLimit: 30}, // G8pRC_with_sub_32_in_GPRC_NOR0
8521 {.RegWeight: 1, .WeightLimit: 14}, // VSLRC_with_sub_64_in_SPILLTOVSRRC
8522 {.RegWeight: 2, .WeightLimit: 14}, // FpRC_with_sub_fp0_in_SPILLTOVSRRC
8523 {.RegWeight: 2, .WeightLimit: 64}, // DMRROWpRC
8524 {.RegWeight: 2, .WeightLimit: 64}, // VSRpRC
8525 {.RegWeight: 2, .WeightLimit: 34}, // VSRpRC_with_sub_64_in_SPILLTOVSRRC
8526 {.RegWeight: 2, .WeightLimit: 32}, // VSRpRC_with_sub_64_in_F4RC
8527 {.RegWeight: 2, .WeightLimit: 32}, // VSRpRC_with_sub_64_in_VFRC
8528 {.RegWeight: 2, .WeightLimit: 20}, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
8529 {.RegWeight: 2, .WeightLimit: 14}, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8530 {.RegWeight: 4, .WeightLimit: 32}, // ACCRC
8531 {.RegWeight: 4, .WeightLimit: 32}, // UACCRC
8532 {.RegWeight: 4, .WeightLimit: 32}, // WACCRC
8533 {.RegWeight: 4, .WeightLimit: 32}, // WACC_HIRC
8534 {.RegWeight: 4, .WeightLimit: 16}, // ACCRC_with_sub_64_in_SPILLTOVSRRC
8535 {.RegWeight: 4, .WeightLimit: 16}, // UACCRC_with_sub_64_in_SPILLTOVSRRC
8536 {.RegWeight: 4, .WeightLimit: 12}, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
8537 {.RegWeight: 4, .WeightLimit: 12}, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
8538 {.RegWeight: 8, .WeightLimit: 64}, // DMRRC
8539 {.RegWeight: 16, .WeightLimit: 64}, // DMRpRC
8540 };
8541 return RCWeightTable[RC->getID()];
8542}
8543
8544/// Get the weight in units of pressure for this register unit.
8545unsigned PPCGenRegisterInfo::
8546getRegUnitWeight(MCRegUnit RegUnit) const {
8547 assert(static_cast<unsigned>(RegUnit) < 335 && "invalid register unit");
8548 // All register units have unit weight.
8549 return 1;
8550}
8551
8552
8553// Get the number of dimensions of register pressure.
8554unsigned PPCGenRegisterInfo::getNumRegPressureSets() const {
8555 return 19;
8556}
8557
8558// Get the name of this register unit pressure set.
8559const char *PPCGenRegisterInfo::
8560getRegPressureSetName(unsigned Idx) const {
8561 static const char *PressureNameTable[] = {
8562 "VRSAVERC",
8563 "SPILLTOVSRRC_and_F4RC",
8564 "SPILLTOVSRRC_and_VFRC",
8565 "CRBITRC",
8566 "F4RC",
8567 "VFRC",
8568 "WACCRC",
8569 "WACC_HIRC",
8570 "GPRC",
8571 "SPILLTOVSRRC_and_VSFRC",
8572 "SPILLTOVSRRC_and_VSFRC_with_VFRC",
8573 "F4RC_with_SPILLTOVSRRC_and_VSFRC",
8574 "VSSRC",
8575 "DMRROWRC",
8576 "SPILLTOVSRRC",
8577 "SPILLTOVSRRC_with_SPILLTOVSRRC_and_F4RC",
8578 "SPILLTOVSRRC_with_VFRC",
8579 "F4RC_with_SPILLTOVSRRC",
8580 "VSSRC_with_SPILLTOVSRRC",
8581 };
8582 return PressureNameTable[Idx];
8583}
8584
8585// Get the register unit pressure limit for this dimension.
8586// This limit must be adjusted dynamically for reserved registers.
8587unsigned PPCGenRegisterInfo::
8588getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const {
8589 static const uint8_t PressureLimitTable[] = {
8590 1, // 0: VRSAVERC
8591 16, // 1: SPILLTOVSRRC_and_F4RC
8592 20, // 2: SPILLTOVSRRC_and_VFRC
8593 32, // 3: CRBITRC
8594 32, // 4: F4RC
8595 32, // 5: VFRC
8596 32, // 6: WACCRC
8597 32, // 7: WACC_HIRC
8598 35, // 8: GPRC
8599 36, // 9: SPILLTOVSRRC_and_VSFRC
8600 46, // 10: SPILLTOVSRRC_and_VSFRC_with_VFRC
8601 52, // 11: F4RC_with_SPILLTOVSRRC_and_VSFRC
8602 64, // 12: VSSRC
8603 64, // 13: DMRROWRC
8604 69, // 14: SPILLTOVSRRC
8605 70, // 15: SPILLTOVSRRC_with_SPILLTOVSRRC_and_F4RC
8606 80, // 16: SPILLTOVSRRC_with_VFRC
8607 86, // 17: F4RC_with_SPILLTOVSRRC
8608 98, // 18: VSSRC_with_SPILLTOVSRRC
8609 };
8610 return PressureLimitTable[Idx];
8611}
8612
8613/// Table of pressure sets per register class or unit.
8614static const int RCSetsTable[] = {
8615 /* 0 */ 0, -1,
8616 /* 2 */ 3, -1,
8617 /* 4 */ 6, 13, -1,
8618 /* 7 */ 7, 13, -1,
8619 /* 10 */ 8, 14, -1,
8620 /* 13 */ 12, 18, -1,
8621 /* 16 */ 5, 10, 12, 16, 18, -1,
8622 /* 22 */ 4, 11, 12, 17, 18, -1,
8623 /* 28 */ 1, 4, 9, 11, 12, 15, 17, 18, -1,
8624 /* 37 */ 8, 14, 15, 16, 17, 18, -1,
8625 /* 44 */ 1, 4, 9, 10, 11, 12, 14, 15, 16, 17, 18, -1,
8626 /* 56 */ 2, 5, 9, 10, 11, 12, 14, 15, 16, 17, 18, -1,
8627};
8628
8629/// Get the dimensions of register pressure impacted by this register class.
8630/// Returns a -1 terminated array of pressure set IDs
8631const int *PPCGenRegisterInfo::
8632getRegClassPressureSets(const TargetRegisterClass *RC) const {
8633 static const uint8_t RCSetStartTable[] = {
8634 13,37,10,37,2,22,1,2,1,1,1,0,38,13,37,10,46,37,22,1,37,1,16,37,56,44,1,1,5,13,46,16,22,56,22,37,37,44,44,5,13,46,22,16,56,44,22,22,4,7,28,28,44,44,5,5,};
8635 return &RCSetsTable[RCSetStartTable[RC->getID()]];
8636}
8637
8638/// Get the dimensions of register pressure impacted by this register unit.
8639/// Returns a -1 terminated array of pressure set IDs
8640const int *PPCGenRegisterInfo::
8641getRegUnitPressureSets(MCRegUnit RegUnit) const {
8642 assert(static_cast<unsigned>(RegUnit) < 335 && "invalid register unit");
8643 static const uint8_t RUSetStartTable[] = {
8644 37,1,1,1,1,37,1,1,1,1,0,1,10,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,28,1,28,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,1,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,};
8645 return &RCSetsTable[RUSetStartTable[static_cast<unsigned>(RegUnit)]];
8646}
8647
8648extern const MCRegisterDesc PPCRegDesc[];
8649extern const int16_t PPCRegDiffLists[];
8650extern const LaneBitmask PPCLaneMaskLists[];
8651extern const char PPCRegStrings[];
8652extern const char PPCRegClassStrings[];
8653extern const MCPhysReg PPCRegUnitRoots[][2];
8654extern const uint16_t PPCSubRegIdxLists[];
8655extern const uint16_t PPCRegEncodingTable[];
8656// PPC Dwarf<->LLVM register mappings.
8657extern const MCRegisterInfo::DwarfLLVMRegPair PPCDwarfFlavour0Dwarf2L[];
8658extern const unsigned PPCDwarfFlavour0Dwarf2LSize;
8659
8660extern const MCRegisterInfo::DwarfLLVMRegPair PPCDwarfFlavour1Dwarf2L[];
8661extern const unsigned PPCDwarfFlavour1Dwarf2LSize;
8662
8663extern const MCRegisterInfo::DwarfLLVMRegPair PPCEHFlavour0Dwarf2L[];
8664extern const unsigned PPCEHFlavour0Dwarf2LSize;
8665
8666extern const MCRegisterInfo::DwarfLLVMRegPair PPCEHFlavour1Dwarf2L[];
8667extern const unsigned PPCEHFlavour1Dwarf2LSize;
8668
8669extern const MCRegisterInfo::DwarfLLVMRegPair PPCDwarfFlavour0L2Dwarf[];
8670extern const unsigned PPCDwarfFlavour0L2DwarfSize;
8671
8672extern const MCRegisterInfo::DwarfLLVMRegPair PPCDwarfFlavour1L2Dwarf[];
8673extern const unsigned PPCDwarfFlavour1L2DwarfSize;
8674
8675extern const MCRegisterInfo::DwarfLLVMRegPair PPCEHFlavour0L2Dwarf[];
8676extern const unsigned PPCEHFlavour0L2DwarfSize;
8677
8678extern const MCRegisterInfo::DwarfLLVMRegPair PPCEHFlavour1L2Dwarf[];
8679extern const unsigned PPCEHFlavour1L2DwarfSize;
8680
8681PPCGenRegisterInfo::
8682PPCGenRegisterInfo(unsigned RA, unsigned DwarfFlavour, unsigned EHFlavour,
8683 unsigned PC, unsigned HwMode)
8684 : TargetRegisterInfo(&PPCRegInfoDesc, RegisterClasses, RegisterClasses+56,
8685 SubRegIndexNameTable, SubRegIdxRangeTable, SubRegIndexLaneMaskTable,
8686 LaneBitmask(0xFFFFFFFE00000002), RegClassInfos, VTLists, HwMode) {
8687 InitMCRegisterInfo(D: PPCRegDesc, NR: 612, RA, PC,
8688 C: PPCMCRegisterClasses, NC: 56,
8689 RURoots: PPCRegUnitRoots,
8690 NRU: 335,
8691 DL: PPCRegDiffLists,
8692 RUMS: PPCLaneMaskLists,
8693 Strings: PPCRegStrings,
8694 ClassStrings: PPCRegClassStrings,
8695 SubIndices: PPCSubRegIdxLists,
8696 NumIndices: 56,
8697 RET: PPCRegEncodingTable);
8698
8699 switch (DwarfFlavour) {
8700 default:
8701 llvm_unreachable("Unknown DWARF flavour");
8702 case 0:
8703 mapDwarfRegsToLLVMRegs(Map: PPCDwarfFlavour0Dwarf2L, Size: PPCDwarfFlavour0Dwarf2LSize, isEH: false);
8704 break;
8705 case 1:
8706 mapDwarfRegsToLLVMRegs(Map: PPCDwarfFlavour1Dwarf2L, Size: PPCDwarfFlavour1Dwarf2LSize, isEH: false);
8707 break;
8708 }
8709 switch (EHFlavour) {
8710 default:
8711 llvm_unreachable("Unknown DWARF flavour");
8712 case 0:
8713 mapDwarfRegsToLLVMRegs(Map: PPCEHFlavour0Dwarf2L, Size: PPCEHFlavour0Dwarf2LSize, isEH: true);
8714 break;
8715 case 1:
8716 mapDwarfRegsToLLVMRegs(Map: PPCEHFlavour1Dwarf2L, Size: PPCEHFlavour1Dwarf2LSize, isEH: true);
8717 break;
8718 }
8719 switch (DwarfFlavour) {
8720 default:
8721 llvm_unreachable("Unknown DWARF flavour");
8722 case 0:
8723 mapLLVMRegsToDwarfRegs(Map: PPCDwarfFlavour0L2Dwarf, Size: PPCDwarfFlavour0L2DwarfSize, isEH: false);
8724 break;
8725 case 1:
8726 mapLLVMRegsToDwarfRegs(Map: PPCDwarfFlavour1L2Dwarf, Size: PPCDwarfFlavour1L2DwarfSize, isEH: false);
8727 break;
8728 }
8729 switch (EHFlavour) {
8730 default:
8731 llvm_unreachable("Unknown DWARF flavour");
8732 case 0:
8733 mapLLVMRegsToDwarfRegs(Map: PPCEHFlavour0L2Dwarf, Size: PPCEHFlavour0L2DwarfSize, isEH: true);
8734 break;
8735 case 1:
8736 mapLLVMRegsToDwarfRegs(Map: PPCEHFlavour1L2Dwarf, Size: PPCEHFlavour1L2DwarfSize, isEH: true);
8737 break;
8738 }
8739}
8740
8741static const MCPhysReg CSR_64_AllRegs_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, 0 };
8742static const uint32_t CSR_64_AllRegs_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0x000001ff, 0x00000000, 0xc8000000, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
8743static const MCPhysReg CSR_64_AllRegs_AIX_Dflt_Altivec_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, 0 };
8744static const uint32_t CSR_64_AllRegs_AIX_Dflt_Altivec_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0x000001ff, 0x00000000, 0xc8000000, 0x07fffe3f, 0x00000000, 0x007ffff8, 0x007ffff8, 0x007ffff8, 0x00000000, 0x00000000, 0x00000000, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
8745static const MCPhysReg CSR_64_AllRegs_AIX_Dflt_VSX_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSL0, PPC::VSL1, PPC::VSL2, PPC::VSL3, PPC::VSL4, PPC::VSL5, PPC::VSL6, PPC::VSL7, PPC::VSL8, PPC::VSL9, PPC::VSL10, PPC::VSL11, PPC::VSL12, PPC::VSL13, PPC::VSL14, PPC::VSL15, PPC::VSL16, PPC::VSL17, PPC::VSL18, PPC::VSL19, 0 };
8746static const uint32_t CSR_64_AllRegs_AIX_Dflt_VSX_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0x1fffffff, 0x00000000, 0xc8000000, 0x07fffe3f, 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0x007fffff, 0x00000000, 0x00000000, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
8747static const MCPhysReg CSR_64_AllRegs_Altivec_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8748static const uint32_t CSR_64_AllRegs_Altivec_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0x000001ff, 0x00000000, 0xc8000000, 0x07fffe3f, 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0x00000007, 0x00000000, 0x00000000, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
8749static const MCPhysReg CSR_64_AllRegs_VSRP_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSL0, PPC::VSL1, PPC::VSL2, PPC::VSL3, PPC::VSL4, PPC::VSL5, PPC::VSL6, PPC::VSL7, PPC::VSL8, PPC::VSL9, PPC::VSL10, PPC::VSL11, PPC::VSL12, PPC::VSL13, PPC::VSL14, PPC::VSL15, PPC::VSL16, PPC::VSL17, PPC::VSL18, PPC::VSL19, PPC::VSL20, PPC::VSL21, PPC::VSL22, PPC::VSL23, PPC::VSL24, PPC::VSL25, PPC::VSL26, PPC::VSL27, PPC::VSL28, PPC::VSL29, PPC::VSL30, PPC::VSL31, PPC::VSRp0, PPC::VSRp1, PPC::VSRp2, PPC::VSRp3, PPC::VSRp4, PPC::VSRp5, PPC::VSRp6, PPC::VSRp7, PPC::VSRp8, PPC::VSRp9, PPC::VSRp10, PPC::VSRp11, PPC::VSRp12, PPC::VSRp13, PPC::VSRp14, PPC::VSRp15, PPC::VSRp16, PPC::VSRp17, PPC::VSRp18, PPC::VSRp19, PPC::VSRp20, PPC::VSRp21, PPC::VSRp22, PPC::VSRp23, PPC::VSRp24, PPC::VSRp25, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8750static const uint32_t CSR_64_AllRegs_VSRP_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0xc8000000, 0x07fffe3f, 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000007, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
8751static const MCPhysReg CSR_64_AllRegs_VSX_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSL0, PPC::VSL1, PPC::VSL2, PPC::VSL3, PPC::VSL4, PPC::VSL5, PPC::VSL6, PPC::VSL7, PPC::VSL8, PPC::VSL9, PPC::VSL10, PPC::VSL11, PPC::VSL12, PPC::VSL13, PPC::VSL14, PPC::VSL15, PPC::VSL16, PPC::VSL17, PPC::VSL18, PPC::VSL19, PPC::VSL20, PPC::VSL21, PPC::VSL22, PPC::VSL23, PPC::VSL24, PPC::VSL25, PPC::VSL26, PPC::VSL27, PPC::VSL28, PPC::VSL29, PPC::VSL30, PPC::VSL31, 0 };
8752static const uint32_t CSR_64_AllRegs_VSX_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0xc8000000, 0x07fffe3f, 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000007, 0x00000000, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
8753static const MCPhysReg CSR_AIX32_SaveList[] = { PPC::R13, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, 0 };
8754static const uint32_t CSR_AIX32_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07ffff00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8755static const MCPhysReg CSR_AIX32_Altivec_SaveList[] = { PPC::R13, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8756static const uint32_t CSR_AIX32_Altivec_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07ffff00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8757static const MCPhysReg CSR_AIX32_VSRP_SaveList[] = { PPC::R13, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8758static const uint32_t CSR_AIX32_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07ffff00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8759static const MCPhysReg CSR_AIX64_R2_VSRP_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, PPC::X2, 0 };
8760static const uint32_t CSR_AIX64_R2_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x20000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00200000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8761static const MCPhysReg CSR_AIX64_VSRP_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8762static const uint32_t CSR_AIX64_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00000000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8763static const MCPhysReg CSR_ALL_VSRP_SaveList[] = { PPC::VSRp0, PPC::VSRp1, PPC::VSRp2, PPC::VSRp3, PPC::VSRp4, PPC::VSRp5, PPC::VSRp6, PPC::VSRp7, PPC::VSRp8, PPC::VSRp9, PPC::VSRp10, PPC::VSRp11, PPC::VSRp12, PPC::VSRp13, PPC::VSRp14, PPC::VSRp15, PPC::VSRp16, PPC::VSRp17, PPC::VSRp18, PPC::VSRp19, PPC::VSRp20, PPC::VSRp21, PPC::VSRp22, PPC::VSRp23, PPC::VSRp24, PPC::VSRp25, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8764static const uint32_t CSR_ALL_VSRP_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0x00000000, 0x00000000, 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000007, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
8765static const MCPhysReg CSR_Altivec_SaveList[] = { PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8766static const uint32_t CSR_Altivec_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
8767static const MCPhysReg CSR_NoRegs_SaveList[] = { 0 };
8768static const uint32_t CSR_NoRegs_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
8769static const MCPhysReg CSR_PPC64_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, 0 };
8770static const uint32_t CSR_PPC64_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8771static const MCPhysReg CSR_PPC64_Altivec_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8772static const uint32_t CSR_PPC64_Altivec_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8773static const MCPhysReg CSR_PPC64_R2_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::X2, 0 };
8774static const uint32_t CSR_PPC64_R2_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x20000000, 0x07fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8775static const MCPhysReg CSR_PPC64_R2_Altivec_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::X2, 0 };
8776static const uint32_t CSR_PPC64_R2_Altivec_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x20000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0x00000000, 0x00000000, 0x00200000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8777static const MCPhysReg CSR_SPE_SaveList[] = { PPC::S14, PPC::S15, PPC::S16, PPC::S17, PPC::S18, PPC::S19, PPC::S20, PPC::S21, PPC::S22, PPC::S23, PPC::S24, PPC::S25, PPC::S26, PPC::S27, PPC::S28, PPC::S29, PPC::S30, 0 };
8778static const uint32_t CSR_SPE_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01ffff00, 0x03fffe00, 0x03fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
8779static const MCPhysReg CSR_SPE_NO_S30_31_SaveList[] = { PPC::S14, PPC::S15, PPC::S16, PPC::S17, PPC::S18, PPC::S19, PPC::S20, PPC::S21, PPC::S22, PPC::S23, PPC::S24, PPC::S25, PPC::S26, PPC::S27, PPC::S28, PPC::S29, 0 };
8780static const uint32_t CSR_SPE_NO_S30_31_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00ffff00, 0x01fffe00, 0x01fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
8781static const MCPhysReg CSR_SVR32_ColdCC_SaveList[] = { PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, 0 };
8782static const uint32_t CSR_SVR32_ColdCC_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0x80000000, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff80000, 0x000fffff, 0x00000000, };
8783static const MCPhysReg CSR_SVR32_ColdCC_Altivec_SaveList[] = { PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::V0, PPC::V1, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8784static const uint32_t CSR_SVR32_ColdCC_Altivec_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0x80000000, 0x07fffe3f, 0x00000000, 0xffffffd8, 0xffffffdf, 0xffffffdf, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0xfff80000, 0x000fffff, 0x00000000, };
8785static const MCPhysReg CSR_SVR32_ColdCC_Common_SaveList[] = { PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, 0 };
8786static const uint32_t CSR_SVR32_ColdCC_Common_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff80000, 0x000fffff, 0x00000000, };
8787static const MCPhysReg CSR_SVR32_ColdCC_SPE_SaveList[] = { PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::S4, PPC::S5, PPC::S6, PPC::S7, PPC::S8, PPC::S9, PPC::S10, PPC::S14, PPC::S15, PPC::S16, PPC::S17, PPC::S18, PPC::S19, PPC::S20, PPC::S21, PPC::S22, PPC::S23, PPC::S24, PPC::S25, PPC::S26, PPC::S27, PPC::S28, PPC::S29, PPC::S30, PPC::S31, 0 };
8788static const uint32_t CSR_SVR32_ColdCC_SPE_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc0000000, 0x83ffff1f, 0x87fffe3f, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff80000, 0x000fffff, 0x00000000, };
8789static const MCPhysReg CSR_SVR32_ColdCC_VSRP_SaveList[] = { PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::V0, PPC::V1, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp0, PPC::VSRp1, PPC::VSRp2, PPC::VSRp3, PPC::VSRp4, PPC::VSRp5, PPC::VSRp6, PPC::VSRp7, PPC::VSRp8, PPC::VSRp9, PPC::VSRp10, PPC::VSRp11, PPC::VSRp12, PPC::VSRp13, PPC::VSRp14, PPC::VSRp15, PPC::VSRp16, PPC::VSRp18, PPC::VSRp19, PPC::VSRp20, PPC::VSRp21, PPC::VSRp22, PPC::VSRp23, PPC::VSRp24, PPC::VSRp25, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8790static const uint32_t CSR_SVR32_ColdCC_VSRP_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0x80000000, 0x07fffe3f, 0x00000000, 0xffffffd8, 0xffffffdf, 0xffffffdf, 0xffffffff, 0xffefffff, 0x00000007, 0x00000000, 0xfff80000, 0x000fffff, 0x00000000, };
8791static const MCPhysReg CSR_SVR64_ColdCC_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, 0 };
8792static const uint32_t CSR_SVR64_ColdCC_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0x80000000, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3f800000, 0xfffffffe, 0x000fffff, 0x00000000, };
8793static const MCPhysReg CSR_SVR64_ColdCC_Altivec_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8794static const uint32_t CSR_SVR64_ColdCC_Altivec_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0x80000000, 0x07fffe3f, 0x00000000, 0xffffffd8, 0xffffffdf, 0xffffffdf, 0x00000007, 0x00000000, 0x00000000, 0x3f800000, 0xfffffffe, 0x000fffff, 0x00000000, };
8795static const MCPhysReg CSR_SVR64_ColdCC_R2_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::X2, 0 };
8796static const uint32_t CSR_SVR64_ColdCC_R2_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0xa0000000, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3fa00000, 0xfffffffe, 0x000fffff, 0x00000000, };
8797static const MCPhysReg CSR_SVR64_ColdCC_R2_Altivec_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::X2, 0 };
8798static const uint32_t CSR_SVR64_ColdCC_R2_Altivec_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0xa0000000, 0x07fffe3f, 0x00000000, 0xffffffd8, 0xffffffdf, 0xffffffdf, 0x00000007, 0x00000000, 0x00000000, 0x3fa00000, 0xfffffffe, 0x000fffff, 0x00000000, };
8799static const MCPhysReg CSR_SVR64_ColdCC_R2_VSRP_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::VSRp0, PPC::VSRp1, PPC::VSRp2, PPC::VSRp3, PPC::VSRp4, PPC::VSRp5, PPC::VSRp6, PPC::VSRp7, PPC::VSRp8, PPC::VSRp9, PPC::VSRp10, PPC::VSRp11, PPC::VSRp12, PPC::VSRp13, PPC::VSRp14, PPC::VSRp15, PPC::VSRp16, PPC::VSRp18, PPC::VSRp19, PPC::VSRp20, PPC::VSRp21, PPC::VSRp22, PPC::VSRp23, PPC::VSRp24, PPC::VSRp25, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, PPC::X2, 0 };
8800static const uint32_t CSR_SVR64_ColdCC_R2_VSRP_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0xa0000000, 0x07fffe3f, 0x00000000, 0xffffff98, 0xffffff9f, 0xffffff9f, 0xffffffff, 0xffefffff, 0x00000007, 0x3fa00000, 0xfffffffe, 0x000fffff, 0x00000000, };
8801static const MCPhysReg CSR_SVR64_ColdCC_VSRP_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::VSRp0, PPC::VSRp1, PPC::VSRp2, PPC::VSRp3, PPC::VSRp4, PPC::VSRp5, PPC::VSRp6, PPC::VSRp7, PPC::VSRp8, PPC::VSRp9, PPC::VSRp10, PPC::VSRp11, PPC::VSRp12, PPC::VSRp13, PPC::VSRp14, PPC::VSRp15, PPC::VSRp16, PPC::VSRp18, PPC::VSRp19, PPC::VSRp20, PPC::VSRp21, PPC::VSRp22, PPC::VSRp23, PPC::VSRp24, PPC::VSRp25, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8802static const uint32_t CSR_SVR64_ColdCC_VSRP_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0x80000000, 0x07fffe3f, 0x00000000, 0xffffff98, 0xffffff9f, 0xffffff9f, 0xffffffff, 0xffefffff, 0x00000007, 0x3f800000, 0xfffffffe, 0x000fffff, 0x00000000, };
8803static const MCPhysReg CSR_SVR432_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, 0 };
8804static const uint32_t CSR_SVR432_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8805static const MCPhysReg CSR_SVR432_Altivec_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8806static const uint32_t CSR_SVR432_Altivec_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8807static const MCPhysReg CSR_SVR432_COMM_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, 0 };
8808static const uint32_t CSR_SVR432_COMM_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8809static const MCPhysReg CSR_SVR432_SPE_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::S14, PPC::S15, PPC::S16, PPC::S17, PPC::S18, PPC::S19, PPC::S20, PPC::S21, PPC::S22, PPC::S23, PPC::S24, PPC::S25, PPC::S26, PPC::S27, PPC::S28, PPC::S29, PPC::S30, 0 };
8810static const uint32_t CSR_SVR432_SPE_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01ffff00, 0x07fffe00, 0x03fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8811static const MCPhysReg CSR_SVR432_SPE_NO_S30_31_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::S14, PPC::S15, PPC::S16, PPC::S17, PPC::S18, PPC::S19, PPC::S20, PPC::S21, PPC::S22, PPC::S23, PPC::S24, PPC::S25, PPC::S26, PPC::S27, PPC::S28, PPC::S29, 0 };
8812static const uint32_t CSR_SVR432_SPE_NO_S30_31_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00ffff00, 0x07fffe00, 0x01fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8813static const MCPhysReg CSR_SVR432_VSRP_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8814static const uint32_t CSR_SVR432_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8815static const MCPhysReg CSR_SVR464_R2_VSRP_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, PPC::X2, 0 };
8816static const uint32_t CSR_SVR464_R2_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x20000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00200000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8817static const MCPhysReg CSR_SVR464_VSRP_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8818static const uint32_t CSR_SVR464_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00000000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8819static const MCPhysReg CSR_VSRP_SaveList[] = { PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8820static const uint32_t CSR_VSRP_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
8821
8822
8823ArrayRef<const uint32_t *> PPCGenRegisterInfo::getRegMasks() const {
8824 static const uint32_t *const Masks[] = {
8825 CSR_64_AllRegs_RegMask,
8826 CSR_64_AllRegs_AIX_Dflt_Altivec_RegMask,
8827 CSR_64_AllRegs_AIX_Dflt_VSX_RegMask,
8828 CSR_64_AllRegs_Altivec_RegMask,
8829 CSR_64_AllRegs_VSRP_RegMask,
8830 CSR_64_AllRegs_VSX_RegMask,
8831 CSR_AIX32_RegMask,
8832 CSR_AIX32_Altivec_RegMask,
8833 CSR_AIX32_VSRP_RegMask,
8834 CSR_AIX64_R2_VSRP_RegMask,
8835 CSR_AIX64_VSRP_RegMask,
8836 CSR_ALL_VSRP_RegMask,
8837 CSR_Altivec_RegMask,
8838 CSR_NoRegs_RegMask,
8839 CSR_PPC64_RegMask,
8840 CSR_PPC64_Altivec_RegMask,
8841 CSR_PPC64_R2_RegMask,
8842 CSR_PPC64_R2_Altivec_RegMask,
8843 CSR_SPE_RegMask,
8844 CSR_SPE_NO_S30_31_RegMask,
8845 CSR_SVR32_ColdCC_RegMask,
8846 CSR_SVR32_ColdCC_Altivec_RegMask,
8847 CSR_SVR32_ColdCC_Common_RegMask,
8848 CSR_SVR32_ColdCC_SPE_RegMask,
8849 CSR_SVR32_ColdCC_VSRP_RegMask,
8850 CSR_SVR64_ColdCC_RegMask,
8851 CSR_SVR64_ColdCC_Altivec_RegMask,
8852 CSR_SVR64_ColdCC_R2_RegMask,
8853 CSR_SVR64_ColdCC_R2_Altivec_RegMask,
8854 CSR_SVR64_ColdCC_R2_VSRP_RegMask,
8855 CSR_SVR64_ColdCC_VSRP_RegMask,
8856 CSR_SVR432_RegMask,
8857 CSR_SVR432_Altivec_RegMask,
8858 CSR_SVR432_COMM_RegMask,
8859 CSR_SVR432_SPE_RegMask,
8860 CSR_SVR432_SPE_NO_S30_31_RegMask,
8861 CSR_SVR432_VSRP_RegMask,
8862 CSR_SVR464_R2_VSRP_RegMask,
8863 CSR_SVR464_VSRP_RegMask,
8864 CSR_VSRP_RegMask,
8865 };
8866 return ArrayRef(Masks);
8867}
8868
8869bool PPCGenRegisterInfo::
8870isGeneralPurposeRegister(const MachineFunction &MF, MCRegister PhysReg) const {
8871 return
8872 false;
8873}
8874
8875bool PPCGenRegisterInfo::
8876isGeneralPurposeRegisterClass(const TargetRegisterClass *RC) const {
8877 return
8878 false;
8879}
8880
8881bool PPCGenRegisterInfo::
8882isFixedRegister(const MachineFunction &MF, MCRegister PhysReg) const {
8883 return
8884 false;
8885}
8886
8887bool PPCGenRegisterInfo::
8888isArgumentRegister(const MachineFunction &MF, MCRegister PhysReg) const {
8889 return
8890 false;
8891}
8892
8893bool PPCGenRegisterInfo::
8894isConstantPhysReg(MCRegister PhysReg) const {
8895 return
8896 PhysReg == PPC::ZERO ||
8897 PhysReg == PPC::ZERO8 ||
8898 false;
8899}
8900
8901ArrayRef<const char *> PPCGenRegisterInfo::getRegMaskNames() const {
8902 static const char *Names[] = {
8903 "CSR_64_AllRegs",
8904 "CSR_64_AllRegs_AIX_Dflt_Altivec",
8905 "CSR_64_AllRegs_AIX_Dflt_VSX",
8906 "CSR_64_AllRegs_Altivec",
8907 "CSR_64_AllRegs_VSRP",
8908 "CSR_64_AllRegs_VSX",
8909 "CSR_AIX32",
8910 "CSR_AIX32_Altivec",
8911 "CSR_AIX32_VSRP",
8912 "CSR_AIX64_R2_VSRP",
8913 "CSR_AIX64_VSRP",
8914 "CSR_ALL_VSRP",
8915 "CSR_Altivec",
8916 "CSR_NoRegs",
8917 "CSR_PPC64",
8918 "CSR_PPC64_Altivec",
8919 "CSR_PPC64_R2",
8920 "CSR_PPC64_R2_Altivec",
8921 "CSR_SPE",
8922 "CSR_SPE_NO_S30_31",
8923 "CSR_SVR32_ColdCC",
8924 "CSR_SVR32_ColdCC_Altivec",
8925 "CSR_SVR32_ColdCC_Common",
8926 "CSR_SVR32_ColdCC_SPE",
8927 "CSR_SVR32_ColdCC_VSRP",
8928 "CSR_SVR64_ColdCC",
8929 "CSR_SVR64_ColdCC_Altivec",
8930 "CSR_SVR64_ColdCC_R2",
8931 "CSR_SVR64_ColdCC_R2_Altivec",
8932 "CSR_SVR64_ColdCC_R2_VSRP",
8933 "CSR_SVR64_ColdCC_VSRP",
8934 "CSR_SVR432",
8935 "CSR_SVR432_Altivec",
8936 "CSR_SVR432_COMM",
8937 "CSR_SVR432_SPE",
8938 "CSR_SVR432_SPE_NO_S30_31",
8939 "CSR_SVR432_VSRP",
8940 "CSR_SVR464_R2_VSRP",
8941 "CSR_SVR464_VSRP",
8942 "CSR_VSRP",
8943 };
8944 return ArrayRef(Names);
8945}
8946
8947const PPCFrameLowering *
8948PPCGenRegisterInfo::getFrameLowering(const MachineFunction &MF) {
8949 return static_cast<const PPCFrameLowering *>(
8950 MF.getSubtarget().getFrameLowering());
8951}
8952
8953} // end namespace llvm
8954
8955