1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target Register and Register Classes Information *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9namespace llvm {
10
11extern const MCRegisterClass PPCMCRegisterClasses[];
12
13static const MVT::SimpleValueType VTLists[] = {
14 /* 0 */ MVT::i1, MVT::Other,
15 /* 2 */ MVT::i32, MVT::Other,
16 /* 4 */ MVT::i64, MVT::Other,
17 /* 6 */ MVT::i32, MVT::f32, MVT::Other,
18 /* 9 */ MVT::i64, MVT::f64, MVT::Other,
19 /* 12 */ MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v1i128, MVT::v4f32, MVT::v2f64, MVT::f128, MVT::Other,
20 /* 21 */ MVT::ppcf128, MVT::Other,
21 /* 23 */ MVT::v128i1, MVT::Other,
22 /* 25 */ MVT::v256i1, MVT::Other,
23 /* 27 */ MVT::v512i1, MVT::Other,
24 /* 29 */ MVT::v1024i1, MVT::Other,
25 /* 31 */ MVT::v2048i1, MVT::Other,
26 /* 33 */ MVT::v4i32, MVT::v4f32, MVT::v2f64, MVT::v2i64, MVT::Other,
27 /* 38 */ MVT::Untyped, MVT::Other,
28};
29
30#ifdef __GNUC__
31#pragma GCC diagnostic push
32#pragma GCC diagnostic ignored "-Woverlength-strings"
33#endif
34static constexpr char PPCSubRegIndexStrings[] = {
35 /* 0 */ "sub_fp0\000"
36 /* 8 */ "sub_dmr1_then_sub_dmrrowp0\000"
37 /* 35 */ "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0\000"
38 /* 79 */ "sub_pair0\000"
39 /* 89 */ "sub_dmr0\000"
40 /* 98 */ "sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0\000"
41 /* 142 */ "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0\000"
42 /* 203 */ "sub_dmr1_then_sub_dmrrow0\000"
43 /* 229 */ "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0\000"
44 /* 272 */ "sub_gp8_x0\000"
45 /* 283 */ "sub_pair1_then_sub_vsx0\000"
46 /* 307 */ "sub_fp1\000"
47 /* 315 */ "sub_dmr1_then_sub_dmrrowp1\000"
48 /* 342 */ "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1\000"
49 /* 386 */ "sub_pair1\000"
50 /* 396 */ "sub_dmr1\000"
51 /* 405 */ "sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1\000"
52 /* 449 */ "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1\000"
53 /* 510 */ "sub_dmr1_then_sub_dmrrow1\000"
54 /* 536 */ "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1\000"
55 /* 579 */ "sub_gp8_x1\000"
56 /* 590 */ "sub_pair1_then_sub_vsx1\000"
57 /* 614 */ "sub_gp8_x1_then_sub_32\000"
58 /* 637 */ "sub_pair1_then_sub_64\000"
59 /* 659 */ "sub_pair1_then_sub_vsx1_then_sub_64\000"
60 /* 695 */ "sub_dmr1_then_sub_wacc_hi\000"
61 /* 721 */ "sub_un\000"
62 /* 728 */ "sub_dmr1_then_sub_wacc_lo\000"
63 /* 754 */ "sub_eq\000"
64 /* 761 */ "sub_gt\000"
65 /* 768 */ "sub_lt\000"
66 /* 775 */ "sub_32_hi_phony\000"
67 /* 791 */ "sub_pair1_then_sub_64_hi_phony\000"
68 /* 822 */ "sub_pair1_then_sub_vsx1_then_sub_64_hi_phony\000"
69};
70#ifdef __GNUC__
71#pragma GCC diagnostic pop
72#endif
73
74
75static constexpr uint32_t PPCSubRegIndexNameOffsets[] = {
76 630,
77 775,
78 652,
79 806,
80 89,
81 396,
82 130,
83 437,
84 22,
85 329,
86 754,
87 0,
88 307,
89 272,
90 579,
91 761,
92 768,
93 79,
94 386,
95 721,
96 298,
97 605,
98 709,
99 742,
100 674,
101 837,
102 637,
103 791,
104 283,
105 590,
106 659,
107 822,
108 112,
109 419,
110 243,
111 550,
112 49,
113 356,
114 156,
115 463,
116 203,
117 510,
118 8,
119 315,
120 695,
121 728,
122 98,
123 405,
124 229,
125 536,
126 35,
127 342,
128 142,
129 449,
130 614,
131};
132
133static const TargetRegisterInfo::SubRegCoveredBits SubRegIdxRangeTable[] = {
134 { .Offset: 65535, .Size: 65535 },
135 { .Offset: 0, .Size: 32 }, // sub_32
136 { .Offset: 32, .Size: 32 }, // sub_32_hi_phony
137 { .Offset: 0, .Size: 64 }, // sub_64
138 { .Offset: 64, .Size: 64 }, // sub_64_hi_phony
139 { .Offset: 0, .Size: 1024 }, // sub_dmr0
140 { .Offset: 1024, .Size: 1024 }, // sub_dmr1
141 { .Offset: 0, .Size: 128 }, // sub_dmrrow0
142 { .Offset: 128, .Size: 128 }, // sub_dmrrow1
143 { .Offset: 0, .Size: 256 }, // sub_dmrrowp0
144 { .Offset: 256, .Size: 256 }, // sub_dmrrowp1
145 { .Offset: 2, .Size: 1 }, // sub_eq
146 { .Offset: 0, .Size: 64 }, // sub_fp0
147 { .Offset: 64, .Size: 64 }, // sub_fp1
148 { .Offset: 0, .Size: 64 }, // sub_gp8_x0
149 { .Offset: 64, .Size: 64 }, // sub_gp8_x1
150 { .Offset: 1, .Size: 1 }, // sub_gt
151 { .Offset: 0, .Size: 1 }, // sub_lt
152 { .Offset: 0, .Size: 256 }, // sub_pair0
153 { .Offset: 256, .Size: 256 }, // sub_pair1
154 { .Offset: 3, .Size: 1 }, // sub_un
155 { .Offset: 0, .Size: 128 }, // sub_vsx0
156 { .Offset: 128, .Size: 128 }, // sub_vsx1
157 { .Offset: 512, .Size: 512 }, // sub_wacc_hi
158 { .Offset: 0, .Size: 512 }, // sub_wacc_lo
159 { .Offset: 128, .Size: 64 }, // sub_vsx1_then_sub_64
160 { .Offset: 192, .Size: 64 }, // sub_vsx1_then_sub_64_hi_phony
161 { .Offset: 256, .Size: 64 }, // sub_pair1_then_sub_64
162 { .Offset: 320, .Size: 64 }, // sub_pair1_then_sub_64_hi_phony
163 { .Offset: 256, .Size: 128 }, // sub_pair1_then_sub_vsx0
164 { .Offset: 384, .Size: 128 }, // sub_pair1_then_sub_vsx1
165 { .Offset: 384, .Size: 64 }, // sub_pair1_then_sub_vsx1_then_sub_64
166 { .Offset: 448, .Size: 64 }, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
167 { .Offset: 256, .Size: 128 }, // sub_dmrrowp1_then_sub_dmrrow0
168 { .Offset: 384, .Size: 128 }, // sub_dmrrowp1_then_sub_dmrrow1
169 { .Offset: 512, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrow0
170 { .Offset: 640, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrow1
171 { .Offset: 512, .Size: 256 }, // sub_wacc_hi_then_sub_dmrrowp0
172 { .Offset: 768, .Size: 256 }, // sub_wacc_hi_then_sub_dmrrowp1
173 { .Offset: 768, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
174 { .Offset: 896, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
175 { .Offset: 1024, .Size: 128 }, // sub_dmr1_then_sub_dmrrow0
176 { .Offset: 1152, .Size: 128 }, // sub_dmr1_then_sub_dmrrow1
177 { .Offset: 1024, .Size: 256 }, // sub_dmr1_then_sub_dmrrowp0
178 { .Offset: 1280, .Size: 256 }, // sub_dmr1_then_sub_dmrrowp1
179 { .Offset: 1536, .Size: 512 }, // sub_dmr1_then_sub_wacc_hi
180 { .Offset: 1024, .Size: 512 }, // sub_dmr1_then_sub_wacc_lo
181 { .Offset: 1280, .Size: 128 }, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
182 { .Offset: 1408, .Size: 128 }, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
183 { .Offset: 1536, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
184 { .Offset: 1664, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
185 { .Offset: 1536, .Size: 256 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
186 { .Offset: 1792, .Size: 256 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
187 { .Offset: 1792, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
188 { .Offset: 1920, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
189 { .Offset: 64, .Size: 32 }, // sub_gp8_x1_then_sub_32
190 { .Offset: 65535, .Size: 65535 },
191 { .Offset: 0, .Size: 32 }, // sub_32
192 { .Offset: 32, .Size: 32 }, // sub_32_hi_phony
193 { .Offset: 0, .Size: 64 }, // sub_64
194 { .Offset: 64, .Size: 64 }, // sub_64_hi_phony
195 { .Offset: 0, .Size: 1024 }, // sub_dmr0
196 { .Offset: 1024, .Size: 1024 }, // sub_dmr1
197 { .Offset: 0, .Size: 128 }, // sub_dmrrow0
198 { .Offset: 128, .Size: 128 }, // sub_dmrrow1
199 { .Offset: 0, .Size: 256 }, // sub_dmrrowp0
200 { .Offset: 256, .Size: 256 }, // sub_dmrrowp1
201 { .Offset: 2, .Size: 1 }, // sub_eq
202 { .Offset: 0, .Size: 64 }, // sub_fp0
203 { .Offset: 64, .Size: 64 }, // sub_fp1
204 { .Offset: 0, .Size: 64 }, // sub_gp8_x0
205 { .Offset: 64, .Size: 64 }, // sub_gp8_x1
206 { .Offset: 1, .Size: 1 }, // sub_gt
207 { .Offset: 0, .Size: 1 }, // sub_lt
208 { .Offset: 0, .Size: 256 }, // sub_pair0
209 { .Offset: 256, .Size: 256 }, // sub_pair1
210 { .Offset: 3, .Size: 1 }, // sub_un
211 { .Offset: 0, .Size: 128 }, // sub_vsx0
212 { .Offset: 128, .Size: 128 }, // sub_vsx1
213 { .Offset: 512, .Size: 512 }, // sub_wacc_hi
214 { .Offset: 0, .Size: 512 }, // sub_wacc_lo
215 { .Offset: 128, .Size: 64 }, // sub_vsx1_then_sub_64
216 { .Offset: 192, .Size: 64 }, // sub_vsx1_then_sub_64_hi_phony
217 { .Offset: 256, .Size: 64 }, // sub_pair1_then_sub_64
218 { .Offset: 320, .Size: 64 }, // sub_pair1_then_sub_64_hi_phony
219 { .Offset: 256, .Size: 128 }, // sub_pair1_then_sub_vsx0
220 { .Offset: 384, .Size: 128 }, // sub_pair1_then_sub_vsx1
221 { .Offset: 384, .Size: 64 }, // sub_pair1_then_sub_vsx1_then_sub_64
222 { .Offset: 448, .Size: 64 }, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
223 { .Offset: 256, .Size: 128 }, // sub_dmrrowp1_then_sub_dmrrow0
224 { .Offset: 384, .Size: 128 }, // sub_dmrrowp1_then_sub_dmrrow1
225 { .Offset: 512, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrow0
226 { .Offset: 640, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrow1
227 { .Offset: 512, .Size: 256 }, // sub_wacc_hi_then_sub_dmrrowp0
228 { .Offset: 768, .Size: 256 }, // sub_wacc_hi_then_sub_dmrrowp1
229 { .Offset: 768, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
230 { .Offset: 896, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
231 { .Offset: 1024, .Size: 128 }, // sub_dmr1_then_sub_dmrrow0
232 { .Offset: 1152, .Size: 128 }, // sub_dmr1_then_sub_dmrrow1
233 { .Offset: 1024, .Size: 256 }, // sub_dmr1_then_sub_dmrrowp0
234 { .Offset: 1280, .Size: 256 }, // sub_dmr1_then_sub_dmrrowp1
235 { .Offset: 1536, .Size: 512 }, // sub_dmr1_then_sub_wacc_hi
236 { .Offset: 1024, .Size: 512 }, // sub_dmr1_then_sub_wacc_lo
237 { .Offset: 1280, .Size: 128 }, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
238 { .Offset: 1408, .Size: 128 }, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
239 { .Offset: 1536, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
240 { .Offset: 1664, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
241 { .Offset: 1536, .Size: 256 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
242 { .Offset: 1792, .Size: 256 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
243 { .Offset: 1792, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
244 { .Offset: 1920, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
245 { .Offset: 64, .Size: 32 }, // sub_gp8_x1_then_sub_32
246};
247
248
249static const LaneBitmask SubRegIndexLaneMaskTable[] = {
250 LaneBitmask::getAll(),
251 LaneBitmask(0x0000000000000001), // sub_32
252 LaneBitmask(0x0000000000000002), // sub_32_hi_phony
253 LaneBitmask(0x0000000000000004), // sub_64
254 LaneBitmask(0x0000000000000008), // sub_64_hi_phony
255 LaneBitmask(0x0000000000FC0030), // sub_dmr0
256 LaneBitmask(0x00000000FF000000), // sub_dmr1
257 LaneBitmask(0x0000000000000010), // sub_dmrrow0
258 LaneBitmask(0x0000000000000020), // sub_dmrrow1
259 LaneBitmask(0x0000000000000030), // sub_dmrrowp0
260 LaneBitmask(0x00000000000C0000), // sub_dmrrowp1
261 LaneBitmask(0x0000000000000040), // sub_eq
262 LaneBitmask(0x0000000000000080), // sub_fp0
263 LaneBitmask(0x0000000000000100), // sub_fp1
264 LaneBitmask(0x0000000000000001), // sub_gp8_x0
265 LaneBitmask(0x0000000100000000), // sub_gp8_x1
266 LaneBitmask(0x0000000000000200), // sub_gt
267 LaneBitmask(0x0000000000000400), // sub_lt
268 LaneBitmask(0x000000000000300C), // sub_pair0
269 LaneBitmask(0x000000000003C000), // sub_pair1
270 LaneBitmask(0x0000000000000800), // sub_un
271 LaneBitmask(0x000000000000000C), // sub_vsx0
272 LaneBitmask(0x0000000000003000), // sub_vsx1
273 LaneBitmask(0x0000000000F00000), // sub_wacc_hi
274 LaneBitmask(0x00000000000C0030), // sub_wacc_lo
275 LaneBitmask(0x0000000000001000), // sub_vsx1_then_sub_64
276 LaneBitmask(0x0000000000002000), // sub_vsx1_then_sub_64_hi_phony
277 LaneBitmask(0x0000000000004000), // sub_pair1_then_sub_64
278 LaneBitmask(0x0000000000008000), // sub_pair1_then_sub_64_hi_phony
279 LaneBitmask(0x000000000000C000), // sub_pair1_then_sub_vsx0
280 LaneBitmask(0x0000000000030000), // sub_pair1_then_sub_vsx1
281 LaneBitmask(0x0000000000010000), // sub_pair1_then_sub_vsx1_then_sub_64
282 LaneBitmask(0x0000000000020000), // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
283 LaneBitmask(0x0000000000040000), // sub_dmrrowp1_then_sub_dmrrow0
284 LaneBitmask(0x0000000000080000), // sub_dmrrowp1_then_sub_dmrrow1
285 LaneBitmask(0x0000000000100000), // sub_wacc_hi_then_sub_dmrrow0
286 LaneBitmask(0x0000000000200000), // sub_wacc_hi_then_sub_dmrrow1
287 LaneBitmask(0x0000000000300000), // sub_wacc_hi_then_sub_dmrrowp0
288 LaneBitmask(0x0000000000C00000), // sub_wacc_hi_then_sub_dmrrowp1
289 LaneBitmask(0x0000000000400000), // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
290 LaneBitmask(0x0000000000800000), // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
291 LaneBitmask(0x0000000001000000), // sub_dmr1_then_sub_dmrrow0
292 LaneBitmask(0x0000000002000000), // sub_dmr1_then_sub_dmrrow1
293 LaneBitmask(0x0000000003000000), // sub_dmr1_then_sub_dmrrowp0
294 LaneBitmask(0x000000000C000000), // sub_dmr1_then_sub_dmrrowp1
295 LaneBitmask(0x00000000F0000000), // sub_dmr1_then_sub_wacc_hi
296 LaneBitmask(0x000000000F000000), // sub_dmr1_then_sub_wacc_lo
297 LaneBitmask(0x0000000004000000), // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
298 LaneBitmask(0x0000000008000000), // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
299 LaneBitmask(0x0000000010000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
300 LaneBitmask(0x0000000020000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
301 LaneBitmask(0x0000000030000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
302 LaneBitmask(0x00000000C0000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
303 LaneBitmask(0x0000000040000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
304 LaneBitmask(0x0000000080000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
305 LaneBitmask(0x0000000100000000), // sub_gp8_x1_then_sub_32
306 };
307
308
309
310static const TargetRegisterInfo::RegClassInfo RegClassInfos[] = {
311 // Mode = 0 (DefaultMode)
312 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 7 }, // VSSRC
313 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 6 }, // GPRC
314 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 6 }, // GPRC_NOR0
315 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 6 }, // GPRC_and_GPRC_NOR0
316 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 0 }, // CRBITRC
317 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 7 }, // F4RC
318 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 6 }, // GPRC32
319 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 2 }, // CRRC
320 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 2 }, // CARRYRC
321 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 2 }, // CTRRC
322 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 2 }, // LRRC
323 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 2 }, // VRSAVERC
324 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 9 }, // SPILLTOVSRRC
325 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // VSFRC
326 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 4 }, // G8RC
327 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 4 }, // G8RC_NOX0
328 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_VSFRC
329 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 4 }, // G8RC_and_G8RC_NOX0
330 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // F8RC
331 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // FHRC
332 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // SPERC
333 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // VFHRC
334 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // VFRC
335 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // SPERC_with_sub_32_in_GPRC_NOR0
336 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_VFRC
337 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_F4RC
338 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 4 }, // CTRRC8
339 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 4 }, // LR8RC
340 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 23 }, // DMRROWRC
341 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 33 }, // VSRC
342 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 33 }, // VSRC_with_sub_64_in_SPILLTOVSRRC
343 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 12 }, // VRRC
344 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 33 }, // VSLRC
345 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 12 }, // VRRC_with_sub_64_in_SPILLTOVSRRC
346 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 21 }, // FpRC
347 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 38 }, // G8pRC
348 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 38 }, // G8pRC_with_sub_32_in_GPRC_NOR0
349 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 33 }, // VSLRC_with_sub_64_in_SPILLTOVSRRC
350 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 21 }, // FpRC_with_sub_fp0_in_SPILLTOVSRRC
351 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // DMRROWpRC
352 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC
353 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC
354 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_F4RC
355 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_VFRC
356 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
357 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
358 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // ACCRC
359 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // UACCRC
360 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // WACCRC
361 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // WACC_HIRC
362 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // ACCRC_with_sub_64_in_SPILLTOVSRRC
363 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // UACCRC_with_sub_64_in_SPILLTOVSRRC
364 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
365 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
366 { .RegSize: 1024, .SpillSize: 1024, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 29 }, // DMRRC
367 { .RegSize: 2048, .SpillSize: 2048, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 31 }, // DMRpRC
368 // Mode = 1 (PPC64)
369 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 7 }, // VSSRC
370 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 6 }, // GPRC
371 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 6 }, // GPRC_NOR0
372 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 6 }, // GPRC_and_GPRC_NOR0
373 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 0 }, // CRBITRC
374 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 7 }, // F4RC
375 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 6 }, // GPRC32
376 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 2 }, // CRRC
377 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 2 }, // CARRYRC
378 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 2 }, // CTRRC
379 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 2 }, // LRRC
380 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*VTLists+*/.VTListOffset: 2 }, // VRSAVERC
381 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 9 }, // SPILLTOVSRRC
382 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // VSFRC
383 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 4 }, // G8RC
384 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 4 }, // G8RC_NOX0
385 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_VSFRC
386 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 4 }, // G8RC_and_G8RC_NOX0
387 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // F8RC
388 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // FHRC
389 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // SPERC
390 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // VFHRC
391 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // VFRC
392 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // SPERC_with_sub_32_in_GPRC_NOR0
393 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_VFRC
394 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_F4RC
395 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 4 }, // CTRRC8
396 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*VTLists+*/.VTListOffset: 4 }, // LR8RC
397 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 23 }, // DMRROWRC
398 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 33 }, // VSRC
399 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 33 }, // VSRC_with_sub_64_in_SPILLTOVSRRC
400 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 12 }, // VRRC
401 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 33 }, // VSLRC
402 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 12 }, // VRRC_with_sub_64_in_SPILLTOVSRRC
403 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 21 }, // FpRC
404 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 38 }, // G8pRC
405 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 38 }, // G8pRC_with_sub_32_in_GPRC_NOR0
406 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 33 }, // VSLRC_with_sub_64_in_SPILLTOVSRRC
407 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 21 }, // FpRC_with_sub_fp0_in_SPILLTOVSRRC
408 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // DMRROWpRC
409 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC
410 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC
411 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_F4RC
412 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_VFRC
413 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
414 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
415 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // ACCRC
416 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // UACCRC
417 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // WACCRC
418 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // WACC_HIRC
419 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // ACCRC_with_sub_64_in_SPILLTOVSRRC
420 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // UACCRC_with_sub_64_in_SPILLTOVSRRC
421 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
422 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 27 }, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
423 { .RegSize: 1024, .SpillSize: 1024, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 29 }, // DMRRC
424 { .RegSize: 2048, .SpillSize: 2048, .SpillAlignment: 128, /*VTLists+*/.VTListOffset: 31 }, // DMRpRC
425};
426static const uint32_t VSSRCSubClassMask[] = {
427 0x03452021, 0x00000000,
428 0xe0000000, 0x003cff23, // sub_64
429 0x00000000, 0x00000044, // sub_fp0
430 0x00000000, 0x00000044, // sub_fp1
431 0x00000000, 0x003cff00, // sub_vsx1_then_sub_64
432 0x00000000, 0x003cc000, // sub_pair1_then_sub_64
433 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1_then_sub_64
434};
435
436static const uint32_t GPRCSubClassMask[] = {
437 0x0000000a, 0x00000000,
438 0x00924000, 0x00000018, // sub_32
439 0x00000000, 0x00000018, // sub_gp8_x1_then_sub_32
440};
441
442static const uint32_t GPRC_NOR0SubClassMask[] = {
443 0x0000000c, 0x00000000,
444 0x00828000, 0x00000010, // sub_32
445 0x00000000, 0x00000018, // sub_gp8_x1_then_sub_32
446};
447
448static const uint32_t GPRC_and_GPRC_NOR0SubClassMask[] = {
449 0x00000008, 0x00000000,
450 0x00820000, 0x00000010, // sub_32
451 0x00000000, 0x00000018, // sub_gp8_x1_then_sub_32
452};
453
454static const uint32_t CRBITRCSubClassMask[] = {
455 0x00000010, 0x00000000,
456 0x00000080, 0x00000000, // sub_eq
457 0x00000080, 0x00000000, // sub_gt
458 0x00000080, 0x00000000, // sub_lt
459 0x00000080, 0x00000000, // sub_un
460};
461
462static const uint32_t F4RCSubClassMask[] = {
463 0x02040020, 0x00000000,
464 0x00000000, 0x003ce421, // sub_64
465 0x00000000, 0x00000044, // sub_fp0
466 0x00000000, 0x00000044, // sub_fp1
467 0x00000000, 0x003ce400, // sub_vsx1_then_sub_64
468 0x00000000, 0x003cc000, // sub_pair1_then_sub_64
469 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1_then_sub_64
470};
471
472static const uint32_t GPRC32SubClassMask[] = {
473 0x00000040, 0x00000000,
474};
475
476static const uint32_t CRRCSubClassMask[] = {
477 0x00000080, 0x00000000,
478};
479
480static const uint32_t CARRYRCSubClassMask[] = {
481 0x00000100, 0x00000000,
482};
483
484static const uint32_t CTRRCSubClassMask[] = {
485 0x00000200, 0x00000000,
486};
487
488static const uint32_t LRRCSubClassMask[] = {
489 0x00000400, 0x00000000,
490};
491
492static const uint32_t VRSAVERCSubClassMask[] = {
493 0x00000800, 0x00000000,
494};
495
496static const uint32_t SPILLTOVSRRCSubClassMask[] = {
497 0x03035000, 0x00000000,
498 0x40000000, 0x003c3222, // sub_64
499 0x00000000, 0x00000040, // sub_fp0
500 0x00000000, 0x00000040, // sub_fp1
501 0x00000000, 0x00000018, // sub_gp8_x0
502 0x00000000, 0x00000018, // sub_gp8_x1
503 0x00000000, 0x003c3200, // sub_vsx1_then_sub_64
504 0x00000000, 0x00300000, // sub_pair1_then_sub_64
505 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx1_then_sub_64
506};
507
508static const uint32_t VSFRCSubClassMask[] = {
509 0x03452000, 0x00000000,
510 0xe0000000, 0x003cff23, // sub_64
511 0x00000000, 0x00000044, // sub_fp0
512 0x00000000, 0x00000044, // sub_fp1
513 0x00000000, 0x003cff00, // sub_vsx1_then_sub_64
514 0x00000000, 0x003cc000, // sub_pair1_then_sub_64
515 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1_then_sub_64
516};
517
518static const uint32_t G8RCSubClassMask[] = {
519 0x00024000, 0x00000000,
520 0x00000000, 0x00000018, // sub_gp8_x0
521 0x00000000, 0x00000018, // sub_gp8_x1
522};
523
524static const uint32_t G8RC_NOX0SubClassMask[] = {
525 0x00028000, 0x00000000,
526 0x00000000, 0x00000010, // sub_gp8_x0
527 0x00000000, 0x00000018, // sub_gp8_x1
528};
529
530static const uint32_t SPILLTOVSRRC_and_VSFRCSubClassMask[] = {
531 0x03010000, 0x00000000,
532 0x40000000, 0x003c3222, // sub_64
533 0x00000000, 0x00000040, // sub_fp0
534 0x00000000, 0x00000040, // sub_fp1
535 0x00000000, 0x003c3200, // sub_vsx1_then_sub_64
536 0x00000000, 0x00300000, // sub_pair1_then_sub_64
537 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx1_then_sub_64
538};
539
540static const uint32_t G8RC_and_G8RC_NOX0SubClassMask[] = {
541 0x00020000, 0x00000000,
542 0x00000000, 0x00000010, // sub_gp8_x0
543 0x00000000, 0x00000018, // sub_gp8_x1
544};
545
546static const uint32_t F8RCSubClassMask[] = {
547 0x02040000, 0x00000000,
548 0x00000000, 0x003ce421, // sub_64
549 0x00000000, 0x00000044, // sub_fp0
550 0x00000000, 0x00000044, // sub_fp1
551 0x00000000, 0x003ce400, // sub_vsx1_then_sub_64
552 0x00000000, 0x003cc000, // sub_pair1_then_sub_64
553 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1_then_sub_64
554};
555
556static const uint32_t FHRCSubClassMask[] = {
557 0x00080000, 0x00000000,
558};
559
560static const uint32_t SPERCSubClassMask[] = {
561 0x00900000, 0x00000000,
562};
563
564static const uint32_t VFHRCSubClassMask[] = {
565 0x00200000, 0x00000000,
566};
567
568static const uint32_t VFRCSubClassMask[] = {
569 0x01400000, 0x00000000,
570 0x80000000, 0x00001802, // sub_64
571 0x00000000, 0x00001800, // sub_vsx1_then_sub_64
572};
573
574static const uint32_t SPERC_with_sub_32_in_GPRC_NOR0SubClassMask[] = {
575 0x00800000, 0x00000000,
576};
577
578static const uint32_t SPILLTOVSRRC_and_VFRCSubClassMask[] = {
579 0x01000000, 0x00000000,
580 0x00000000, 0x00001002, // sub_64
581 0x00000000, 0x00001000, // sub_vsx1_then_sub_64
582};
583
584static const uint32_t SPILLTOVSRRC_and_F4RCSubClassMask[] = {
585 0x02000000, 0x00000000,
586 0x00000000, 0x003c2020, // sub_64
587 0x00000000, 0x00000040, // sub_fp0
588 0x00000000, 0x00000040, // sub_fp1
589 0x00000000, 0x003c2000, // sub_vsx1_then_sub_64
590 0x00000000, 0x00300000, // sub_pair1_then_sub_64
591 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx1_then_sub_64
592};
593
594static const uint32_t CTRRC8SubClassMask[] = {
595 0x04000000, 0x00000000,
596};
597
598static const uint32_t LR8RCSubClassMask[] = {
599 0x08000000, 0x00000000,
600};
601
602static const uint32_t DMRROWRCSubClassMask[] = {
603 0x10000000, 0x00000000,
604 0x00000000, 0x00c30080, // sub_dmrrow0
605 0x00000000, 0x00c30080, // sub_dmrrow1
606 0x00000000, 0x00c30000, // sub_dmrrowp1_then_sub_dmrrow0
607 0x00000000, 0x00c30000, // sub_dmrrowp1_then_sub_dmrrow1
608 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrow0
609 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrow1
610 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
611 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
612 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrow0
613 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrow1
614 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
615 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
616 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
617 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
618 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
619 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
620};
621
622static const uint32_t VSRCSubClassMask[] = {
623 0xe0000000, 0x00000023,
624 0x00000000, 0x003cff00, // sub_vsx0
625 0x00000000, 0x003cff00, // sub_vsx1
626 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx0
627 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1
628};
629
630static const uint32_t VSRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
631 0x40000000, 0x00000022,
632 0x00000000, 0x003c3200, // sub_vsx0
633 0x00000000, 0x003c3200, // sub_vsx1
634 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx0
635 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx1
636};
637
638static const uint32_t VRRCSubClassMask[] = {
639 0x80000000, 0x00000002,
640 0x00000000, 0x00001800, // sub_vsx0
641 0x00000000, 0x00001800, // sub_vsx1
642};
643
644static const uint32_t VSLRCSubClassMask[] = {
645 0x00000000, 0x00000021,
646 0x00000000, 0x003ce400, // sub_vsx0
647 0x00000000, 0x003ce400, // sub_vsx1
648 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx0
649 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1
650};
651
652static const uint32_t VRRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
653 0x00000000, 0x00000002,
654 0x00000000, 0x00001000, // sub_vsx0
655 0x00000000, 0x00001000, // sub_vsx1
656};
657
658static const uint32_t FpRCSubClassMask[] = {
659 0x00000000, 0x00000044,
660};
661
662static const uint32_t G8pRCSubClassMask[] = {
663 0x00000000, 0x00000018,
664};
665
666static const uint32_t G8pRC_with_sub_32_in_GPRC_NOR0SubClassMask[] = {
667 0x00000000, 0x00000010,
668};
669
670static const uint32_t VSLRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
671 0x00000000, 0x00000020,
672 0x00000000, 0x003c2000, // sub_vsx0
673 0x00000000, 0x003c2000, // sub_vsx1
674 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx0
675 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx1
676};
677
678static const uint32_t FpRC_with_sub_fp0_in_SPILLTOVSRRCSubClassMask[] = {
679 0x00000000, 0x00000040,
680};
681
682static const uint32_t DMRROWpRCSubClassMask[] = {
683 0x00000000, 0x00000080,
684 0x00000000, 0x00c30000, // sub_dmrrowp0
685 0x00000000, 0x00c30000, // sub_dmrrowp1
686 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrowp0
687 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrowp1
688 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrowp0
689 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrowp1
690 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
691 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
692};
693
694static const uint32_t VSRpRCSubClassMask[] = {
695 0x00000000, 0x00003f00,
696 0x00000000, 0x003cc000, // sub_pair0
697 0x00000000, 0x003cc000, // sub_pair1
698};
699
700static const uint32_t VSRpRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
701 0x00000000, 0x00003200,
702 0x00000000, 0x003c0000, // sub_pair0
703 0x00000000, 0x00300000, // sub_pair1
704};
705
706static const uint32_t VSRpRC_with_sub_64_in_F4RCSubClassMask[] = {
707 0x00000000, 0x00002400,
708 0x00000000, 0x003cc000, // sub_pair0
709 0x00000000, 0x003cc000, // sub_pair1
710};
711
712static const uint32_t VSRpRC_with_sub_64_in_VFRCSubClassMask[] = {
713 0x00000000, 0x00001800,
714};
715
716static const uint32_t VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCSubClassMask[] = {
717 0x00000000, 0x00001000,
718};
719
720static const uint32_t VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCSubClassMask[] = {
721 0x00000000, 0x00002000,
722 0x00000000, 0x003c0000, // sub_pair0
723 0x00000000, 0x00300000, // sub_pair1
724};
725
726static const uint32_t ACCRCSubClassMask[] = {
727 0x00000000, 0x00144000,
728};
729
730static const uint32_t UACCRCSubClassMask[] = {
731 0x00000000, 0x00288000,
732};
733
734static const uint32_t WACCRCSubClassMask[] = {
735 0x00000000, 0x00010000,
736 0x00000000, 0x00c00000, // sub_wacc_lo
737 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_lo
738};
739
740static const uint32_t WACC_HIRCSubClassMask[] = {
741 0x00000000, 0x00020000,
742 0x00000000, 0x00c00000, // sub_wacc_hi
743 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi
744};
745
746static const uint32_t ACCRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
747 0x00000000, 0x00140000,
748};
749
750static const uint32_t UACCRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
751 0x00000000, 0x00280000,
752};
753
754static const uint32_t ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
755 0x00000000, 0x00100000,
756};
757
758static const uint32_t UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
759 0x00000000, 0x00200000,
760};
761
762static const uint32_t DMRRCSubClassMask[] = {
763 0x00000000, 0x00400000,
764 0x00000000, 0x00800000, // sub_dmr0
765 0x00000000, 0x00800000, // sub_dmr1
766};
767
768static const uint32_t DMRpRCSubClassMask[] = {
769 0x00000000, 0x00800000,
770};
771
772static const uint16_t SuperRegIdxSeqs[] = {
773 /* 0 */ 5, 6, 0,
774 /* 3 */ 14, 15, 0,
775 /* 6 */ 18, 19, 0,
776 /* 9 */ 11, 16, 17, 20, 0,
777 /* 14 */ 21, 22, 0,
778 /* 17 */ 3, 25, 0,
779 /* 20 */ 21, 22, 29, 30, 0,
780 /* 25 */ 3, 12, 13, 25, 27, 31, 0,
781 /* 32 */ 3, 12, 13, 14, 15, 25, 27, 31, 0,
782 /* 41 */ 23, 45, 0,
783 /* 44 */ 24, 46, 0,
784 /* 47 */ 9, 10, 37, 38, 43, 44, 51, 52, 0,
785 /* 56 */ 7, 8, 33, 34, 35, 36, 39, 40, 41, 42, 47, 48, 49, 50, 53, 54, 0,
786 /* 73 */ 1, 55, 0,
787};
788
789static unsigned const GPRC_and_GPRC_NOR0Superclasses[] = {
790 PPC::GPRCRegClassID,
791 PPC::GPRC_NOR0RegClassID,
792};
793
794static unsigned const F4RCSuperclasses[] = {
795 PPC::VSSRCRegClassID,
796};
797
798static unsigned const VSFRCSuperclasses[] = {
799 PPC::VSSRCRegClassID,
800};
801
802static unsigned const G8RCSuperclasses[] = {
803 PPC::SPILLTOVSRRCRegClassID,
804};
805
806static unsigned const SPILLTOVSRRC_and_VSFRCSuperclasses[] = {
807 PPC::VSSRCRegClassID,
808 PPC::SPILLTOVSRRCRegClassID,
809 PPC::VSFRCRegClassID,
810};
811
812static unsigned const G8RC_and_G8RC_NOX0Superclasses[] = {
813 PPC::SPILLTOVSRRCRegClassID,
814 PPC::G8RCRegClassID,
815 PPC::G8RC_NOX0RegClassID,
816};
817
818static unsigned const F8RCSuperclasses[] = {
819 PPC::VSSRCRegClassID,
820 PPC::F4RCRegClassID,
821 PPC::VSFRCRegClassID,
822};
823
824static unsigned const VFRCSuperclasses[] = {
825 PPC::VSSRCRegClassID,
826 PPC::VSFRCRegClassID,
827};
828
829static unsigned const SPERC_with_sub_32_in_GPRC_NOR0Superclasses[] = {
830 PPC::SPERCRegClassID,
831};
832
833static unsigned const SPILLTOVSRRC_and_VFRCSuperclasses[] = {
834 PPC::VSSRCRegClassID,
835 PPC::SPILLTOVSRRCRegClassID,
836 PPC::VSFRCRegClassID,
837 PPC::SPILLTOVSRRC_and_VSFRCRegClassID,
838 PPC::VFRCRegClassID,
839};
840
841static unsigned const SPILLTOVSRRC_and_F4RCSuperclasses[] = {
842 PPC::VSSRCRegClassID,
843 PPC::F4RCRegClassID,
844 PPC::SPILLTOVSRRCRegClassID,
845 PPC::VSFRCRegClassID,
846 PPC::SPILLTOVSRRC_and_VSFRCRegClassID,
847 PPC::F8RCRegClassID,
848};
849
850static unsigned const VSRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
851 PPC::VSRCRegClassID,
852};
853
854static unsigned const VRRCSuperclasses[] = {
855 PPC::VSRCRegClassID,
856};
857
858static unsigned const VSLRCSuperclasses[] = {
859 PPC::VSRCRegClassID,
860};
861
862static unsigned const VRRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
863 PPC::VSRCRegClassID,
864 PPC::VSRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
865 PPC::VRRCRegClassID,
866};
867
868static unsigned const G8pRC_with_sub_32_in_GPRC_NOR0Superclasses[] = {
869 PPC::G8pRCRegClassID,
870};
871
872static unsigned const VSLRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
873 PPC::VSRCRegClassID,
874 PPC::VSRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
875 PPC::VSLRCRegClassID,
876};
877
878static unsigned const FpRC_with_sub_fp0_in_SPILLTOVSRRCSuperclasses[] = {
879 PPC::FpRCRegClassID,
880};
881
882static unsigned const VSRpRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
883 PPC::VSRpRCRegClassID,
884};
885
886static unsigned const VSRpRC_with_sub_64_in_F4RCSuperclasses[] = {
887 PPC::VSRpRCRegClassID,
888};
889
890static unsigned const VSRpRC_with_sub_64_in_VFRCSuperclasses[] = {
891 PPC::VSRpRCRegClassID,
892};
893
894static unsigned const VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCSuperclasses[] = {
895 PPC::VSRpRCRegClassID,
896 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
897 PPC::VSRpRC_with_sub_64_in_VFRCRegClassID,
898};
899
900static unsigned const VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCSuperclasses[] = {
901 PPC::VSRpRCRegClassID,
902 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
903 PPC::VSRpRC_with_sub_64_in_F4RCRegClassID,
904};
905
906static unsigned const ACCRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
907 PPC::ACCRCRegClassID,
908};
909
910static unsigned const UACCRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
911 PPC::UACCRCRegClassID,
912};
913
914static unsigned const ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
915 PPC::ACCRCRegClassID,
916 PPC::ACCRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
917};
918
919static unsigned const UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
920 PPC::UACCRCRegClassID,
921 PPC::UACCRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
922};
923
924
925static inline unsigned GPRCAltOrderSelect(const MachineFunction &MF, bool Rev) {
926 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
927 }
928
929static ArrayRef<MCPhysReg> GPRCGetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
930 static const MCPhysReg AltOrder1[] = { PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R31, PPC::R0, PPC::R1, PPC::FP, PPC::BP, PPC::R2 };
931 static const MCPhysReg AltOrder2[] = { PPC::R2, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R31, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R0, PPC::R1, PPC::FP, PPC::BP };
932 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::GPRCRegClassID];
933 const ArrayRef<MCPhysReg> Order[] = {
934 ArrayRef(MCR.begin(), MCR.getNumRegs()),
935 ArrayRef(AltOrder1),
936 ArrayRef(AltOrder2)
937 };
938 const unsigned Select = GPRCAltOrderSelect(MF, Rev);
939 assert(Select < 3);
940 return Order[Select];
941}
942
943static inline unsigned GPRC_NOR0AltOrderSelect(const MachineFunction &MF, bool Rev) {
944 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
945 }
946
947static ArrayRef<MCPhysReg> GPRC_NOR0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
948 static const MCPhysReg AltOrder1[] = { PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R31, PPC::R1, PPC::FP, PPC::BP, PPC::ZERO, PPC::R2 };
949 static const MCPhysReg AltOrder2[] = { PPC::R2, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R31, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R1, PPC::FP, PPC::BP, PPC::ZERO };
950 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::GPRC_NOR0RegClassID];
951 const ArrayRef<MCPhysReg> Order[] = {
952 ArrayRef(MCR.begin(), MCR.getNumRegs()),
953 ArrayRef(AltOrder1),
954 ArrayRef(AltOrder2)
955 };
956 const unsigned Select = GPRC_NOR0AltOrderSelect(MF, Rev);
957 assert(Select < 3);
958 return Order[Select];
959}
960
961static inline unsigned GPRC_and_GPRC_NOR0AltOrderSelect(const MachineFunction &MF, bool Rev) {
962 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
963 }
964
965static ArrayRef<MCPhysReg> GPRC_and_GPRC_NOR0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
966 static const MCPhysReg AltOrder1[] = { PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R31, PPC::R1, PPC::FP, PPC::BP, PPC::R2 };
967 static const MCPhysReg AltOrder2[] = { PPC::R2, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R31, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R1, PPC::FP, PPC::BP };
968 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::GPRC_and_GPRC_NOR0RegClassID];
969 const ArrayRef<MCPhysReg> Order[] = {
970 ArrayRef(MCR.begin(), MCR.getNumRegs()),
971 ArrayRef(AltOrder1),
972 ArrayRef(AltOrder2)
973 };
974 const unsigned Select = GPRC_and_GPRC_NOR0AltOrderSelect(MF, Rev);
975 assert(Select < 3);
976 return Order[Select];
977}
978
979static inline unsigned CRBITRCAltOrderSelect(const MachineFunction &MF, bool Rev) {
980 return MF.getSubtarget<PPCSubtarget>().isELFv2ABI() &&
981 MF.getInfo<PPCFunctionInfo>()->isNonVolatileCRDisabled();
982 }
983
984static ArrayRef<MCPhysReg> CRBITRCGetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
985 static const MCPhysReg AltOrder1[] = { PPC::CR5LT, PPC::CR5GT, PPC::CR5EQ, PPC::CR5UN, PPC::CR6LT, PPC::CR6GT, PPC::CR6EQ, PPC::CR6UN, PPC::CR7LT, PPC::CR7GT, PPC::CR7EQ, PPC::CR7UN, PPC::CR1LT, PPC::CR1GT, PPC::CR1EQ, PPC::CR1UN, PPC::CR0LT, PPC::CR0GT, PPC::CR0EQ, PPC::CR0UN };
986 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::CRBITRCRegClassID];
987 const ArrayRef<MCPhysReg> Order[] = {
988 ArrayRef(MCR.begin(), MCR.getNumRegs()),
989 ArrayRef(AltOrder1)
990 };
991 const unsigned Select = CRBITRCAltOrderSelect(MF, Rev);
992 assert(Select < 2);
993 return Order[Select];
994}
995
996static inline unsigned CRRCAltOrderSelect(const MachineFunction &MF, bool Rev) {
997 return MF.getSubtarget<PPCSubtarget>().isELFv2ABI() &&
998 MF.getInfo<PPCFunctionInfo>()->isNonVolatileCRDisabled();
999 }
1000
1001static ArrayRef<MCPhysReg> CRRCGetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
1002 static const MCPhysReg AltOrder1[] = { PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7 };
1003 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::CRRCRegClassID];
1004 const ArrayRef<MCPhysReg> Order[] = {
1005 ArrayRef(MCR.begin(), MCR.getNumRegs()),
1006 ArrayRef(AltOrder1)
1007 };
1008 const unsigned Select = CRRCAltOrderSelect(MF, Rev);
1009 assert(Select < 2);
1010 return Order[Select];
1011}
1012
1013static inline unsigned G8RCAltOrderSelect(const MachineFunction &MF, bool Rev) {
1014 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
1015 }
1016
1017static ArrayRef<MCPhysReg> G8RCGetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
1018 static const MCPhysReg AltOrder1[] = { PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X31, PPC::X13, PPC::X0, PPC::X1, PPC::FP8, PPC::BP8, PPC::X2 };
1019 static const MCPhysReg AltOrder2[] = { PPC::X2, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X31, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X13, PPC::X0, PPC::X1, PPC::FP8, PPC::BP8 };
1020 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::G8RCRegClassID];
1021 const ArrayRef<MCPhysReg> Order[] = {
1022 ArrayRef(MCR.begin(), MCR.getNumRegs()),
1023 ArrayRef(AltOrder1),
1024 ArrayRef(AltOrder2)
1025 };
1026 const unsigned Select = G8RCAltOrderSelect(MF, Rev);
1027 assert(Select < 3);
1028 return Order[Select];
1029}
1030
1031static inline unsigned G8RC_NOX0AltOrderSelect(const MachineFunction &MF, bool Rev) {
1032 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
1033 }
1034
1035static ArrayRef<MCPhysReg> G8RC_NOX0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
1036 static const MCPhysReg AltOrder1[] = { PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X31, PPC::X13, PPC::X1, PPC::FP8, PPC::BP8, PPC::ZERO8, PPC::X2 };
1037 static const MCPhysReg AltOrder2[] = { PPC::X2, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X31, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X13, PPC::X1, PPC::FP8, PPC::BP8, PPC::ZERO8 };
1038 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::G8RC_NOX0RegClassID];
1039 const ArrayRef<MCPhysReg> Order[] = {
1040 ArrayRef(MCR.begin(), MCR.getNumRegs()),
1041 ArrayRef(AltOrder1),
1042 ArrayRef(AltOrder2)
1043 };
1044 const unsigned Select = G8RC_NOX0AltOrderSelect(MF, Rev);
1045 assert(Select < 3);
1046 return Order[Select];
1047}
1048
1049static inline unsigned G8RC_and_G8RC_NOX0AltOrderSelect(const MachineFunction &MF, bool Rev) {
1050 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
1051 }
1052
1053static ArrayRef<MCPhysReg> G8RC_and_G8RC_NOX0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
1054 static const MCPhysReg AltOrder1[] = { PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X31, PPC::X13, PPC::X1, PPC::FP8, PPC::BP8, PPC::X2 };
1055 static const MCPhysReg AltOrder2[] = { PPC::X2, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X31, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X13, PPC::X1, PPC::FP8, PPC::BP8 };
1056 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::G8RC_and_G8RC_NOX0RegClassID];
1057 const ArrayRef<MCPhysReg> Order[] = {
1058 ArrayRef(MCR.begin(), MCR.getNumRegs()),
1059 ArrayRef(AltOrder1),
1060 ArrayRef(AltOrder2)
1061 };
1062 const unsigned Select = G8RC_and_G8RC_NOX0AltOrderSelect(MF, Rev);
1063 assert(Select < 3);
1064 return Order[Select];
1065}
1066
1067static inline unsigned G8pRCAltOrderSelect(const MachineFunction &MF, bool Rev) {
1068 return MF.getSubtarget<PPCSubtarget>().is64BitELFABI();
1069 }
1070
1071static ArrayRef<MCPhysReg> G8pRCGetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
1072 static const MCPhysReg AltOrder1[] = { PPC::G8p2, PPC::G8p3, PPC::G8p4, PPC::G8p5, PPC::G8p14, PPC::G8p13, PPC::G8p12, PPC::G8p11, PPC::G8p10, PPC::G8p9, PPC::G8p8, PPC::G8p7, PPC::G8p15, PPC::G8p6, PPC::G8p0, PPC::G8p1 };
1073 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::G8pRCRegClassID];
1074 const ArrayRef<MCPhysReg> Order[] = {
1075 ArrayRef(MCR.begin(), MCR.getNumRegs()),
1076 ArrayRef(AltOrder1)
1077 };
1078 const unsigned Select = G8pRCAltOrderSelect(MF, Rev);
1079 assert(Select < 2);
1080 return Order[Select];
1081}
1082
1083static inline unsigned G8pRC_with_sub_32_in_GPRC_NOR0AltOrderSelect(const MachineFunction &MF, bool Rev) {
1084 return MF.getSubtarget<PPCSubtarget>().is64BitELFABI();
1085 }
1086
1087static ArrayRef<MCPhysReg> G8pRC_with_sub_32_in_GPRC_NOR0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
1088 static const MCPhysReg AltOrder1[] = { PPC::G8p2, PPC::G8p3, PPC::G8p4, PPC::G8p5, PPC::G8p14, PPC::G8p13, PPC::G8p12, PPC::G8p11, PPC::G8p10, PPC::G8p9, PPC::G8p8, PPC::G8p7, PPC::G8p15, PPC::G8p6, PPC::G8p1 };
1089 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClassID];
1090 const ArrayRef<MCPhysReg> Order[] = {
1091 ArrayRef(MCR.begin(), MCR.getNumRegs()),
1092 ArrayRef(AltOrder1)
1093 };
1094 const unsigned Select = G8pRC_with_sub_32_in_GPRC_NOR0AltOrderSelect(MF, Rev);
1095 assert(Select < 2);
1096 return Order[Select];
1097}
1098namespace PPC {
1099
1100// Register class instances
1101 extern const TargetRegisterClass VSSRCRegClass = {
1102 .MC: &PPCMCRegisterClasses[VSSRCRegClassID],
1103 .SubClassMask: VSSRCSubClassMask,
1104 .SuperRegIndices: SuperRegIdxSeqs + 25,
1105 .LaneMask: LaneBitmask(0x0000000000000001),
1106 .AllocationPriority: 0,
1107 .GlobalPriority: false,
1108 .TSFlags: 0x00, /* TSFlags */
1109 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1110 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1111 .SuperClasses: nullptr, .SuperClassesSize: 0,
1112 .OrderFunc: nullptr
1113 };
1114
1115 extern const TargetRegisterClass GPRCRegClass = {
1116 .MC: &PPCMCRegisterClasses[GPRCRegClassID],
1117 .SubClassMask: GPRCSubClassMask,
1118 .SuperRegIndices: SuperRegIdxSeqs + 73,
1119 .LaneMask: LaneBitmask(0x0000000000000001),
1120 .AllocationPriority: 0,
1121 .GlobalPriority: false,
1122 .TSFlags: 0x00, /* TSFlags */
1123 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1124 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1125 .SuperClasses: nullptr, .SuperClassesSize: 0,
1126 .OrderFunc: GPRCGetRawAllocationOrder
1127 };
1128
1129 extern const TargetRegisterClass GPRC_NOR0RegClass = {
1130 .MC: &PPCMCRegisterClasses[GPRC_NOR0RegClassID],
1131 .SubClassMask: GPRC_NOR0SubClassMask,
1132 .SuperRegIndices: SuperRegIdxSeqs + 73,
1133 .LaneMask: LaneBitmask(0x0000000000000001),
1134 .AllocationPriority: 0,
1135 .GlobalPriority: false,
1136 .TSFlags: 0x00, /* TSFlags */
1137 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1138 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1139 .SuperClasses: nullptr, .SuperClassesSize: 0,
1140 .OrderFunc: GPRC_NOR0GetRawAllocationOrder
1141 };
1142
1143 extern const TargetRegisterClass GPRC_and_GPRC_NOR0RegClass = {
1144 .MC: &PPCMCRegisterClasses[GPRC_and_GPRC_NOR0RegClassID],
1145 .SubClassMask: GPRC_and_GPRC_NOR0SubClassMask,
1146 .SuperRegIndices: SuperRegIdxSeqs + 73,
1147 .LaneMask: LaneBitmask(0x0000000000000001),
1148 .AllocationPriority: 0,
1149 .GlobalPriority: false,
1150 .TSFlags: 0x00, /* TSFlags */
1151 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1152 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1153 .SuperClasses: GPRC_and_GPRC_NOR0Superclasses, .SuperClassesSize: 2,
1154 .OrderFunc: GPRC_and_GPRC_NOR0GetRawAllocationOrder
1155 };
1156
1157 extern const TargetRegisterClass CRBITRCRegClass = {
1158 .MC: &PPCMCRegisterClasses[CRBITRCRegClassID],
1159 .SubClassMask: CRBITRCSubClassMask,
1160 .SuperRegIndices: SuperRegIdxSeqs + 9,
1161 .LaneMask: LaneBitmask(0x0000000000000001),
1162 .AllocationPriority: 0,
1163 .GlobalPriority: false,
1164 .TSFlags: 0x00, /* TSFlags */
1165 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1166 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1167 .SuperClasses: nullptr, .SuperClassesSize: 0,
1168 .OrderFunc: CRBITRCGetRawAllocationOrder
1169 };
1170
1171 extern const TargetRegisterClass F4RCRegClass = {
1172 .MC: &PPCMCRegisterClasses[F4RCRegClassID],
1173 .SubClassMask: F4RCSubClassMask,
1174 .SuperRegIndices: SuperRegIdxSeqs + 25,
1175 .LaneMask: LaneBitmask(0x0000000000000001),
1176 .AllocationPriority: 0,
1177 .GlobalPriority: false,
1178 .TSFlags: 0x00, /* TSFlags */
1179 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1180 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1181 .SuperClasses: F4RCSuperclasses, .SuperClassesSize: 1,
1182 .OrderFunc: nullptr
1183 };
1184
1185 extern const TargetRegisterClass GPRC32RegClass = {
1186 .MC: &PPCMCRegisterClasses[GPRC32RegClassID],
1187 .SubClassMask: GPRC32SubClassMask,
1188 .SuperRegIndices: SuperRegIdxSeqs + 2,
1189 .LaneMask: LaneBitmask(0x0000000000000001),
1190 .AllocationPriority: 0,
1191 .GlobalPriority: false,
1192 .TSFlags: 0x00, /* TSFlags */
1193 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1194 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1195 .SuperClasses: nullptr, .SuperClassesSize: 0,
1196 .OrderFunc: nullptr
1197 };
1198
1199 extern const TargetRegisterClass CRRCRegClass = {
1200 .MC: &PPCMCRegisterClasses[CRRCRegClassID],
1201 .SubClassMask: CRRCSubClassMask,
1202 .SuperRegIndices: SuperRegIdxSeqs + 2,
1203 .LaneMask: LaneBitmask(0x0000000000000E40),
1204 .AllocationPriority: 0,
1205 .GlobalPriority: false,
1206 .TSFlags: 0x00, /* TSFlags */
1207 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1208 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1209 .SuperClasses: nullptr, .SuperClassesSize: 0,
1210 .OrderFunc: CRRCGetRawAllocationOrder
1211 };
1212
1213 extern const TargetRegisterClass CARRYRCRegClass = {
1214 .MC: &PPCMCRegisterClasses[CARRYRCRegClassID],
1215 .SubClassMask: CARRYRCSubClassMask,
1216 .SuperRegIndices: SuperRegIdxSeqs + 2,
1217 .LaneMask: LaneBitmask(0x0000000000000001),
1218 .AllocationPriority: 0,
1219 .GlobalPriority: false,
1220 .TSFlags: 0x00, /* TSFlags */
1221 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1222 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1223 .SuperClasses: nullptr, .SuperClassesSize: 0,
1224 .OrderFunc: nullptr
1225 };
1226
1227 extern const TargetRegisterClass CTRRCRegClass = {
1228 .MC: &PPCMCRegisterClasses[CTRRCRegClassID],
1229 .SubClassMask: CTRRCSubClassMask,
1230 .SuperRegIndices: SuperRegIdxSeqs + 2,
1231 .LaneMask: LaneBitmask(0x0000000000000001),
1232 .AllocationPriority: 0,
1233 .GlobalPriority: false,
1234 .TSFlags: 0x00, /* TSFlags */
1235 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1236 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1237 .SuperClasses: nullptr, .SuperClassesSize: 0,
1238 .OrderFunc: nullptr
1239 };
1240
1241 extern const TargetRegisterClass LRRCRegClass = {
1242 .MC: &PPCMCRegisterClasses[LRRCRegClassID],
1243 .SubClassMask: LRRCSubClassMask,
1244 .SuperRegIndices: SuperRegIdxSeqs + 2,
1245 .LaneMask: LaneBitmask(0x0000000000000001),
1246 .AllocationPriority: 0,
1247 .GlobalPriority: false,
1248 .TSFlags: 0x00, /* TSFlags */
1249 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1250 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1251 .SuperClasses: nullptr, .SuperClassesSize: 0,
1252 .OrderFunc: nullptr
1253 };
1254
1255 extern const TargetRegisterClass VRSAVERCRegClass = {
1256 .MC: &PPCMCRegisterClasses[VRSAVERCRegClassID],
1257 .SubClassMask: VRSAVERCSubClassMask,
1258 .SuperRegIndices: SuperRegIdxSeqs + 2,
1259 .LaneMask: LaneBitmask(0x0000000000000001),
1260 .AllocationPriority: 0,
1261 .GlobalPriority: false,
1262 .TSFlags: 0x00, /* TSFlags */
1263 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1264 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1265 .SuperClasses: nullptr, .SuperClassesSize: 0,
1266 .OrderFunc: nullptr
1267 };
1268
1269 extern const TargetRegisterClass SPILLTOVSRRCRegClass = {
1270 .MC: &PPCMCRegisterClasses[SPILLTOVSRRCRegClassID],
1271 .SubClassMask: SPILLTOVSRRCSubClassMask,
1272 .SuperRegIndices: SuperRegIdxSeqs + 32,
1273 .LaneMask: LaneBitmask(0x0000000000000001),
1274 .AllocationPriority: 0,
1275 .GlobalPriority: false,
1276 .TSFlags: 0x00, /* TSFlags */
1277 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1278 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1279 .SuperClasses: nullptr, .SuperClassesSize: 0,
1280 .OrderFunc: nullptr
1281 };
1282
1283 extern const TargetRegisterClass VSFRCRegClass = {
1284 .MC: &PPCMCRegisterClasses[VSFRCRegClassID],
1285 .SubClassMask: VSFRCSubClassMask,
1286 .SuperRegIndices: SuperRegIdxSeqs + 25,
1287 .LaneMask: LaneBitmask(0x0000000000000001),
1288 .AllocationPriority: 0,
1289 .GlobalPriority: false,
1290 .TSFlags: 0x00, /* TSFlags */
1291 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1292 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1293 .SuperClasses: VSFRCSuperclasses, .SuperClassesSize: 1,
1294 .OrderFunc: nullptr
1295 };
1296
1297 extern const TargetRegisterClass G8RCRegClass = {
1298 .MC: &PPCMCRegisterClasses[G8RCRegClassID],
1299 .SubClassMask: G8RCSubClassMask,
1300 .SuperRegIndices: SuperRegIdxSeqs + 3,
1301 .LaneMask: LaneBitmask(0x0000000000000001),
1302 .AllocationPriority: 0,
1303 .GlobalPriority: false,
1304 .TSFlags: 0x00, /* TSFlags */
1305 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1306 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1307 .SuperClasses: G8RCSuperclasses, .SuperClassesSize: 1,
1308 .OrderFunc: G8RCGetRawAllocationOrder
1309 };
1310
1311 extern const TargetRegisterClass G8RC_NOX0RegClass = {
1312 .MC: &PPCMCRegisterClasses[G8RC_NOX0RegClassID],
1313 .SubClassMask: G8RC_NOX0SubClassMask,
1314 .SuperRegIndices: SuperRegIdxSeqs + 3,
1315 .LaneMask: LaneBitmask(0x0000000000000001),
1316 .AllocationPriority: 0,
1317 .GlobalPriority: false,
1318 .TSFlags: 0x00, /* TSFlags */
1319 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1320 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1321 .SuperClasses: nullptr, .SuperClassesSize: 0,
1322 .OrderFunc: G8RC_NOX0GetRawAllocationOrder
1323 };
1324
1325 extern const TargetRegisterClass SPILLTOVSRRC_and_VSFRCRegClass = {
1326 .MC: &PPCMCRegisterClasses[SPILLTOVSRRC_and_VSFRCRegClassID],
1327 .SubClassMask: SPILLTOVSRRC_and_VSFRCSubClassMask,
1328 .SuperRegIndices: SuperRegIdxSeqs + 25,
1329 .LaneMask: LaneBitmask(0x0000000000000001),
1330 .AllocationPriority: 0,
1331 .GlobalPriority: false,
1332 .TSFlags: 0x00, /* TSFlags */
1333 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1334 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1335 .SuperClasses: SPILLTOVSRRC_and_VSFRCSuperclasses, .SuperClassesSize: 3,
1336 .OrderFunc: nullptr
1337 };
1338
1339 extern const TargetRegisterClass G8RC_and_G8RC_NOX0RegClass = {
1340 .MC: &PPCMCRegisterClasses[G8RC_and_G8RC_NOX0RegClassID],
1341 .SubClassMask: G8RC_and_G8RC_NOX0SubClassMask,
1342 .SuperRegIndices: SuperRegIdxSeqs + 3,
1343 .LaneMask: LaneBitmask(0x0000000000000001),
1344 .AllocationPriority: 0,
1345 .GlobalPriority: false,
1346 .TSFlags: 0x00, /* TSFlags */
1347 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1348 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1349 .SuperClasses: G8RC_and_G8RC_NOX0Superclasses, .SuperClassesSize: 3,
1350 .OrderFunc: G8RC_and_G8RC_NOX0GetRawAllocationOrder
1351 };
1352
1353 extern const TargetRegisterClass F8RCRegClass = {
1354 .MC: &PPCMCRegisterClasses[F8RCRegClassID],
1355 .SubClassMask: F8RCSubClassMask,
1356 .SuperRegIndices: SuperRegIdxSeqs + 25,
1357 .LaneMask: LaneBitmask(0x0000000000000001),
1358 .AllocationPriority: 0,
1359 .GlobalPriority: false,
1360 .TSFlags: 0x00, /* TSFlags */
1361 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1362 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1363 .SuperClasses: F8RCSuperclasses, .SuperClassesSize: 3,
1364 .OrderFunc: nullptr
1365 };
1366
1367 extern const TargetRegisterClass FHRCRegClass = {
1368 .MC: &PPCMCRegisterClasses[FHRCRegClassID],
1369 .SubClassMask: FHRCSubClassMask,
1370 .SuperRegIndices: SuperRegIdxSeqs + 2,
1371 .LaneMask: LaneBitmask(0x0000000000000001),
1372 .AllocationPriority: 0,
1373 .GlobalPriority: false,
1374 .TSFlags: 0x00, /* TSFlags */
1375 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1376 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1377 .SuperClasses: nullptr, .SuperClassesSize: 0,
1378 .OrderFunc: nullptr
1379 };
1380
1381 extern const TargetRegisterClass SPERCRegClass = {
1382 .MC: &PPCMCRegisterClasses[SPERCRegClassID],
1383 .SubClassMask: SPERCSubClassMask,
1384 .SuperRegIndices: SuperRegIdxSeqs + 2,
1385 .LaneMask: LaneBitmask(0x0000000000000003),
1386 .AllocationPriority: 0,
1387 .GlobalPriority: false,
1388 .TSFlags: 0x00, /* TSFlags */
1389 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1390 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1391 .SuperClasses: nullptr, .SuperClassesSize: 0,
1392 .OrderFunc: nullptr
1393 };
1394
1395 extern const TargetRegisterClass VFHRCRegClass = {
1396 .MC: &PPCMCRegisterClasses[VFHRCRegClassID],
1397 .SubClassMask: VFHRCSubClassMask,
1398 .SuperRegIndices: SuperRegIdxSeqs + 2,
1399 .LaneMask: LaneBitmask(0x0000000000000001),
1400 .AllocationPriority: 0,
1401 .GlobalPriority: false,
1402 .TSFlags: 0x00, /* TSFlags */
1403 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1404 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1405 .SuperClasses: nullptr, .SuperClassesSize: 0,
1406 .OrderFunc: nullptr
1407 };
1408
1409 extern const TargetRegisterClass VFRCRegClass = {
1410 .MC: &PPCMCRegisterClasses[VFRCRegClassID],
1411 .SubClassMask: VFRCSubClassMask,
1412 .SuperRegIndices: SuperRegIdxSeqs + 17,
1413 .LaneMask: LaneBitmask(0x0000000000000001),
1414 .AllocationPriority: 0,
1415 .GlobalPriority: false,
1416 .TSFlags: 0x00, /* TSFlags */
1417 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1418 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1419 .SuperClasses: VFRCSuperclasses, .SuperClassesSize: 2,
1420 .OrderFunc: nullptr
1421 };
1422
1423 extern const TargetRegisterClass SPERC_with_sub_32_in_GPRC_NOR0RegClass = {
1424 .MC: &PPCMCRegisterClasses[SPERC_with_sub_32_in_GPRC_NOR0RegClassID],
1425 .SubClassMask: SPERC_with_sub_32_in_GPRC_NOR0SubClassMask,
1426 .SuperRegIndices: SuperRegIdxSeqs + 2,
1427 .LaneMask: LaneBitmask(0x0000000000000003),
1428 .AllocationPriority: 0,
1429 .GlobalPriority: false,
1430 .TSFlags: 0x00, /* TSFlags */
1431 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1432 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1433 .SuperClasses: SPERC_with_sub_32_in_GPRC_NOR0Superclasses, .SuperClassesSize: 1,
1434 .OrderFunc: nullptr
1435 };
1436
1437 extern const TargetRegisterClass SPILLTOVSRRC_and_VFRCRegClass = {
1438 .MC: &PPCMCRegisterClasses[SPILLTOVSRRC_and_VFRCRegClassID],
1439 .SubClassMask: SPILLTOVSRRC_and_VFRCSubClassMask,
1440 .SuperRegIndices: SuperRegIdxSeqs + 17,
1441 .LaneMask: LaneBitmask(0x0000000000000001),
1442 .AllocationPriority: 0,
1443 .GlobalPriority: false,
1444 .TSFlags: 0x00, /* TSFlags */
1445 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1446 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1447 .SuperClasses: SPILLTOVSRRC_and_VFRCSuperclasses, .SuperClassesSize: 5,
1448 .OrderFunc: nullptr
1449 };
1450
1451 extern const TargetRegisterClass SPILLTOVSRRC_and_F4RCRegClass = {
1452 .MC: &PPCMCRegisterClasses[SPILLTOVSRRC_and_F4RCRegClassID],
1453 .SubClassMask: SPILLTOVSRRC_and_F4RCSubClassMask,
1454 .SuperRegIndices: SuperRegIdxSeqs + 25,
1455 .LaneMask: LaneBitmask(0x0000000000000001),
1456 .AllocationPriority: 0,
1457 .GlobalPriority: false,
1458 .TSFlags: 0x00, /* TSFlags */
1459 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1460 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1461 .SuperClasses: SPILLTOVSRRC_and_F4RCSuperclasses, .SuperClassesSize: 6,
1462 .OrderFunc: nullptr
1463 };
1464
1465 extern const TargetRegisterClass CTRRC8RegClass = {
1466 .MC: &PPCMCRegisterClasses[CTRRC8RegClassID],
1467 .SubClassMask: CTRRC8SubClassMask,
1468 .SuperRegIndices: SuperRegIdxSeqs + 2,
1469 .LaneMask: LaneBitmask(0x0000000000000001),
1470 .AllocationPriority: 0,
1471 .GlobalPriority: false,
1472 .TSFlags: 0x00, /* TSFlags */
1473 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1474 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1475 .SuperClasses: nullptr, .SuperClassesSize: 0,
1476 .OrderFunc: nullptr
1477 };
1478
1479 extern const TargetRegisterClass LR8RCRegClass = {
1480 .MC: &PPCMCRegisterClasses[LR8RCRegClassID],
1481 .SubClassMask: LR8RCSubClassMask,
1482 .SuperRegIndices: SuperRegIdxSeqs + 2,
1483 .LaneMask: LaneBitmask(0x0000000000000001),
1484 .AllocationPriority: 0,
1485 .GlobalPriority: false,
1486 .TSFlags: 0x00, /* TSFlags */
1487 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1488 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1489 .SuperClasses: nullptr, .SuperClassesSize: 0,
1490 .OrderFunc: nullptr
1491 };
1492
1493 extern const TargetRegisterClass DMRROWRCRegClass = {
1494 .MC: &PPCMCRegisterClasses[DMRROWRCRegClassID],
1495 .SubClassMask: DMRROWRCSubClassMask,
1496 .SuperRegIndices: SuperRegIdxSeqs + 56,
1497 .LaneMask: LaneBitmask(0x0000000000000001),
1498 .AllocationPriority: 0,
1499 .GlobalPriority: false,
1500 .TSFlags: 0x00, /* TSFlags */
1501 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1502 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1503 .SuperClasses: nullptr, .SuperClassesSize: 0,
1504 .OrderFunc: nullptr
1505 };
1506
1507 extern const TargetRegisterClass VSRCRegClass = {
1508 .MC: &PPCMCRegisterClasses[VSRCRegClassID],
1509 .SubClassMask: VSRCSubClassMask,
1510 .SuperRegIndices: SuperRegIdxSeqs + 20,
1511 .LaneMask: LaneBitmask(0x000000000000000C),
1512 .AllocationPriority: 0,
1513 .GlobalPriority: false,
1514 .TSFlags: 0x00, /* TSFlags */
1515 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1516 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1517 .SuperClasses: nullptr, .SuperClassesSize: 0,
1518 .OrderFunc: nullptr
1519 };
1520
1521 extern const TargetRegisterClass VSRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1522 .MC: &PPCMCRegisterClasses[VSRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1523 .SubClassMask: VSRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1524 .SuperRegIndices: SuperRegIdxSeqs + 20,
1525 .LaneMask: LaneBitmask(0x000000000000000C),
1526 .AllocationPriority: 0,
1527 .GlobalPriority: false,
1528 .TSFlags: 0x00, /* TSFlags */
1529 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1530 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1531 .SuperClasses: VSRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 1,
1532 .OrderFunc: nullptr
1533 };
1534
1535 extern const TargetRegisterClass VRRCRegClass = {
1536 .MC: &PPCMCRegisterClasses[VRRCRegClassID],
1537 .SubClassMask: VRRCSubClassMask,
1538 .SuperRegIndices: SuperRegIdxSeqs + 14,
1539 .LaneMask: LaneBitmask(0x000000000000000C),
1540 .AllocationPriority: 0,
1541 .GlobalPriority: false,
1542 .TSFlags: 0x00, /* TSFlags */
1543 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1544 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1545 .SuperClasses: VRRCSuperclasses, .SuperClassesSize: 1,
1546 .OrderFunc: nullptr
1547 };
1548
1549 extern const TargetRegisterClass VSLRCRegClass = {
1550 .MC: &PPCMCRegisterClasses[VSLRCRegClassID],
1551 .SubClassMask: VSLRCSubClassMask,
1552 .SuperRegIndices: SuperRegIdxSeqs + 20,
1553 .LaneMask: LaneBitmask(0x000000000000000C),
1554 .AllocationPriority: 0,
1555 .GlobalPriority: false,
1556 .TSFlags: 0x00, /* TSFlags */
1557 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1558 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1559 .SuperClasses: VSLRCSuperclasses, .SuperClassesSize: 1,
1560 .OrderFunc: nullptr
1561 };
1562
1563 extern const TargetRegisterClass VRRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1564 .MC: &PPCMCRegisterClasses[VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1565 .SubClassMask: VRRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1566 .SuperRegIndices: SuperRegIdxSeqs + 14,
1567 .LaneMask: LaneBitmask(0x000000000000000C),
1568 .AllocationPriority: 0,
1569 .GlobalPriority: false,
1570 .TSFlags: 0x00, /* TSFlags */
1571 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1572 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1573 .SuperClasses: VRRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 3,
1574 .OrderFunc: nullptr
1575 };
1576
1577 extern const TargetRegisterClass FpRCRegClass = {
1578 .MC: &PPCMCRegisterClasses[FpRCRegClassID],
1579 .SubClassMask: FpRCSubClassMask,
1580 .SuperRegIndices: SuperRegIdxSeqs + 2,
1581 .LaneMask: LaneBitmask(0x0000000000000180),
1582 .AllocationPriority: 0,
1583 .GlobalPriority: false,
1584 .TSFlags: 0x00, /* TSFlags */
1585 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1586 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1587 .SuperClasses: nullptr, .SuperClassesSize: 0,
1588 .OrderFunc: nullptr
1589 };
1590
1591 extern const TargetRegisterClass G8pRCRegClass = {
1592 .MC: &PPCMCRegisterClasses[G8pRCRegClassID],
1593 .SubClassMask: G8pRCSubClassMask,
1594 .SuperRegIndices: SuperRegIdxSeqs + 2,
1595 .LaneMask: LaneBitmask(0x0000000100000001),
1596 .AllocationPriority: 0,
1597 .GlobalPriority: false,
1598 .TSFlags: 0x00, /* TSFlags */
1599 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1600 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1601 .SuperClasses: nullptr, .SuperClassesSize: 0,
1602 .OrderFunc: G8pRCGetRawAllocationOrder
1603 };
1604
1605 extern const TargetRegisterClass G8pRC_with_sub_32_in_GPRC_NOR0RegClass = {
1606 .MC: &PPCMCRegisterClasses[G8pRC_with_sub_32_in_GPRC_NOR0RegClassID],
1607 .SubClassMask: G8pRC_with_sub_32_in_GPRC_NOR0SubClassMask,
1608 .SuperRegIndices: SuperRegIdxSeqs + 2,
1609 .LaneMask: LaneBitmask(0x0000000100000001),
1610 .AllocationPriority: 0,
1611 .GlobalPriority: false,
1612 .TSFlags: 0x00, /* TSFlags */
1613 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1614 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1615 .SuperClasses: G8pRC_with_sub_32_in_GPRC_NOR0Superclasses, .SuperClassesSize: 1,
1616 .OrderFunc: G8pRC_with_sub_32_in_GPRC_NOR0GetRawAllocationOrder
1617 };
1618
1619 extern const TargetRegisterClass VSLRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1620 .MC: &PPCMCRegisterClasses[VSLRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1621 .SubClassMask: VSLRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1622 .SuperRegIndices: SuperRegIdxSeqs + 20,
1623 .LaneMask: LaneBitmask(0x000000000000000C),
1624 .AllocationPriority: 0,
1625 .GlobalPriority: false,
1626 .TSFlags: 0x00, /* TSFlags */
1627 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1628 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1629 .SuperClasses: VSLRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 3,
1630 .OrderFunc: nullptr
1631 };
1632
1633 extern const TargetRegisterClass FpRC_with_sub_fp0_in_SPILLTOVSRRCRegClass = {
1634 .MC: &PPCMCRegisterClasses[FpRC_with_sub_fp0_in_SPILLTOVSRRCRegClassID],
1635 .SubClassMask: FpRC_with_sub_fp0_in_SPILLTOVSRRCSubClassMask,
1636 .SuperRegIndices: SuperRegIdxSeqs + 2,
1637 .LaneMask: LaneBitmask(0x0000000000000180),
1638 .AllocationPriority: 0,
1639 .GlobalPriority: false,
1640 .TSFlags: 0x00, /* TSFlags */
1641 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1642 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1643 .SuperClasses: FpRC_with_sub_fp0_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 1,
1644 .OrderFunc: nullptr
1645 };
1646
1647 extern const TargetRegisterClass DMRROWpRCRegClass = {
1648 .MC: &PPCMCRegisterClasses[DMRROWpRCRegClassID],
1649 .SubClassMask: DMRROWpRCSubClassMask,
1650 .SuperRegIndices: SuperRegIdxSeqs + 47,
1651 .LaneMask: LaneBitmask(0x0000000000000030),
1652 .AllocationPriority: 0,
1653 .GlobalPriority: false,
1654 .TSFlags: 0x00, /* TSFlags */
1655 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1656 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1657 .SuperClasses: nullptr, .SuperClassesSize: 0,
1658 .OrderFunc: nullptr
1659 };
1660
1661 extern const TargetRegisterClass VSRpRCRegClass = {
1662 .MC: &PPCMCRegisterClasses[VSRpRCRegClassID],
1663 .SubClassMask: VSRpRCSubClassMask,
1664 .SuperRegIndices: SuperRegIdxSeqs + 6,
1665 .LaneMask: LaneBitmask(0x000000000000300C),
1666 .AllocationPriority: 2,
1667 .GlobalPriority: false,
1668 .TSFlags: 0x00, /* TSFlags */
1669 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1670 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1671 .SuperClasses: nullptr, .SuperClassesSize: 0,
1672 .OrderFunc: nullptr
1673 };
1674
1675 extern const TargetRegisterClass VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1676 .MC: &PPCMCRegisterClasses[VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1677 .SubClassMask: VSRpRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1678 .SuperRegIndices: SuperRegIdxSeqs + 6,
1679 .LaneMask: LaneBitmask(0x000000000000300C),
1680 .AllocationPriority: 2,
1681 .GlobalPriority: false,
1682 .TSFlags: 0x00, /* TSFlags */
1683 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1684 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1685 .SuperClasses: VSRpRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 1,
1686 .OrderFunc: nullptr
1687 };
1688
1689 extern const TargetRegisterClass VSRpRC_with_sub_64_in_F4RCRegClass = {
1690 .MC: &PPCMCRegisterClasses[VSRpRC_with_sub_64_in_F4RCRegClassID],
1691 .SubClassMask: VSRpRC_with_sub_64_in_F4RCSubClassMask,
1692 .SuperRegIndices: SuperRegIdxSeqs + 6,
1693 .LaneMask: LaneBitmask(0x000000000000300C),
1694 .AllocationPriority: 2,
1695 .GlobalPriority: false,
1696 .TSFlags: 0x00, /* TSFlags */
1697 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1698 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1699 .SuperClasses: VSRpRC_with_sub_64_in_F4RCSuperclasses, .SuperClassesSize: 1,
1700 .OrderFunc: nullptr
1701 };
1702
1703 extern const TargetRegisterClass VSRpRC_with_sub_64_in_VFRCRegClass = {
1704 .MC: &PPCMCRegisterClasses[VSRpRC_with_sub_64_in_VFRCRegClassID],
1705 .SubClassMask: VSRpRC_with_sub_64_in_VFRCSubClassMask,
1706 .SuperRegIndices: SuperRegIdxSeqs + 2,
1707 .LaneMask: LaneBitmask(0x000000000000300C),
1708 .AllocationPriority: 2,
1709 .GlobalPriority: false,
1710 .TSFlags: 0x00, /* TSFlags */
1711 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1712 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1713 .SuperClasses: VSRpRC_with_sub_64_in_VFRCSuperclasses, .SuperClassesSize: 1,
1714 .OrderFunc: nullptr
1715 };
1716
1717 extern const TargetRegisterClass VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClass = {
1718 .MC: &PPCMCRegisterClasses[VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClassID],
1719 .SubClassMask: VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCSubClassMask,
1720 .SuperRegIndices: SuperRegIdxSeqs + 2,
1721 .LaneMask: LaneBitmask(0x000000000000300C),
1722 .AllocationPriority: 2,
1723 .GlobalPriority: false,
1724 .TSFlags: 0x00, /* TSFlags */
1725 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1726 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1727 .SuperClasses: VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCSuperclasses, .SuperClassesSize: 3,
1728 .OrderFunc: nullptr
1729 };
1730
1731 extern const TargetRegisterClass VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCRegClass = {
1732 .MC: &PPCMCRegisterClasses[VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCRegClassID],
1733 .SubClassMask: VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCSubClassMask,
1734 .SuperRegIndices: SuperRegIdxSeqs + 6,
1735 .LaneMask: LaneBitmask(0x000000000000300C),
1736 .AllocationPriority: 2,
1737 .GlobalPriority: false,
1738 .TSFlags: 0x00, /* TSFlags */
1739 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1740 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1741 .SuperClasses: VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCSuperclasses, .SuperClassesSize: 3,
1742 .OrderFunc: nullptr
1743 };
1744
1745 extern const TargetRegisterClass ACCRCRegClass = {
1746 .MC: &PPCMCRegisterClasses[ACCRCRegClassID],
1747 .SubClassMask: ACCRCSubClassMask,
1748 .SuperRegIndices: SuperRegIdxSeqs + 2,
1749 .LaneMask: LaneBitmask(0x000000000003F00C),
1750 .AllocationPriority: 31,
1751 .GlobalPriority: true,
1752 .TSFlags: 0x00, /* TSFlags */
1753 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1754 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1755 .SuperClasses: nullptr, .SuperClassesSize: 0,
1756 .OrderFunc: nullptr
1757 };
1758
1759 extern const TargetRegisterClass UACCRCRegClass = {
1760 .MC: &PPCMCRegisterClasses[UACCRCRegClassID],
1761 .SubClassMask: UACCRCSubClassMask,
1762 .SuperRegIndices: SuperRegIdxSeqs + 2,
1763 .LaneMask: LaneBitmask(0x000000000003F00C),
1764 .AllocationPriority: 4,
1765 .GlobalPriority: true,
1766 .TSFlags: 0x00, /* TSFlags */
1767 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1768 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1769 .SuperClasses: nullptr, .SuperClassesSize: 0,
1770 .OrderFunc: nullptr
1771 };
1772
1773 extern const TargetRegisterClass WACCRCRegClass = {
1774 .MC: &PPCMCRegisterClasses[WACCRCRegClassID],
1775 .SubClassMask: WACCRCSubClassMask,
1776 .SuperRegIndices: SuperRegIdxSeqs + 44,
1777 .LaneMask: LaneBitmask(0x00000000000C0030),
1778 .AllocationPriority: 0,
1779 .GlobalPriority: false,
1780 .TSFlags: 0x00, /* TSFlags */
1781 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1782 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1783 .SuperClasses: nullptr, .SuperClassesSize: 0,
1784 .OrderFunc: nullptr
1785 };
1786
1787 extern const TargetRegisterClass WACC_HIRCRegClass = {
1788 .MC: &PPCMCRegisterClasses[WACC_HIRCRegClassID],
1789 .SubClassMask: WACC_HIRCSubClassMask,
1790 .SuperRegIndices: SuperRegIdxSeqs + 41,
1791 .LaneMask: LaneBitmask(0x00000000000C0030),
1792 .AllocationPriority: 0,
1793 .GlobalPriority: false,
1794 .TSFlags: 0x00, /* TSFlags */
1795 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1796 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1797 .SuperClasses: nullptr, .SuperClassesSize: 0,
1798 .OrderFunc: nullptr
1799 };
1800
1801 extern const TargetRegisterClass ACCRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1802 .MC: &PPCMCRegisterClasses[ACCRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1803 .SubClassMask: ACCRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1804 .SuperRegIndices: SuperRegIdxSeqs + 2,
1805 .LaneMask: LaneBitmask(0x000000000003F00C),
1806 .AllocationPriority: 31,
1807 .GlobalPriority: true,
1808 .TSFlags: 0x00, /* TSFlags */
1809 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1810 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1811 .SuperClasses: ACCRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 1,
1812 .OrderFunc: nullptr
1813 };
1814
1815 extern const TargetRegisterClass UACCRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1816 .MC: &PPCMCRegisterClasses[UACCRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1817 .SubClassMask: UACCRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1818 .SuperRegIndices: SuperRegIdxSeqs + 2,
1819 .LaneMask: LaneBitmask(0x000000000003F00C),
1820 .AllocationPriority: 4,
1821 .GlobalPriority: true,
1822 .TSFlags: 0x00, /* TSFlags */
1823 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1824 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1825 .SuperClasses: UACCRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 1,
1826 .OrderFunc: nullptr
1827 };
1828
1829 extern const TargetRegisterClass ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClass = {
1830 .MC: &PPCMCRegisterClasses[ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClassID],
1831 .SubClassMask: ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSubClassMask,
1832 .SuperRegIndices: SuperRegIdxSeqs + 2,
1833 .LaneMask: LaneBitmask(0x000000000003F00C),
1834 .AllocationPriority: 31,
1835 .GlobalPriority: true,
1836 .TSFlags: 0x00, /* TSFlags */
1837 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1838 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1839 .SuperClasses: ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 2,
1840 .OrderFunc: nullptr
1841 };
1842
1843 extern const TargetRegisterClass UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClass = {
1844 .MC: &PPCMCRegisterClasses[UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClassID],
1845 .SubClassMask: UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSubClassMask,
1846 .SuperRegIndices: SuperRegIdxSeqs + 2,
1847 .LaneMask: LaneBitmask(0x000000000003F00C),
1848 .AllocationPriority: 4,
1849 .GlobalPriority: true,
1850 .TSFlags: 0x00, /* TSFlags */
1851 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1852 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1853 .SuperClasses: UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 2,
1854 .OrderFunc: nullptr
1855 };
1856
1857 extern const TargetRegisterClass DMRRCRegClass = {
1858 .MC: &PPCMCRegisterClasses[DMRRCRegClassID],
1859 .SubClassMask: DMRRCSubClassMask,
1860 .SuperRegIndices: SuperRegIdxSeqs + 0,
1861 .LaneMask: LaneBitmask(0x0000000000FC0030),
1862 .AllocationPriority: 0,
1863 .GlobalPriority: false,
1864 .TSFlags: 0x00, /* TSFlags */
1865 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1866 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1867 .SuperClasses: nullptr, .SuperClassesSize: 0,
1868 .OrderFunc: nullptr
1869 };
1870
1871 extern const TargetRegisterClass DMRpRCRegClass = {
1872 .MC: &PPCMCRegisterClasses[DMRpRCRegClassID],
1873 .SubClassMask: DMRpRCSubClassMask,
1874 .SuperRegIndices: SuperRegIdxSeqs + 2,
1875 .LaneMask: LaneBitmask(0x00000000FFFC0030),
1876 .AllocationPriority: 0,
1877 .GlobalPriority: false,
1878 .TSFlags: 0x00, /* TSFlags */
1879 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1880 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1881 .SuperClasses: nullptr, .SuperClassesSize: 0,
1882 .OrderFunc: nullptr
1883 };
1884
1885
1886} // namespace PPC
1887namespace {
1888
1889 const TargetRegisterClass *const RegisterClasses[] = {
1890 &PPC::VSSRCRegClass,
1891 &PPC::GPRCRegClass,
1892 &PPC::GPRC_NOR0RegClass,
1893 &PPC::GPRC_and_GPRC_NOR0RegClass,
1894 &PPC::CRBITRCRegClass,
1895 &PPC::F4RCRegClass,
1896 &PPC::GPRC32RegClass,
1897 &PPC::CRRCRegClass,
1898 &PPC::CARRYRCRegClass,
1899 &PPC::CTRRCRegClass,
1900 &PPC::LRRCRegClass,
1901 &PPC::VRSAVERCRegClass,
1902 &PPC::SPILLTOVSRRCRegClass,
1903 &PPC::VSFRCRegClass,
1904 &PPC::G8RCRegClass,
1905 &PPC::G8RC_NOX0RegClass,
1906 &PPC::SPILLTOVSRRC_and_VSFRCRegClass,
1907 &PPC::G8RC_and_G8RC_NOX0RegClass,
1908 &PPC::F8RCRegClass,
1909 &PPC::FHRCRegClass,
1910 &PPC::SPERCRegClass,
1911 &PPC::VFHRCRegClass,
1912 &PPC::VFRCRegClass,
1913 &PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClass,
1914 &PPC::SPILLTOVSRRC_and_VFRCRegClass,
1915 &PPC::SPILLTOVSRRC_and_F4RCRegClass,
1916 &PPC::CTRRC8RegClass,
1917 &PPC::LR8RCRegClass,
1918 &PPC::DMRROWRCRegClass,
1919 &PPC::VSRCRegClass,
1920 &PPC::VSRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1921 &PPC::VRRCRegClass,
1922 &PPC::VSLRCRegClass,
1923 &PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1924 &PPC::FpRCRegClass,
1925 &PPC::G8pRCRegClass,
1926 &PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClass,
1927 &PPC::VSLRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1928 &PPC::FpRC_with_sub_fp0_in_SPILLTOVSRRCRegClass,
1929 &PPC::DMRROWpRCRegClass,
1930 &PPC::VSRpRCRegClass,
1931 &PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1932 &PPC::VSRpRC_with_sub_64_in_F4RCRegClass,
1933 &PPC::VSRpRC_with_sub_64_in_VFRCRegClass,
1934 &PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClass,
1935 &PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCRegClass,
1936 &PPC::ACCRCRegClass,
1937 &PPC::UACCRCRegClass,
1938 &PPC::WACCRCRegClass,
1939 &PPC::WACC_HIRCRegClass,
1940 &PPC::ACCRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1941 &PPC::UACCRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1942 &PPC::ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClass,
1943 &PPC::UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClass,
1944 &PPC::DMRRCRegClass,
1945 &PPC::DMRpRCRegClass,
1946 };
1947} // namespace
1948
1949static const uint8_t CostPerUseTable[] = {
19500, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
1951
1952
1953static const bool InAllocatableClassTable[] = {
1954false, true, false, false, true, false, false, false, true, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, };
1955
1956
1957static const TargetRegisterInfoDesc PPCRegInfoDesc = { // Extra Descriptors
1958.CostPerUse: CostPerUseTable, .NumCosts: 1, .InAllocatableClass: InAllocatableClassTable};
1959
1960unsigned PPCGenRegisterInfo::composeSubRegIndicesImpl(unsigned IdxA, unsigned IdxB) const {
1961 static const uint8_t RowMap[55] = {
1962 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 2, 3, 0, 0, 0, 0, 0, 1, 3, 0, 0, 0, 0, 0, 0, 3, 4, 0, 0, 0, 0, 1, 5, 6, 1, 0, 0, 0, 0, 6, 7, 0, 0, 0,
1963 };
1964 static const uint8_t Rows[8][55] = {
1965 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1966 { PPC::sub_gp8_x1_then_sub_32, 0, PPC::sub_pair1_then_sub_64, PPC::sub_pair1_then_sub_64_hi_phony, 0, 0, PPC::sub_dmr1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_dmrrow1, PPC::sub_dmr1_then_sub_dmrrowp0, PPC::sub_dmr1_then_sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_pair1_then_sub_vsx0, PPC::sub_pair1_then_sub_vsx1, PPC::sub_dmr1_then_sub_wacc_hi, PPC::sub_dmr1_then_sub_wacc_lo, PPC::sub_pair1_then_sub_vsx1_then_sub_64, PPC::sub_pair1_then_sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1967 { 0, 0, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1968 { 0, 0, PPC::sub_pair1_then_sub_vsx1_then_sub_64, PPC::sub_pair1_then_sub_vsx1_then_sub_64_hi_phony, 0, 0, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1969 { 0, 0, 0, 0, 0, 0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1970 { 0, 0, 0, 0, 0, 0, PPC::sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1971 { 0, 0, 0, 0, 0, 0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1972 { 0, 0, 0, 0, 0, 0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1973 };
1974
1975 --IdxA; assert(IdxA < 55); (void) IdxA;
1976 --IdxB; assert(IdxB < 55);
1977 return Rows[RowMap[IdxA]][IdxB];
1978}
1979
1980unsigned PPCGenRegisterInfo::reverseComposeSubRegIndicesImpl(unsigned IdxA, unsigned IdxB) const {
1981 static const uint8_t Table[55][55] = {
1982 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1983 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1984 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1985 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1986 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1987 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
1988 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1989 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1990 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1991 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1992 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1993 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1994 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1995 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1996 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
1997 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1998 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1999 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2000 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
2001 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2002 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2003 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2004 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2005 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2006 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2007 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2008 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2009 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2010 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
2011 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2012 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2013 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2014 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2015 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2016 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2017 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2018 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2019 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2020 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2021 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2022 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2023 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2024 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
2025 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, },
2026 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, },
2027 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
2028 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2029 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2030 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2031 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2032 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, },
2033 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, 0, },
2034 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2035 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2036 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2037 };
2038
2039 --IdxA; assert(IdxA < 55);
2040 --IdxB; assert(IdxB < 55);
2041 return Table[IdxA][IdxB];
2042 }
2043
2044 struct MaskRolOp {
2045 LaneBitmask Mask;
2046 uint8_t RotateLeft;
2047 };
2048 static const MaskRolOp LaneMaskComposeSequences[] = {
2049 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 0 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 0
2050 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 1 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 2
2051 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 2 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 4
2052 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 3 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 6
2053 { .Mask: LaneBitmask(0x0000000000000030), .RotateLeft: 20 }, { .Mask: LaneBitmask(0x0000000000FC0000), .RotateLeft: 8 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 8
2054 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 4 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 11
2055 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 5 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 13
2056 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 14 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 15
2057 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 6 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 17
2058 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 7 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 19
2059 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 8 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 21
2060 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 32 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 23
2061 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 9 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 25
2062 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 10 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 27
2063 { .Mask: LaneBitmask(0x000000000000000C), .RotateLeft: 12 }, { .Mask: LaneBitmask(0x0000000000003000), .RotateLeft: 4 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 29
2064 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 11 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 32
2065 { .Mask: LaneBitmask(0x0000000000000030), .RotateLeft: 16 }, { .Mask: LaneBitmask(0x00000000000C0000), .RotateLeft: 4 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 34
2066 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 12 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 37
2067 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 13 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 39
2068 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 15 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 41
2069 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 16 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 43
2070 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 17 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 45
2071 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 18 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 47
2072 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 19 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 49
2073 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 20 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 51
2074 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 21 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 53
2075 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 22 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 55
2076 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 23 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 57
2077 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 24 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 59
2078 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 25 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 61
2079 { .Mask: LaneBitmask(0x0000000000000030), .RotateLeft: 24 }, { .Mask: LaneBitmask(0x00000000000C0000), .RotateLeft: 12 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 63
2080 { .Mask: LaneBitmask(0x0000000000000030), .RotateLeft: 20 }, { .Mask: LaneBitmask(0x00000000000C0000), .RotateLeft: 8 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 66
2081 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 26 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 69
2082 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 27 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 71
2083 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 28 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 73
2084 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 29 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 75
2085 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 30 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 77
2086 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 31 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 } // Sequence 79
2087 };
2088 static const uint8_t CompositeSequences[] = {
2089 0, // to sub_32
2090 2, // to sub_32_hi_phony
2091 4, // to sub_64
2092 6, // to sub_64_hi_phony
2093 0, // to sub_dmr0
2094 8, // to sub_dmr1
2095 11, // to sub_dmrrow0
2096 13, // to sub_dmrrow1
2097 0, // to sub_dmrrowp0
2098 15, // to sub_dmrrowp1
2099 17, // to sub_eq
2100 19, // to sub_fp0
2101 21, // to sub_fp1
2102 0, // to sub_gp8_x0
2103 23, // to sub_gp8_x1
2104 25, // to sub_gt
2105 27, // to sub_lt
2106 0, // to sub_pair0
2107 29, // to sub_pair1
2108 32, // to sub_un
2109 0, // to sub_vsx0
2110 27, // to sub_vsx1
2111 34, // to sub_wacc_hi
2112 0, // to sub_wacc_lo
2113 37, // to sub_vsx1_then_sub_64
2114 39, // to sub_vsx1_then_sub_64_hi_phony
2115 15, // to sub_pair1_then_sub_64
2116 41, // to sub_pair1_then_sub_64_hi_phony
2117 37, // to sub_pair1_then_sub_vsx0
2118 15, // to sub_pair1_then_sub_vsx1
2119 43, // to sub_pair1_then_sub_vsx1_then_sub_64
2120 45, // to sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2121 47, // to sub_dmrrowp1_then_sub_dmrrow0
2122 49, // to sub_dmrrowp1_then_sub_dmrrow1
2123 51, // to sub_wacc_hi_then_sub_dmrrow0
2124 53, // to sub_wacc_hi_then_sub_dmrrow1
2125 43, // to sub_wacc_hi_then_sub_dmrrowp0
2126 47, // to sub_wacc_hi_then_sub_dmrrowp1
2127 55, // to sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2128 57, // to sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2129 59, // to sub_dmr1_then_sub_dmrrow0
2130 61, // to sub_dmr1_then_sub_dmrrow1
2131 51, // to sub_dmr1_then_sub_dmrrowp0
2132 55, // to sub_dmr1_then_sub_dmrrowp1
2133 63, // to sub_dmr1_then_sub_wacc_hi
2134 66, // to sub_dmr1_then_sub_wacc_lo
2135 69, // to sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2136 71, // to sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2137 73, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2138 75, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2139 59, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2140 69, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2141 77, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2142 79, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2143 23 // to sub_gp8_x1_then_sub_32
2144 };
2145
2146LaneBitmask PPCGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
2147 --IdxA; assert(IdxA < 55 && "Subregister index out of bounds");
2148 LaneBitmask Result;
2149 for (const MaskRolOp *Ops =
2150 &LaneMaskComposeSequences[CompositeSequences[IdxA]];
2151 Ops->Mask.any(); ++Ops) {
2152 LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
2153 if (unsigned S = Ops->RotateLeft)
2154 Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
2155 else
2156 Result |= LaneBitmask(M);
2157 }
2158 return Result;
2159}
2160
2161LaneBitmask PPCGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
2162 LaneMask &= getSubRegIndexLaneMask(SubIdx: IdxA);
2163 --IdxA; assert(IdxA < 55 && "Subregister index out of bounds");
2164 LaneBitmask Result;
2165 for (const MaskRolOp *Ops =
2166 &LaneMaskComposeSequences[CompositeSequences[IdxA]];
2167 Ops->Mask.any(); ++Ops) {
2168 LaneBitmask::Type M = LaneMask.getAsInteger();
2169 if (unsigned S = Ops->RotateLeft)
2170 Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
2171 else
2172 Result |= LaneBitmask(M);
2173 }
2174 return Result;
2175}
2176
2177const TargetRegisterClass *PPCGenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
2178 static constexpr uint8_t Table[56][55] = {
2179 { // VSSRC
2180 0, // sub_32
2181 0, // sub_32_hi_phony
2182 0, // sub_64
2183 0, // sub_64_hi_phony
2184 0, // sub_dmr0
2185 0, // sub_dmr1
2186 0, // sub_dmrrow0
2187 0, // sub_dmrrow1
2188 0, // sub_dmrrowp0
2189 0, // sub_dmrrowp1
2190 0, // sub_eq
2191 0, // sub_fp0
2192 0, // sub_fp1
2193 0, // sub_gp8_x0
2194 0, // sub_gp8_x1
2195 0, // sub_gt
2196 0, // sub_lt
2197 0, // sub_pair0
2198 0, // sub_pair1
2199 0, // sub_un
2200 0, // sub_vsx0
2201 0, // sub_vsx1
2202 0, // sub_wacc_hi
2203 0, // sub_wacc_lo
2204 0, // sub_vsx1_then_sub_64
2205 0, // sub_vsx1_then_sub_64_hi_phony
2206 0, // sub_pair1_then_sub_64
2207 0, // sub_pair1_then_sub_64_hi_phony
2208 0, // sub_pair1_then_sub_vsx0
2209 0, // sub_pair1_then_sub_vsx1
2210 0, // sub_pair1_then_sub_vsx1_then_sub_64
2211 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2212 0, // sub_dmrrowp1_then_sub_dmrrow0
2213 0, // sub_dmrrowp1_then_sub_dmrrow1
2214 0, // sub_wacc_hi_then_sub_dmrrow0
2215 0, // sub_wacc_hi_then_sub_dmrrow1
2216 0, // sub_wacc_hi_then_sub_dmrrowp0
2217 0, // sub_wacc_hi_then_sub_dmrrowp1
2218 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2219 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2220 0, // sub_dmr1_then_sub_dmrrow0
2221 0, // sub_dmr1_then_sub_dmrrow1
2222 0, // sub_dmr1_then_sub_dmrrowp0
2223 0, // sub_dmr1_then_sub_dmrrowp1
2224 0, // sub_dmr1_then_sub_wacc_hi
2225 0, // sub_dmr1_then_sub_wacc_lo
2226 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2227 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2228 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2229 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2230 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2231 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2232 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2233 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2234 0, // sub_gp8_x1_then_sub_32
2235 },
2236 { // GPRC
2237 0, // sub_32
2238 0, // sub_32_hi_phony
2239 0, // sub_64
2240 0, // sub_64_hi_phony
2241 0, // sub_dmr0
2242 0, // sub_dmr1
2243 0, // sub_dmrrow0
2244 0, // sub_dmrrow1
2245 0, // sub_dmrrowp0
2246 0, // sub_dmrrowp1
2247 0, // sub_eq
2248 0, // sub_fp0
2249 0, // sub_fp1
2250 0, // sub_gp8_x0
2251 0, // sub_gp8_x1
2252 0, // sub_gt
2253 0, // sub_lt
2254 0, // sub_pair0
2255 0, // sub_pair1
2256 0, // sub_un
2257 0, // sub_vsx0
2258 0, // sub_vsx1
2259 0, // sub_wacc_hi
2260 0, // sub_wacc_lo
2261 0, // sub_vsx1_then_sub_64
2262 0, // sub_vsx1_then_sub_64_hi_phony
2263 0, // sub_pair1_then_sub_64
2264 0, // sub_pair1_then_sub_64_hi_phony
2265 0, // sub_pair1_then_sub_vsx0
2266 0, // sub_pair1_then_sub_vsx1
2267 0, // sub_pair1_then_sub_vsx1_then_sub_64
2268 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2269 0, // sub_dmrrowp1_then_sub_dmrrow0
2270 0, // sub_dmrrowp1_then_sub_dmrrow1
2271 0, // sub_wacc_hi_then_sub_dmrrow0
2272 0, // sub_wacc_hi_then_sub_dmrrow1
2273 0, // sub_wacc_hi_then_sub_dmrrowp0
2274 0, // sub_wacc_hi_then_sub_dmrrowp1
2275 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2276 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2277 0, // sub_dmr1_then_sub_dmrrow0
2278 0, // sub_dmr1_then_sub_dmrrow1
2279 0, // sub_dmr1_then_sub_dmrrowp0
2280 0, // sub_dmr1_then_sub_dmrrowp1
2281 0, // sub_dmr1_then_sub_wacc_hi
2282 0, // sub_dmr1_then_sub_wacc_lo
2283 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2284 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2285 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2286 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2287 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2288 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2289 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2290 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2291 0, // sub_gp8_x1_then_sub_32
2292 },
2293 { // GPRC_NOR0
2294 0, // sub_32
2295 0, // sub_32_hi_phony
2296 0, // sub_64
2297 0, // sub_64_hi_phony
2298 0, // sub_dmr0
2299 0, // sub_dmr1
2300 0, // sub_dmrrow0
2301 0, // sub_dmrrow1
2302 0, // sub_dmrrowp0
2303 0, // sub_dmrrowp1
2304 0, // sub_eq
2305 0, // sub_fp0
2306 0, // sub_fp1
2307 0, // sub_gp8_x0
2308 0, // sub_gp8_x1
2309 0, // sub_gt
2310 0, // sub_lt
2311 0, // sub_pair0
2312 0, // sub_pair1
2313 0, // sub_un
2314 0, // sub_vsx0
2315 0, // sub_vsx1
2316 0, // sub_wacc_hi
2317 0, // sub_wacc_lo
2318 0, // sub_vsx1_then_sub_64
2319 0, // sub_vsx1_then_sub_64_hi_phony
2320 0, // sub_pair1_then_sub_64
2321 0, // sub_pair1_then_sub_64_hi_phony
2322 0, // sub_pair1_then_sub_vsx0
2323 0, // sub_pair1_then_sub_vsx1
2324 0, // sub_pair1_then_sub_vsx1_then_sub_64
2325 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2326 0, // sub_dmrrowp1_then_sub_dmrrow0
2327 0, // sub_dmrrowp1_then_sub_dmrrow1
2328 0, // sub_wacc_hi_then_sub_dmrrow0
2329 0, // sub_wacc_hi_then_sub_dmrrow1
2330 0, // sub_wacc_hi_then_sub_dmrrowp0
2331 0, // sub_wacc_hi_then_sub_dmrrowp1
2332 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2333 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2334 0, // sub_dmr1_then_sub_dmrrow0
2335 0, // sub_dmr1_then_sub_dmrrow1
2336 0, // sub_dmr1_then_sub_dmrrowp0
2337 0, // sub_dmr1_then_sub_dmrrowp1
2338 0, // sub_dmr1_then_sub_wacc_hi
2339 0, // sub_dmr1_then_sub_wacc_lo
2340 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2341 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2342 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2343 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2344 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2345 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2346 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2347 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2348 0, // sub_gp8_x1_then_sub_32
2349 },
2350 { // GPRC_and_GPRC_NOR0
2351 0, // sub_32
2352 0, // sub_32_hi_phony
2353 0, // sub_64
2354 0, // sub_64_hi_phony
2355 0, // sub_dmr0
2356 0, // sub_dmr1
2357 0, // sub_dmrrow0
2358 0, // sub_dmrrow1
2359 0, // sub_dmrrowp0
2360 0, // sub_dmrrowp1
2361 0, // sub_eq
2362 0, // sub_fp0
2363 0, // sub_fp1
2364 0, // sub_gp8_x0
2365 0, // sub_gp8_x1
2366 0, // sub_gt
2367 0, // sub_lt
2368 0, // sub_pair0
2369 0, // sub_pair1
2370 0, // sub_un
2371 0, // sub_vsx0
2372 0, // sub_vsx1
2373 0, // sub_wacc_hi
2374 0, // sub_wacc_lo
2375 0, // sub_vsx1_then_sub_64
2376 0, // sub_vsx1_then_sub_64_hi_phony
2377 0, // sub_pair1_then_sub_64
2378 0, // sub_pair1_then_sub_64_hi_phony
2379 0, // sub_pair1_then_sub_vsx0
2380 0, // sub_pair1_then_sub_vsx1
2381 0, // sub_pair1_then_sub_vsx1_then_sub_64
2382 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2383 0, // sub_dmrrowp1_then_sub_dmrrow0
2384 0, // sub_dmrrowp1_then_sub_dmrrow1
2385 0, // sub_wacc_hi_then_sub_dmrrow0
2386 0, // sub_wacc_hi_then_sub_dmrrow1
2387 0, // sub_wacc_hi_then_sub_dmrrowp0
2388 0, // sub_wacc_hi_then_sub_dmrrowp1
2389 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2390 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2391 0, // sub_dmr1_then_sub_dmrrow0
2392 0, // sub_dmr1_then_sub_dmrrow1
2393 0, // sub_dmr1_then_sub_dmrrowp0
2394 0, // sub_dmr1_then_sub_dmrrowp1
2395 0, // sub_dmr1_then_sub_wacc_hi
2396 0, // sub_dmr1_then_sub_wacc_lo
2397 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2398 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2399 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2400 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2401 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2402 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2403 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2404 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2405 0, // sub_gp8_x1_then_sub_32
2406 },
2407 { // CRBITRC
2408 0, // sub_32
2409 0, // sub_32_hi_phony
2410 0, // sub_64
2411 0, // sub_64_hi_phony
2412 0, // sub_dmr0
2413 0, // sub_dmr1
2414 0, // sub_dmrrow0
2415 0, // sub_dmrrow1
2416 0, // sub_dmrrowp0
2417 0, // sub_dmrrowp1
2418 0, // sub_eq
2419 0, // sub_fp0
2420 0, // sub_fp1
2421 0, // sub_gp8_x0
2422 0, // sub_gp8_x1
2423 0, // sub_gt
2424 0, // sub_lt
2425 0, // sub_pair0
2426 0, // sub_pair1
2427 0, // sub_un
2428 0, // sub_vsx0
2429 0, // sub_vsx1
2430 0, // sub_wacc_hi
2431 0, // sub_wacc_lo
2432 0, // sub_vsx1_then_sub_64
2433 0, // sub_vsx1_then_sub_64_hi_phony
2434 0, // sub_pair1_then_sub_64
2435 0, // sub_pair1_then_sub_64_hi_phony
2436 0, // sub_pair1_then_sub_vsx0
2437 0, // sub_pair1_then_sub_vsx1
2438 0, // sub_pair1_then_sub_vsx1_then_sub_64
2439 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2440 0, // sub_dmrrowp1_then_sub_dmrrow0
2441 0, // sub_dmrrowp1_then_sub_dmrrow1
2442 0, // sub_wacc_hi_then_sub_dmrrow0
2443 0, // sub_wacc_hi_then_sub_dmrrow1
2444 0, // sub_wacc_hi_then_sub_dmrrowp0
2445 0, // sub_wacc_hi_then_sub_dmrrowp1
2446 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2447 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2448 0, // sub_dmr1_then_sub_dmrrow0
2449 0, // sub_dmr1_then_sub_dmrrow1
2450 0, // sub_dmr1_then_sub_dmrrowp0
2451 0, // sub_dmr1_then_sub_dmrrowp1
2452 0, // sub_dmr1_then_sub_wacc_hi
2453 0, // sub_dmr1_then_sub_wacc_lo
2454 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2455 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2456 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2457 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2458 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2459 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2460 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2461 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2462 0, // sub_gp8_x1_then_sub_32
2463 },
2464 { // F4RC
2465 0, // sub_32
2466 0, // sub_32_hi_phony
2467 0, // sub_64
2468 0, // sub_64_hi_phony
2469 0, // sub_dmr0
2470 0, // sub_dmr1
2471 0, // sub_dmrrow0
2472 0, // sub_dmrrow1
2473 0, // sub_dmrrowp0
2474 0, // sub_dmrrowp1
2475 0, // sub_eq
2476 0, // sub_fp0
2477 0, // sub_fp1
2478 0, // sub_gp8_x0
2479 0, // sub_gp8_x1
2480 0, // sub_gt
2481 0, // sub_lt
2482 0, // sub_pair0
2483 0, // sub_pair1
2484 0, // sub_un
2485 0, // sub_vsx0
2486 0, // sub_vsx1
2487 0, // sub_wacc_hi
2488 0, // sub_wacc_lo
2489 0, // sub_vsx1_then_sub_64
2490 0, // sub_vsx1_then_sub_64_hi_phony
2491 0, // sub_pair1_then_sub_64
2492 0, // sub_pair1_then_sub_64_hi_phony
2493 0, // sub_pair1_then_sub_vsx0
2494 0, // sub_pair1_then_sub_vsx1
2495 0, // sub_pair1_then_sub_vsx1_then_sub_64
2496 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2497 0, // sub_dmrrowp1_then_sub_dmrrow0
2498 0, // sub_dmrrowp1_then_sub_dmrrow1
2499 0, // sub_wacc_hi_then_sub_dmrrow0
2500 0, // sub_wacc_hi_then_sub_dmrrow1
2501 0, // sub_wacc_hi_then_sub_dmrrowp0
2502 0, // sub_wacc_hi_then_sub_dmrrowp1
2503 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2504 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2505 0, // sub_dmr1_then_sub_dmrrow0
2506 0, // sub_dmr1_then_sub_dmrrow1
2507 0, // sub_dmr1_then_sub_dmrrowp0
2508 0, // sub_dmr1_then_sub_dmrrowp1
2509 0, // sub_dmr1_then_sub_wacc_hi
2510 0, // sub_dmr1_then_sub_wacc_lo
2511 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2512 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2513 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2514 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2515 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2516 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2517 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2518 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2519 0, // sub_gp8_x1_then_sub_32
2520 },
2521 { // GPRC32
2522 0, // sub_32
2523 0, // sub_32_hi_phony
2524 0, // sub_64
2525 0, // sub_64_hi_phony
2526 0, // sub_dmr0
2527 0, // sub_dmr1
2528 0, // sub_dmrrow0
2529 0, // sub_dmrrow1
2530 0, // sub_dmrrowp0
2531 0, // sub_dmrrowp1
2532 0, // sub_eq
2533 0, // sub_fp0
2534 0, // sub_fp1
2535 0, // sub_gp8_x0
2536 0, // sub_gp8_x1
2537 0, // sub_gt
2538 0, // sub_lt
2539 0, // sub_pair0
2540 0, // sub_pair1
2541 0, // sub_un
2542 0, // sub_vsx0
2543 0, // sub_vsx1
2544 0, // sub_wacc_hi
2545 0, // sub_wacc_lo
2546 0, // sub_vsx1_then_sub_64
2547 0, // sub_vsx1_then_sub_64_hi_phony
2548 0, // sub_pair1_then_sub_64
2549 0, // sub_pair1_then_sub_64_hi_phony
2550 0, // sub_pair1_then_sub_vsx0
2551 0, // sub_pair1_then_sub_vsx1
2552 0, // sub_pair1_then_sub_vsx1_then_sub_64
2553 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2554 0, // sub_dmrrowp1_then_sub_dmrrow0
2555 0, // sub_dmrrowp1_then_sub_dmrrow1
2556 0, // sub_wacc_hi_then_sub_dmrrow0
2557 0, // sub_wacc_hi_then_sub_dmrrow1
2558 0, // sub_wacc_hi_then_sub_dmrrowp0
2559 0, // sub_wacc_hi_then_sub_dmrrowp1
2560 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2561 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2562 0, // sub_dmr1_then_sub_dmrrow0
2563 0, // sub_dmr1_then_sub_dmrrow1
2564 0, // sub_dmr1_then_sub_dmrrowp0
2565 0, // sub_dmr1_then_sub_dmrrowp1
2566 0, // sub_dmr1_then_sub_wacc_hi
2567 0, // sub_dmr1_then_sub_wacc_lo
2568 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2569 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2570 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2571 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2572 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2573 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2574 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2575 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2576 0, // sub_gp8_x1_then_sub_32
2577 },
2578 { // CRRC
2579 0, // sub_32
2580 0, // sub_32_hi_phony
2581 0, // sub_64
2582 0, // sub_64_hi_phony
2583 0, // sub_dmr0
2584 0, // sub_dmr1
2585 0, // sub_dmrrow0
2586 0, // sub_dmrrow1
2587 0, // sub_dmrrowp0
2588 0, // sub_dmrrowp1
2589 8, // sub_eq -> CRRC
2590 0, // sub_fp0
2591 0, // sub_fp1
2592 0, // sub_gp8_x0
2593 0, // sub_gp8_x1
2594 8, // sub_gt -> CRRC
2595 8, // sub_lt -> CRRC
2596 0, // sub_pair0
2597 0, // sub_pair1
2598 8, // sub_un -> CRRC
2599 0, // sub_vsx0
2600 0, // sub_vsx1
2601 0, // sub_wacc_hi
2602 0, // sub_wacc_lo
2603 0, // sub_vsx1_then_sub_64
2604 0, // sub_vsx1_then_sub_64_hi_phony
2605 0, // sub_pair1_then_sub_64
2606 0, // sub_pair1_then_sub_64_hi_phony
2607 0, // sub_pair1_then_sub_vsx0
2608 0, // sub_pair1_then_sub_vsx1
2609 0, // sub_pair1_then_sub_vsx1_then_sub_64
2610 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2611 0, // sub_dmrrowp1_then_sub_dmrrow0
2612 0, // sub_dmrrowp1_then_sub_dmrrow1
2613 0, // sub_wacc_hi_then_sub_dmrrow0
2614 0, // sub_wacc_hi_then_sub_dmrrow1
2615 0, // sub_wacc_hi_then_sub_dmrrowp0
2616 0, // sub_wacc_hi_then_sub_dmrrowp1
2617 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2618 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2619 0, // sub_dmr1_then_sub_dmrrow0
2620 0, // sub_dmr1_then_sub_dmrrow1
2621 0, // sub_dmr1_then_sub_dmrrowp0
2622 0, // sub_dmr1_then_sub_dmrrowp1
2623 0, // sub_dmr1_then_sub_wacc_hi
2624 0, // sub_dmr1_then_sub_wacc_lo
2625 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2626 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2627 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2628 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2629 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2630 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2631 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2632 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2633 0, // sub_gp8_x1_then_sub_32
2634 },
2635 { // CARRYRC
2636 0, // sub_32
2637 0, // sub_32_hi_phony
2638 0, // sub_64
2639 0, // sub_64_hi_phony
2640 0, // sub_dmr0
2641 0, // sub_dmr1
2642 0, // sub_dmrrow0
2643 0, // sub_dmrrow1
2644 0, // sub_dmrrowp0
2645 0, // sub_dmrrowp1
2646 0, // sub_eq
2647 0, // sub_fp0
2648 0, // sub_fp1
2649 0, // sub_gp8_x0
2650 0, // sub_gp8_x1
2651 0, // sub_gt
2652 0, // sub_lt
2653 0, // sub_pair0
2654 0, // sub_pair1
2655 0, // sub_un
2656 0, // sub_vsx0
2657 0, // sub_vsx1
2658 0, // sub_wacc_hi
2659 0, // sub_wacc_lo
2660 0, // sub_vsx1_then_sub_64
2661 0, // sub_vsx1_then_sub_64_hi_phony
2662 0, // sub_pair1_then_sub_64
2663 0, // sub_pair1_then_sub_64_hi_phony
2664 0, // sub_pair1_then_sub_vsx0
2665 0, // sub_pair1_then_sub_vsx1
2666 0, // sub_pair1_then_sub_vsx1_then_sub_64
2667 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2668 0, // sub_dmrrowp1_then_sub_dmrrow0
2669 0, // sub_dmrrowp1_then_sub_dmrrow1
2670 0, // sub_wacc_hi_then_sub_dmrrow0
2671 0, // sub_wacc_hi_then_sub_dmrrow1
2672 0, // sub_wacc_hi_then_sub_dmrrowp0
2673 0, // sub_wacc_hi_then_sub_dmrrowp1
2674 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2675 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2676 0, // sub_dmr1_then_sub_dmrrow0
2677 0, // sub_dmr1_then_sub_dmrrow1
2678 0, // sub_dmr1_then_sub_dmrrowp0
2679 0, // sub_dmr1_then_sub_dmrrowp1
2680 0, // sub_dmr1_then_sub_wacc_hi
2681 0, // sub_dmr1_then_sub_wacc_lo
2682 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2683 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2684 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2685 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2686 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2687 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2688 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2689 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2690 0, // sub_gp8_x1_then_sub_32
2691 },
2692 { // CTRRC
2693 0, // sub_32
2694 0, // sub_32_hi_phony
2695 0, // sub_64
2696 0, // sub_64_hi_phony
2697 0, // sub_dmr0
2698 0, // sub_dmr1
2699 0, // sub_dmrrow0
2700 0, // sub_dmrrow1
2701 0, // sub_dmrrowp0
2702 0, // sub_dmrrowp1
2703 0, // sub_eq
2704 0, // sub_fp0
2705 0, // sub_fp1
2706 0, // sub_gp8_x0
2707 0, // sub_gp8_x1
2708 0, // sub_gt
2709 0, // sub_lt
2710 0, // sub_pair0
2711 0, // sub_pair1
2712 0, // sub_un
2713 0, // sub_vsx0
2714 0, // sub_vsx1
2715 0, // sub_wacc_hi
2716 0, // sub_wacc_lo
2717 0, // sub_vsx1_then_sub_64
2718 0, // sub_vsx1_then_sub_64_hi_phony
2719 0, // sub_pair1_then_sub_64
2720 0, // sub_pair1_then_sub_64_hi_phony
2721 0, // sub_pair1_then_sub_vsx0
2722 0, // sub_pair1_then_sub_vsx1
2723 0, // sub_pair1_then_sub_vsx1_then_sub_64
2724 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2725 0, // sub_dmrrowp1_then_sub_dmrrow0
2726 0, // sub_dmrrowp1_then_sub_dmrrow1
2727 0, // sub_wacc_hi_then_sub_dmrrow0
2728 0, // sub_wacc_hi_then_sub_dmrrow1
2729 0, // sub_wacc_hi_then_sub_dmrrowp0
2730 0, // sub_wacc_hi_then_sub_dmrrowp1
2731 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2732 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2733 0, // sub_dmr1_then_sub_dmrrow0
2734 0, // sub_dmr1_then_sub_dmrrow1
2735 0, // sub_dmr1_then_sub_dmrrowp0
2736 0, // sub_dmr1_then_sub_dmrrowp1
2737 0, // sub_dmr1_then_sub_wacc_hi
2738 0, // sub_dmr1_then_sub_wacc_lo
2739 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2740 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2741 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2742 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2743 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2744 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2745 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2746 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2747 0, // sub_gp8_x1_then_sub_32
2748 },
2749 { // LRRC
2750 0, // sub_32
2751 0, // sub_32_hi_phony
2752 0, // sub_64
2753 0, // sub_64_hi_phony
2754 0, // sub_dmr0
2755 0, // sub_dmr1
2756 0, // sub_dmrrow0
2757 0, // sub_dmrrow1
2758 0, // sub_dmrrowp0
2759 0, // sub_dmrrowp1
2760 0, // sub_eq
2761 0, // sub_fp0
2762 0, // sub_fp1
2763 0, // sub_gp8_x0
2764 0, // sub_gp8_x1
2765 0, // sub_gt
2766 0, // sub_lt
2767 0, // sub_pair0
2768 0, // sub_pair1
2769 0, // sub_un
2770 0, // sub_vsx0
2771 0, // sub_vsx1
2772 0, // sub_wacc_hi
2773 0, // sub_wacc_lo
2774 0, // sub_vsx1_then_sub_64
2775 0, // sub_vsx1_then_sub_64_hi_phony
2776 0, // sub_pair1_then_sub_64
2777 0, // sub_pair1_then_sub_64_hi_phony
2778 0, // sub_pair1_then_sub_vsx0
2779 0, // sub_pair1_then_sub_vsx1
2780 0, // sub_pair1_then_sub_vsx1_then_sub_64
2781 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2782 0, // sub_dmrrowp1_then_sub_dmrrow0
2783 0, // sub_dmrrowp1_then_sub_dmrrow1
2784 0, // sub_wacc_hi_then_sub_dmrrow0
2785 0, // sub_wacc_hi_then_sub_dmrrow1
2786 0, // sub_wacc_hi_then_sub_dmrrowp0
2787 0, // sub_wacc_hi_then_sub_dmrrowp1
2788 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2789 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2790 0, // sub_dmr1_then_sub_dmrrow0
2791 0, // sub_dmr1_then_sub_dmrrow1
2792 0, // sub_dmr1_then_sub_dmrrowp0
2793 0, // sub_dmr1_then_sub_dmrrowp1
2794 0, // sub_dmr1_then_sub_wacc_hi
2795 0, // sub_dmr1_then_sub_wacc_lo
2796 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2797 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2798 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2799 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2800 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2801 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2802 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2803 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2804 0, // sub_gp8_x1_then_sub_32
2805 },
2806 { // VRSAVERC
2807 0, // sub_32
2808 0, // sub_32_hi_phony
2809 0, // sub_64
2810 0, // sub_64_hi_phony
2811 0, // sub_dmr0
2812 0, // sub_dmr1
2813 0, // sub_dmrrow0
2814 0, // sub_dmrrow1
2815 0, // sub_dmrrowp0
2816 0, // sub_dmrrowp1
2817 0, // sub_eq
2818 0, // sub_fp0
2819 0, // sub_fp1
2820 0, // sub_gp8_x0
2821 0, // sub_gp8_x1
2822 0, // sub_gt
2823 0, // sub_lt
2824 0, // sub_pair0
2825 0, // sub_pair1
2826 0, // sub_un
2827 0, // sub_vsx0
2828 0, // sub_vsx1
2829 0, // sub_wacc_hi
2830 0, // sub_wacc_lo
2831 0, // sub_vsx1_then_sub_64
2832 0, // sub_vsx1_then_sub_64_hi_phony
2833 0, // sub_pair1_then_sub_64
2834 0, // sub_pair1_then_sub_64_hi_phony
2835 0, // sub_pair1_then_sub_vsx0
2836 0, // sub_pair1_then_sub_vsx1
2837 0, // sub_pair1_then_sub_vsx1_then_sub_64
2838 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2839 0, // sub_dmrrowp1_then_sub_dmrrow0
2840 0, // sub_dmrrowp1_then_sub_dmrrow1
2841 0, // sub_wacc_hi_then_sub_dmrrow0
2842 0, // sub_wacc_hi_then_sub_dmrrow1
2843 0, // sub_wacc_hi_then_sub_dmrrowp0
2844 0, // sub_wacc_hi_then_sub_dmrrowp1
2845 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2846 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2847 0, // sub_dmr1_then_sub_dmrrow0
2848 0, // sub_dmr1_then_sub_dmrrow1
2849 0, // sub_dmr1_then_sub_dmrrowp0
2850 0, // sub_dmr1_then_sub_dmrrowp1
2851 0, // sub_dmr1_then_sub_wacc_hi
2852 0, // sub_dmr1_then_sub_wacc_lo
2853 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2854 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2855 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2856 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2857 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2858 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2859 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2860 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2861 0, // sub_gp8_x1_then_sub_32
2862 },
2863 { // SPILLTOVSRRC
2864 15, // sub_32 -> G8RC
2865 0, // sub_32_hi_phony
2866 0, // sub_64
2867 0, // sub_64_hi_phony
2868 0, // sub_dmr0
2869 0, // sub_dmr1
2870 0, // sub_dmrrow0
2871 0, // sub_dmrrow1
2872 0, // sub_dmrrowp0
2873 0, // sub_dmrrowp1
2874 0, // sub_eq
2875 0, // sub_fp0
2876 0, // sub_fp1
2877 0, // sub_gp8_x0
2878 0, // sub_gp8_x1
2879 0, // sub_gt
2880 0, // sub_lt
2881 0, // sub_pair0
2882 0, // sub_pair1
2883 0, // sub_un
2884 0, // sub_vsx0
2885 0, // sub_vsx1
2886 0, // sub_wacc_hi
2887 0, // sub_wacc_lo
2888 0, // sub_vsx1_then_sub_64
2889 0, // sub_vsx1_then_sub_64_hi_phony
2890 0, // sub_pair1_then_sub_64
2891 0, // sub_pair1_then_sub_64_hi_phony
2892 0, // sub_pair1_then_sub_vsx0
2893 0, // sub_pair1_then_sub_vsx1
2894 0, // sub_pair1_then_sub_vsx1_then_sub_64
2895 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2896 0, // sub_dmrrowp1_then_sub_dmrrow0
2897 0, // sub_dmrrowp1_then_sub_dmrrow1
2898 0, // sub_wacc_hi_then_sub_dmrrow0
2899 0, // sub_wacc_hi_then_sub_dmrrow1
2900 0, // sub_wacc_hi_then_sub_dmrrowp0
2901 0, // sub_wacc_hi_then_sub_dmrrowp1
2902 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2903 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2904 0, // sub_dmr1_then_sub_dmrrow0
2905 0, // sub_dmr1_then_sub_dmrrow1
2906 0, // sub_dmr1_then_sub_dmrrowp0
2907 0, // sub_dmr1_then_sub_dmrrowp1
2908 0, // sub_dmr1_then_sub_wacc_hi
2909 0, // sub_dmr1_then_sub_wacc_lo
2910 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2911 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2912 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2913 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2914 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2915 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2916 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2917 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2918 0, // sub_gp8_x1_then_sub_32
2919 },
2920 { // VSFRC
2921 0, // sub_32
2922 0, // sub_32_hi_phony
2923 0, // sub_64
2924 0, // sub_64_hi_phony
2925 0, // sub_dmr0
2926 0, // sub_dmr1
2927 0, // sub_dmrrow0
2928 0, // sub_dmrrow1
2929 0, // sub_dmrrowp0
2930 0, // sub_dmrrowp1
2931 0, // sub_eq
2932 0, // sub_fp0
2933 0, // sub_fp1
2934 0, // sub_gp8_x0
2935 0, // sub_gp8_x1
2936 0, // sub_gt
2937 0, // sub_lt
2938 0, // sub_pair0
2939 0, // sub_pair1
2940 0, // sub_un
2941 0, // sub_vsx0
2942 0, // sub_vsx1
2943 0, // sub_wacc_hi
2944 0, // sub_wacc_lo
2945 0, // sub_vsx1_then_sub_64
2946 0, // sub_vsx1_then_sub_64_hi_phony
2947 0, // sub_pair1_then_sub_64
2948 0, // sub_pair1_then_sub_64_hi_phony
2949 0, // sub_pair1_then_sub_vsx0
2950 0, // sub_pair1_then_sub_vsx1
2951 0, // sub_pair1_then_sub_vsx1_then_sub_64
2952 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2953 0, // sub_dmrrowp1_then_sub_dmrrow0
2954 0, // sub_dmrrowp1_then_sub_dmrrow1
2955 0, // sub_wacc_hi_then_sub_dmrrow0
2956 0, // sub_wacc_hi_then_sub_dmrrow1
2957 0, // sub_wacc_hi_then_sub_dmrrowp0
2958 0, // sub_wacc_hi_then_sub_dmrrowp1
2959 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2960 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2961 0, // sub_dmr1_then_sub_dmrrow0
2962 0, // sub_dmr1_then_sub_dmrrow1
2963 0, // sub_dmr1_then_sub_dmrrowp0
2964 0, // sub_dmr1_then_sub_dmrrowp1
2965 0, // sub_dmr1_then_sub_wacc_hi
2966 0, // sub_dmr1_then_sub_wacc_lo
2967 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2968 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2969 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2970 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2971 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2972 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2973 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2974 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2975 0, // sub_gp8_x1_then_sub_32
2976 },
2977 { // G8RC
2978 15, // sub_32 -> G8RC
2979 0, // sub_32_hi_phony
2980 0, // sub_64
2981 0, // sub_64_hi_phony
2982 0, // sub_dmr0
2983 0, // sub_dmr1
2984 0, // sub_dmrrow0
2985 0, // sub_dmrrow1
2986 0, // sub_dmrrowp0
2987 0, // sub_dmrrowp1
2988 0, // sub_eq
2989 0, // sub_fp0
2990 0, // sub_fp1
2991 0, // sub_gp8_x0
2992 0, // sub_gp8_x1
2993 0, // sub_gt
2994 0, // sub_lt
2995 0, // sub_pair0
2996 0, // sub_pair1
2997 0, // sub_un
2998 0, // sub_vsx0
2999 0, // sub_vsx1
3000 0, // sub_wacc_hi
3001 0, // sub_wacc_lo
3002 0, // sub_vsx1_then_sub_64
3003 0, // sub_vsx1_then_sub_64_hi_phony
3004 0, // sub_pair1_then_sub_64
3005 0, // sub_pair1_then_sub_64_hi_phony
3006 0, // sub_pair1_then_sub_vsx0
3007 0, // sub_pair1_then_sub_vsx1
3008 0, // sub_pair1_then_sub_vsx1_then_sub_64
3009 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3010 0, // sub_dmrrowp1_then_sub_dmrrow0
3011 0, // sub_dmrrowp1_then_sub_dmrrow1
3012 0, // sub_wacc_hi_then_sub_dmrrow0
3013 0, // sub_wacc_hi_then_sub_dmrrow1
3014 0, // sub_wacc_hi_then_sub_dmrrowp0
3015 0, // sub_wacc_hi_then_sub_dmrrowp1
3016 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3017 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3018 0, // sub_dmr1_then_sub_dmrrow0
3019 0, // sub_dmr1_then_sub_dmrrow1
3020 0, // sub_dmr1_then_sub_dmrrowp0
3021 0, // sub_dmr1_then_sub_dmrrowp1
3022 0, // sub_dmr1_then_sub_wacc_hi
3023 0, // sub_dmr1_then_sub_wacc_lo
3024 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3025 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3026 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3027 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3028 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3029 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3030 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3031 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3032 0, // sub_gp8_x1_then_sub_32
3033 },
3034 { // G8RC_NOX0
3035 16, // sub_32 -> G8RC_NOX0
3036 0, // sub_32_hi_phony
3037 0, // sub_64
3038 0, // sub_64_hi_phony
3039 0, // sub_dmr0
3040 0, // sub_dmr1
3041 0, // sub_dmrrow0
3042 0, // sub_dmrrow1
3043 0, // sub_dmrrowp0
3044 0, // sub_dmrrowp1
3045 0, // sub_eq
3046 0, // sub_fp0
3047 0, // sub_fp1
3048 0, // sub_gp8_x0
3049 0, // sub_gp8_x1
3050 0, // sub_gt
3051 0, // sub_lt
3052 0, // sub_pair0
3053 0, // sub_pair1
3054 0, // sub_un
3055 0, // sub_vsx0
3056 0, // sub_vsx1
3057 0, // sub_wacc_hi
3058 0, // sub_wacc_lo
3059 0, // sub_vsx1_then_sub_64
3060 0, // sub_vsx1_then_sub_64_hi_phony
3061 0, // sub_pair1_then_sub_64
3062 0, // sub_pair1_then_sub_64_hi_phony
3063 0, // sub_pair1_then_sub_vsx0
3064 0, // sub_pair1_then_sub_vsx1
3065 0, // sub_pair1_then_sub_vsx1_then_sub_64
3066 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3067 0, // sub_dmrrowp1_then_sub_dmrrow0
3068 0, // sub_dmrrowp1_then_sub_dmrrow1
3069 0, // sub_wacc_hi_then_sub_dmrrow0
3070 0, // sub_wacc_hi_then_sub_dmrrow1
3071 0, // sub_wacc_hi_then_sub_dmrrowp0
3072 0, // sub_wacc_hi_then_sub_dmrrowp1
3073 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3074 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3075 0, // sub_dmr1_then_sub_dmrrow0
3076 0, // sub_dmr1_then_sub_dmrrow1
3077 0, // sub_dmr1_then_sub_dmrrowp0
3078 0, // sub_dmr1_then_sub_dmrrowp1
3079 0, // sub_dmr1_then_sub_wacc_hi
3080 0, // sub_dmr1_then_sub_wacc_lo
3081 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3082 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3083 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3084 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3085 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3086 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3087 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3088 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3089 0, // sub_gp8_x1_then_sub_32
3090 },
3091 { // SPILLTOVSRRC_and_VSFRC
3092 0, // sub_32
3093 0, // sub_32_hi_phony
3094 0, // sub_64
3095 0, // sub_64_hi_phony
3096 0, // sub_dmr0
3097 0, // sub_dmr1
3098 0, // sub_dmrrow0
3099 0, // sub_dmrrow1
3100 0, // sub_dmrrowp0
3101 0, // sub_dmrrowp1
3102 0, // sub_eq
3103 0, // sub_fp0
3104 0, // sub_fp1
3105 0, // sub_gp8_x0
3106 0, // sub_gp8_x1
3107 0, // sub_gt
3108 0, // sub_lt
3109 0, // sub_pair0
3110 0, // sub_pair1
3111 0, // sub_un
3112 0, // sub_vsx0
3113 0, // sub_vsx1
3114 0, // sub_wacc_hi
3115 0, // sub_wacc_lo
3116 0, // sub_vsx1_then_sub_64
3117 0, // sub_vsx1_then_sub_64_hi_phony
3118 0, // sub_pair1_then_sub_64
3119 0, // sub_pair1_then_sub_64_hi_phony
3120 0, // sub_pair1_then_sub_vsx0
3121 0, // sub_pair1_then_sub_vsx1
3122 0, // sub_pair1_then_sub_vsx1_then_sub_64
3123 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3124 0, // sub_dmrrowp1_then_sub_dmrrow0
3125 0, // sub_dmrrowp1_then_sub_dmrrow1
3126 0, // sub_wacc_hi_then_sub_dmrrow0
3127 0, // sub_wacc_hi_then_sub_dmrrow1
3128 0, // sub_wacc_hi_then_sub_dmrrowp0
3129 0, // sub_wacc_hi_then_sub_dmrrowp1
3130 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3131 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3132 0, // sub_dmr1_then_sub_dmrrow0
3133 0, // sub_dmr1_then_sub_dmrrow1
3134 0, // sub_dmr1_then_sub_dmrrowp0
3135 0, // sub_dmr1_then_sub_dmrrowp1
3136 0, // sub_dmr1_then_sub_wacc_hi
3137 0, // sub_dmr1_then_sub_wacc_lo
3138 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3139 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3140 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3141 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3142 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3143 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3144 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3145 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3146 0, // sub_gp8_x1_then_sub_32
3147 },
3148 { // G8RC_and_G8RC_NOX0
3149 18, // sub_32 -> G8RC_and_G8RC_NOX0
3150 0, // sub_32_hi_phony
3151 0, // sub_64
3152 0, // sub_64_hi_phony
3153 0, // sub_dmr0
3154 0, // sub_dmr1
3155 0, // sub_dmrrow0
3156 0, // sub_dmrrow1
3157 0, // sub_dmrrowp0
3158 0, // sub_dmrrowp1
3159 0, // sub_eq
3160 0, // sub_fp0
3161 0, // sub_fp1
3162 0, // sub_gp8_x0
3163 0, // sub_gp8_x1
3164 0, // sub_gt
3165 0, // sub_lt
3166 0, // sub_pair0
3167 0, // sub_pair1
3168 0, // sub_un
3169 0, // sub_vsx0
3170 0, // sub_vsx1
3171 0, // sub_wacc_hi
3172 0, // sub_wacc_lo
3173 0, // sub_vsx1_then_sub_64
3174 0, // sub_vsx1_then_sub_64_hi_phony
3175 0, // sub_pair1_then_sub_64
3176 0, // sub_pair1_then_sub_64_hi_phony
3177 0, // sub_pair1_then_sub_vsx0
3178 0, // sub_pair1_then_sub_vsx1
3179 0, // sub_pair1_then_sub_vsx1_then_sub_64
3180 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3181 0, // sub_dmrrowp1_then_sub_dmrrow0
3182 0, // sub_dmrrowp1_then_sub_dmrrow1
3183 0, // sub_wacc_hi_then_sub_dmrrow0
3184 0, // sub_wacc_hi_then_sub_dmrrow1
3185 0, // sub_wacc_hi_then_sub_dmrrowp0
3186 0, // sub_wacc_hi_then_sub_dmrrowp1
3187 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3188 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3189 0, // sub_dmr1_then_sub_dmrrow0
3190 0, // sub_dmr1_then_sub_dmrrow1
3191 0, // sub_dmr1_then_sub_dmrrowp0
3192 0, // sub_dmr1_then_sub_dmrrowp1
3193 0, // sub_dmr1_then_sub_wacc_hi
3194 0, // sub_dmr1_then_sub_wacc_lo
3195 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3196 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3197 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3198 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3199 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3200 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3201 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3202 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3203 0, // sub_gp8_x1_then_sub_32
3204 },
3205 { // F8RC
3206 0, // sub_32
3207 0, // sub_32_hi_phony
3208 0, // sub_64
3209 0, // sub_64_hi_phony
3210 0, // sub_dmr0
3211 0, // sub_dmr1
3212 0, // sub_dmrrow0
3213 0, // sub_dmrrow1
3214 0, // sub_dmrrowp0
3215 0, // sub_dmrrowp1
3216 0, // sub_eq
3217 0, // sub_fp0
3218 0, // sub_fp1
3219 0, // sub_gp8_x0
3220 0, // sub_gp8_x1
3221 0, // sub_gt
3222 0, // sub_lt
3223 0, // sub_pair0
3224 0, // sub_pair1
3225 0, // sub_un
3226 0, // sub_vsx0
3227 0, // sub_vsx1
3228 0, // sub_wacc_hi
3229 0, // sub_wacc_lo
3230 0, // sub_vsx1_then_sub_64
3231 0, // sub_vsx1_then_sub_64_hi_phony
3232 0, // sub_pair1_then_sub_64
3233 0, // sub_pair1_then_sub_64_hi_phony
3234 0, // sub_pair1_then_sub_vsx0
3235 0, // sub_pair1_then_sub_vsx1
3236 0, // sub_pair1_then_sub_vsx1_then_sub_64
3237 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3238 0, // sub_dmrrowp1_then_sub_dmrrow0
3239 0, // sub_dmrrowp1_then_sub_dmrrow1
3240 0, // sub_wacc_hi_then_sub_dmrrow0
3241 0, // sub_wacc_hi_then_sub_dmrrow1
3242 0, // sub_wacc_hi_then_sub_dmrrowp0
3243 0, // sub_wacc_hi_then_sub_dmrrowp1
3244 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3245 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3246 0, // sub_dmr1_then_sub_dmrrow0
3247 0, // sub_dmr1_then_sub_dmrrow1
3248 0, // sub_dmr1_then_sub_dmrrowp0
3249 0, // sub_dmr1_then_sub_dmrrowp1
3250 0, // sub_dmr1_then_sub_wacc_hi
3251 0, // sub_dmr1_then_sub_wacc_lo
3252 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3253 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3254 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3255 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3256 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3257 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3258 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3259 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3260 0, // sub_gp8_x1_then_sub_32
3261 },
3262 { // FHRC
3263 0, // sub_32
3264 0, // sub_32_hi_phony
3265 0, // sub_64
3266 0, // sub_64_hi_phony
3267 0, // sub_dmr0
3268 0, // sub_dmr1
3269 0, // sub_dmrrow0
3270 0, // sub_dmrrow1
3271 0, // sub_dmrrowp0
3272 0, // sub_dmrrowp1
3273 0, // sub_eq
3274 0, // sub_fp0
3275 0, // sub_fp1
3276 0, // sub_gp8_x0
3277 0, // sub_gp8_x1
3278 0, // sub_gt
3279 0, // sub_lt
3280 0, // sub_pair0
3281 0, // sub_pair1
3282 0, // sub_un
3283 0, // sub_vsx0
3284 0, // sub_vsx1
3285 0, // sub_wacc_hi
3286 0, // sub_wacc_lo
3287 0, // sub_vsx1_then_sub_64
3288 0, // sub_vsx1_then_sub_64_hi_phony
3289 0, // sub_pair1_then_sub_64
3290 0, // sub_pair1_then_sub_64_hi_phony
3291 0, // sub_pair1_then_sub_vsx0
3292 0, // sub_pair1_then_sub_vsx1
3293 0, // sub_pair1_then_sub_vsx1_then_sub_64
3294 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3295 0, // sub_dmrrowp1_then_sub_dmrrow0
3296 0, // sub_dmrrowp1_then_sub_dmrrow1
3297 0, // sub_wacc_hi_then_sub_dmrrow0
3298 0, // sub_wacc_hi_then_sub_dmrrow1
3299 0, // sub_wacc_hi_then_sub_dmrrowp0
3300 0, // sub_wacc_hi_then_sub_dmrrowp1
3301 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3302 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3303 0, // sub_dmr1_then_sub_dmrrow0
3304 0, // sub_dmr1_then_sub_dmrrow1
3305 0, // sub_dmr1_then_sub_dmrrowp0
3306 0, // sub_dmr1_then_sub_dmrrowp1
3307 0, // sub_dmr1_then_sub_wacc_hi
3308 0, // sub_dmr1_then_sub_wacc_lo
3309 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3310 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3311 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3312 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3313 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3314 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3315 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3316 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3317 0, // sub_gp8_x1_then_sub_32
3318 },
3319 { // SPERC
3320 21, // sub_32 -> SPERC
3321 21, // sub_32_hi_phony -> SPERC
3322 0, // sub_64
3323 0, // sub_64_hi_phony
3324 0, // sub_dmr0
3325 0, // sub_dmr1
3326 0, // sub_dmrrow0
3327 0, // sub_dmrrow1
3328 0, // sub_dmrrowp0
3329 0, // sub_dmrrowp1
3330 0, // sub_eq
3331 0, // sub_fp0
3332 0, // sub_fp1
3333 0, // sub_gp8_x0
3334 0, // sub_gp8_x1
3335 0, // sub_gt
3336 0, // sub_lt
3337 0, // sub_pair0
3338 0, // sub_pair1
3339 0, // sub_un
3340 0, // sub_vsx0
3341 0, // sub_vsx1
3342 0, // sub_wacc_hi
3343 0, // sub_wacc_lo
3344 0, // sub_vsx1_then_sub_64
3345 0, // sub_vsx1_then_sub_64_hi_phony
3346 0, // sub_pair1_then_sub_64
3347 0, // sub_pair1_then_sub_64_hi_phony
3348 0, // sub_pair1_then_sub_vsx0
3349 0, // sub_pair1_then_sub_vsx1
3350 0, // sub_pair1_then_sub_vsx1_then_sub_64
3351 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3352 0, // sub_dmrrowp1_then_sub_dmrrow0
3353 0, // sub_dmrrowp1_then_sub_dmrrow1
3354 0, // sub_wacc_hi_then_sub_dmrrow0
3355 0, // sub_wacc_hi_then_sub_dmrrow1
3356 0, // sub_wacc_hi_then_sub_dmrrowp0
3357 0, // sub_wacc_hi_then_sub_dmrrowp1
3358 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3359 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3360 0, // sub_dmr1_then_sub_dmrrow0
3361 0, // sub_dmr1_then_sub_dmrrow1
3362 0, // sub_dmr1_then_sub_dmrrowp0
3363 0, // sub_dmr1_then_sub_dmrrowp1
3364 0, // sub_dmr1_then_sub_wacc_hi
3365 0, // sub_dmr1_then_sub_wacc_lo
3366 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3367 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3368 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3369 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3370 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3371 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3372 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3373 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3374 0, // sub_gp8_x1_then_sub_32
3375 },
3376 { // VFHRC
3377 0, // sub_32
3378 0, // sub_32_hi_phony
3379 0, // sub_64
3380 0, // sub_64_hi_phony
3381 0, // sub_dmr0
3382 0, // sub_dmr1
3383 0, // sub_dmrrow0
3384 0, // sub_dmrrow1
3385 0, // sub_dmrrowp0
3386 0, // sub_dmrrowp1
3387 0, // sub_eq
3388 0, // sub_fp0
3389 0, // sub_fp1
3390 0, // sub_gp8_x0
3391 0, // sub_gp8_x1
3392 0, // sub_gt
3393 0, // sub_lt
3394 0, // sub_pair0
3395 0, // sub_pair1
3396 0, // sub_un
3397 0, // sub_vsx0
3398 0, // sub_vsx1
3399 0, // sub_wacc_hi
3400 0, // sub_wacc_lo
3401 0, // sub_vsx1_then_sub_64
3402 0, // sub_vsx1_then_sub_64_hi_phony
3403 0, // sub_pair1_then_sub_64
3404 0, // sub_pair1_then_sub_64_hi_phony
3405 0, // sub_pair1_then_sub_vsx0
3406 0, // sub_pair1_then_sub_vsx1
3407 0, // sub_pair1_then_sub_vsx1_then_sub_64
3408 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3409 0, // sub_dmrrowp1_then_sub_dmrrow0
3410 0, // sub_dmrrowp1_then_sub_dmrrow1
3411 0, // sub_wacc_hi_then_sub_dmrrow0
3412 0, // sub_wacc_hi_then_sub_dmrrow1
3413 0, // sub_wacc_hi_then_sub_dmrrowp0
3414 0, // sub_wacc_hi_then_sub_dmrrowp1
3415 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3416 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3417 0, // sub_dmr1_then_sub_dmrrow0
3418 0, // sub_dmr1_then_sub_dmrrow1
3419 0, // sub_dmr1_then_sub_dmrrowp0
3420 0, // sub_dmr1_then_sub_dmrrowp1
3421 0, // sub_dmr1_then_sub_wacc_hi
3422 0, // sub_dmr1_then_sub_wacc_lo
3423 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3424 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3425 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3426 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3427 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3428 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3429 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3430 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3431 0, // sub_gp8_x1_then_sub_32
3432 },
3433 { // VFRC
3434 0, // sub_32
3435 0, // sub_32_hi_phony
3436 0, // sub_64
3437 0, // sub_64_hi_phony
3438 0, // sub_dmr0
3439 0, // sub_dmr1
3440 0, // sub_dmrrow0
3441 0, // sub_dmrrow1
3442 0, // sub_dmrrowp0
3443 0, // sub_dmrrowp1
3444 0, // sub_eq
3445 0, // sub_fp0
3446 0, // sub_fp1
3447 0, // sub_gp8_x0
3448 0, // sub_gp8_x1
3449 0, // sub_gt
3450 0, // sub_lt
3451 0, // sub_pair0
3452 0, // sub_pair1
3453 0, // sub_un
3454 0, // sub_vsx0
3455 0, // sub_vsx1
3456 0, // sub_wacc_hi
3457 0, // sub_wacc_lo
3458 0, // sub_vsx1_then_sub_64
3459 0, // sub_vsx1_then_sub_64_hi_phony
3460 0, // sub_pair1_then_sub_64
3461 0, // sub_pair1_then_sub_64_hi_phony
3462 0, // sub_pair1_then_sub_vsx0
3463 0, // sub_pair1_then_sub_vsx1
3464 0, // sub_pair1_then_sub_vsx1_then_sub_64
3465 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3466 0, // sub_dmrrowp1_then_sub_dmrrow0
3467 0, // sub_dmrrowp1_then_sub_dmrrow1
3468 0, // sub_wacc_hi_then_sub_dmrrow0
3469 0, // sub_wacc_hi_then_sub_dmrrow1
3470 0, // sub_wacc_hi_then_sub_dmrrowp0
3471 0, // sub_wacc_hi_then_sub_dmrrowp1
3472 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3473 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3474 0, // sub_dmr1_then_sub_dmrrow0
3475 0, // sub_dmr1_then_sub_dmrrow1
3476 0, // sub_dmr1_then_sub_dmrrowp0
3477 0, // sub_dmr1_then_sub_dmrrowp1
3478 0, // sub_dmr1_then_sub_wacc_hi
3479 0, // sub_dmr1_then_sub_wacc_lo
3480 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3481 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3482 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3483 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3484 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3485 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3486 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3487 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3488 0, // sub_gp8_x1_then_sub_32
3489 },
3490 { // SPERC_with_sub_32_in_GPRC_NOR0
3491 24, // sub_32 -> SPERC_with_sub_32_in_GPRC_NOR0
3492 24, // sub_32_hi_phony -> SPERC_with_sub_32_in_GPRC_NOR0
3493 0, // sub_64
3494 0, // sub_64_hi_phony
3495 0, // sub_dmr0
3496 0, // sub_dmr1
3497 0, // sub_dmrrow0
3498 0, // sub_dmrrow1
3499 0, // sub_dmrrowp0
3500 0, // sub_dmrrowp1
3501 0, // sub_eq
3502 0, // sub_fp0
3503 0, // sub_fp1
3504 0, // sub_gp8_x0
3505 0, // sub_gp8_x1
3506 0, // sub_gt
3507 0, // sub_lt
3508 0, // sub_pair0
3509 0, // sub_pair1
3510 0, // sub_un
3511 0, // sub_vsx0
3512 0, // sub_vsx1
3513 0, // sub_wacc_hi
3514 0, // sub_wacc_lo
3515 0, // sub_vsx1_then_sub_64
3516 0, // sub_vsx1_then_sub_64_hi_phony
3517 0, // sub_pair1_then_sub_64
3518 0, // sub_pair1_then_sub_64_hi_phony
3519 0, // sub_pair1_then_sub_vsx0
3520 0, // sub_pair1_then_sub_vsx1
3521 0, // sub_pair1_then_sub_vsx1_then_sub_64
3522 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3523 0, // sub_dmrrowp1_then_sub_dmrrow0
3524 0, // sub_dmrrowp1_then_sub_dmrrow1
3525 0, // sub_wacc_hi_then_sub_dmrrow0
3526 0, // sub_wacc_hi_then_sub_dmrrow1
3527 0, // sub_wacc_hi_then_sub_dmrrowp0
3528 0, // sub_wacc_hi_then_sub_dmrrowp1
3529 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3530 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3531 0, // sub_dmr1_then_sub_dmrrow0
3532 0, // sub_dmr1_then_sub_dmrrow1
3533 0, // sub_dmr1_then_sub_dmrrowp0
3534 0, // sub_dmr1_then_sub_dmrrowp1
3535 0, // sub_dmr1_then_sub_wacc_hi
3536 0, // sub_dmr1_then_sub_wacc_lo
3537 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3538 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3539 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3540 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3541 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3542 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3543 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3544 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3545 0, // sub_gp8_x1_then_sub_32
3546 },
3547 { // SPILLTOVSRRC_and_VFRC
3548 0, // sub_32
3549 0, // sub_32_hi_phony
3550 0, // sub_64
3551 0, // sub_64_hi_phony
3552 0, // sub_dmr0
3553 0, // sub_dmr1
3554 0, // sub_dmrrow0
3555 0, // sub_dmrrow1
3556 0, // sub_dmrrowp0
3557 0, // sub_dmrrowp1
3558 0, // sub_eq
3559 0, // sub_fp0
3560 0, // sub_fp1
3561 0, // sub_gp8_x0
3562 0, // sub_gp8_x1
3563 0, // sub_gt
3564 0, // sub_lt
3565 0, // sub_pair0
3566 0, // sub_pair1
3567 0, // sub_un
3568 0, // sub_vsx0
3569 0, // sub_vsx1
3570 0, // sub_wacc_hi
3571 0, // sub_wacc_lo
3572 0, // sub_vsx1_then_sub_64
3573 0, // sub_vsx1_then_sub_64_hi_phony
3574 0, // sub_pair1_then_sub_64
3575 0, // sub_pair1_then_sub_64_hi_phony
3576 0, // sub_pair1_then_sub_vsx0
3577 0, // sub_pair1_then_sub_vsx1
3578 0, // sub_pair1_then_sub_vsx1_then_sub_64
3579 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3580 0, // sub_dmrrowp1_then_sub_dmrrow0
3581 0, // sub_dmrrowp1_then_sub_dmrrow1
3582 0, // sub_wacc_hi_then_sub_dmrrow0
3583 0, // sub_wacc_hi_then_sub_dmrrow1
3584 0, // sub_wacc_hi_then_sub_dmrrowp0
3585 0, // sub_wacc_hi_then_sub_dmrrowp1
3586 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3587 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3588 0, // sub_dmr1_then_sub_dmrrow0
3589 0, // sub_dmr1_then_sub_dmrrow1
3590 0, // sub_dmr1_then_sub_dmrrowp0
3591 0, // sub_dmr1_then_sub_dmrrowp1
3592 0, // sub_dmr1_then_sub_wacc_hi
3593 0, // sub_dmr1_then_sub_wacc_lo
3594 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3595 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3596 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3597 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3598 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3599 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3600 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3601 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3602 0, // sub_gp8_x1_then_sub_32
3603 },
3604 { // SPILLTOVSRRC_and_F4RC
3605 0, // sub_32
3606 0, // sub_32_hi_phony
3607 0, // sub_64
3608 0, // sub_64_hi_phony
3609 0, // sub_dmr0
3610 0, // sub_dmr1
3611 0, // sub_dmrrow0
3612 0, // sub_dmrrow1
3613 0, // sub_dmrrowp0
3614 0, // sub_dmrrowp1
3615 0, // sub_eq
3616 0, // sub_fp0
3617 0, // sub_fp1
3618 0, // sub_gp8_x0
3619 0, // sub_gp8_x1
3620 0, // sub_gt
3621 0, // sub_lt
3622 0, // sub_pair0
3623 0, // sub_pair1
3624 0, // sub_un
3625 0, // sub_vsx0
3626 0, // sub_vsx1
3627 0, // sub_wacc_hi
3628 0, // sub_wacc_lo
3629 0, // sub_vsx1_then_sub_64
3630 0, // sub_vsx1_then_sub_64_hi_phony
3631 0, // sub_pair1_then_sub_64
3632 0, // sub_pair1_then_sub_64_hi_phony
3633 0, // sub_pair1_then_sub_vsx0
3634 0, // sub_pair1_then_sub_vsx1
3635 0, // sub_pair1_then_sub_vsx1_then_sub_64
3636 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3637 0, // sub_dmrrowp1_then_sub_dmrrow0
3638 0, // sub_dmrrowp1_then_sub_dmrrow1
3639 0, // sub_wacc_hi_then_sub_dmrrow0
3640 0, // sub_wacc_hi_then_sub_dmrrow1
3641 0, // sub_wacc_hi_then_sub_dmrrowp0
3642 0, // sub_wacc_hi_then_sub_dmrrowp1
3643 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3644 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3645 0, // sub_dmr1_then_sub_dmrrow0
3646 0, // sub_dmr1_then_sub_dmrrow1
3647 0, // sub_dmr1_then_sub_dmrrowp0
3648 0, // sub_dmr1_then_sub_dmrrowp1
3649 0, // sub_dmr1_then_sub_wacc_hi
3650 0, // sub_dmr1_then_sub_wacc_lo
3651 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3652 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3653 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3654 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3655 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3656 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3657 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3658 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3659 0, // sub_gp8_x1_then_sub_32
3660 },
3661 { // CTRRC8
3662 0, // sub_32
3663 0, // sub_32_hi_phony
3664 0, // sub_64
3665 0, // sub_64_hi_phony
3666 0, // sub_dmr0
3667 0, // sub_dmr1
3668 0, // sub_dmrrow0
3669 0, // sub_dmrrow1
3670 0, // sub_dmrrowp0
3671 0, // sub_dmrrowp1
3672 0, // sub_eq
3673 0, // sub_fp0
3674 0, // sub_fp1
3675 0, // sub_gp8_x0
3676 0, // sub_gp8_x1
3677 0, // sub_gt
3678 0, // sub_lt
3679 0, // sub_pair0
3680 0, // sub_pair1
3681 0, // sub_un
3682 0, // sub_vsx0
3683 0, // sub_vsx1
3684 0, // sub_wacc_hi
3685 0, // sub_wacc_lo
3686 0, // sub_vsx1_then_sub_64
3687 0, // sub_vsx1_then_sub_64_hi_phony
3688 0, // sub_pair1_then_sub_64
3689 0, // sub_pair1_then_sub_64_hi_phony
3690 0, // sub_pair1_then_sub_vsx0
3691 0, // sub_pair1_then_sub_vsx1
3692 0, // sub_pair1_then_sub_vsx1_then_sub_64
3693 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3694 0, // sub_dmrrowp1_then_sub_dmrrow0
3695 0, // sub_dmrrowp1_then_sub_dmrrow1
3696 0, // sub_wacc_hi_then_sub_dmrrow0
3697 0, // sub_wacc_hi_then_sub_dmrrow1
3698 0, // sub_wacc_hi_then_sub_dmrrowp0
3699 0, // sub_wacc_hi_then_sub_dmrrowp1
3700 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3701 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3702 0, // sub_dmr1_then_sub_dmrrow0
3703 0, // sub_dmr1_then_sub_dmrrow1
3704 0, // sub_dmr1_then_sub_dmrrowp0
3705 0, // sub_dmr1_then_sub_dmrrowp1
3706 0, // sub_dmr1_then_sub_wacc_hi
3707 0, // sub_dmr1_then_sub_wacc_lo
3708 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3709 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3710 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3711 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3712 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3713 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3714 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3715 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3716 0, // sub_gp8_x1_then_sub_32
3717 },
3718 { // LR8RC
3719 0, // sub_32
3720 0, // sub_32_hi_phony
3721 0, // sub_64
3722 0, // sub_64_hi_phony
3723 0, // sub_dmr0
3724 0, // sub_dmr1
3725 0, // sub_dmrrow0
3726 0, // sub_dmrrow1
3727 0, // sub_dmrrowp0
3728 0, // sub_dmrrowp1
3729 0, // sub_eq
3730 0, // sub_fp0
3731 0, // sub_fp1
3732 0, // sub_gp8_x0
3733 0, // sub_gp8_x1
3734 0, // sub_gt
3735 0, // sub_lt
3736 0, // sub_pair0
3737 0, // sub_pair1
3738 0, // sub_un
3739 0, // sub_vsx0
3740 0, // sub_vsx1
3741 0, // sub_wacc_hi
3742 0, // sub_wacc_lo
3743 0, // sub_vsx1_then_sub_64
3744 0, // sub_vsx1_then_sub_64_hi_phony
3745 0, // sub_pair1_then_sub_64
3746 0, // sub_pair1_then_sub_64_hi_phony
3747 0, // sub_pair1_then_sub_vsx0
3748 0, // sub_pair1_then_sub_vsx1
3749 0, // sub_pair1_then_sub_vsx1_then_sub_64
3750 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3751 0, // sub_dmrrowp1_then_sub_dmrrow0
3752 0, // sub_dmrrowp1_then_sub_dmrrow1
3753 0, // sub_wacc_hi_then_sub_dmrrow0
3754 0, // sub_wacc_hi_then_sub_dmrrow1
3755 0, // sub_wacc_hi_then_sub_dmrrowp0
3756 0, // sub_wacc_hi_then_sub_dmrrowp1
3757 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3758 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3759 0, // sub_dmr1_then_sub_dmrrow0
3760 0, // sub_dmr1_then_sub_dmrrow1
3761 0, // sub_dmr1_then_sub_dmrrowp0
3762 0, // sub_dmr1_then_sub_dmrrowp1
3763 0, // sub_dmr1_then_sub_wacc_hi
3764 0, // sub_dmr1_then_sub_wacc_lo
3765 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3766 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3767 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3768 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3769 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3770 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3771 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3772 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3773 0, // sub_gp8_x1_then_sub_32
3774 },
3775 { // DMRROWRC
3776 0, // sub_32
3777 0, // sub_32_hi_phony
3778 0, // sub_64
3779 0, // sub_64_hi_phony
3780 0, // sub_dmr0
3781 0, // sub_dmr1
3782 0, // sub_dmrrow0
3783 0, // sub_dmrrow1
3784 0, // sub_dmrrowp0
3785 0, // sub_dmrrowp1
3786 0, // sub_eq
3787 0, // sub_fp0
3788 0, // sub_fp1
3789 0, // sub_gp8_x0
3790 0, // sub_gp8_x1
3791 0, // sub_gt
3792 0, // sub_lt
3793 0, // sub_pair0
3794 0, // sub_pair1
3795 0, // sub_un
3796 0, // sub_vsx0
3797 0, // sub_vsx1
3798 0, // sub_wacc_hi
3799 0, // sub_wacc_lo
3800 0, // sub_vsx1_then_sub_64
3801 0, // sub_vsx1_then_sub_64_hi_phony
3802 0, // sub_pair1_then_sub_64
3803 0, // sub_pair1_then_sub_64_hi_phony
3804 0, // sub_pair1_then_sub_vsx0
3805 0, // sub_pair1_then_sub_vsx1
3806 0, // sub_pair1_then_sub_vsx1_then_sub_64
3807 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3808 0, // sub_dmrrowp1_then_sub_dmrrow0
3809 0, // sub_dmrrowp1_then_sub_dmrrow1
3810 0, // sub_wacc_hi_then_sub_dmrrow0
3811 0, // sub_wacc_hi_then_sub_dmrrow1
3812 0, // sub_wacc_hi_then_sub_dmrrowp0
3813 0, // sub_wacc_hi_then_sub_dmrrowp1
3814 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3815 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3816 0, // sub_dmr1_then_sub_dmrrow0
3817 0, // sub_dmr1_then_sub_dmrrow1
3818 0, // sub_dmr1_then_sub_dmrrowp0
3819 0, // sub_dmr1_then_sub_dmrrowp1
3820 0, // sub_dmr1_then_sub_wacc_hi
3821 0, // sub_dmr1_then_sub_wacc_lo
3822 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3823 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3824 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3825 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3826 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3827 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3828 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3829 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3830 0, // sub_gp8_x1_then_sub_32
3831 },
3832 { // VSRC
3833 0, // sub_32
3834 0, // sub_32_hi_phony
3835 30, // sub_64 -> VSRC
3836 30, // sub_64_hi_phony -> VSRC
3837 0, // sub_dmr0
3838 0, // sub_dmr1
3839 0, // sub_dmrrow0
3840 0, // sub_dmrrow1
3841 0, // sub_dmrrowp0
3842 0, // sub_dmrrowp1
3843 0, // sub_eq
3844 0, // sub_fp0
3845 0, // sub_fp1
3846 0, // sub_gp8_x0
3847 0, // sub_gp8_x1
3848 0, // sub_gt
3849 0, // sub_lt
3850 0, // sub_pair0
3851 0, // sub_pair1
3852 0, // sub_un
3853 0, // sub_vsx0
3854 0, // sub_vsx1
3855 0, // sub_wacc_hi
3856 0, // sub_wacc_lo
3857 0, // sub_vsx1_then_sub_64
3858 0, // sub_vsx1_then_sub_64_hi_phony
3859 0, // sub_pair1_then_sub_64
3860 0, // sub_pair1_then_sub_64_hi_phony
3861 0, // sub_pair1_then_sub_vsx0
3862 0, // sub_pair1_then_sub_vsx1
3863 0, // sub_pair1_then_sub_vsx1_then_sub_64
3864 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3865 0, // sub_dmrrowp1_then_sub_dmrrow0
3866 0, // sub_dmrrowp1_then_sub_dmrrow1
3867 0, // sub_wacc_hi_then_sub_dmrrow0
3868 0, // sub_wacc_hi_then_sub_dmrrow1
3869 0, // sub_wacc_hi_then_sub_dmrrowp0
3870 0, // sub_wacc_hi_then_sub_dmrrowp1
3871 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3872 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3873 0, // sub_dmr1_then_sub_dmrrow0
3874 0, // sub_dmr1_then_sub_dmrrow1
3875 0, // sub_dmr1_then_sub_dmrrowp0
3876 0, // sub_dmr1_then_sub_dmrrowp1
3877 0, // sub_dmr1_then_sub_wacc_hi
3878 0, // sub_dmr1_then_sub_wacc_lo
3879 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3880 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3881 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3882 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3883 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3884 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3885 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3886 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3887 0, // sub_gp8_x1_then_sub_32
3888 },
3889 { // VSRC_with_sub_64_in_SPILLTOVSRRC
3890 0, // sub_32
3891 0, // sub_32_hi_phony
3892 31, // sub_64 -> VSRC_with_sub_64_in_SPILLTOVSRRC
3893 31, // sub_64_hi_phony -> VSRC_with_sub_64_in_SPILLTOVSRRC
3894 0, // sub_dmr0
3895 0, // sub_dmr1
3896 0, // sub_dmrrow0
3897 0, // sub_dmrrow1
3898 0, // sub_dmrrowp0
3899 0, // sub_dmrrowp1
3900 0, // sub_eq
3901 0, // sub_fp0
3902 0, // sub_fp1
3903 0, // sub_gp8_x0
3904 0, // sub_gp8_x1
3905 0, // sub_gt
3906 0, // sub_lt
3907 0, // sub_pair0
3908 0, // sub_pair1
3909 0, // sub_un
3910 0, // sub_vsx0
3911 0, // sub_vsx1
3912 0, // sub_wacc_hi
3913 0, // sub_wacc_lo
3914 0, // sub_vsx1_then_sub_64
3915 0, // sub_vsx1_then_sub_64_hi_phony
3916 0, // sub_pair1_then_sub_64
3917 0, // sub_pair1_then_sub_64_hi_phony
3918 0, // sub_pair1_then_sub_vsx0
3919 0, // sub_pair1_then_sub_vsx1
3920 0, // sub_pair1_then_sub_vsx1_then_sub_64
3921 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3922 0, // sub_dmrrowp1_then_sub_dmrrow0
3923 0, // sub_dmrrowp1_then_sub_dmrrow1
3924 0, // sub_wacc_hi_then_sub_dmrrow0
3925 0, // sub_wacc_hi_then_sub_dmrrow1
3926 0, // sub_wacc_hi_then_sub_dmrrowp0
3927 0, // sub_wacc_hi_then_sub_dmrrowp1
3928 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3929 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3930 0, // sub_dmr1_then_sub_dmrrow0
3931 0, // sub_dmr1_then_sub_dmrrow1
3932 0, // sub_dmr1_then_sub_dmrrowp0
3933 0, // sub_dmr1_then_sub_dmrrowp1
3934 0, // sub_dmr1_then_sub_wacc_hi
3935 0, // sub_dmr1_then_sub_wacc_lo
3936 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3937 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3938 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3939 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3940 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3941 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3942 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3943 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3944 0, // sub_gp8_x1_then_sub_32
3945 },
3946 { // VRRC
3947 0, // sub_32
3948 0, // sub_32_hi_phony
3949 32, // sub_64 -> VRRC
3950 32, // sub_64_hi_phony -> VRRC
3951 0, // sub_dmr0
3952 0, // sub_dmr1
3953 0, // sub_dmrrow0
3954 0, // sub_dmrrow1
3955 0, // sub_dmrrowp0
3956 0, // sub_dmrrowp1
3957 0, // sub_eq
3958 0, // sub_fp0
3959 0, // sub_fp1
3960 0, // sub_gp8_x0
3961 0, // sub_gp8_x1
3962 0, // sub_gt
3963 0, // sub_lt
3964 0, // sub_pair0
3965 0, // sub_pair1
3966 0, // sub_un
3967 0, // sub_vsx0
3968 0, // sub_vsx1
3969 0, // sub_wacc_hi
3970 0, // sub_wacc_lo
3971 0, // sub_vsx1_then_sub_64
3972 0, // sub_vsx1_then_sub_64_hi_phony
3973 0, // sub_pair1_then_sub_64
3974 0, // sub_pair1_then_sub_64_hi_phony
3975 0, // sub_pair1_then_sub_vsx0
3976 0, // sub_pair1_then_sub_vsx1
3977 0, // sub_pair1_then_sub_vsx1_then_sub_64
3978 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3979 0, // sub_dmrrowp1_then_sub_dmrrow0
3980 0, // sub_dmrrowp1_then_sub_dmrrow1
3981 0, // sub_wacc_hi_then_sub_dmrrow0
3982 0, // sub_wacc_hi_then_sub_dmrrow1
3983 0, // sub_wacc_hi_then_sub_dmrrowp0
3984 0, // sub_wacc_hi_then_sub_dmrrowp1
3985 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3986 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3987 0, // sub_dmr1_then_sub_dmrrow0
3988 0, // sub_dmr1_then_sub_dmrrow1
3989 0, // sub_dmr1_then_sub_dmrrowp0
3990 0, // sub_dmr1_then_sub_dmrrowp1
3991 0, // sub_dmr1_then_sub_wacc_hi
3992 0, // sub_dmr1_then_sub_wacc_lo
3993 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3994 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3995 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3996 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3997 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3998 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3999 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4000 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4001 0, // sub_gp8_x1_then_sub_32
4002 },
4003 { // VSLRC
4004 0, // sub_32
4005 0, // sub_32_hi_phony
4006 33, // sub_64 -> VSLRC
4007 33, // sub_64_hi_phony -> VSLRC
4008 0, // sub_dmr0
4009 0, // sub_dmr1
4010 0, // sub_dmrrow0
4011 0, // sub_dmrrow1
4012 0, // sub_dmrrowp0
4013 0, // sub_dmrrowp1
4014 0, // sub_eq
4015 0, // sub_fp0
4016 0, // sub_fp1
4017 0, // sub_gp8_x0
4018 0, // sub_gp8_x1
4019 0, // sub_gt
4020 0, // sub_lt
4021 0, // sub_pair0
4022 0, // sub_pair1
4023 0, // sub_un
4024 0, // sub_vsx0
4025 0, // sub_vsx1
4026 0, // sub_wacc_hi
4027 0, // sub_wacc_lo
4028 0, // sub_vsx1_then_sub_64
4029 0, // sub_vsx1_then_sub_64_hi_phony
4030 0, // sub_pair1_then_sub_64
4031 0, // sub_pair1_then_sub_64_hi_phony
4032 0, // sub_pair1_then_sub_vsx0
4033 0, // sub_pair1_then_sub_vsx1
4034 0, // sub_pair1_then_sub_vsx1_then_sub_64
4035 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4036 0, // sub_dmrrowp1_then_sub_dmrrow0
4037 0, // sub_dmrrowp1_then_sub_dmrrow1
4038 0, // sub_wacc_hi_then_sub_dmrrow0
4039 0, // sub_wacc_hi_then_sub_dmrrow1
4040 0, // sub_wacc_hi_then_sub_dmrrowp0
4041 0, // sub_wacc_hi_then_sub_dmrrowp1
4042 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4043 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4044 0, // sub_dmr1_then_sub_dmrrow0
4045 0, // sub_dmr1_then_sub_dmrrow1
4046 0, // sub_dmr1_then_sub_dmrrowp0
4047 0, // sub_dmr1_then_sub_dmrrowp1
4048 0, // sub_dmr1_then_sub_wacc_hi
4049 0, // sub_dmr1_then_sub_wacc_lo
4050 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4051 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4052 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4053 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4054 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4055 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4056 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4057 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4058 0, // sub_gp8_x1_then_sub_32
4059 },
4060 { // VRRC_with_sub_64_in_SPILLTOVSRRC
4061 0, // sub_32
4062 0, // sub_32_hi_phony
4063 34, // sub_64 -> VRRC_with_sub_64_in_SPILLTOVSRRC
4064 34, // sub_64_hi_phony -> VRRC_with_sub_64_in_SPILLTOVSRRC
4065 0, // sub_dmr0
4066 0, // sub_dmr1
4067 0, // sub_dmrrow0
4068 0, // sub_dmrrow1
4069 0, // sub_dmrrowp0
4070 0, // sub_dmrrowp1
4071 0, // sub_eq
4072 0, // sub_fp0
4073 0, // sub_fp1
4074 0, // sub_gp8_x0
4075 0, // sub_gp8_x1
4076 0, // sub_gt
4077 0, // sub_lt
4078 0, // sub_pair0
4079 0, // sub_pair1
4080 0, // sub_un
4081 0, // sub_vsx0
4082 0, // sub_vsx1
4083 0, // sub_wacc_hi
4084 0, // sub_wacc_lo
4085 0, // sub_vsx1_then_sub_64
4086 0, // sub_vsx1_then_sub_64_hi_phony
4087 0, // sub_pair1_then_sub_64
4088 0, // sub_pair1_then_sub_64_hi_phony
4089 0, // sub_pair1_then_sub_vsx0
4090 0, // sub_pair1_then_sub_vsx1
4091 0, // sub_pair1_then_sub_vsx1_then_sub_64
4092 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4093 0, // sub_dmrrowp1_then_sub_dmrrow0
4094 0, // sub_dmrrowp1_then_sub_dmrrow1
4095 0, // sub_wacc_hi_then_sub_dmrrow0
4096 0, // sub_wacc_hi_then_sub_dmrrow1
4097 0, // sub_wacc_hi_then_sub_dmrrowp0
4098 0, // sub_wacc_hi_then_sub_dmrrowp1
4099 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4100 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4101 0, // sub_dmr1_then_sub_dmrrow0
4102 0, // sub_dmr1_then_sub_dmrrow1
4103 0, // sub_dmr1_then_sub_dmrrowp0
4104 0, // sub_dmr1_then_sub_dmrrowp1
4105 0, // sub_dmr1_then_sub_wacc_hi
4106 0, // sub_dmr1_then_sub_wacc_lo
4107 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4108 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4109 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4110 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4111 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4112 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4113 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4114 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4115 0, // sub_gp8_x1_then_sub_32
4116 },
4117 { // FpRC
4118 0, // sub_32
4119 0, // sub_32_hi_phony
4120 0, // sub_64
4121 0, // sub_64_hi_phony
4122 0, // sub_dmr0
4123 0, // sub_dmr1
4124 0, // sub_dmrrow0
4125 0, // sub_dmrrow1
4126 0, // sub_dmrrowp0
4127 0, // sub_dmrrowp1
4128 0, // sub_eq
4129 35, // sub_fp0 -> FpRC
4130 35, // sub_fp1 -> FpRC
4131 0, // sub_gp8_x0
4132 0, // sub_gp8_x1
4133 0, // sub_gt
4134 0, // sub_lt
4135 0, // sub_pair0
4136 0, // sub_pair1
4137 0, // sub_un
4138 0, // sub_vsx0
4139 0, // sub_vsx1
4140 0, // sub_wacc_hi
4141 0, // sub_wacc_lo
4142 0, // sub_vsx1_then_sub_64
4143 0, // sub_vsx1_then_sub_64_hi_phony
4144 0, // sub_pair1_then_sub_64
4145 0, // sub_pair1_then_sub_64_hi_phony
4146 0, // sub_pair1_then_sub_vsx0
4147 0, // sub_pair1_then_sub_vsx1
4148 0, // sub_pair1_then_sub_vsx1_then_sub_64
4149 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4150 0, // sub_dmrrowp1_then_sub_dmrrow0
4151 0, // sub_dmrrowp1_then_sub_dmrrow1
4152 0, // sub_wacc_hi_then_sub_dmrrow0
4153 0, // sub_wacc_hi_then_sub_dmrrow1
4154 0, // sub_wacc_hi_then_sub_dmrrowp0
4155 0, // sub_wacc_hi_then_sub_dmrrowp1
4156 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4157 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4158 0, // sub_dmr1_then_sub_dmrrow0
4159 0, // sub_dmr1_then_sub_dmrrow1
4160 0, // sub_dmr1_then_sub_dmrrowp0
4161 0, // sub_dmr1_then_sub_dmrrowp1
4162 0, // sub_dmr1_then_sub_wacc_hi
4163 0, // sub_dmr1_then_sub_wacc_lo
4164 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4165 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4166 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4167 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4168 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4169 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4170 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4171 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4172 0, // sub_gp8_x1_then_sub_32
4173 },
4174 { // G8pRC
4175 36, // sub_32 -> G8pRC
4176 0, // sub_32_hi_phony
4177 0, // sub_64
4178 0, // sub_64_hi_phony
4179 0, // sub_dmr0
4180 0, // sub_dmr1
4181 0, // sub_dmrrow0
4182 0, // sub_dmrrow1
4183 0, // sub_dmrrowp0
4184 0, // sub_dmrrowp1
4185 0, // sub_eq
4186 0, // sub_fp0
4187 0, // sub_fp1
4188 36, // sub_gp8_x0 -> G8pRC
4189 36, // sub_gp8_x1 -> G8pRC
4190 0, // sub_gt
4191 0, // sub_lt
4192 0, // sub_pair0
4193 0, // sub_pair1
4194 0, // sub_un
4195 0, // sub_vsx0
4196 0, // sub_vsx1
4197 0, // sub_wacc_hi
4198 0, // sub_wacc_lo
4199 0, // sub_vsx1_then_sub_64
4200 0, // sub_vsx1_then_sub_64_hi_phony
4201 0, // sub_pair1_then_sub_64
4202 0, // sub_pair1_then_sub_64_hi_phony
4203 0, // sub_pair1_then_sub_vsx0
4204 0, // sub_pair1_then_sub_vsx1
4205 0, // sub_pair1_then_sub_vsx1_then_sub_64
4206 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4207 0, // sub_dmrrowp1_then_sub_dmrrow0
4208 0, // sub_dmrrowp1_then_sub_dmrrow1
4209 0, // sub_wacc_hi_then_sub_dmrrow0
4210 0, // sub_wacc_hi_then_sub_dmrrow1
4211 0, // sub_wacc_hi_then_sub_dmrrowp0
4212 0, // sub_wacc_hi_then_sub_dmrrowp1
4213 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4214 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4215 0, // sub_dmr1_then_sub_dmrrow0
4216 0, // sub_dmr1_then_sub_dmrrow1
4217 0, // sub_dmr1_then_sub_dmrrowp0
4218 0, // sub_dmr1_then_sub_dmrrowp1
4219 0, // sub_dmr1_then_sub_wacc_hi
4220 0, // sub_dmr1_then_sub_wacc_lo
4221 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4222 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4223 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4224 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4225 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4226 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4227 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4228 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4229 36, // sub_gp8_x1_then_sub_32 -> G8pRC
4230 },
4231 { // G8pRC_with_sub_32_in_GPRC_NOR0
4232 37, // sub_32 -> G8pRC_with_sub_32_in_GPRC_NOR0
4233 0, // sub_32_hi_phony
4234 0, // sub_64
4235 0, // sub_64_hi_phony
4236 0, // sub_dmr0
4237 0, // sub_dmr1
4238 0, // sub_dmrrow0
4239 0, // sub_dmrrow1
4240 0, // sub_dmrrowp0
4241 0, // sub_dmrrowp1
4242 0, // sub_eq
4243 0, // sub_fp0
4244 0, // sub_fp1
4245 37, // sub_gp8_x0 -> G8pRC_with_sub_32_in_GPRC_NOR0
4246 37, // sub_gp8_x1 -> G8pRC_with_sub_32_in_GPRC_NOR0
4247 0, // sub_gt
4248 0, // sub_lt
4249 0, // sub_pair0
4250 0, // sub_pair1
4251 0, // sub_un
4252 0, // sub_vsx0
4253 0, // sub_vsx1
4254 0, // sub_wacc_hi
4255 0, // sub_wacc_lo
4256 0, // sub_vsx1_then_sub_64
4257 0, // sub_vsx1_then_sub_64_hi_phony
4258 0, // sub_pair1_then_sub_64
4259 0, // sub_pair1_then_sub_64_hi_phony
4260 0, // sub_pair1_then_sub_vsx0
4261 0, // sub_pair1_then_sub_vsx1
4262 0, // sub_pair1_then_sub_vsx1_then_sub_64
4263 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4264 0, // sub_dmrrowp1_then_sub_dmrrow0
4265 0, // sub_dmrrowp1_then_sub_dmrrow1
4266 0, // sub_wacc_hi_then_sub_dmrrow0
4267 0, // sub_wacc_hi_then_sub_dmrrow1
4268 0, // sub_wacc_hi_then_sub_dmrrowp0
4269 0, // sub_wacc_hi_then_sub_dmrrowp1
4270 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4271 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4272 0, // sub_dmr1_then_sub_dmrrow0
4273 0, // sub_dmr1_then_sub_dmrrow1
4274 0, // sub_dmr1_then_sub_dmrrowp0
4275 0, // sub_dmr1_then_sub_dmrrowp1
4276 0, // sub_dmr1_then_sub_wacc_hi
4277 0, // sub_dmr1_then_sub_wacc_lo
4278 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4279 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4280 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4281 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4282 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4283 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4284 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4285 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4286 37, // sub_gp8_x1_then_sub_32 -> G8pRC_with_sub_32_in_GPRC_NOR0
4287 },
4288 { // VSLRC_with_sub_64_in_SPILLTOVSRRC
4289 0, // sub_32
4290 0, // sub_32_hi_phony
4291 38, // sub_64 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
4292 38, // sub_64_hi_phony -> VSLRC_with_sub_64_in_SPILLTOVSRRC
4293 0, // sub_dmr0
4294 0, // sub_dmr1
4295 0, // sub_dmrrow0
4296 0, // sub_dmrrow1
4297 0, // sub_dmrrowp0
4298 0, // sub_dmrrowp1
4299 0, // sub_eq
4300 0, // sub_fp0
4301 0, // sub_fp1
4302 0, // sub_gp8_x0
4303 0, // sub_gp8_x1
4304 0, // sub_gt
4305 0, // sub_lt
4306 0, // sub_pair0
4307 0, // sub_pair1
4308 0, // sub_un
4309 0, // sub_vsx0
4310 0, // sub_vsx1
4311 0, // sub_wacc_hi
4312 0, // sub_wacc_lo
4313 0, // sub_vsx1_then_sub_64
4314 0, // sub_vsx1_then_sub_64_hi_phony
4315 0, // sub_pair1_then_sub_64
4316 0, // sub_pair1_then_sub_64_hi_phony
4317 0, // sub_pair1_then_sub_vsx0
4318 0, // sub_pair1_then_sub_vsx1
4319 0, // sub_pair1_then_sub_vsx1_then_sub_64
4320 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4321 0, // sub_dmrrowp1_then_sub_dmrrow0
4322 0, // sub_dmrrowp1_then_sub_dmrrow1
4323 0, // sub_wacc_hi_then_sub_dmrrow0
4324 0, // sub_wacc_hi_then_sub_dmrrow1
4325 0, // sub_wacc_hi_then_sub_dmrrowp0
4326 0, // sub_wacc_hi_then_sub_dmrrowp1
4327 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4328 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4329 0, // sub_dmr1_then_sub_dmrrow0
4330 0, // sub_dmr1_then_sub_dmrrow1
4331 0, // sub_dmr1_then_sub_dmrrowp0
4332 0, // sub_dmr1_then_sub_dmrrowp1
4333 0, // sub_dmr1_then_sub_wacc_hi
4334 0, // sub_dmr1_then_sub_wacc_lo
4335 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4336 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4337 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4338 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4339 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4340 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4341 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4342 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4343 0, // sub_gp8_x1_then_sub_32
4344 },
4345 { // FpRC_with_sub_fp0_in_SPILLTOVSRRC
4346 0, // sub_32
4347 0, // sub_32_hi_phony
4348 0, // sub_64
4349 0, // sub_64_hi_phony
4350 0, // sub_dmr0
4351 0, // sub_dmr1
4352 0, // sub_dmrrow0
4353 0, // sub_dmrrow1
4354 0, // sub_dmrrowp0
4355 0, // sub_dmrrowp1
4356 0, // sub_eq
4357 39, // sub_fp0 -> FpRC_with_sub_fp0_in_SPILLTOVSRRC
4358 39, // sub_fp1 -> FpRC_with_sub_fp0_in_SPILLTOVSRRC
4359 0, // sub_gp8_x0
4360 0, // sub_gp8_x1
4361 0, // sub_gt
4362 0, // sub_lt
4363 0, // sub_pair0
4364 0, // sub_pair1
4365 0, // sub_un
4366 0, // sub_vsx0
4367 0, // sub_vsx1
4368 0, // sub_wacc_hi
4369 0, // sub_wacc_lo
4370 0, // sub_vsx1_then_sub_64
4371 0, // sub_vsx1_then_sub_64_hi_phony
4372 0, // sub_pair1_then_sub_64
4373 0, // sub_pair1_then_sub_64_hi_phony
4374 0, // sub_pair1_then_sub_vsx0
4375 0, // sub_pair1_then_sub_vsx1
4376 0, // sub_pair1_then_sub_vsx1_then_sub_64
4377 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4378 0, // sub_dmrrowp1_then_sub_dmrrow0
4379 0, // sub_dmrrowp1_then_sub_dmrrow1
4380 0, // sub_wacc_hi_then_sub_dmrrow0
4381 0, // sub_wacc_hi_then_sub_dmrrow1
4382 0, // sub_wacc_hi_then_sub_dmrrowp0
4383 0, // sub_wacc_hi_then_sub_dmrrowp1
4384 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4385 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4386 0, // sub_dmr1_then_sub_dmrrow0
4387 0, // sub_dmr1_then_sub_dmrrow1
4388 0, // sub_dmr1_then_sub_dmrrowp0
4389 0, // sub_dmr1_then_sub_dmrrowp1
4390 0, // sub_dmr1_then_sub_wacc_hi
4391 0, // sub_dmr1_then_sub_wacc_lo
4392 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4393 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4394 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4395 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4396 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4397 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4398 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4399 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4400 0, // sub_gp8_x1_then_sub_32
4401 },
4402 { // DMRROWpRC
4403 0, // sub_32
4404 0, // sub_32_hi_phony
4405 0, // sub_64
4406 0, // sub_64_hi_phony
4407 0, // sub_dmr0
4408 0, // sub_dmr1
4409 40, // sub_dmrrow0 -> DMRROWpRC
4410 40, // sub_dmrrow1 -> DMRROWpRC
4411 0, // sub_dmrrowp0
4412 0, // sub_dmrrowp1
4413 0, // sub_eq
4414 0, // sub_fp0
4415 0, // sub_fp1
4416 0, // sub_gp8_x0
4417 0, // sub_gp8_x1
4418 0, // sub_gt
4419 0, // sub_lt
4420 0, // sub_pair0
4421 0, // sub_pair1
4422 0, // sub_un
4423 0, // sub_vsx0
4424 0, // sub_vsx1
4425 0, // sub_wacc_hi
4426 0, // sub_wacc_lo
4427 0, // sub_vsx1_then_sub_64
4428 0, // sub_vsx1_then_sub_64_hi_phony
4429 0, // sub_pair1_then_sub_64
4430 0, // sub_pair1_then_sub_64_hi_phony
4431 0, // sub_pair1_then_sub_vsx0
4432 0, // sub_pair1_then_sub_vsx1
4433 0, // sub_pair1_then_sub_vsx1_then_sub_64
4434 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4435 0, // sub_dmrrowp1_then_sub_dmrrow0
4436 0, // sub_dmrrowp1_then_sub_dmrrow1
4437 0, // sub_wacc_hi_then_sub_dmrrow0
4438 0, // sub_wacc_hi_then_sub_dmrrow1
4439 0, // sub_wacc_hi_then_sub_dmrrowp0
4440 0, // sub_wacc_hi_then_sub_dmrrowp1
4441 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4442 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4443 0, // sub_dmr1_then_sub_dmrrow0
4444 0, // sub_dmr1_then_sub_dmrrow1
4445 0, // sub_dmr1_then_sub_dmrrowp0
4446 0, // sub_dmr1_then_sub_dmrrowp1
4447 0, // sub_dmr1_then_sub_wacc_hi
4448 0, // sub_dmr1_then_sub_wacc_lo
4449 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4450 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4451 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4452 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4453 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4454 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4455 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4456 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4457 0, // sub_gp8_x1_then_sub_32
4458 },
4459 { // VSRpRC
4460 0, // sub_32
4461 0, // sub_32_hi_phony
4462 41, // sub_64 -> VSRpRC
4463 41, // sub_64_hi_phony -> VSRpRC
4464 0, // sub_dmr0
4465 0, // sub_dmr1
4466 0, // sub_dmrrow0
4467 0, // sub_dmrrow1
4468 0, // sub_dmrrowp0
4469 0, // sub_dmrrowp1
4470 0, // sub_eq
4471 0, // sub_fp0
4472 0, // sub_fp1
4473 0, // sub_gp8_x0
4474 0, // sub_gp8_x1
4475 0, // sub_gt
4476 0, // sub_lt
4477 0, // sub_pair0
4478 0, // sub_pair1
4479 0, // sub_un
4480 41, // sub_vsx0 -> VSRpRC
4481 41, // sub_vsx1 -> VSRpRC
4482 0, // sub_wacc_hi
4483 0, // sub_wacc_lo
4484 41, // sub_vsx1_then_sub_64 -> VSRpRC
4485 41, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC
4486 0, // sub_pair1_then_sub_64
4487 0, // sub_pair1_then_sub_64_hi_phony
4488 0, // sub_pair1_then_sub_vsx0
4489 0, // sub_pair1_then_sub_vsx1
4490 0, // sub_pair1_then_sub_vsx1_then_sub_64
4491 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4492 0, // sub_dmrrowp1_then_sub_dmrrow0
4493 0, // sub_dmrrowp1_then_sub_dmrrow1
4494 0, // sub_wacc_hi_then_sub_dmrrow0
4495 0, // sub_wacc_hi_then_sub_dmrrow1
4496 0, // sub_wacc_hi_then_sub_dmrrowp0
4497 0, // sub_wacc_hi_then_sub_dmrrowp1
4498 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4499 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4500 0, // sub_dmr1_then_sub_dmrrow0
4501 0, // sub_dmr1_then_sub_dmrrow1
4502 0, // sub_dmr1_then_sub_dmrrowp0
4503 0, // sub_dmr1_then_sub_dmrrowp1
4504 0, // sub_dmr1_then_sub_wacc_hi
4505 0, // sub_dmr1_then_sub_wacc_lo
4506 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4507 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4508 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4509 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4510 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4511 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4512 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4513 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4514 0, // sub_gp8_x1_then_sub_32
4515 },
4516 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC
4517 0, // sub_32
4518 0, // sub_32_hi_phony
4519 42, // sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4520 42, // sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4521 0, // sub_dmr0
4522 0, // sub_dmr1
4523 0, // sub_dmrrow0
4524 0, // sub_dmrrow1
4525 0, // sub_dmrrowp0
4526 0, // sub_dmrrowp1
4527 0, // sub_eq
4528 0, // sub_fp0
4529 0, // sub_fp1
4530 0, // sub_gp8_x0
4531 0, // sub_gp8_x1
4532 0, // sub_gt
4533 0, // sub_lt
4534 0, // sub_pair0
4535 0, // sub_pair1
4536 0, // sub_un
4537 42, // sub_vsx0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4538 42, // sub_vsx1 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4539 0, // sub_wacc_hi
4540 0, // sub_wacc_lo
4541 42, // sub_vsx1_then_sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4542 42, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4543 0, // sub_pair1_then_sub_64
4544 0, // sub_pair1_then_sub_64_hi_phony
4545 0, // sub_pair1_then_sub_vsx0
4546 0, // sub_pair1_then_sub_vsx1
4547 0, // sub_pair1_then_sub_vsx1_then_sub_64
4548 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4549 0, // sub_dmrrowp1_then_sub_dmrrow0
4550 0, // sub_dmrrowp1_then_sub_dmrrow1
4551 0, // sub_wacc_hi_then_sub_dmrrow0
4552 0, // sub_wacc_hi_then_sub_dmrrow1
4553 0, // sub_wacc_hi_then_sub_dmrrowp0
4554 0, // sub_wacc_hi_then_sub_dmrrowp1
4555 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4556 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4557 0, // sub_dmr1_then_sub_dmrrow0
4558 0, // sub_dmr1_then_sub_dmrrow1
4559 0, // sub_dmr1_then_sub_dmrrowp0
4560 0, // sub_dmr1_then_sub_dmrrowp1
4561 0, // sub_dmr1_then_sub_wacc_hi
4562 0, // sub_dmr1_then_sub_wacc_lo
4563 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4564 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4565 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4566 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4567 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4568 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4569 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4570 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4571 0, // sub_gp8_x1_then_sub_32
4572 },
4573 { // VSRpRC_with_sub_64_in_F4RC
4574 0, // sub_32
4575 0, // sub_32_hi_phony
4576 43, // sub_64 -> VSRpRC_with_sub_64_in_F4RC
4577 43, // sub_64_hi_phony -> VSRpRC_with_sub_64_in_F4RC
4578 0, // sub_dmr0
4579 0, // sub_dmr1
4580 0, // sub_dmrrow0
4581 0, // sub_dmrrow1
4582 0, // sub_dmrrowp0
4583 0, // sub_dmrrowp1
4584 0, // sub_eq
4585 0, // sub_fp0
4586 0, // sub_fp1
4587 0, // sub_gp8_x0
4588 0, // sub_gp8_x1
4589 0, // sub_gt
4590 0, // sub_lt
4591 0, // sub_pair0
4592 0, // sub_pair1
4593 0, // sub_un
4594 43, // sub_vsx0 -> VSRpRC_with_sub_64_in_F4RC
4595 43, // sub_vsx1 -> VSRpRC_with_sub_64_in_F4RC
4596 0, // sub_wacc_hi
4597 0, // sub_wacc_lo
4598 43, // sub_vsx1_then_sub_64 -> VSRpRC_with_sub_64_in_F4RC
4599 43, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC_with_sub_64_in_F4RC
4600 0, // sub_pair1_then_sub_64
4601 0, // sub_pair1_then_sub_64_hi_phony
4602 0, // sub_pair1_then_sub_vsx0
4603 0, // sub_pair1_then_sub_vsx1
4604 0, // sub_pair1_then_sub_vsx1_then_sub_64
4605 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4606 0, // sub_dmrrowp1_then_sub_dmrrow0
4607 0, // sub_dmrrowp1_then_sub_dmrrow1
4608 0, // sub_wacc_hi_then_sub_dmrrow0
4609 0, // sub_wacc_hi_then_sub_dmrrow1
4610 0, // sub_wacc_hi_then_sub_dmrrowp0
4611 0, // sub_wacc_hi_then_sub_dmrrowp1
4612 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4613 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4614 0, // sub_dmr1_then_sub_dmrrow0
4615 0, // sub_dmr1_then_sub_dmrrow1
4616 0, // sub_dmr1_then_sub_dmrrowp0
4617 0, // sub_dmr1_then_sub_dmrrowp1
4618 0, // sub_dmr1_then_sub_wacc_hi
4619 0, // sub_dmr1_then_sub_wacc_lo
4620 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4621 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4622 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4623 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4624 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4625 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4626 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4627 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4628 0, // sub_gp8_x1_then_sub_32
4629 },
4630 { // VSRpRC_with_sub_64_in_VFRC
4631 0, // sub_32
4632 0, // sub_32_hi_phony
4633 44, // sub_64 -> VSRpRC_with_sub_64_in_VFRC
4634 44, // sub_64_hi_phony -> VSRpRC_with_sub_64_in_VFRC
4635 0, // sub_dmr0
4636 0, // sub_dmr1
4637 0, // sub_dmrrow0
4638 0, // sub_dmrrow1
4639 0, // sub_dmrrowp0
4640 0, // sub_dmrrowp1
4641 0, // sub_eq
4642 0, // sub_fp0
4643 0, // sub_fp1
4644 0, // sub_gp8_x0
4645 0, // sub_gp8_x1
4646 0, // sub_gt
4647 0, // sub_lt
4648 0, // sub_pair0
4649 0, // sub_pair1
4650 0, // sub_un
4651 44, // sub_vsx0 -> VSRpRC_with_sub_64_in_VFRC
4652 44, // sub_vsx1 -> VSRpRC_with_sub_64_in_VFRC
4653 0, // sub_wacc_hi
4654 0, // sub_wacc_lo
4655 44, // sub_vsx1_then_sub_64 -> VSRpRC_with_sub_64_in_VFRC
4656 44, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC_with_sub_64_in_VFRC
4657 0, // sub_pair1_then_sub_64
4658 0, // sub_pair1_then_sub_64_hi_phony
4659 0, // sub_pair1_then_sub_vsx0
4660 0, // sub_pair1_then_sub_vsx1
4661 0, // sub_pair1_then_sub_vsx1_then_sub_64
4662 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4663 0, // sub_dmrrowp1_then_sub_dmrrow0
4664 0, // sub_dmrrowp1_then_sub_dmrrow1
4665 0, // sub_wacc_hi_then_sub_dmrrow0
4666 0, // sub_wacc_hi_then_sub_dmrrow1
4667 0, // sub_wacc_hi_then_sub_dmrrowp0
4668 0, // sub_wacc_hi_then_sub_dmrrowp1
4669 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4670 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4671 0, // sub_dmr1_then_sub_dmrrow0
4672 0, // sub_dmr1_then_sub_dmrrow1
4673 0, // sub_dmr1_then_sub_dmrrowp0
4674 0, // sub_dmr1_then_sub_dmrrowp1
4675 0, // sub_dmr1_then_sub_wacc_hi
4676 0, // sub_dmr1_then_sub_wacc_lo
4677 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4678 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4679 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4680 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4681 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4682 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4683 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4684 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4685 0, // sub_gp8_x1_then_sub_32
4686 },
4687 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4688 0, // sub_32
4689 0, // sub_32_hi_phony
4690 45, // sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4691 45, // sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4692 0, // sub_dmr0
4693 0, // sub_dmr1
4694 0, // sub_dmrrow0
4695 0, // sub_dmrrow1
4696 0, // sub_dmrrowp0
4697 0, // sub_dmrrowp1
4698 0, // sub_eq
4699 0, // sub_fp0
4700 0, // sub_fp1
4701 0, // sub_gp8_x0
4702 0, // sub_gp8_x1
4703 0, // sub_gt
4704 0, // sub_lt
4705 0, // sub_pair0
4706 0, // sub_pair1
4707 0, // sub_un
4708 45, // sub_vsx0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4709 45, // sub_vsx1 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4710 0, // sub_wacc_hi
4711 0, // sub_wacc_lo
4712 45, // sub_vsx1_then_sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4713 45, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4714 0, // sub_pair1_then_sub_64
4715 0, // sub_pair1_then_sub_64_hi_phony
4716 0, // sub_pair1_then_sub_vsx0
4717 0, // sub_pair1_then_sub_vsx1
4718 0, // sub_pair1_then_sub_vsx1_then_sub_64
4719 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4720 0, // sub_dmrrowp1_then_sub_dmrrow0
4721 0, // sub_dmrrowp1_then_sub_dmrrow1
4722 0, // sub_wacc_hi_then_sub_dmrrow0
4723 0, // sub_wacc_hi_then_sub_dmrrow1
4724 0, // sub_wacc_hi_then_sub_dmrrowp0
4725 0, // sub_wacc_hi_then_sub_dmrrowp1
4726 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4727 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4728 0, // sub_dmr1_then_sub_dmrrow0
4729 0, // sub_dmr1_then_sub_dmrrow1
4730 0, // sub_dmr1_then_sub_dmrrowp0
4731 0, // sub_dmr1_then_sub_dmrrowp1
4732 0, // sub_dmr1_then_sub_wacc_hi
4733 0, // sub_dmr1_then_sub_wacc_lo
4734 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4735 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4736 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4737 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4738 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4739 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4740 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4741 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4742 0, // sub_gp8_x1_then_sub_32
4743 },
4744 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4745 0, // sub_32
4746 0, // sub_32_hi_phony
4747 46, // sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4748 46, // sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4749 0, // sub_dmr0
4750 0, // sub_dmr1
4751 0, // sub_dmrrow0
4752 0, // sub_dmrrow1
4753 0, // sub_dmrrowp0
4754 0, // sub_dmrrowp1
4755 0, // sub_eq
4756 0, // sub_fp0
4757 0, // sub_fp1
4758 0, // sub_gp8_x0
4759 0, // sub_gp8_x1
4760 0, // sub_gt
4761 0, // sub_lt
4762 0, // sub_pair0
4763 0, // sub_pair1
4764 0, // sub_un
4765 46, // sub_vsx0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4766 46, // sub_vsx1 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4767 0, // sub_wacc_hi
4768 0, // sub_wacc_lo
4769 46, // sub_vsx1_then_sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4770 46, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4771 0, // sub_pair1_then_sub_64
4772 0, // sub_pair1_then_sub_64_hi_phony
4773 0, // sub_pair1_then_sub_vsx0
4774 0, // sub_pair1_then_sub_vsx1
4775 0, // sub_pair1_then_sub_vsx1_then_sub_64
4776 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4777 0, // sub_dmrrowp1_then_sub_dmrrow0
4778 0, // sub_dmrrowp1_then_sub_dmrrow1
4779 0, // sub_wacc_hi_then_sub_dmrrow0
4780 0, // sub_wacc_hi_then_sub_dmrrow1
4781 0, // sub_wacc_hi_then_sub_dmrrowp0
4782 0, // sub_wacc_hi_then_sub_dmrrowp1
4783 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4784 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4785 0, // sub_dmr1_then_sub_dmrrow0
4786 0, // sub_dmr1_then_sub_dmrrow1
4787 0, // sub_dmr1_then_sub_dmrrowp0
4788 0, // sub_dmr1_then_sub_dmrrowp1
4789 0, // sub_dmr1_then_sub_wacc_hi
4790 0, // sub_dmr1_then_sub_wacc_lo
4791 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4792 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4793 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4794 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4795 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4796 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4797 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4798 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4799 0, // sub_gp8_x1_then_sub_32
4800 },
4801 { // ACCRC
4802 0, // sub_32
4803 0, // sub_32_hi_phony
4804 47, // sub_64 -> ACCRC
4805 47, // sub_64_hi_phony -> ACCRC
4806 0, // sub_dmr0
4807 0, // sub_dmr1
4808 0, // sub_dmrrow0
4809 0, // sub_dmrrow1
4810 0, // sub_dmrrowp0
4811 0, // sub_dmrrowp1
4812 0, // sub_eq
4813 0, // sub_fp0
4814 0, // sub_fp1
4815 0, // sub_gp8_x0
4816 0, // sub_gp8_x1
4817 0, // sub_gt
4818 0, // sub_lt
4819 47, // sub_pair0 -> ACCRC
4820 47, // sub_pair1 -> ACCRC
4821 0, // sub_un
4822 47, // sub_vsx0 -> ACCRC
4823 47, // sub_vsx1 -> ACCRC
4824 0, // sub_wacc_hi
4825 0, // sub_wacc_lo
4826 47, // sub_vsx1_then_sub_64 -> ACCRC
4827 47, // sub_vsx1_then_sub_64_hi_phony -> ACCRC
4828 47, // sub_pair1_then_sub_64 -> ACCRC
4829 47, // sub_pair1_then_sub_64_hi_phony -> ACCRC
4830 47, // sub_pair1_then_sub_vsx0 -> ACCRC
4831 47, // sub_pair1_then_sub_vsx1 -> ACCRC
4832 47, // sub_pair1_then_sub_vsx1_then_sub_64 -> ACCRC
4833 47, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> ACCRC
4834 0, // sub_dmrrowp1_then_sub_dmrrow0
4835 0, // sub_dmrrowp1_then_sub_dmrrow1
4836 0, // sub_wacc_hi_then_sub_dmrrow0
4837 0, // sub_wacc_hi_then_sub_dmrrow1
4838 0, // sub_wacc_hi_then_sub_dmrrowp0
4839 0, // sub_wacc_hi_then_sub_dmrrowp1
4840 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4841 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4842 0, // sub_dmr1_then_sub_dmrrow0
4843 0, // sub_dmr1_then_sub_dmrrow1
4844 0, // sub_dmr1_then_sub_dmrrowp0
4845 0, // sub_dmr1_then_sub_dmrrowp1
4846 0, // sub_dmr1_then_sub_wacc_hi
4847 0, // sub_dmr1_then_sub_wacc_lo
4848 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4849 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4850 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4851 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4852 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4853 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4854 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4855 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4856 0, // sub_gp8_x1_then_sub_32
4857 },
4858 { // UACCRC
4859 0, // sub_32
4860 0, // sub_32_hi_phony
4861 48, // sub_64 -> UACCRC
4862 48, // sub_64_hi_phony -> UACCRC
4863 0, // sub_dmr0
4864 0, // sub_dmr1
4865 0, // sub_dmrrow0
4866 0, // sub_dmrrow1
4867 0, // sub_dmrrowp0
4868 0, // sub_dmrrowp1
4869 0, // sub_eq
4870 0, // sub_fp0
4871 0, // sub_fp1
4872 0, // sub_gp8_x0
4873 0, // sub_gp8_x1
4874 0, // sub_gt
4875 0, // sub_lt
4876 48, // sub_pair0 -> UACCRC
4877 48, // sub_pair1 -> UACCRC
4878 0, // sub_un
4879 48, // sub_vsx0 -> UACCRC
4880 48, // sub_vsx1 -> UACCRC
4881 0, // sub_wacc_hi
4882 0, // sub_wacc_lo
4883 48, // sub_vsx1_then_sub_64 -> UACCRC
4884 48, // sub_vsx1_then_sub_64_hi_phony -> UACCRC
4885 48, // sub_pair1_then_sub_64 -> UACCRC
4886 48, // sub_pair1_then_sub_64_hi_phony -> UACCRC
4887 48, // sub_pair1_then_sub_vsx0 -> UACCRC
4888 48, // sub_pair1_then_sub_vsx1 -> UACCRC
4889 48, // sub_pair1_then_sub_vsx1_then_sub_64 -> UACCRC
4890 48, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> UACCRC
4891 0, // sub_dmrrowp1_then_sub_dmrrow0
4892 0, // sub_dmrrowp1_then_sub_dmrrow1
4893 0, // sub_wacc_hi_then_sub_dmrrow0
4894 0, // sub_wacc_hi_then_sub_dmrrow1
4895 0, // sub_wacc_hi_then_sub_dmrrowp0
4896 0, // sub_wacc_hi_then_sub_dmrrowp1
4897 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4898 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4899 0, // sub_dmr1_then_sub_dmrrow0
4900 0, // sub_dmr1_then_sub_dmrrow1
4901 0, // sub_dmr1_then_sub_dmrrowp0
4902 0, // sub_dmr1_then_sub_dmrrowp1
4903 0, // sub_dmr1_then_sub_wacc_hi
4904 0, // sub_dmr1_then_sub_wacc_lo
4905 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4906 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4907 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4908 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4909 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4910 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4911 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4912 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4913 0, // sub_gp8_x1_then_sub_32
4914 },
4915 { // WACCRC
4916 0, // sub_32
4917 0, // sub_32_hi_phony
4918 0, // sub_64
4919 0, // sub_64_hi_phony
4920 0, // sub_dmr0
4921 0, // sub_dmr1
4922 49, // sub_dmrrow0 -> WACCRC
4923 49, // sub_dmrrow1 -> WACCRC
4924 49, // sub_dmrrowp0 -> WACCRC
4925 49, // sub_dmrrowp1 -> WACCRC
4926 0, // sub_eq
4927 0, // sub_fp0
4928 0, // sub_fp1
4929 0, // sub_gp8_x0
4930 0, // sub_gp8_x1
4931 0, // sub_gt
4932 0, // sub_lt
4933 0, // sub_pair0
4934 0, // sub_pair1
4935 0, // sub_un
4936 0, // sub_vsx0
4937 0, // sub_vsx1
4938 0, // sub_wacc_hi
4939 0, // sub_wacc_lo
4940 0, // sub_vsx1_then_sub_64
4941 0, // sub_vsx1_then_sub_64_hi_phony
4942 0, // sub_pair1_then_sub_64
4943 0, // sub_pair1_then_sub_64_hi_phony
4944 0, // sub_pair1_then_sub_vsx0
4945 0, // sub_pair1_then_sub_vsx1
4946 0, // sub_pair1_then_sub_vsx1_then_sub_64
4947 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4948 49, // sub_dmrrowp1_then_sub_dmrrow0 -> WACCRC
4949 49, // sub_dmrrowp1_then_sub_dmrrow1 -> WACCRC
4950 0, // sub_wacc_hi_then_sub_dmrrow0
4951 0, // sub_wacc_hi_then_sub_dmrrow1
4952 0, // sub_wacc_hi_then_sub_dmrrowp0
4953 0, // sub_wacc_hi_then_sub_dmrrowp1
4954 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4955 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4956 0, // sub_dmr1_then_sub_dmrrow0
4957 0, // sub_dmr1_then_sub_dmrrow1
4958 0, // sub_dmr1_then_sub_dmrrowp0
4959 0, // sub_dmr1_then_sub_dmrrowp1
4960 0, // sub_dmr1_then_sub_wacc_hi
4961 0, // sub_dmr1_then_sub_wacc_lo
4962 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4963 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4964 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4965 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4966 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4967 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4968 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4969 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4970 0, // sub_gp8_x1_then_sub_32
4971 },
4972 { // WACC_HIRC
4973 0, // sub_32
4974 0, // sub_32_hi_phony
4975 0, // sub_64
4976 0, // sub_64_hi_phony
4977 0, // sub_dmr0
4978 0, // sub_dmr1
4979 50, // sub_dmrrow0 -> WACC_HIRC
4980 50, // sub_dmrrow1 -> WACC_HIRC
4981 50, // sub_dmrrowp0 -> WACC_HIRC
4982 50, // sub_dmrrowp1 -> WACC_HIRC
4983 0, // sub_eq
4984 0, // sub_fp0
4985 0, // sub_fp1
4986 0, // sub_gp8_x0
4987 0, // sub_gp8_x1
4988 0, // sub_gt
4989 0, // sub_lt
4990 0, // sub_pair0
4991 0, // sub_pair1
4992 0, // sub_un
4993 0, // sub_vsx0
4994 0, // sub_vsx1
4995 0, // sub_wacc_hi
4996 0, // sub_wacc_lo
4997 0, // sub_vsx1_then_sub_64
4998 0, // sub_vsx1_then_sub_64_hi_phony
4999 0, // sub_pair1_then_sub_64
5000 0, // sub_pair1_then_sub_64_hi_phony
5001 0, // sub_pair1_then_sub_vsx0
5002 0, // sub_pair1_then_sub_vsx1
5003 0, // sub_pair1_then_sub_vsx1_then_sub_64
5004 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5005 50, // sub_dmrrowp1_then_sub_dmrrow0 -> WACC_HIRC
5006 50, // sub_dmrrowp1_then_sub_dmrrow1 -> WACC_HIRC
5007 0, // sub_wacc_hi_then_sub_dmrrow0
5008 0, // sub_wacc_hi_then_sub_dmrrow1
5009 0, // sub_wacc_hi_then_sub_dmrrowp0
5010 0, // sub_wacc_hi_then_sub_dmrrowp1
5011 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5012 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5013 0, // sub_dmr1_then_sub_dmrrow0
5014 0, // sub_dmr1_then_sub_dmrrow1
5015 0, // sub_dmr1_then_sub_dmrrowp0
5016 0, // sub_dmr1_then_sub_dmrrowp1
5017 0, // sub_dmr1_then_sub_wacc_hi
5018 0, // sub_dmr1_then_sub_wacc_lo
5019 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5020 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5021 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5022 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5023 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5024 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5025 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5026 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5027 0, // sub_gp8_x1_then_sub_32
5028 },
5029 { // ACCRC_with_sub_64_in_SPILLTOVSRRC
5030 0, // sub_32
5031 0, // sub_32_hi_phony
5032 51, // sub_64 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5033 51, // sub_64_hi_phony -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5034 0, // sub_dmr0
5035 0, // sub_dmr1
5036 0, // sub_dmrrow0
5037 0, // sub_dmrrow1
5038 0, // sub_dmrrowp0
5039 0, // sub_dmrrowp1
5040 0, // sub_eq
5041 0, // sub_fp0
5042 0, // sub_fp1
5043 0, // sub_gp8_x0
5044 0, // sub_gp8_x1
5045 0, // sub_gt
5046 0, // sub_lt
5047 51, // sub_pair0 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5048 51, // sub_pair1 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5049 0, // sub_un
5050 51, // sub_vsx0 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5051 51, // sub_vsx1 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5052 0, // sub_wacc_hi
5053 0, // sub_wacc_lo
5054 51, // sub_vsx1_then_sub_64 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5055 51, // sub_vsx1_then_sub_64_hi_phony -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5056 51, // sub_pair1_then_sub_64 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5057 51, // sub_pair1_then_sub_64_hi_phony -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5058 51, // sub_pair1_then_sub_vsx0 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5059 51, // sub_pair1_then_sub_vsx1 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5060 51, // sub_pair1_then_sub_vsx1_then_sub_64 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5061 51, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5062 0, // sub_dmrrowp1_then_sub_dmrrow0
5063 0, // sub_dmrrowp1_then_sub_dmrrow1
5064 0, // sub_wacc_hi_then_sub_dmrrow0
5065 0, // sub_wacc_hi_then_sub_dmrrow1
5066 0, // sub_wacc_hi_then_sub_dmrrowp0
5067 0, // sub_wacc_hi_then_sub_dmrrowp1
5068 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5069 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5070 0, // sub_dmr1_then_sub_dmrrow0
5071 0, // sub_dmr1_then_sub_dmrrow1
5072 0, // sub_dmr1_then_sub_dmrrowp0
5073 0, // sub_dmr1_then_sub_dmrrowp1
5074 0, // sub_dmr1_then_sub_wacc_hi
5075 0, // sub_dmr1_then_sub_wacc_lo
5076 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5077 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5078 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5079 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5080 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5081 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5082 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5083 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5084 0, // sub_gp8_x1_then_sub_32
5085 },
5086 { // UACCRC_with_sub_64_in_SPILLTOVSRRC
5087 0, // sub_32
5088 0, // sub_32_hi_phony
5089 52, // sub_64 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5090 52, // sub_64_hi_phony -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5091 0, // sub_dmr0
5092 0, // sub_dmr1
5093 0, // sub_dmrrow0
5094 0, // sub_dmrrow1
5095 0, // sub_dmrrowp0
5096 0, // sub_dmrrowp1
5097 0, // sub_eq
5098 0, // sub_fp0
5099 0, // sub_fp1
5100 0, // sub_gp8_x0
5101 0, // sub_gp8_x1
5102 0, // sub_gt
5103 0, // sub_lt
5104 52, // sub_pair0 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5105 52, // sub_pair1 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5106 0, // sub_un
5107 52, // sub_vsx0 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5108 52, // sub_vsx1 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5109 0, // sub_wacc_hi
5110 0, // sub_wacc_lo
5111 52, // sub_vsx1_then_sub_64 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5112 52, // sub_vsx1_then_sub_64_hi_phony -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5113 52, // sub_pair1_then_sub_64 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5114 52, // sub_pair1_then_sub_64_hi_phony -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5115 52, // sub_pair1_then_sub_vsx0 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5116 52, // sub_pair1_then_sub_vsx1 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5117 52, // sub_pair1_then_sub_vsx1_then_sub_64 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5118 52, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5119 0, // sub_dmrrowp1_then_sub_dmrrow0
5120 0, // sub_dmrrowp1_then_sub_dmrrow1
5121 0, // sub_wacc_hi_then_sub_dmrrow0
5122 0, // sub_wacc_hi_then_sub_dmrrow1
5123 0, // sub_wacc_hi_then_sub_dmrrowp0
5124 0, // sub_wacc_hi_then_sub_dmrrowp1
5125 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5126 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5127 0, // sub_dmr1_then_sub_dmrrow0
5128 0, // sub_dmr1_then_sub_dmrrow1
5129 0, // sub_dmr1_then_sub_dmrrowp0
5130 0, // sub_dmr1_then_sub_dmrrowp1
5131 0, // sub_dmr1_then_sub_wacc_hi
5132 0, // sub_dmr1_then_sub_wacc_lo
5133 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5134 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5135 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5136 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5137 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5138 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5139 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5140 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5141 0, // sub_gp8_x1_then_sub_32
5142 },
5143 { // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5144 0, // sub_32
5145 0, // sub_32_hi_phony
5146 53, // sub_64 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5147 53, // sub_64_hi_phony -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5148 0, // sub_dmr0
5149 0, // sub_dmr1
5150 0, // sub_dmrrow0
5151 0, // sub_dmrrow1
5152 0, // sub_dmrrowp0
5153 0, // sub_dmrrowp1
5154 0, // sub_eq
5155 0, // sub_fp0
5156 0, // sub_fp1
5157 0, // sub_gp8_x0
5158 0, // sub_gp8_x1
5159 0, // sub_gt
5160 0, // sub_lt
5161 53, // sub_pair0 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5162 53, // sub_pair1 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5163 0, // sub_un
5164 53, // sub_vsx0 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5165 53, // sub_vsx1 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5166 0, // sub_wacc_hi
5167 0, // sub_wacc_lo
5168 53, // sub_vsx1_then_sub_64 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5169 53, // sub_vsx1_then_sub_64_hi_phony -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5170 53, // sub_pair1_then_sub_64 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5171 53, // sub_pair1_then_sub_64_hi_phony -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5172 53, // sub_pair1_then_sub_vsx0 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5173 53, // sub_pair1_then_sub_vsx1 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5174 53, // sub_pair1_then_sub_vsx1_then_sub_64 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5175 53, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5176 0, // sub_dmrrowp1_then_sub_dmrrow0
5177 0, // sub_dmrrowp1_then_sub_dmrrow1
5178 0, // sub_wacc_hi_then_sub_dmrrow0
5179 0, // sub_wacc_hi_then_sub_dmrrow1
5180 0, // sub_wacc_hi_then_sub_dmrrowp0
5181 0, // sub_wacc_hi_then_sub_dmrrowp1
5182 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5183 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5184 0, // sub_dmr1_then_sub_dmrrow0
5185 0, // sub_dmr1_then_sub_dmrrow1
5186 0, // sub_dmr1_then_sub_dmrrowp0
5187 0, // sub_dmr1_then_sub_dmrrowp1
5188 0, // sub_dmr1_then_sub_wacc_hi
5189 0, // sub_dmr1_then_sub_wacc_lo
5190 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5191 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5192 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5193 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5194 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5195 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5196 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5197 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5198 0, // sub_gp8_x1_then_sub_32
5199 },
5200 { // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5201 0, // sub_32
5202 0, // sub_32_hi_phony
5203 54, // sub_64 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5204 54, // sub_64_hi_phony -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5205 0, // sub_dmr0
5206 0, // sub_dmr1
5207 0, // sub_dmrrow0
5208 0, // sub_dmrrow1
5209 0, // sub_dmrrowp0
5210 0, // sub_dmrrowp1
5211 0, // sub_eq
5212 0, // sub_fp0
5213 0, // sub_fp1
5214 0, // sub_gp8_x0
5215 0, // sub_gp8_x1
5216 0, // sub_gt
5217 0, // sub_lt
5218 54, // sub_pair0 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5219 54, // sub_pair1 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5220 0, // sub_un
5221 54, // sub_vsx0 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5222 54, // sub_vsx1 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5223 0, // sub_wacc_hi
5224 0, // sub_wacc_lo
5225 54, // sub_vsx1_then_sub_64 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5226 54, // sub_vsx1_then_sub_64_hi_phony -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5227 54, // sub_pair1_then_sub_64 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5228 54, // sub_pair1_then_sub_64_hi_phony -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5229 54, // sub_pair1_then_sub_vsx0 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5230 54, // sub_pair1_then_sub_vsx1 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5231 54, // sub_pair1_then_sub_vsx1_then_sub_64 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5232 54, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5233 0, // sub_dmrrowp1_then_sub_dmrrow0
5234 0, // sub_dmrrowp1_then_sub_dmrrow1
5235 0, // sub_wacc_hi_then_sub_dmrrow0
5236 0, // sub_wacc_hi_then_sub_dmrrow1
5237 0, // sub_wacc_hi_then_sub_dmrrowp0
5238 0, // sub_wacc_hi_then_sub_dmrrowp1
5239 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5240 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5241 0, // sub_dmr1_then_sub_dmrrow0
5242 0, // sub_dmr1_then_sub_dmrrow1
5243 0, // sub_dmr1_then_sub_dmrrowp0
5244 0, // sub_dmr1_then_sub_dmrrowp1
5245 0, // sub_dmr1_then_sub_wacc_hi
5246 0, // sub_dmr1_then_sub_wacc_lo
5247 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5248 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5249 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5250 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5251 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5252 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5253 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5254 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5255 0, // sub_gp8_x1_then_sub_32
5256 },
5257 { // DMRRC
5258 0, // sub_32
5259 0, // sub_32_hi_phony
5260 0, // sub_64
5261 0, // sub_64_hi_phony
5262 0, // sub_dmr0
5263 0, // sub_dmr1
5264 55, // sub_dmrrow0 -> DMRRC
5265 55, // sub_dmrrow1 -> DMRRC
5266 55, // sub_dmrrowp0 -> DMRRC
5267 55, // sub_dmrrowp1 -> DMRRC
5268 0, // sub_eq
5269 0, // sub_fp0
5270 0, // sub_fp1
5271 0, // sub_gp8_x0
5272 0, // sub_gp8_x1
5273 0, // sub_gt
5274 0, // sub_lt
5275 0, // sub_pair0
5276 0, // sub_pair1
5277 0, // sub_un
5278 0, // sub_vsx0
5279 0, // sub_vsx1
5280 55, // sub_wacc_hi -> DMRRC
5281 55, // sub_wacc_lo -> DMRRC
5282 0, // sub_vsx1_then_sub_64
5283 0, // sub_vsx1_then_sub_64_hi_phony
5284 0, // sub_pair1_then_sub_64
5285 0, // sub_pair1_then_sub_64_hi_phony
5286 0, // sub_pair1_then_sub_vsx0
5287 0, // sub_pair1_then_sub_vsx1
5288 0, // sub_pair1_then_sub_vsx1_then_sub_64
5289 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5290 55, // sub_dmrrowp1_then_sub_dmrrow0 -> DMRRC
5291 55, // sub_dmrrowp1_then_sub_dmrrow1 -> DMRRC
5292 55, // sub_wacc_hi_then_sub_dmrrow0 -> DMRRC
5293 55, // sub_wacc_hi_then_sub_dmrrow1 -> DMRRC
5294 55, // sub_wacc_hi_then_sub_dmrrowp0 -> DMRRC
5295 55, // sub_wacc_hi_then_sub_dmrrowp1 -> DMRRC
5296 55, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRRC
5297 55, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRRC
5298 0, // sub_dmr1_then_sub_dmrrow0
5299 0, // sub_dmr1_then_sub_dmrrow1
5300 0, // sub_dmr1_then_sub_dmrrowp0
5301 0, // sub_dmr1_then_sub_dmrrowp1
5302 0, // sub_dmr1_then_sub_wacc_hi
5303 0, // sub_dmr1_then_sub_wacc_lo
5304 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5305 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5306 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5307 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5308 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5309 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5310 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5311 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5312 0, // sub_gp8_x1_then_sub_32
5313 },
5314 { // DMRpRC
5315 0, // sub_32
5316 0, // sub_32_hi_phony
5317 0, // sub_64
5318 0, // sub_64_hi_phony
5319 56, // sub_dmr0 -> DMRpRC
5320 56, // sub_dmr1 -> DMRpRC
5321 56, // sub_dmrrow0 -> DMRpRC
5322 56, // sub_dmrrow1 -> DMRpRC
5323 56, // sub_dmrrowp0 -> DMRpRC
5324 56, // sub_dmrrowp1 -> DMRpRC
5325 0, // sub_eq
5326 0, // sub_fp0
5327 0, // sub_fp1
5328 0, // sub_gp8_x0
5329 0, // sub_gp8_x1
5330 0, // sub_gt
5331 0, // sub_lt
5332 0, // sub_pair0
5333 0, // sub_pair1
5334 0, // sub_un
5335 0, // sub_vsx0
5336 0, // sub_vsx1
5337 56, // sub_wacc_hi -> DMRpRC
5338 56, // sub_wacc_lo -> DMRpRC
5339 0, // sub_vsx1_then_sub_64
5340 0, // sub_vsx1_then_sub_64_hi_phony
5341 0, // sub_pair1_then_sub_64
5342 0, // sub_pair1_then_sub_64_hi_phony
5343 0, // sub_pair1_then_sub_vsx0
5344 0, // sub_pair1_then_sub_vsx1
5345 0, // sub_pair1_then_sub_vsx1_then_sub_64
5346 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5347 56, // sub_dmrrowp1_then_sub_dmrrow0 -> DMRpRC
5348 56, // sub_dmrrowp1_then_sub_dmrrow1 -> DMRpRC
5349 56, // sub_wacc_hi_then_sub_dmrrow0 -> DMRpRC
5350 56, // sub_wacc_hi_then_sub_dmrrow1 -> DMRpRC
5351 56, // sub_wacc_hi_then_sub_dmrrowp0 -> DMRpRC
5352 56, // sub_wacc_hi_then_sub_dmrrowp1 -> DMRpRC
5353 56, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRpRC
5354 56, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRpRC
5355 56, // sub_dmr1_then_sub_dmrrow0 -> DMRpRC
5356 56, // sub_dmr1_then_sub_dmrrow1 -> DMRpRC
5357 56, // sub_dmr1_then_sub_dmrrowp0 -> DMRpRC
5358 56, // sub_dmr1_then_sub_dmrrowp1 -> DMRpRC
5359 56, // sub_dmr1_then_sub_wacc_hi -> DMRpRC
5360 56, // sub_dmr1_then_sub_wacc_lo -> DMRpRC
5361 56, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRpRC
5362 56, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRpRC
5363 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0 -> DMRpRC
5364 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1 -> DMRpRC
5365 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0 -> DMRpRC
5366 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1 -> DMRpRC
5367 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRpRC
5368 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRpRC
5369 0, // sub_gp8_x1_then_sub_32
5370 },
5371
5372 };
5373 assert(RC && "Missing regclass");
5374 if (!Idx) return RC;
5375 --Idx;
5376 assert(Idx < 55 && "Bad subreg");
5377 unsigned TV = Table[RC->getID()][Idx];
5378 return TV ? getRegClass(i: TV - 1) : nullptr;
5379}const TargetRegisterClass *PPCGenRegisterInfo::getSubRegisterClass(const TargetRegisterClass *RC, unsigned Idx) const {
5380 static constexpr uint8_t Table[56][55] = {
5381 { // VSSRC
5382 0, // VSSRC:sub_32
5383 0, // VSSRC:sub_32_hi_phony
5384 0, // VSSRC:sub_64
5385 0, // VSSRC:sub_64_hi_phony
5386 0, // VSSRC:sub_dmr0
5387 0, // VSSRC:sub_dmr1
5388 0, // VSSRC:sub_dmrrow0
5389 0, // VSSRC:sub_dmrrow1
5390 0, // VSSRC:sub_dmrrowp0
5391 0, // VSSRC:sub_dmrrowp1
5392 0, // VSSRC:sub_eq
5393 0, // VSSRC:sub_fp0
5394 0, // VSSRC:sub_fp1
5395 0, // VSSRC:sub_gp8_x0
5396 0, // VSSRC:sub_gp8_x1
5397 0, // VSSRC:sub_gt
5398 0, // VSSRC:sub_lt
5399 0, // VSSRC:sub_pair0
5400 0, // VSSRC:sub_pair1
5401 0, // VSSRC:sub_un
5402 0, // VSSRC:sub_vsx0
5403 0, // VSSRC:sub_vsx1
5404 0, // VSSRC:sub_wacc_hi
5405 0, // VSSRC:sub_wacc_lo
5406 0, // VSSRC:sub_vsx1_then_sub_64
5407 0, // VSSRC:sub_vsx1_then_sub_64_hi_phony
5408 0, // VSSRC:sub_pair1_then_sub_64
5409 0, // VSSRC:sub_pair1_then_sub_64_hi_phony
5410 0, // VSSRC:sub_pair1_then_sub_vsx0
5411 0, // VSSRC:sub_pair1_then_sub_vsx1
5412 0, // VSSRC:sub_pair1_then_sub_vsx1_then_sub_64
5413 0, // VSSRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5414 0, // VSSRC:sub_dmrrowp1_then_sub_dmrrow0
5415 0, // VSSRC:sub_dmrrowp1_then_sub_dmrrow1
5416 0, // VSSRC:sub_wacc_hi_then_sub_dmrrow0
5417 0, // VSSRC:sub_wacc_hi_then_sub_dmrrow1
5418 0, // VSSRC:sub_wacc_hi_then_sub_dmrrowp0
5419 0, // VSSRC:sub_wacc_hi_then_sub_dmrrowp1
5420 0, // VSSRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5421 0, // VSSRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5422 0, // VSSRC:sub_dmr1_then_sub_dmrrow0
5423 0, // VSSRC:sub_dmr1_then_sub_dmrrow1
5424 0, // VSSRC:sub_dmr1_then_sub_dmrrowp0
5425 0, // VSSRC:sub_dmr1_then_sub_dmrrowp1
5426 0, // VSSRC:sub_dmr1_then_sub_wacc_hi
5427 0, // VSSRC:sub_dmr1_then_sub_wacc_lo
5428 0, // VSSRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5429 0, // VSSRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5430 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5431 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5432 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5433 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5434 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5435 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5436 0, // VSSRC:sub_gp8_x1_then_sub_32
5437 },
5438 { // GPRC
5439 0, // GPRC:sub_32
5440 0, // GPRC:sub_32_hi_phony
5441 0, // GPRC:sub_64
5442 0, // GPRC:sub_64_hi_phony
5443 0, // GPRC:sub_dmr0
5444 0, // GPRC:sub_dmr1
5445 0, // GPRC:sub_dmrrow0
5446 0, // GPRC:sub_dmrrow1
5447 0, // GPRC:sub_dmrrowp0
5448 0, // GPRC:sub_dmrrowp1
5449 0, // GPRC:sub_eq
5450 0, // GPRC:sub_fp0
5451 0, // GPRC:sub_fp1
5452 0, // GPRC:sub_gp8_x0
5453 0, // GPRC:sub_gp8_x1
5454 0, // GPRC:sub_gt
5455 0, // GPRC:sub_lt
5456 0, // GPRC:sub_pair0
5457 0, // GPRC:sub_pair1
5458 0, // GPRC:sub_un
5459 0, // GPRC:sub_vsx0
5460 0, // GPRC:sub_vsx1
5461 0, // GPRC:sub_wacc_hi
5462 0, // GPRC:sub_wacc_lo
5463 0, // GPRC:sub_vsx1_then_sub_64
5464 0, // GPRC:sub_vsx1_then_sub_64_hi_phony
5465 0, // GPRC:sub_pair1_then_sub_64
5466 0, // GPRC:sub_pair1_then_sub_64_hi_phony
5467 0, // GPRC:sub_pair1_then_sub_vsx0
5468 0, // GPRC:sub_pair1_then_sub_vsx1
5469 0, // GPRC:sub_pair1_then_sub_vsx1_then_sub_64
5470 0, // GPRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5471 0, // GPRC:sub_dmrrowp1_then_sub_dmrrow0
5472 0, // GPRC:sub_dmrrowp1_then_sub_dmrrow1
5473 0, // GPRC:sub_wacc_hi_then_sub_dmrrow0
5474 0, // GPRC:sub_wacc_hi_then_sub_dmrrow1
5475 0, // GPRC:sub_wacc_hi_then_sub_dmrrowp0
5476 0, // GPRC:sub_wacc_hi_then_sub_dmrrowp1
5477 0, // GPRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5478 0, // GPRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5479 0, // GPRC:sub_dmr1_then_sub_dmrrow0
5480 0, // GPRC:sub_dmr1_then_sub_dmrrow1
5481 0, // GPRC:sub_dmr1_then_sub_dmrrowp0
5482 0, // GPRC:sub_dmr1_then_sub_dmrrowp1
5483 0, // GPRC:sub_dmr1_then_sub_wacc_hi
5484 0, // GPRC:sub_dmr1_then_sub_wacc_lo
5485 0, // GPRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5486 0, // GPRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5487 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5488 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5489 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5490 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5491 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5492 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5493 0, // GPRC:sub_gp8_x1_then_sub_32
5494 },
5495 { // GPRC_NOR0
5496 0, // GPRC_NOR0:sub_32
5497 0, // GPRC_NOR0:sub_32_hi_phony
5498 0, // GPRC_NOR0:sub_64
5499 0, // GPRC_NOR0:sub_64_hi_phony
5500 0, // GPRC_NOR0:sub_dmr0
5501 0, // GPRC_NOR0:sub_dmr1
5502 0, // GPRC_NOR0:sub_dmrrow0
5503 0, // GPRC_NOR0:sub_dmrrow1
5504 0, // GPRC_NOR0:sub_dmrrowp0
5505 0, // GPRC_NOR0:sub_dmrrowp1
5506 0, // GPRC_NOR0:sub_eq
5507 0, // GPRC_NOR0:sub_fp0
5508 0, // GPRC_NOR0:sub_fp1
5509 0, // GPRC_NOR0:sub_gp8_x0
5510 0, // GPRC_NOR0:sub_gp8_x1
5511 0, // GPRC_NOR0:sub_gt
5512 0, // GPRC_NOR0:sub_lt
5513 0, // GPRC_NOR0:sub_pair0
5514 0, // GPRC_NOR0:sub_pair1
5515 0, // GPRC_NOR0:sub_un
5516 0, // GPRC_NOR0:sub_vsx0
5517 0, // GPRC_NOR0:sub_vsx1
5518 0, // GPRC_NOR0:sub_wacc_hi
5519 0, // GPRC_NOR0:sub_wacc_lo
5520 0, // GPRC_NOR0:sub_vsx1_then_sub_64
5521 0, // GPRC_NOR0:sub_vsx1_then_sub_64_hi_phony
5522 0, // GPRC_NOR0:sub_pair1_then_sub_64
5523 0, // GPRC_NOR0:sub_pair1_then_sub_64_hi_phony
5524 0, // GPRC_NOR0:sub_pair1_then_sub_vsx0
5525 0, // GPRC_NOR0:sub_pair1_then_sub_vsx1
5526 0, // GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64
5527 0, // GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5528 0, // GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow0
5529 0, // GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow1
5530 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow0
5531 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow1
5532 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp0
5533 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1
5534 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5535 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5536 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrow0
5537 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrow1
5538 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrowp0
5539 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1
5540 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi
5541 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_lo
5542 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5543 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5544 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5545 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5546 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5547 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5548 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5549 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5550 0, // GPRC_NOR0:sub_gp8_x1_then_sub_32
5551 },
5552 { // GPRC_and_GPRC_NOR0
5553 0, // GPRC_and_GPRC_NOR0:sub_32
5554 0, // GPRC_and_GPRC_NOR0:sub_32_hi_phony
5555 0, // GPRC_and_GPRC_NOR0:sub_64
5556 0, // GPRC_and_GPRC_NOR0:sub_64_hi_phony
5557 0, // GPRC_and_GPRC_NOR0:sub_dmr0
5558 0, // GPRC_and_GPRC_NOR0:sub_dmr1
5559 0, // GPRC_and_GPRC_NOR0:sub_dmrrow0
5560 0, // GPRC_and_GPRC_NOR0:sub_dmrrow1
5561 0, // GPRC_and_GPRC_NOR0:sub_dmrrowp0
5562 0, // GPRC_and_GPRC_NOR0:sub_dmrrowp1
5563 0, // GPRC_and_GPRC_NOR0:sub_eq
5564 0, // GPRC_and_GPRC_NOR0:sub_fp0
5565 0, // GPRC_and_GPRC_NOR0:sub_fp1
5566 0, // GPRC_and_GPRC_NOR0:sub_gp8_x0
5567 0, // GPRC_and_GPRC_NOR0:sub_gp8_x1
5568 0, // GPRC_and_GPRC_NOR0:sub_gt
5569 0, // GPRC_and_GPRC_NOR0:sub_lt
5570 0, // GPRC_and_GPRC_NOR0:sub_pair0
5571 0, // GPRC_and_GPRC_NOR0:sub_pair1
5572 0, // GPRC_and_GPRC_NOR0:sub_un
5573 0, // GPRC_and_GPRC_NOR0:sub_vsx0
5574 0, // GPRC_and_GPRC_NOR0:sub_vsx1
5575 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi
5576 0, // GPRC_and_GPRC_NOR0:sub_wacc_lo
5577 0, // GPRC_and_GPRC_NOR0:sub_vsx1_then_sub_64
5578 0, // GPRC_and_GPRC_NOR0:sub_vsx1_then_sub_64_hi_phony
5579 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_64
5580 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_64_hi_phony
5581 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_vsx0
5582 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_vsx1
5583 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64
5584 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5585 0, // GPRC_and_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow0
5586 0, // GPRC_and_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow1
5587 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow0
5588 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow1
5589 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp0
5590 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1
5591 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5592 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5593 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrow0
5594 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrow1
5595 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp0
5596 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1
5597 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi
5598 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_lo
5599 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5600 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5601 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5602 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5603 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5604 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5605 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5606 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5607 0, // GPRC_and_GPRC_NOR0:sub_gp8_x1_then_sub_32
5608 },
5609 { // CRBITRC
5610 0, // CRBITRC:sub_32
5611 0, // CRBITRC:sub_32_hi_phony
5612 0, // CRBITRC:sub_64
5613 0, // CRBITRC:sub_64_hi_phony
5614 0, // CRBITRC:sub_dmr0
5615 0, // CRBITRC:sub_dmr1
5616 0, // CRBITRC:sub_dmrrow0
5617 0, // CRBITRC:sub_dmrrow1
5618 0, // CRBITRC:sub_dmrrowp0
5619 0, // CRBITRC:sub_dmrrowp1
5620 0, // CRBITRC:sub_eq
5621 0, // CRBITRC:sub_fp0
5622 0, // CRBITRC:sub_fp1
5623 0, // CRBITRC:sub_gp8_x0
5624 0, // CRBITRC:sub_gp8_x1
5625 0, // CRBITRC:sub_gt
5626 0, // CRBITRC:sub_lt
5627 0, // CRBITRC:sub_pair0
5628 0, // CRBITRC:sub_pair1
5629 0, // CRBITRC:sub_un
5630 0, // CRBITRC:sub_vsx0
5631 0, // CRBITRC:sub_vsx1
5632 0, // CRBITRC:sub_wacc_hi
5633 0, // CRBITRC:sub_wacc_lo
5634 0, // CRBITRC:sub_vsx1_then_sub_64
5635 0, // CRBITRC:sub_vsx1_then_sub_64_hi_phony
5636 0, // CRBITRC:sub_pair1_then_sub_64
5637 0, // CRBITRC:sub_pair1_then_sub_64_hi_phony
5638 0, // CRBITRC:sub_pair1_then_sub_vsx0
5639 0, // CRBITRC:sub_pair1_then_sub_vsx1
5640 0, // CRBITRC:sub_pair1_then_sub_vsx1_then_sub_64
5641 0, // CRBITRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5642 0, // CRBITRC:sub_dmrrowp1_then_sub_dmrrow0
5643 0, // CRBITRC:sub_dmrrowp1_then_sub_dmrrow1
5644 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrow0
5645 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrow1
5646 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrowp0
5647 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrowp1
5648 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5649 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5650 0, // CRBITRC:sub_dmr1_then_sub_dmrrow0
5651 0, // CRBITRC:sub_dmr1_then_sub_dmrrow1
5652 0, // CRBITRC:sub_dmr1_then_sub_dmrrowp0
5653 0, // CRBITRC:sub_dmr1_then_sub_dmrrowp1
5654 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi
5655 0, // CRBITRC:sub_dmr1_then_sub_wacc_lo
5656 0, // CRBITRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5657 0, // CRBITRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5658 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5659 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5660 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5661 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5662 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5663 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5664 0, // CRBITRC:sub_gp8_x1_then_sub_32
5665 },
5666 { // F4RC
5667 0, // F4RC:sub_32
5668 0, // F4RC:sub_32_hi_phony
5669 0, // F4RC:sub_64
5670 0, // F4RC:sub_64_hi_phony
5671 0, // F4RC:sub_dmr0
5672 0, // F4RC:sub_dmr1
5673 0, // F4RC:sub_dmrrow0
5674 0, // F4RC:sub_dmrrow1
5675 0, // F4RC:sub_dmrrowp0
5676 0, // F4RC:sub_dmrrowp1
5677 0, // F4RC:sub_eq
5678 0, // F4RC:sub_fp0
5679 0, // F4RC:sub_fp1
5680 0, // F4RC:sub_gp8_x0
5681 0, // F4RC:sub_gp8_x1
5682 0, // F4RC:sub_gt
5683 0, // F4RC:sub_lt
5684 0, // F4RC:sub_pair0
5685 0, // F4RC:sub_pair1
5686 0, // F4RC:sub_un
5687 0, // F4RC:sub_vsx0
5688 0, // F4RC:sub_vsx1
5689 0, // F4RC:sub_wacc_hi
5690 0, // F4RC:sub_wacc_lo
5691 0, // F4RC:sub_vsx1_then_sub_64
5692 0, // F4RC:sub_vsx1_then_sub_64_hi_phony
5693 0, // F4RC:sub_pair1_then_sub_64
5694 0, // F4RC:sub_pair1_then_sub_64_hi_phony
5695 0, // F4RC:sub_pair1_then_sub_vsx0
5696 0, // F4RC:sub_pair1_then_sub_vsx1
5697 0, // F4RC:sub_pair1_then_sub_vsx1_then_sub_64
5698 0, // F4RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5699 0, // F4RC:sub_dmrrowp1_then_sub_dmrrow0
5700 0, // F4RC:sub_dmrrowp1_then_sub_dmrrow1
5701 0, // F4RC:sub_wacc_hi_then_sub_dmrrow0
5702 0, // F4RC:sub_wacc_hi_then_sub_dmrrow1
5703 0, // F4RC:sub_wacc_hi_then_sub_dmrrowp0
5704 0, // F4RC:sub_wacc_hi_then_sub_dmrrowp1
5705 0, // F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5706 0, // F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5707 0, // F4RC:sub_dmr1_then_sub_dmrrow0
5708 0, // F4RC:sub_dmr1_then_sub_dmrrow1
5709 0, // F4RC:sub_dmr1_then_sub_dmrrowp0
5710 0, // F4RC:sub_dmr1_then_sub_dmrrowp1
5711 0, // F4RC:sub_dmr1_then_sub_wacc_hi
5712 0, // F4RC:sub_dmr1_then_sub_wacc_lo
5713 0, // F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5714 0, // F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5715 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5716 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5717 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5718 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5719 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5720 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5721 0, // F4RC:sub_gp8_x1_then_sub_32
5722 },
5723 { // GPRC32
5724 0, // GPRC32:sub_32
5725 0, // GPRC32:sub_32_hi_phony
5726 0, // GPRC32:sub_64
5727 0, // GPRC32:sub_64_hi_phony
5728 0, // GPRC32:sub_dmr0
5729 0, // GPRC32:sub_dmr1
5730 0, // GPRC32:sub_dmrrow0
5731 0, // GPRC32:sub_dmrrow1
5732 0, // GPRC32:sub_dmrrowp0
5733 0, // GPRC32:sub_dmrrowp1
5734 0, // GPRC32:sub_eq
5735 0, // GPRC32:sub_fp0
5736 0, // GPRC32:sub_fp1
5737 0, // GPRC32:sub_gp8_x0
5738 0, // GPRC32:sub_gp8_x1
5739 0, // GPRC32:sub_gt
5740 0, // GPRC32:sub_lt
5741 0, // GPRC32:sub_pair0
5742 0, // GPRC32:sub_pair1
5743 0, // GPRC32:sub_un
5744 0, // GPRC32:sub_vsx0
5745 0, // GPRC32:sub_vsx1
5746 0, // GPRC32:sub_wacc_hi
5747 0, // GPRC32:sub_wacc_lo
5748 0, // GPRC32:sub_vsx1_then_sub_64
5749 0, // GPRC32:sub_vsx1_then_sub_64_hi_phony
5750 0, // GPRC32:sub_pair1_then_sub_64
5751 0, // GPRC32:sub_pair1_then_sub_64_hi_phony
5752 0, // GPRC32:sub_pair1_then_sub_vsx0
5753 0, // GPRC32:sub_pair1_then_sub_vsx1
5754 0, // GPRC32:sub_pair1_then_sub_vsx1_then_sub_64
5755 0, // GPRC32:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5756 0, // GPRC32:sub_dmrrowp1_then_sub_dmrrow0
5757 0, // GPRC32:sub_dmrrowp1_then_sub_dmrrow1
5758 0, // GPRC32:sub_wacc_hi_then_sub_dmrrow0
5759 0, // GPRC32:sub_wacc_hi_then_sub_dmrrow1
5760 0, // GPRC32:sub_wacc_hi_then_sub_dmrrowp0
5761 0, // GPRC32:sub_wacc_hi_then_sub_dmrrowp1
5762 0, // GPRC32:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5763 0, // GPRC32:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5764 0, // GPRC32:sub_dmr1_then_sub_dmrrow0
5765 0, // GPRC32:sub_dmr1_then_sub_dmrrow1
5766 0, // GPRC32:sub_dmr1_then_sub_dmrrowp0
5767 0, // GPRC32:sub_dmr1_then_sub_dmrrowp1
5768 0, // GPRC32:sub_dmr1_then_sub_wacc_hi
5769 0, // GPRC32:sub_dmr1_then_sub_wacc_lo
5770 0, // GPRC32:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5771 0, // GPRC32:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5772 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5773 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5774 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5775 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5776 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5777 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5778 0, // GPRC32:sub_gp8_x1_then_sub_32
5779 },
5780 { // CRRC
5781 0, // CRRC:sub_32
5782 0, // CRRC:sub_32_hi_phony
5783 0, // CRRC:sub_64
5784 0, // CRRC:sub_64_hi_phony
5785 0, // CRRC:sub_dmr0
5786 0, // CRRC:sub_dmr1
5787 0, // CRRC:sub_dmrrow0
5788 0, // CRRC:sub_dmrrow1
5789 0, // CRRC:sub_dmrrowp0
5790 0, // CRRC:sub_dmrrowp1
5791 5, // CRRC:sub_eq -> CRBITRC
5792 0, // CRRC:sub_fp0
5793 0, // CRRC:sub_fp1
5794 0, // CRRC:sub_gp8_x0
5795 0, // CRRC:sub_gp8_x1
5796 5, // CRRC:sub_gt -> CRBITRC
5797 5, // CRRC:sub_lt -> CRBITRC
5798 0, // CRRC:sub_pair0
5799 0, // CRRC:sub_pair1
5800 5, // CRRC:sub_un -> CRBITRC
5801 0, // CRRC:sub_vsx0
5802 0, // CRRC:sub_vsx1
5803 0, // CRRC:sub_wacc_hi
5804 0, // CRRC:sub_wacc_lo
5805 0, // CRRC:sub_vsx1_then_sub_64
5806 0, // CRRC:sub_vsx1_then_sub_64_hi_phony
5807 0, // CRRC:sub_pair1_then_sub_64
5808 0, // CRRC:sub_pair1_then_sub_64_hi_phony
5809 0, // CRRC:sub_pair1_then_sub_vsx0
5810 0, // CRRC:sub_pair1_then_sub_vsx1
5811 0, // CRRC:sub_pair1_then_sub_vsx1_then_sub_64
5812 0, // CRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5813 0, // CRRC:sub_dmrrowp1_then_sub_dmrrow0
5814 0, // CRRC:sub_dmrrowp1_then_sub_dmrrow1
5815 0, // CRRC:sub_wacc_hi_then_sub_dmrrow0
5816 0, // CRRC:sub_wacc_hi_then_sub_dmrrow1
5817 0, // CRRC:sub_wacc_hi_then_sub_dmrrowp0
5818 0, // CRRC:sub_wacc_hi_then_sub_dmrrowp1
5819 0, // CRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5820 0, // CRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5821 0, // CRRC:sub_dmr1_then_sub_dmrrow0
5822 0, // CRRC:sub_dmr1_then_sub_dmrrow1
5823 0, // CRRC:sub_dmr1_then_sub_dmrrowp0
5824 0, // CRRC:sub_dmr1_then_sub_dmrrowp1
5825 0, // CRRC:sub_dmr1_then_sub_wacc_hi
5826 0, // CRRC:sub_dmr1_then_sub_wacc_lo
5827 0, // CRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5828 0, // CRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5829 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5830 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5831 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5832 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5833 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5834 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5835 0, // CRRC:sub_gp8_x1_then_sub_32
5836 },
5837 { // CARRYRC
5838 0, // CARRYRC:sub_32
5839 0, // CARRYRC:sub_32_hi_phony
5840 0, // CARRYRC:sub_64
5841 0, // CARRYRC:sub_64_hi_phony
5842 0, // CARRYRC:sub_dmr0
5843 0, // CARRYRC:sub_dmr1
5844 0, // CARRYRC:sub_dmrrow0
5845 0, // CARRYRC:sub_dmrrow1
5846 0, // CARRYRC:sub_dmrrowp0
5847 0, // CARRYRC:sub_dmrrowp1
5848 0, // CARRYRC:sub_eq
5849 0, // CARRYRC:sub_fp0
5850 0, // CARRYRC:sub_fp1
5851 0, // CARRYRC:sub_gp8_x0
5852 0, // CARRYRC:sub_gp8_x1
5853 0, // CARRYRC:sub_gt
5854 0, // CARRYRC:sub_lt
5855 0, // CARRYRC:sub_pair0
5856 0, // CARRYRC:sub_pair1
5857 0, // CARRYRC:sub_un
5858 0, // CARRYRC:sub_vsx0
5859 0, // CARRYRC:sub_vsx1
5860 0, // CARRYRC:sub_wacc_hi
5861 0, // CARRYRC:sub_wacc_lo
5862 0, // CARRYRC:sub_vsx1_then_sub_64
5863 0, // CARRYRC:sub_vsx1_then_sub_64_hi_phony
5864 0, // CARRYRC:sub_pair1_then_sub_64
5865 0, // CARRYRC:sub_pair1_then_sub_64_hi_phony
5866 0, // CARRYRC:sub_pair1_then_sub_vsx0
5867 0, // CARRYRC:sub_pair1_then_sub_vsx1
5868 0, // CARRYRC:sub_pair1_then_sub_vsx1_then_sub_64
5869 0, // CARRYRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5870 0, // CARRYRC:sub_dmrrowp1_then_sub_dmrrow0
5871 0, // CARRYRC:sub_dmrrowp1_then_sub_dmrrow1
5872 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrow0
5873 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrow1
5874 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrowp0
5875 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrowp1
5876 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5877 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5878 0, // CARRYRC:sub_dmr1_then_sub_dmrrow0
5879 0, // CARRYRC:sub_dmr1_then_sub_dmrrow1
5880 0, // CARRYRC:sub_dmr1_then_sub_dmrrowp0
5881 0, // CARRYRC:sub_dmr1_then_sub_dmrrowp1
5882 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi
5883 0, // CARRYRC:sub_dmr1_then_sub_wacc_lo
5884 0, // CARRYRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5885 0, // CARRYRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5886 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5887 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5888 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5889 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5890 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5891 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5892 0, // CARRYRC:sub_gp8_x1_then_sub_32
5893 },
5894 { // CTRRC
5895 0, // CTRRC:sub_32
5896 0, // CTRRC:sub_32_hi_phony
5897 0, // CTRRC:sub_64
5898 0, // CTRRC:sub_64_hi_phony
5899 0, // CTRRC:sub_dmr0
5900 0, // CTRRC:sub_dmr1
5901 0, // CTRRC:sub_dmrrow0
5902 0, // CTRRC:sub_dmrrow1
5903 0, // CTRRC:sub_dmrrowp0
5904 0, // CTRRC:sub_dmrrowp1
5905 0, // CTRRC:sub_eq
5906 0, // CTRRC:sub_fp0
5907 0, // CTRRC:sub_fp1
5908 0, // CTRRC:sub_gp8_x0
5909 0, // CTRRC:sub_gp8_x1
5910 0, // CTRRC:sub_gt
5911 0, // CTRRC:sub_lt
5912 0, // CTRRC:sub_pair0
5913 0, // CTRRC:sub_pair1
5914 0, // CTRRC:sub_un
5915 0, // CTRRC:sub_vsx0
5916 0, // CTRRC:sub_vsx1
5917 0, // CTRRC:sub_wacc_hi
5918 0, // CTRRC:sub_wacc_lo
5919 0, // CTRRC:sub_vsx1_then_sub_64
5920 0, // CTRRC:sub_vsx1_then_sub_64_hi_phony
5921 0, // CTRRC:sub_pair1_then_sub_64
5922 0, // CTRRC:sub_pair1_then_sub_64_hi_phony
5923 0, // CTRRC:sub_pair1_then_sub_vsx0
5924 0, // CTRRC:sub_pair1_then_sub_vsx1
5925 0, // CTRRC:sub_pair1_then_sub_vsx1_then_sub_64
5926 0, // CTRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5927 0, // CTRRC:sub_dmrrowp1_then_sub_dmrrow0
5928 0, // CTRRC:sub_dmrrowp1_then_sub_dmrrow1
5929 0, // CTRRC:sub_wacc_hi_then_sub_dmrrow0
5930 0, // CTRRC:sub_wacc_hi_then_sub_dmrrow1
5931 0, // CTRRC:sub_wacc_hi_then_sub_dmrrowp0
5932 0, // CTRRC:sub_wacc_hi_then_sub_dmrrowp1
5933 0, // CTRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5934 0, // CTRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5935 0, // CTRRC:sub_dmr1_then_sub_dmrrow0
5936 0, // CTRRC:sub_dmr1_then_sub_dmrrow1
5937 0, // CTRRC:sub_dmr1_then_sub_dmrrowp0
5938 0, // CTRRC:sub_dmr1_then_sub_dmrrowp1
5939 0, // CTRRC:sub_dmr1_then_sub_wacc_hi
5940 0, // CTRRC:sub_dmr1_then_sub_wacc_lo
5941 0, // CTRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5942 0, // CTRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5943 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5944 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5945 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5946 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5947 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5948 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5949 0, // CTRRC:sub_gp8_x1_then_sub_32
5950 },
5951 { // LRRC
5952 0, // LRRC:sub_32
5953 0, // LRRC:sub_32_hi_phony
5954 0, // LRRC:sub_64
5955 0, // LRRC:sub_64_hi_phony
5956 0, // LRRC:sub_dmr0
5957 0, // LRRC:sub_dmr1
5958 0, // LRRC:sub_dmrrow0
5959 0, // LRRC:sub_dmrrow1
5960 0, // LRRC:sub_dmrrowp0
5961 0, // LRRC:sub_dmrrowp1
5962 0, // LRRC:sub_eq
5963 0, // LRRC:sub_fp0
5964 0, // LRRC:sub_fp1
5965 0, // LRRC:sub_gp8_x0
5966 0, // LRRC:sub_gp8_x1
5967 0, // LRRC:sub_gt
5968 0, // LRRC:sub_lt
5969 0, // LRRC:sub_pair0
5970 0, // LRRC:sub_pair1
5971 0, // LRRC:sub_un
5972 0, // LRRC:sub_vsx0
5973 0, // LRRC:sub_vsx1
5974 0, // LRRC:sub_wacc_hi
5975 0, // LRRC:sub_wacc_lo
5976 0, // LRRC:sub_vsx1_then_sub_64
5977 0, // LRRC:sub_vsx1_then_sub_64_hi_phony
5978 0, // LRRC:sub_pair1_then_sub_64
5979 0, // LRRC:sub_pair1_then_sub_64_hi_phony
5980 0, // LRRC:sub_pair1_then_sub_vsx0
5981 0, // LRRC:sub_pair1_then_sub_vsx1
5982 0, // LRRC:sub_pair1_then_sub_vsx1_then_sub_64
5983 0, // LRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5984 0, // LRRC:sub_dmrrowp1_then_sub_dmrrow0
5985 0, // LRRC:sub_dmrrowp1_then_sub_dmrrow1
5986 0, // LRRC:sub_wacc_hi_then_sub_dmrrow0
5987 0, // LRRC:sub_wacc_hi_then_sub_dmrrow1
5988 0, // LRRC:sub_wacc_hi_then_sub_dmrrowp0
5989 0, // LRRC:sub_wacc_hi_then_sub_dmrrowp1
5990 0, // LRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5991 0, // LRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5992 0, // LRRC:sub_dmr1_then_sub_dmrrow0
5993 0, // LRRC:sub_dmr1_then_sub_dmrrow1
5994 0, // LRRC:sub_dmr1_then_sub_dmrrowp0
5995 0, // LRRC:sub_dmr1_then_sub_dmrrowp1
5996 0, // LRRC:sub_dmr1_then_sub_wacc_hi
5997 0, // LRRC:sub_dmr1_then_sub_wacc_lo
5998 0, // LRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5999 0, // LRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6000 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6001 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6002 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6003 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6004 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6005 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6006 0, // LRRC:sub_gp8_x1_then_sub_32
6007 },
6008 { // VRSAVERC
6009 0, // VRSAVERC:sub_32
6010 0, // VRSAVERC:sub_32_hi_phony
6011 0, // VRSAVERC:sub_64
6012 0, // VRSAVERC:sub_64_hi_phony
6013 0, // VRSAVERC:sub_dmr0
6014 0, // VRSAVERC:sub_dmr1
6015 0, // VRSAVERC:sub_dmrrow0
6016 0, // VRSAVERC:sub_dmrrow1
6017 0, // VRSAVERC:sub_dmrrowp0
6018 0, // VRSAVERC:sub_dmrrowp1
6019 0, // VRSAVERC:sub_eq
6020 0, // VRSAVERC:sub_fp0
6021 0, // VRSAVERC:sub_fp1
6022 0, // VRSAVERC:sub_gp8_x0
6023 0, // VRSAVERC:sub_gp8_x1
6024 0, // VRSAVERC:sub_gt
6025 0, // VRSAVERC:sub_lt
6026 0, // VRSAVERC:sub_pair0
6027 0, // VRSAVERC:sub_pair1
6028 0, // VRSAVERC:sub_un
6029 0, // VRSAVERC:sub_vsx0
6030 0, // VRSAVERC:sub_vsx1
6031 0, // VRSAVERC:sub_wacc_hi
6032 0, // VRSAVERC:sub_wacc_lo
6033 0, // VRSAVERC:sub_vsx1_then_sub_64
6034 0, // VRSAVERC:sub_vsx1_then_sub_64_hi_phony
6035 0, // VRSAVERC:sub_pair1_then_sub_64
6036 0, // VRSAVERC:sub_pair1_then_sub_64_hi_phony
6037 0, // VRSAVERC:sub_pair1_then_sub_vsx0
6038 0, // VRSAVERC:sub_pair1_then_sub_vsx1
6039 0, // VRSAVERC:sub_pair1_then_sub_vsx1_then_sub_64
6040 0, // VRSAVERC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6041 0, // VRSAVERC:sub_dmrrowp1_then_sub_dmrrow0
6042 0, // VRSAVERC:sub_dmrrowp1_then_sub_dmrrow1
6043 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrow0
6044 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrow1
6045 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrowp0
6046 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrowp1
6047 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6048 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6049 0, // VRSAVERC:sub_dmr1_then_sub_dmrrow0
6050 0, // VRSAVERC:sub_dmr1_then_sub_dmrrow1
6051 0, // VRSAVERC:sub_dmr1_then_sub_dmrrowp0
6052 0, // VRSAVERC:sub_dmr1_then_sub_dmrrowp1
6053 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi
6054 0, // VRSAVERC:sub_dmr1_then_sub_wacc_lo
6055 0, // VRSAVERC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6056 0, // VRSAVERC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6057 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6058 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6059 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6060 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6061 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6062 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6063 0, // VRSAVERC:sub_gp8_x1_then_sub_32
6064 },
6065 { // SPILLTOVSRRC
6066 2, // SPILLTOVSRRC:sub_32 -> GPRC
6067 0, // SPILLTOVSRRC:sub_32_hi_phony
6068 0, // SPILLTOVSRRC:sub_64
6069 0, // SPILLTOVSRRC:sub_64_hi_phony
6070 0, // SPILLTOVSRRC:sub_dmr0
6071 0, // SPILLTOVSRRC:sub_dmr1
6072 0, // SPILLTOVSRRC:sub_dmrrow0
6073 0, // SPILLTOVSRRC:sub_dmrrow1
6074 0, // SPILLTOVSRRC:sub_dmrrowp0
6075 0, // SPILLTOVSRRC:sub_dmrrowp1
6076 0, // SPILLTOVSRRC:sub_eq
6077 0, // SPILLTOVSRRC:sub_fp0
6078 0, // SPILLTOVSRRC:sub_fp1
6079 0, // SPILLTOVSRRC:sub_gp8_x0
6080 0, // SPILLTOVSRRC:sub_gp8_x1
6081 0, // SPILLTOVSRRC:sub_gt
6082 0, // SPILLTOVSRRC:sub_lt
6083 0, // SPILLTOVSRRC:sub_pair0
6084 0, // SPILLTOVSRRC:sub_pair1
6085 0, // SPILLTOVSRRC:sub_un
6086 0, // SPILLTOVSRRC:sub_vsx0
6087 0, // SPILLTOVSRRC:sub_vsx1
6088 0, // SPILLTOVSRRC:sub_wacc_hi
6089 0, // SPILLTOVSRRC:sub_wacc_lo
6090 0, // SPILLTOVSRRC:sub_vsx1_then_sub_64
6091 0, // SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
6092 0, // SPILLTOVSRRC:sub_pair1_then_sub_64
6093 0, // SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
6094 0, // SPILLTOVSRRC:sub_pair1_then_sub_vsx0
6095 0, // SPILLTOVSRRC:sub_pair1_then_sub_vsx1
6096 0, // SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
6097 0, // SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6098 0, // SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
6099 0, // SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
6100 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
6101 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
6102 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
6103 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
6104 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6105 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6106 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
6107 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
6108 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
6109 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
6110 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
6111 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
6112 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6113 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6114 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6115 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6116 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6117 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6118 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6119 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6120 0, // SPILLTOVSRRC:sub_gp8_x1_then_sub_32
6121 },
6122 { // VSFRC
6123 0, // VSFRC:sub_32
6124 0, // VSFRC:sub_32_hi_phony
6125 0, // VSFRC:sub_64
6126 0, // VSFRC:sub_64_hi_phony
6127 0, // VSFRC:sub_dmr0
6128 0, // VSFRC:sub_dmr1
6129 0, // VSFRC:sub_dmrrow0
6130 0, // VSFRC:sub_dmrrow1
6131 0, // VSFRC:sub_dmrrowp0
6132 0, // VSFRC:sub_dmrrowp1
6133 0, // VSFRC:sub_eq
6134 0, // VSFRC:sub_fp0
6135 0, // VSFRC:sub_fp1
6136 0, // VSFRC:sub_gp8_x0
6137 0, // VSFRC:sub_gp8_x1
6138 0, // VSFRC:sub_gt
6139 0, // VSFRC:sub_lt
6140 0, // VSFRC:sub_pair0
6141 0, // VSFRC:sub_pair1
6142 0, // VSFRC:sub_un
6143 0, // VSFRC:sub_vsx0
6144 0, // VSFRC:sub_vsx1
6145 0, // VSFRC:sub_wacc_hi
6146 0, // VSFRC:sub_wacc_lo
6147 0, // VSFRC:sub_vsx1_then_sub_64
6148 0, // VSFRC:sub_vsx1_then_sub_64_hi_phony
6149 0, // VSFRC:sub_pair1_then_sub_64
6150 0, // VSFRC:sub_pair1_then_sub_64_hi_phony
6151 0, // VSFRC:sub_pair1_then_sub_vsx0
6152 0, // VSFRC:sub_pair1_then_sub_vsx1
6153 0, // VSFRC:sub_pair1_then_sub_vsx1_then_sub_64
6154 0, // VSFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6155 0, // VSFRC:sub_dmrrowp1_then_sub_dmrrow0
6156 0, // VSFRC:sub_dmrrowp1_then_sub_dmrrow1
6157 0, // VSFRC:sub_wacc_hi_then_sub_dmrrow0
6158 0, // VSFRC:sub_wacc_hi_then_sub_dmrrow1
6159 0, // VSFRC:sub_wacc_hi_then_sub_dmrrowp0
6160 0, // VSFRC:sub_wacc_hi_then_sub_dmrrowp1
6161 0, // VSFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6162 0, // VSFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6163 0, // VSFRC:sub_dmr1_then_sub_dmrrow0
6164 0, // VSFRC:sub_dmr1_then_sub_dmrrow1
6165 0, // VSFRC:sub_dmr1_then_sub_dmrrowp0
6166 0, // VSFRC:sub_dmr1_then_sub_dmrrowp1
6167 0, // VSFRC:sub_dmr1_then_sub_wacc_hi
6168 0, // VSFRC:sub_dmr1_then_sub_wacc_lo
6169 0, // VSFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6170 0, // VSFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6171 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6172 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6173 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6174 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6175 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6176 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6177 0, // VSFRC:sub_gp8_x1_then_sub_32
6178 },
6179 { // G8RC
6180 2, // G8RC:sub_32 -> GPRC
6181 0, // G8RC:sub_32_hi_phony
6182 0, // G8RC:sub_64
6183 0, // G8RC:sub_64_hi_phony
6184 0, // G8RC:sub_dmr0
6185 0, // G8RC:sub_dmr1
6186 0, // G8RC:sub_dmrrow0
6187 0, // G8RC:sub_dmrrow1
6188 0, // G8RC:sub_dmrrowp0
6189 0, // G8RC:sub_dmrrowp1
6190 0, // G8RC:sub_eq
6191 0, // G8RC:sub_fp0
6192 0, // G8RC:sub_fp1
6193 0, // G8RC:sub_gp8_x0
6194 0, // G8RC:sub_gp8_x1
6195 0, // G8RC:sub_gt
6196 0, // G8RC:sub_lt
6197 0, // G8RC:sub_pair0
6198 0, // G8RC:sub_pair1
6199 0, // G8RC:sub_un
6200 0, // G8RC:sub_vsx0
6201 0, // G8RC:sub_vsx1
6202 0, // G8RC:sub_wacc_hi
6203 0, // G8RC:sub_wacc_lo
6204 0, // G8RC:sub_vsx1_then_sub_64
6205 0, // G8RC:sub_vsx1_then_sub_64_hi_phony
6206 0, // G8RC:sub_pair1_then_sub_64
6207 0, // G8RC:sub_pair1_then_sub_64_hi_phony
6208 0, // G8RC:sub_pair1_then_sub_vsx0
6209 0, // G8RC:sub_pair1_then_sub_vsx1
6210 0, // G8RC:sub_pair1_then_sub_vsx1_then_sub_64
6211 0, // G8RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6212 0, // G8RC:sub_dmrrowp1_then_sub_dmrrow0
6213 0, // G8RC:sub_dmrrowp1_then_sub_dmrrow1
6214 0, // G8RC:sub_wacc_hi_then_sub_dmrrow0
6215 0, // G8RC:sub_wacc_hi_then_sub_dmrrow1
6216 0, // G8RC:sub_wacc_hi_then_sub_dmrrowp0
6217 0, // G8RC:sub_wacc_hi_then_sub_dmrrowp1
6218 0, // G8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6219 0, // G8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6220 0, // G8RC:sub_dmr1_then_sub_dmrrow0
6221 0, // G8RC:sub_dmr1_then_sub_dmrrow1
6222 0, // G8RC:sub_dmr1_then_sub_dmrrowp0
6223 0, // G8RC:sub_dmr1_then_sub_dmrrowp1
6224 0, // G8RC:sub_dmr1_then_sub_wacc_hi
6225 0, // G8RC:sub_dmr1_then_sub_wacc_lo
6226 0, // G8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6227 0, // G8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6228 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6229 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6230 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6231 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6232 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6233 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6234 0, // G8RC:sub_gp8_x1_then_sub_32
6235 },
6236 { // G8RC_NOX0
6237 3, // G8RC_NOX0:sub_32 -> GPRC_NOR0
6238 0, // G8RC_NOX0:sub_32_hi_phony
6239 0, // G8RC_NOX0:sub_64
6240 0, // G8RC_NOX0:sub_64_hi_phony
6241 0, // G8RC_NOX0:sub_dmr0
6242 0, // G8RC_NOX0:sub_dmr1
6243 0, // G8RC_NOX0:sub_dmrrow0
6244 0, // G8RC_NOX0:sub_dmrrow1
6245 0, // G8RC_NOX0:sub_dmrrowp0
6246 0, // G8RC_NOX0:sub_dmrrowp1
6247 0, // G8RC_NOX0:sub_eq
6248 0, // G8RC_NOX0:sub_fp0
6249 0, // G8RC_NOX0:sub_fp1
6250 0, // G8RC_NOX0:sub_gp8_x0
6251 0, // G8RC_NOX0:sub_gp8_x1
6252 0, // G8RC_NOX0:sub_gt
6253 0, // G8RC_NOX0:sub_lt
6254 0, // G8RC_NOX0:sub_pair0
6255 0, // G8RC_NOX0:sub_pair1
6256 0, // G8RC_NOX0:sub_un
6257 0, // G8RC_NOX0:sub_vsx0
6258 0, // G8RC_NOX0:sub_vsx1
6259 0, // G8RC_NOX0:sub_wacc_hi
6260 0, // G8RC_NOX0:sub_wacc_lo
6261 0, // G8RC_NOX0:sub_vsx1_then_sub_64
6262 0, // G8RC_NOX0:sub_vsx1_then_sub_64_hi_phony
6263 0, // G8RC_NOX0:sub_pair1_then_sub_64
6264 0, // G8RC_NOX0:sub_pair1_then_sub_64_hi_phony
6265 0, // G8RC_NOX0:sub_pair1_then_sub_vsx0
6266 0, // G8RC_NOX0:sub_pair1_then_sub_vsx1
6267 0, // G8RC_NOX0:sub_pair1_then_sub_vsx1_then_sub_64
6268 0, // G8RC_NOX0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6269 0, // G8RC_NOX0:sub_dmrrowp1_then_sub_dmrrow0
6270 0, // G8RC_NOX0:sub_dmrrowp1_then_sub_dmrrow1
6271 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrow0
6272 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrow1
6273 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp0
6274 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1
6275 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6276 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6277 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrow0
6278 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrow1
6279 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrowp0
6280 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1
6281 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi
6282 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_lo
6283 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6284 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6285 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6286 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6287 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6288 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6289 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6290 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6291 0, // G8RC_NOX0:sub_gp8_x1_then_sub_32
6292 },
6293 { // SPILLTOVSRRC_and_VSFRC
6294 0, // SPILLTOVSRRC_and_VSFRC:sub_32
6295 0, // SPILLTOVSRRC_and_VSFRC:sub_32_hi_phony
6296 0, // SPILLTOVSRRC_and_VSFRC:sub_64
6297 0, // SPILLTOVSRRC_and_VSFRC:sub_64_hi_phony
6298 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr0
6299 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1
6300 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrow0
6301 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrow1
6302 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrowp0
6303 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrowp1
6304 0, // SPILLTOVSRRC_and_VSFRC:sub_eq
6305 0, // SPILLTOVSRRC_and_VSFRC:sub_fp0
6306 0, // SPILLTOVSRRC_and_VSFRC:sub_fp1
6307 0, // SPILLTOVSRRC_and_VSFRC:sub_gp8_x0
6308 0, // SPILLTOVSRRC_and_VSFRC:sub_gp8_x1
6309 0, // SPILLTOVSRRC_and_VSFRC:sub_gt
6310 0, // SPILLTOVSRRC_and_VSFRC:sub_lt
6311 0, // SPILLTOVSRRC_and_VSFRC:sub_pair0
6312 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1
6313 0, // SPILLTOVSRRC_and_VSFRC:sub_un
6314 0, // SPILLTOVSRRC_and_VSFRC:sub_vsx0
6315 0, // SPILLTOVSRRC_and_VSFRC:sub_vsx1
6316 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi
6317 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_lo
6318 0, // SPILLTOVSRRC_and_VSFRC:sub_vsx1_then_sub_64
6319 0, // SPILLTOVSRRC_and_VSFRC:sub_vsx1_then_sub_64_hi_phony
6320 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_64
6321 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_64_hi_phony
6322 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_vsx0
6323 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_vsx1
6324 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_vsx1_then_sub_64
6325 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6326 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrowp1_then_sub_dmrrow0
6327 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrowp1_then_sub_dmrrow1
6328 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrow0
6329 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrow1
6330 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrowp0
6331 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrowp1
6332 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6333 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6334 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrow0
6335 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrow1
6336 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrowp0
6337 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrowp1
6338 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi
6339 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_lo
6340 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6341 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6342 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6343 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6344 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6345 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6346 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6347 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6348 0, // SPILLTOVSRRC_and_VSFRC:sub_gp8_x1_then_sub_32
6349 },
6350 { // G8RC_and_G8RC_NOX0
6351 4, // G8RC_and_G8RC_NOX0:sub_32 -> GPRC_and_GPRC_NOR0
6352 0, // G8RC_and_G8RC_NOX0:sub_32_hi_phony
6353 0, // G8RC_and_G8RC_NOX0:sub_64
6354 0, // G8RC_and_G8RC_NOX0:sub_64_hi_phony
6355 0, // G8RC_and_G8RC_NOX0:sub_dmr0
6356 0, // G8RC_and_G8RC_NOX0:sub_dmr1
6357 0, // G8RC_and_G8RC_NOX0:sub_dmrrow0
6358 0, // G8RC_and_G8RC_NOX0:sub_dmrrow1
6359 0, // G8RC_and_G8RC_NOX0:sub_dmrrowp0
6360 0, // G8RC_and_G8RC_NOX0:sub_dmrrowp1
6361 0, // G8RC_and_G8RC_NOX0:sub_eq
6362 0, // G8RC_and_G8RC_NOX0:sub_fp0
6363 0, // G8RC_and_G8RC_NOX0:sub_fp1
6364 0, // G8RC_and_G8RC_NOX0:sub_gp8_x0
6365 0, // G8RC_and_G8RC_NOX0:sub_gp8_x1
6366 0, // G8RC_and_G8RC_NOX0:sub_gt
6367 0, // G8RC_and_G8RC_NOX0:sub_lt
6368 0, // G8RC_and_G8RC_NOX0:sub_pair0
6369 0, // G8RC_and_G8RC_NOX0:sub_pair1
6370 0, // G8RC_and_G8RC_NOX0:sub_un
6371 0, // G8RC_and_G8RC_NOX0:sub_vsx0
6372 0, // G8RC_and_G8RC_NOX0:sub_vsx1
6373 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi
6374 0, // G8RC_and_G8RC_NOX0:sub_wacc_lo
6375 0, // G8RC_and_G8RC_NOX0:sub_vsx1_then_sub_64
6376 0, // G8RC_and_G8RC_NOX0:sub_vsx1_then_sub_64_hi_phony
6377 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_64
6378 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_64_hi_phony
6379 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_vsx0
6380 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_vsx1
6381 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_vsx1_then_sub_64
6382 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6383 0, // G8RC_and_G8RC_NOX0:sub_dmrrowp1_then_sub_dmrrow0
6384 0, // G8RC_and_G8RC_NOX0:sub_dmrrowp1_then_sub_dmrrow1
6385 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrow0
6386 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrow1
6387 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp0
6388 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1
6389 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6390 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6391 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrow0
6392 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrow1
6393 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrowp0
6394 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1
6395 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi
6396 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_lo
6397 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6398 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6399 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6400 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6401 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6402 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6403 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6404 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6405 0, // G8RC_and_G8RC_NOX0:sub_gp8_x1_then_sub_32
6406 },
6407 { // F8RC
6408 0, // F8RC:sub_32
6409 0, // F8RC:sub_32_hi_phony
6410 0, // F8RC:sub_64
6411 0, // F8RC:sub_64_hi_phony
6412 0, // F8RC:sub_dmr0
6413 0, // F8RC:sub_dmr1
6414 0, // F8RC:sub_dmrrow0
6415 0, // F8RC:sub_dmrrow1
6416 0, // F8RC:sub_dmrrowp0
6417 0, // F8RC:sub_dmrrowp1
6418 0, // F8RC:sub_eq
6419 0, // F8RC:sub_fp0
6420 0, // F8RC:sub_fp1
6421 0, // F8RC:sub_gp8_x0
6422 0, // F8RC:sub_gp8_x1
6423 0, // F8RC:sub_gt
6424 0, // F8RC:sub_lt
6425 0, // F8RC:sub_pair0
6426 0, // F8RC:sub_pair1
6427 0, // F8RC:sub_un
6428 0, // F8RC:sub_vsx0
6429 0, // F8RC:sub_vsx1
6430 0, // F8RC:sub_wacc_hi
6431 0, // F8RC:sub_wacc_lo
6432 0, // F8RC:sub_vsx1_then_sub_64
6433 0, // F8RC:sub_vsx1_then_sub_64_hi_phony
6434 0, // F8RC:sub_pair1_then_sub_64
6435 0, // F8RC:sub_pair1_then_sub_64_hi_phony
6436 0, // F8RC:sub_pair1_then_sub_vsx0
6437 0, // F8RC:sub_pair1_then_sub_vsx1
6438 0, // F8RC:sub_pair1_then_sub_vsx1_then_sub_64
6439 0, // F8RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6440 0, // F8RC:sub_dmrrowp1_then_sub_dmrrow0
6441 0, // F8RC:sub_dmrrowp1_then_sub_dmrrow1
6442 0, // F8RC:sub_wacc_hi_then_sub_dmrrow0
6443 0, // F8RC:sub_wacc_hi_then_sub_dmrrow1
6444 0, // F8RC:sub_wacc_hi_then_sub_dmrrowp0
6445 0, // F8RC:sub_wacc_hi_then_sub_dmrrowp1
6446 0, // F8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6447 0, // F8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6448 0, // F8RC:sub_dmr1_then_sub_dmrrow0
6449 0, // F8RC:sub_dmr1_then_sub_dmrrow1
6450 0, // F8RC:sub_dmr1_then_sub_dmrrowp0
6451 0, // F8RC:sub_dmr1_then_sub_dmrrowp1
6452 0, // F8RC:sub_dmr1_then_sub_wacc_hi
6453 0, // F8RC:sub_dmr1_then_sub_wacc_lo
6454 0, // F8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6455 0, // F8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6456 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6457 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6458 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6459 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6460 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6461 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6462 0, // F8RC:sub_gp8_x1_then_sub_32
6463 },
6464 { // FHRC
6465 0, // FHRC:sub_32
6466 0, // FHRC:sub_32_hi_phony
6467 0, // FHRC:sub_64
6468 0, // FHRC:sub_64_hi_phony
6469 0, // FHRC:sub_dmr0
6470 0, // FHRC:sub_dmr1
6471 0, // FHRC:sub_dmrrow0
6472 0, // FHRC:sub_dmrrow1
6473 0, // FHRC:sub_dmrrowp0
6474 0, // FHRC:sub_dmrrowp1
6475 0, // FHRC:sub_eq
6476 0, // FHRC:sub_fp0
6477 0, // FHRC:sub_fp1
6478 0, // FHRC:sub_gp8_x0
6479 0, // FHRC:sub_gp8_x1
6480 0, // FHRC:sub_gt
6481 0, // FHRC:sub_lt
6482 0, // FHRC:sub_pair0
6483 0, // FHRC:sub_pair1
6484 0, // FHRC:sub_un
6485 0, // FHRC:sub_vsx0
6486 0, // FHRC:sub_vsx1
6487 0, // FHRC:sub_wacc_hi
6488 0, // FHRC:sub_wacc_lo
6489 0, // FHRC:sub_vsx1_then_sub_64
6490 0, // FHRC:sub_vsx1_then_sub_64_hi_phony
6491 0, // FHRC:sub_pair1_then_sub_64
6492 0, // FHRC:sub_pair1_then_sub_64_hi_phony
6493 0, // FHRC:sub_pair1_then_sub_vsx0
6494 0, // FHRC:sub_pair1_then_sub_vsx1
6495 0, // FHRC:sub_pair1_then_sub_vsx1_then_sub_64
6496 0, // FHRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6497 0, // FHRC:sub_dmrrowp1_then_sub_dmrrow0
6498 0, // FHRC:sub_dmrrowp1_then_sub_dmrrow1
6499 0, // FHRC:sub_wacc_hi_then_sub_dmrrow0
6500 0, // FHRC:sub_wacc_hi_then_sub_dmrrow1
6501 0, // FHRC:sub_wacc_hi_then_sub_dmrrowp0
6502 0, // FHRC:sub_wacc_hi_then_sub_dmrrowp1
6503 0, // FHRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6504 0, // FHRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6505 0, // FHRC:sub_dmr1_then_sub_dmrrow0
6506 0, // FHRC:sub_dmr1_then_sub_dmrrow1
6507 0, // FHRC:sub_dmr1_then_sub_dmrrowp0
6508 0, // FHRC:sub_dmr1_then_sub_dmrrowp1
6509 0, // FHRC:sub_dmr1_then_sub_wacc_hi
6510 0, // FHRC:sub_dmr1_then_sub_wacc_lo
6511 0, // FHRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6512 0, // FHRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6513 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6514 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6515 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6516 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6517 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6518 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6519 0, // FHRC:sub_gp8_x1_then_sub_32
6520 },
6521 { // SPERC
6522 2, // SPERC:sub_32 -> GPRC
6523 0, // SPERC:sub_32_hi_phony
6524 0, // SPERC:sub_64
6525 0, // SPERC:sub_64_hi_phony
6526 0, // SPERC:sub_dmr0
6527 0, // SPERC:sub_dmr1
6528 0, // SPERC:sub_dmrrow0
6529 0, // SPERC:sub_dmrrow1
6530 0, // SPERC:sub_dmrrowp0
6531 0, // SPERC:sub_dmrrowp1
6532 0, // SPERC:sub_eq
6533 0, // SPERC:sub_fp0
6534 0, // SPERC:sub_fp1
6535 0, // SPERC:sub_gp8_x0
6536 0, // SPERC:sub_gp8_x1
6537 0, // SPERC:sub_gt
6538 0, // SPERC:sub_lt
6539 0, // SPERC:sub_pair0
6540 0, // SPERC:sub_pair1
6541 0, // SPERC:sub_un
6542 0, // SPERC:sub_vsx0
6543 0, // SPERC:sub_vsx1
6544 0, // SPERC:sub_wacc_hi
6545 0, // SPERC:sub_wacc_lo
6546 0, // SPERC:sub_vsx1_then_sub_64
6547 0, // SPERC:sub_vsx1_then_sub_64_hi_phony
6548 0, // SPERC:sub_pair1_then_sub_64
6549 0, // SPERC:sub_pair1_then_sub_64_hi_phony
6550 0, // SPERC:sub_pair1_then_sub_vsx0
6551 0, // SPERC:sub_pair1_then_sub_vsx1
6552 0, // SPERC:sub_pair1_then_sub_vsx1_then_sub_64
6553 0, // SPERC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6554 0, // SPERC:sub_dmrrowp1_then_sub_dmrrow0
6555 0, // SPERC:sub_dmrrowp1_then_sub_dmrrow1
6556 0, // SPERC:sub_wacc_hi_then_sub_dmrrow0
6557 0, // SPERC:sub_wacc_hi_then_sub_dmrrow1
6558 0, // SPERC:sub_wacc_hi_then_sub_dmrrowp0
6559 0, // SPERC:sub_wacc_hi_then_sub_dmrrowp1
6560 0, // SPERC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6561 0, // SPERC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6562 0, // SPERC:sub_dmr1_then_sub_dmrrow0
6563 0, // SPERC:sub_dmr1_then_sub_dmrrow1
6564 0, // SPERC:sub_dmr1_then_sub_dmrrowp0
6565 0, // SPERC:sub_dmr1_then_sub_dmrrowp1
6566 0, // SPERC:sub_dmr1_then_sub_wacc_hi
6567 0, // SPERC:sub_dmr1_then_sub_wacc_lo
6568 0, // SPERC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6569 0, // SPERC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6570 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6571 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6572 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6573 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6574 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6575 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6576 0, // SPERC:sub_gp8_x1_then_sub_32
6577 },
6578 { // VFHRC
6579 0, // VFHRC:sub_32
6580 0, // VFHRC:sub_32_hi_phony
6581 0, // VFHRC:sub_64
6582 0, // VFHRC:sub_64_hi_phony
6583 0, // VFHRC:sub_dmr0
6584 0, // VFHRC:sub_dmr1
6585 0, // VFHRC:sub_dmrrow0
6586 0, // VFHRC:sub_dmrrow1
6587 0, // VFHRC:sub_dmrrowp0
6588 0, // VFHRC:sub_dmrrowp1
6589 0, // VFHRC:sub_eq
6590 0, // VFHRC:sub_fp0
6591 0, // VFHRC:sub_fp1
6592 0, // VFHRC:sub_gp8_x0
6593 0, // VFHRC:sub_gp8_x1
6594 0, // VFHRC:sub_gt
6595 0, // VFHRC:sub_lt
6596 0, // VFHRC:sub_pair0
6597 0, // VFHRC:sub_pair1
6598 0, // VFHRC:sub_un
6599 0, // VFHRC:sub_vsx0
6600 0, // VFHRC:sub_vsx1
6601 0, // VFHRC:sub_wacc_hi
6602 0, // VFHRC:sub_wacc_lo
6603 0, // VFHRC:sub_vsx1_then_sub_64
6604 0, // VFHRC:sub_vsx1_then_sub_64_hi_phony
6605 0, // VFHRC:sub_pair1_then_sub_64
6606 0, // VFHRC:sub_pair1_then_sub_64_hi_phony
6607 0, // VFHRC:sub_pair1_then_sub_vsx0
6608 0, // VFHRC:sub_pair1_then_sub_vsx1
6609 0, // VFHRC:sub_pair1_then_sub_vsx1_then_sub_64
6610 0, // VFHRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6611 0, // VFHRC:sub_dmrrowp1_then_sub_dmrrow0
6612 0, // VFHRC:sub_dmrrowp1_then_sub_dmrrow1
6613 0, // VFHRC:sub_wacc_hi_then_sub_dmrrow0
6614 0, // VFHRC:sub_wacc_hi_then_sub_dmrrow1
6615 0, // VFHRC:sub_wacc_hi_then_sub_dmrrowp0
6616 0, // VFHRC:sub_wacc_hi_then_sub_dmrrowp1
6617 0, // VFHRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6618 0, // VFHRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6619 0, // VFHRC:sub_dmr1_then_sub_dmrrow0
6620 0, // VFHRC:sub_dmr1_then_sub_dmrrow1
6621 0, // VFHRC:sub_dmr1_then_sub_dmrrowp0
6622 0, // VFHRC:sub_dmr1_then_sub_dmrrowp1
6623 0, // VFHRC:sub_dmr1_then_sub_wacc_hi
6624 0, // VFHRC:sub_dmr1_then_sub_wacc_lo
6625 0, // VFHRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6626 0, // VFHRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6627 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6628 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6629 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6630 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6631 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6632 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6633 0, // VFHRC:sub_gp8_x1_then_sub_32
6634 },
6635 { // VFRC
6636 0, // VFRC:sub_32
6637 0, // VFRC:sub_32_hi_phony
6638 0, // VFRC:sub_64
6639 0, // VFRC:sub_64_hi_phony
6640 0, // VFRC:sub_dmr0
6641 0, // VFRC:sub_dmr1
6642 0, // VFRC:sub_dmrrow0
6643 0, // VFRC:sub_dmrrow1
6644 0, // VFRC:sub_dmrrowp0
6645 0, // VFRC:sub_dmrrowp1
6646 0, // VFRC:sub_eq
6647 0, // VFRC:sub_fp0
6648 0, // VFRC:sub_fp1
6649 0, // VFRC:sub_gp8_x0
6650 0, // VFRC:sub_gp8_x1
6651 0, // VFRC:sub_gt
6652 0, // VFRC:sub_lt
6653 0, // VFRC:sub_pair0
6654 0, // VFRC:sub_pair1
6655 0, // VFRC:sub_un
6656 0, // VFRC:sub_vsx0
6657 0, // VFRC:sub_vsx1
6658 0, // VFRC:sub_wacc_hi
6659 0, // VFRC:sub_wacc_lo
6660 0, // VFRC:sub_vsx1_then_sub_64
6661 0, // VFRC:sub_vsx1_then_sub_64_hi_phony
6662 0, // VFRC:sub_pair1_then_sub_64
6663 0, // VFRC:sub_pair1_then_sub_64_hi_phony
6664 0, // VFRC:sub_pair1_then_sub_vsx0
6665 0, // VFRC:sub_pair1_then_sub_vsx1
6666 0, // VFRC:sub_pair1_then_sub_vsx1_then_sub_64
6667 0, // VFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6668 0, // VFRC:sub_dmrrowp1_then_sub_dmrrow0
6669 0, // VFRC:sub_dmrrowp1_then_sub_dmrrow1
6670 0, // VFRC:sub_wacc_hi_then_sub_dmrrow0
6671 0, // VFRC:sub_wacc_hi_then_sub_dmrrow1
6672 0, // VFRC:sub_wacc_hi_then_sub_dmrrowp0
6673 0, // VFRC:sub_wacc_hi_then_sub_dmrrowp1
6674 0, // VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6675 0, // VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6676 0, // VFRC:sub_dmr1_then_sub_dmrrow0
6677 0, // VFRC:sub_dmr1_then_sub_dmrrow1
6678 0, // VFRC:sub_dmr1_then_sub_dmrrowp0
6679 0, // VFRC:sub_dmr1_then_sub_dmrrowp1
6680 0, // VFRC:sub_dmr1_then_sub_wacc_hi
6681 0, // VFRC:sub_dmr1_then_sub_wacc_lo
6682 0, // VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6683 0, // VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6684 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6685 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6686 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6687 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6688 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6689 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6690 0, // VFRC:sub_gp8_x1_then_sub_32
6691 },
6692 { // SPERC_with_sub_32_in_GPRC_NOR0
6693 4, // SPERC_with_sub_32_in_GPRC_NOR0:sub_32 -> GPRC_and_GPRC_NOR0
6694 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_32_hi_phony
6695 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_64
6696 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_64_hi_phony
6697 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr0
6698 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1
6699 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrow0
6700 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrow1
6701 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp0
6702 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1
6703 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_eq
6704 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_fp0
6705 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_fp1
6706 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_gp8_x0
6707 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_gp8_x1
6708 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_gt
6709 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_lt
6710 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair0
6711 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1
6712 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_un
6713 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_vsx0
6714 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_vsx1
6715 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi
6716 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_lo
6717 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_vsx1_then_sub_64
6718 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_vsx1_then_sub_64_hi_phony
6719 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_64
6720 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_64_hi_phony
6721 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx0
6722 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1
6723 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64
6724 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6725 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow0
6726 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow1
6727 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow0
6728 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow1
6729 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp0
6730 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1
6731 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6732 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6733 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrow0
6734 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrow1
6735 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp0
6736 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1
6737 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi
6738 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_lo
6739 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6740 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6741 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6742 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6743 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6744 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6745 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6746 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6747 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_gp8_x1_then_sub_32
6748 },
6749 { // SPILLTOVSRRC_and_VFRC
6750 0, // SPILLTOVSRRC_and_VFRC:sub_32
6751 0, // SPILLTOVSRRC_and_VFRC:sub_32_hi_phony
6752 0, // SPILLTOVSRRC_and_VFRC:sub_64
6753 0, // SPILLTOVSRRC_and_VFRC:sub_64_hi_phony
6754 0, // SPILLTOVSRRC_and_VFRC:sub_dmr0
6755 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1
6756 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrow0
6757 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrow1
6758 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrowp0
6759 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrowp1
6760 0, // SPILLTOVSRRC_and_VFRC:sub_eq
6761 0, // SPILLTOVSRRC_and_VFRC:sub_fp0
6762 0, // SPILLTOVSRRC_and_VFRC:sub_fp1
6763 0, // SPILLTOVSRRC_and_VFRC:sub_gp8_x0
6764 0, // SPILLTOVSRRC_and_VFRC:sub_gp8_x1
6765 0, // SPILLTOVSRRC_and_VFRC:sub_gt
6766 0, // SPILLTOVSRRC_and_VFRC:sub_lt
6767 0, // SPILLTOVSRRC_and_VFRC:sub_pair0
6768 0, // SPILLTOVSRRC_and_VFRC:sub_pair1
6769 0, // SPILLTOVSRRC_and_VFRC:sub_un
6770 0, // SPILLTOVSRRC_and_VFRC:sub_vsx0
6771 0, // SPILLTOVSRRC_and_VFRC:sub_vsx1
6772 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi
6773 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_lo
6774 0, // SPILLTOVSRRC_and_VFRC:sub_vsx1_then_sub_64
6775 0, // SPILLTOVSRRC_and_VFRC:sub_vsx1_then_sub_64_hi_phony
6776 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_64
6777 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_64_hi_phony
6778 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx0
6779 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1
6780 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1_then_sub_64
6781 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6782 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrowp1_then_sub_dmrrow0
6783 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrowp1_then_sub_dmrrow1
6784 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrow0
6785 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrow1
6786 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp0
6787 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1
6788 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6789 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6790 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrow0
6791 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrow1
6792 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp0
6793 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1
6794 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi
6795 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_lo
6796 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6797 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6798 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6799 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6800 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6801 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6802 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6803 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6804 0, // SPILLTOVSRRC_and_VFRC:sub_gp8_x1_then_sub_32
6805 },
6806 { // SPILLTOVSRRC_and_F4RC
6807 0, // SPILLTOVSRRC_and_F4RC:sub_32
6808 0, // SPILLTOVSRRC_and_F4RC:sub_32_hi_phony
6809 0, // SPILLTOVSRRC_and_F4RC:sub_64
6810 0, // SPILLTOVSRRC_and_F4RC:sub_64_hi_phony
6811 0, // SPILLTOVSRRC_and_F4RC:sub_dmr0
6812 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1
6813 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrow0
6814 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrow1
6815 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrowp0
6816 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrowp1
6817 0, // SPILLTOVSRRC_and_F4RC:sub_eq
6818 0, // SPILLTOVSRRC_and_F4RC:sub_fp0
6819 0, // SPILLTOVSRRC_and_F4RC:sub_fp1
6820 0, // SPILLTOVSRRC_and_F4RC:sub_gp8_x0
6821 0, // SPILLTOVSRRC_and_F4RC:sub_gp8_x1
6822 0, // SPILLTOVSRRC_and_F4RC:sub_gt
6823 0, // SPILLTOVSRRC_and_F4RC:sub_lt
6824 0, // SPILLTOVSRRC_and_F4RC:sub_pair0
6825 0, // SPILLTOVSRRC_and_F4RC:sub_pair1
6826 0, // SPILLTOVSRRC_and_F4RC:sub_un
6827 0, // SPILLTOVSRRC_and_F4RC:sub_vsx0
6828 0, // SPILLTOVSRRC_and_F4RC:sub_vsx1
6829 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi
6830 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_lo
6831 0, // SPILLTOVSRRC_and_F4RC:sub_vsx1_then_sub_64
6832 0, // SPILLTOVSRRC_and_F4RC:sub_vsx1_then_sub_64_hi_phony
6833 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_64
6834 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_64_hi_phony
6835 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx0
6836 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1
6837 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1_then_sub_64
6838 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6839 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrowp1_then_sub_dmrrow0
6840 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrowp1_then_sub_dmrrow1
6841 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrow0
6842 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrow1
6843 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp0
6844 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1
6845 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6846 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6847 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrow0
6848 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrow1
6849 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp0
6850 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1
6851 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi
6852 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_lo
6853 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6854 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6855 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6856 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6857 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6858 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6859 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6860 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6861 0, // SPILLTOVSRRC_and_F4RC:sub_gp8_x1_then_sub_32
6862 },
6863 { // CTRRC8
6864 0, // CTRRC8:sub_32
6865 0, // CTRRC8:sub_32_hi_phony
6866 0, // CTRRC8:sub_64
6867 0, // CTRRC8:sub_64_hi_phony
6868 0, // CTRRC8:sub_dmr0
6869 0, // CTRRC8:sub_dmr1
6870 0, // CTRRC8:sub_dmrrow0
6871 0, // CTRRC8:sub_dmrrow1
6872 0, // CTRRC8:sub_dmrrowp0
6873 0, // CTRRC8:sub_dmrrowp1
6874 0, // CTRRC8:sub_eq
6875 0, // CTRRC8:sub_fp0
6876 0, // CTRRC8:sub_fp1
6877 0, // CTRRC8:sub_gp8_x0
6878 0, // CTRRC8:sub_gp8_x1
6879 0, // CTRRC8:sub_gt
6880 0, // CTRRC8:sub_lt
6881 0, // CTRRC8:sub_pair0
6882 0, // CTRRC8:sub_pair1
6883 0, // CTRRC8:sub_un
6884 0, // CTRRC8:sub_vsx0
6885 0, // CTRRC8:sub_vsx1
6886 0, // CTRRC8:sub_wacc_hi
6887 0, // CTRRC8:sub_wacc_lo
6888 0, // CTRRC8:sub_vsx1_then_sub_64
6889 0, // CTRRC8:sub_vsx1_then_sub_64_hi_phony
6890 0, // CTRRC8:sub_pair1_then_sub_64
6891 0, // CTRRC8:sub_pair1_then_sub_64_hi_phony
6892 0, // CTRRC8:sub_pair1_then_sub_vsx0
6893 0, // CTRRC8:sub_pair1_then_sub_vsx1
6894 0, // CTRRC8:sub_pair1_then_sub_vsx1_then_sub_64
6895 0, // CTRRC8:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6896 0, // CTRRC8:sub_dmrrowp1_then_sub_dmrrow0
6897 0, // CTRRC8:sub_dmrrowp1_then_sub_dmrrow1
6898 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrow0
6899 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrow1
6900 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrowp0
6901 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrowp1
6902 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6903 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6904 0, // CTRRC8:sub_dmr1_then_sub_dmrrow0
6905 0, // CTRRC8:sub_dmr1_then_sub_dmrrow1
6906 0, // CTRRC8:sub_dmr1_then_sub_dmrrowp0
6907 0, // CTRRC8:sub_dmr1_then_sub_dmrrowp1
6908 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi
6909 0, // CTRRC8:sub_dmr1_then_sub_wacc_lo
6910 0, // CTRRC8:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6911 0, // CTRRC8:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6912 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6913 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6914 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6915 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6916 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6917 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6918 0, // CTRRC8:sub_gp8_x1_then_sub_32
6919 },
6920 { // LR8RC
6921 0, // LR8RC:sub_32
6922 0, // LR8RC:sub_32_hi_phony
6923 0, // LR8RC:sub_64
6924 0, // LR8RC:sub_64_hi_phony
6925 0, // LR8RC:sub_dmr0
6926 0, // LR8RC:sub_dmr1
6927 0, // LR8RC:sub_dmrrow0
6928 0, // LR8RC:sub_dmrrow1
6929 0, // LR8RC:sub_dmrrowp0
6930 0, // LR8RC:sub_dmrrowp1
6931 0, // LR8RC:sub_eq
6932 0, // LR8RC:sub_fp0
6933 0, // LR8RC:sub_fp1
6934 0, // LR8RC:sub_gp8_x0
6935 0, // LR8RC:sub_gp8_x1
6936 0, // LR8RC:sub_gt
6937 0, // LR8RC:sub_lt
6938 0, // LR8RC:sub_pair0
6939 0, // LR8RC:sub_pair1
6940 0, // LR8RC:sub_un
6941 0, // LR8RC:sub_vsx0
6942 0, // LR8RC:sub_vsx1
6943 0, // LR8RC:sub_wacc_hi
6944 0, // LR8RC:sub_wacc_lo
6945 0, // LR8RC:sub_vsx1_then_sub_64
6946 0, // LR8RC:sub_vsx1_then_sub_64_hi_phony
6947 0, // LR8RC:sub_pair1_then_sub_64
6948 0, // LR8RC:sub_pair1_then_sub_64_hi_phony
6949 0, // LR8RC:sub_pair1_then_sub_vsx0
6950 0, // LR8RC:sub_pair1_then_sub_vsx1
6951 0, // LR8RC:sub_pair1_then_sub_vsx1_then_sub_64
6952 0, // LR8RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6953 0, // LR8RC:sub_dmrrowp1_then_sub_dmrrow0
6954 0, // LR8RC:sub_dmrrowp1_then_sub_dmrrow1
6955 0, // LR8RC:sub_wacc_hi_then_sub_dmrrow0
6956 0, // LR8RC:sub_wacc_hi_then_sub_dmrrow1
6957 0, // LR8RC:sub_wacc_hi_then_sub_dmrrowp0
6958 0, // LR8RC:sub_wacc_hi_then_sub_dmrrowp1
6959 0, // LR8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6960 0, // LR8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6961 0, // LR8RC:sub_dmr1_then_sub_dmrrow0
6962 0, // LR8RC:sub_dmr1_then_sub_dmrrow1
6963 0, // LR8RC:sub_dmr1_then_sub_dmrrowp0
6964 0, // LR8RC:sub_dmr1_then_sub_dmrrowp1
6965 0, // LR8RC:sub_dmr1_then_sub_wacc_hi
6966 0, // LR8RC:sub_dmr1_then_sub_wacc_lo
6967 0, // LR8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6968 0, // LR8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6969 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6970 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6971 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6972 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6973 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6974 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6975 0, // LR8RC:sub_gp8_x1_then_sub_32
6976 },
6977 { // DMRROWRC
6978 0, // DMRROWRC:sub_32
6979 0, // DMRROWRC:sub_32_hi_phony
6980 0, // DMRROWRC:sub_64
6981 0, // DMRROWRC:sub_64_hi_phony
6982 0, // DMRROWRC:sub_dmr0
6983 0, // DMRROWRC:sub_dmr1
6984 0, // DMRROWRC:sub_dmrrow0
6985 0, // DMRROWRC:sub_dmrrow1
6986 0, // DMRROWRC:sub_dmrrowp0
6987 0, // DMRROWRC:sub_dmrrowp1
6988 0, // DMRROWRC:sub_eq
6989 0, // DMRROWRC:sub_fp0
6990 0, // DMRROWRC:sub_fp1
6991 0, // DMRROWRC:sub_gp8_x0
6992 0, // DMRROWRC:sub_gp8_x1
6993 0, // DMRROWRC:sub_gt
6994 0, // DMRROWRC:sub_lt
6995 0, // DMRROWRC:sub_pair0
6996 0, // DMRROWRC:sub_pair1
6997 0, // DMRROWRC:sub_un
6998 0, // DMRROWRC:sub_vsx0
6999 0, // DMRROWRC:sub_vsx1
7000 0, // DMRROWRC:sub_wacc_hi
7001 0, // DMRROWRC:sub_wacc_lo
7002 0, // DMRROWRC:sub_vsx1_then_sub_64
7003 0, // DMRROWRC:sub_vsx1_then_sub_64_hi_phony
7004 0, // DMRROWRC:sub_pair1_then_sub_64
7005 0, // DMRROWRC:sub_pair1_then_sub_64_hi_phony
7006 0, // DMRROWRC:sub_pair1_then_sub_vsx0
7007 0, // DMRROWRC:sub_pair1_then_sub_vsx1
7008 0, // DMRROWRC:sub_pair1_then_sub_vsx1_then_sub_64
7009 0, // DMRROWRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7010 0, // DMRROWRC:sub_dmrrowp1_then_sub_dmrrow0
7011 0, // DMRROWRC:sub_dmrrowp1_then_sub_dmrrow1
7012 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrow0
7013 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrow1
7014 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrowp0
7015 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrowp1
7016 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7017 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7018 0, // DMRROWRC:sub_dmr1_then_sub_dmrrow0
7019 0, // DMRROWRC:sub_dmr1_then_sub_dmrrow1
7020 0, // DMRROWRC:sub_dmr1_then_sub_dmrrowp0
7021 0, // DMRROWRC:sub_dmr1_then_sub_dmrrowp1
7022 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi
7023 0, // DMRROWRC:sub_dmr1_then_sub_wacc_lo
7024 0, // DMRROWRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7025 0, // DMRROWRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7026 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7027 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7028 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7029 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7030 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7031 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7032 0, // DMRROWRC:sub_gp8_x1_then_sub_32
7033 },
7034 { // VSRC
7035 0, // VSRC:sub_32
7036 0, // VSRC:sub_32_hi_phony
7037 1, // VSRC:sub_64 -> VSSRC
7038 0, // VSRC:sub_64_hi_phony
7039 0, // VSRC:sub_dmr0
7040 0, // VSRC:sub_dmr1
7041 0, // VSRC:sub_dmrrow0
7042 0, // VSRC:sub_dmrrow1
7043 0, // VSRC:sub_dmrrowp0
7044 0, // VSRC:sub_dmrrowp1
7045 0, // VSRC:sub_eq
7046 0, // VSRC:sub_fp0
7047 0, // VSRC:sub_fp1
7048 0, // VSRC:sub_gp8_x0
7049 0, // VSRC:sub_gp8_x1
7050 0, // VSRC:sub_gt
7051 0, // VSRC:sub_lt
7052 0, // VSRC:sub_pair0
7053 0, // VSRC:sub_pair1
7054 0, // VSRC:sub_un
7055 0, // VSRC:sub_vsx0
7056 0, // VSRC:sub_vsx1
7057 0, // VSRC:sub_wacc_hi
7058 0, // VSRC:sub_wacc_lo
7059 0, // VSRC:sub_vsx1_then_sub_64
7060 0, // VSRC:sub_vsx1_then_sub_64_hi_phony
7061 0, // VSRC:sub_pair1_then_sub_64
7062 0, // VSRC:sub_pair1_then_sub_64_hi_phony
7063 0, // VSRC:sub_pair1_then_sub_vsx0
7064 0, // VSRC:sub_pair1_then_sub_vsx1
7065 0, // VSRC:sub_pair1_then_sub_vsx1_then_sub_64
7066 0, // VSRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7067 0, // VSRC:sub_dmrrowp1_then_sub_dmrrow0
7068 0, // VSRC:sub_dmrrowp1_then_sub_dmrrow1
7069 0, // VSRC:sub_wacc_hi_then_sub_dmrrow0
7070 0, // VSRC:sub_wacc_hi_then_sub_dmrrow1
7071 0, // VSRC:sub_wacc_hi_then_sub_dmrrowp0
7072 0, // VSRC:sub_wacc_hi_then_sub_dmrrowp1
7073 0, // VSRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7074 0, // VSRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7075 0, // VSRC:sub_dmr1_then_sub_dmrrow0
7076 0, // VSRC:sub_dmr1_then_sub_dmrrow1
7077 0, // VSRC:sub_dmr1_then_sub_dmrrowp0
7078 0, // VSRC:sub_dmr1_then_sub_dmrrowp1
7079 0, // VSRC:sub_dmr1_then_sub_wacc_hi
7080 0, // VSRC:sub_dmr1_then_sub_wacc_lo
7081 0, // VSRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7082 0, // VSRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7083 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7084 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7085 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7086 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7087 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7088 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7089 0, // VSRC:sub_gp8_x1_then_sub_32
7090 },
7091 { // VSRC_with_sub_64_in_SPILLTOVSRRC
7092 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_32
7093 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
7094 17, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_VSFRC
7095 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
7096 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
7097 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
7098 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
7099 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
7100 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
7101 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
7102 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
7103 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
7104 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
7105 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
7106 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
7107 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
7108 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
7109 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0
7110 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1
7111 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_un
7112 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0
7113 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1
7114 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
7115 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
7116 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64
7117 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
7118 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64
7119 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
7120 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0
7121 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1
7122 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
7123 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7124 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
7125 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
7126 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
7127 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
7128 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
7129 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
7130 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7131 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7132 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
7133 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
7134 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
7135 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
7136 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
7137 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
7138 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7139 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7140 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7141 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7142 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7143 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7144 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7145 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7146 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
7147 },
7148 { // VRRC
7149 0, // VRRC:sub_32
7150 0, // VRRC:sub_32_hi_phony
7151 23, // VRRC:sub_64 -> VFRC
7152 0, // VRRC:sub_64_hi_phony
7153 0, // VRRC:sub_dmr0
7154 0, // VRRC:sub_dmr1
7155 0, // VRRC:sub_dmrrow0
7156 0, // VRRC:sub_dmrrow1
7157 0, // VRRC:sub_dmrrowp0
7158 0, // VRRC:sub_dmrrowp1
7159 0, // VRRC:sub_eq
7160 0, // VRRC:sub_fp0
7161 0, // VRRC:sub_fp1
7162 0, // VRRC:sub_gp8_x0
7163 0, // VRRC:sub_gp8_x1
7164 0, // VRRC:sub_gt
7165 0, // VRRC:sub_lt
7166 0, // VRRC:sub_pair0
7167 0, // VRRC:sub_pair1
7168 0, // VRRC:sub_un
7169 0, // VRRC:sub_vsx0
7170 0, // VRRC:sub_vsx1
7171 0, // VRRC:sub_wacc_hi
7172 0, // VRRC:sub_wacc_lo
7173 0, // VRRC:sub_vsx1_then_sub_64
7174 0, // VRRC:sub_vsx1_then_sub_64_hi_phony
7175 0, // VRRC:sub_pair1_then_sub_64
7176 0, // VRRC:sub_pair1_then_sub_64_hi_phony
7177 0, // VRRC:sub_pair1_then_sub_vsx0
7178 0, // VRRC:sub_pair1_then_sub_vsx1
7179 0, // VRRC:sub_pair1_then_sub_vsx1_then_sub_64
7180 0, // VRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7181 0, // VRRC:sub_dmrrowp1_then_sub_dmrrow0
7182 0, // VRRC:sub_dmrrowp1_then_sub_dmrrow1
7183 0, // VRRC:sub_wacc_hi_then_sub_dmrrow0
7184 0, // VRRC:sub_wacc_hi_then_sub_dmrrow1
7185 0, // VRRC:sub_wacc_hi_then_sub_dmrrowp0
7186 0, // VRRC:sub_wacc_hi_then_sub_dmrrowp1
7187 0, // VRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7188 0, // VRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7189 0, // VRRC:sub_dmr1_then_sub_dmrrow0
7190 0, // VRRC:sub_dmr1_then_sub_dmrrow1
7191 0, // VRRC:sub_dmr1_then_sub_dmrrowp0
7192 0, // VRRC:sub_dmr1_then_sub_dmrrowp1
7193 0, // VRRC:sub_dmr1_then_sub_wacc_hi
7194 0, // VRRC:sub_dmr1_then_sub_wacc_lo
7195 0, // VRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7196 0, // VRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7197 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7198 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7199 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7200 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7201 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7202 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7203 0, // VRRC:sub_gp8_x1_then_sub_32
7204 },
7205 { // VSLRC
7206 0, // VSLRC:sub_32
7207 0, // VSLRC:sub_32_hi_phony
7208 6, // VSLRC:sub_64 -> F4RC
7209 0, // VSLRC:sub_64_hi_phony
7210 0, // VSLRC:sub_dmr0
7211 0, // VSLRC:sub_dmr1
7212 0, // VSLRC:sub_dmrrow0
7213 0, // VSLRC:sub_dmrrow1
7214 0, // VSLRC:sub_dmrrowp0
7215 0, // VSLRC:sub_dmrrowp1
7216 0, // VSLRC:sub_eq
7217 0, // VSLRC:sub_fp0
7218 0, // VSLRC:sub_fp1
7219 0, // VSLRC:sub_gp8_x0
7220 0, // VSLRC:sub_gp8_x1
7221 0, // VSLRC:sub_gt
7222 0, // VSLRC:sub_lt
7223 0, // VSLRC:sub_pair0
7224 0, // VSLRC:sub_pair1
7225 0, // VSLRC:sub_un
7226 0, // VSLRC:sub_vsx0
7227 0, // VSLRC:sub_vsx1
7228 0, // VSLRC:sub_wacc_hi
7229 0, // VSLRC:sub_wacc_lo
7230 0, // VSLRC:sub_vsx1_then_sub_64
7231 0, // VSLRC:sub_vsx1_then_sub_64_hi_phony
7232 0, // VSLRC:sub_pair1_then_sub_64
7233 0, // VSLRC:sub_pair1_then_sub_64_hi_phony
7234 0, // VSLRC:sub_pair1_then_sub_vsx0
7235 0, // VSLRC:sub_pair1_then_sub_vsx1
7236 0, // VSLRC:sub_pair1_then_sub_vsx1_then_sub_64
7237 0, // VSLRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7238 0, // VSLRC:sub_dmrrowp1_then_sub_dmrrow0
7239 0, // VSLRC:sub_dmrrowp1_then_sub_dmrrow1
7240 0, // VSLRC:sub_wacc_hi_then_sub_dmrrow0
7241 0, // VSLRC:sub_wacc_hi_then_sub_dmrrow1
7242 0, // VSLRC:sub_wacc_hi_then_sub_dmrrowp0
7243 0, // VSLRC:sub_wacc_hi_then_sub_dmrrowp1
7244 0, // VSLRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7245 0, // VSLRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7246 0, // VSLRC:sub_dmr1_then_sub_dmrrow0
7247 0, // VSLRC:sub_dmr1_then_sub_dmrrow1
7248 0, // VSLRC:sub_dmr1_then_sub_dmrrowp0
7249 0, // VSLRC:sub_dmr1_then_sub_dmrrowp1
7250 0, // VSLRC:sub_dmr1_then_sub_wacc_hi
7251 0, // VSLRC:sub_dmr1_then_sub_wacc_lo
7252 0, // VSLRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7253 0, // VSLRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7254 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7255 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7256 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7257 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7258 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7259 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7260 0, // VSLRC:sub_gp8_x1_then_sub_32
7261 },
7262 { // VRRC_with_sub_64_in_SPILLTOVSRRC
7263 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_32
7264 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
7265 25, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_VFRC
7266 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
7267 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
7268 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
7269 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
7270 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
7271 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
7272 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
7273 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
7274 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
7275 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
7276 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
7277 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
7278 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
7279 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
7280 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0
7281 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1
7282 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_un
7283 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0
7284 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1
7285 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
7286 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
7287 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64
7288 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
7289 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64
7290 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
7291 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0
7292 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1
7293 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
7294 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7295 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
7296 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
7297 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
7298 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
7299 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
7300 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
7301 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7302 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7303 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
7304 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
7305 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
7306 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
7307 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
7308 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
7309 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7310 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7311 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7312 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7313 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7314 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7315 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7316 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7317 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
7318 },
7319 { // FpRC
7320 0, // FpRC:sub_32
7321 0, // FpRC:sub_32_hi_phony
7322 0, // FpRC:sub_64
7323 0, // FpRC:sub_64_hi_phony
7324 0, // FpRC:sub_dmr0
7325 0, // FpRC:sub_dmr1
7326 0, // FpRC:sub_dmrrow0
7327 0, // FpRC:sub_dmrrow1
7328 0, // FpRC:sub_dmrrowp0
7329 0, // FpRC:sub_dmrrowp1
7330 0, // FpRC:sub_eq
7331 19, // FpRC:sub_fp0 -> F8RC
7332 19, // FpRC:sub_fp1 -> F8RC
7333 0, // FpRC:sub_gp8_x0
7334 0, // FpRC:sub_gp8_x1
7335 0, // FpRC:sub_gt
7336 0, // FpRC:sub_lt
7337 0, // FpRC:sub_pair0
7338 0, // FpRC:sub_pair1
7339 0, // FpRC:sub_un
7340 0, // FpRC:sub_vsx0
7341 0, // FpRC:sub_vsx1
7342 0, // FpRC:sub_wacc_hi
7343 0, // FpRC:sub_wacc_lo
7344 0, // FpRC:sub_vsx1_then_sub_64
7345 0, // FpRC:sub_vsx1_then_sub_64_hi_phony
7346 0, // FpRC:sub_pair1_then_sub_64
7347 0, // FpRC:sub_pair1_then_sub_64_hi_phony
7348 0, // FpRC:sub_pair1_then_sub_vsx0
7349 0, // FpRC:sub_pair1_then_sub_vsx1
7350 0, // FpRC:sub_pair1_then_sub_vsx1_then_sub_64
7351 0, // FpRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7352 0, // FpRC:sub_dmrrowp1_then_sub_dmrrow0
7353 0, // FpRC:sub_dmrrowp1_then_sub_dmrrow1
7354 0, // FpRC:sub_wacc_hi_then_sub_dmrrow0
7355 0, // FpRC:sub_wacc_hi_then_sub_dmrrow1
7356 0, // FpRC:sub_wacc_hi_then_sub_dmrrowp0
7357 0, // FpRC:sub_wacc_hi_then_sub_dmrrowp1
7358 0, // FpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7359 0, // FpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7360 0, // FpRC:sub_dmr1_then_sub_dmrrow0
7361 0, // FpRC:sub_dmr1_then_sub_dmrrow1
7362 0, // FpRC:sub_dmr1_then_sub_dmrrowp0
7363 0, // FpRC:sub_dmr1_then_sub_dmrrowp1
7364 0, // FpRC:sub_dmr1_then_sub_wacc_hi
7365 0, // FpRC:sub_dmr1_then_sub_wacc_lo
7366 0, // FpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7367 0, // FpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7368 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7369 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7370 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7371 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7372 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7373 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7374 0, // FpRC:sub_gp8_x1_then_sub_32
7375 },
7376 { // G8pRC
7377 2, // G8pRC:sub_32 -> GPRC
7378 0, // G8pRC:sub_32_hi_phony
7379 0, // G8pRC:sub_64
7380 0, // G8pRC:sub_64_hi_phony
7381 0, // G8pRC:sub_dmr0
7382 0, // G8pRC:sub_dmr1
7383 0, // G8pRC:sub_dmrrow0
7384 0, // G8pRC:sub_dmrrow1
7385 0, // G8pRC:sub_dmrrowp0
7386 0, // G8pRC:sub_dmrrowp1
7387 0, // G8pRC:sub_eq
7388 0, // G8pRC:sub_fp0
7389 0, // G8pRC:sub_fp1
7390 15, // G8pRC:sub_gp8_x0 -> G8RC
7391 18, // G8pRC:sub_gp8_x1 -> G8RC_and_G8RC_NOX0
7392 0, // G8pRC:sub_gt
7393 0, // G8pRC:sub_lt
7394 0, // G8pRC:sub_pair0
7395 0, // G8pRC:sub_pair1
7396 0, // G8pRC:sub_un
7397 0, // G8pRC:sub_vsx0
7398 0, // G8pRC:sub_vsx1
7399 0, // G8pRC:sub_wacc_hi
7400 0, // G8pRC:sub_wacc_lo
7401 0, // G8pRC:sub_vsx1_then_sub_64
7402 0, // G8pRC:sub_vsx1_then_sub_64_hi_phony
7403 0, // G8pRC:sub_pair1_then_sub_64
7404 0, // G8pRC:sub_pair1_then_sub_64_hi_phony
7405 0, // G8pRC:sub_pair1_then_sub_vsx0
7406 0, // G8pRC:sub_pair1_then_sub_vsx1
7407 0, // G8pRC:sub_pair1_then_sub_vsx1_then_sub_64
7408 0, // G8pRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7409 0, // G8pRC:sub_dmrrowp1_then_sub_dmrrow0
7410 0, // G8pRC:sub_dmrrowp1_then_sub_dmrrow1
7411 0, // G8pRC:sub_wacc_hi_then_sub_dmrrow0
7412 0, // G8pRC:sub_wacc_hi_then_sub_dmrrow1
7413 0, // G8pRC:sub_wacc_hi_then_sub_dmrrowp0
7414 0, // G8pRC:sub_wacc_hi_then_sub_dmrrowp1
7415 0, // G8pRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7416 0, // G8pRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7417 0, // G8pRC:sub_dmr1_then_sub_dmrrow0
7418 0, // G8pRC:sub_dmr1_then_sub_dmrrow1
7419 0, // G8pRC:sub_dmr1_then_sub_dmrrowp0
7420 0, // G8pRC:sub_dmr1_then_sub_dmrrowp1
7421 0, // G8pRC:sub_dmr1_then_sub_wacc_hi
7422 0, // G8pRC:sub_dmr1_then_sub_wacc_lo
7423 0, // G8pRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7424 0, // G8pRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7425 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7426 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7427 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7428 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7429 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7430 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7431 4, // G8pRC:sub_gp8_x1_then_sub_32 -> GPRC_and_GPRC_NOR0
7432 },
7433 { // G8pRC_with_sub_32_in_GPRC_NOR0
7434 4, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_32 -> GPRC_and_GPRC_NOR0
7435 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_32_hi_phony
7436 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_64
7437 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_64_hi_phony
7438 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr0
7439 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1
7440 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrow0
7441 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrow1
7442 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp0
7443 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1
7444 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_eq
7445 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_fp0
7446 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_fp1
7447 18, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_gp8_x0 -> G8RC_and_G8RC_NOX0
7448 18, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_gp8_x1 -> G8RC_and_G8RC_NOX0
7449 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_gt
7450 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_lt
7451 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair0
7452 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1
7453 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_un
7454 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_vsx0
7455 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_vsx1
7456 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi
7457 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_lo
7458 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_vsx1_then_sub_64
7459 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_vsx1_then_sub_64_hi_phony
7460 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_64
7461 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_64_hi_phony
7462 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx0
7463 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1
7464 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64
7465 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7466 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow0
7467 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow1
7468 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow0
7469 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow1
7470 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp0
7471 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1
7472 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7473 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7474 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrow0
7475 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrow1
7476 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp0
7477 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1
7478 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi
7479 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_lo
7480 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7481 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7482 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7483 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7484 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7485 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7486 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7487 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7488 4, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_gp8_x1_then_sub_32 -> GPRC_and_GPRC_NOR0
7489 },
7490 { // VSLRC_with_sub_64_in_SPILLTOVSRRC
7491 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_32
7492 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
7493 26, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_F4RC
7494 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
7495 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
7496 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
7497 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
7498 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
7499 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
7500 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
7501 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
7502 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
7503 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
7504 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
7505 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
7506 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
7507 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
7508 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0
7509 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1
7510 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_un
7511 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0
7512 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1
7513 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
7514 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
7515 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64
7516 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
7517 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64
7518 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
7519 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0
7520 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1
7521 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
7522 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7523 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
7524 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
7525 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
7526 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
7527 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
7528 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
7529 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7530 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7531 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
7532 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
7533 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
7534 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
7535 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
7536 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
7537 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7538 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7539 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7540 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7541 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7542 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7543 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7544 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7545 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
7546 },
7547 { // FpRC_with_sub_fp0_in_SPILLTOVSRRC
7548 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_32
7549 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_32_hi_phony
7550 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_64
7551 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_64_hi_phony
7552 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr0
7553 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1
7554 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrow0
7555 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrow1
7556 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrowp0
7557 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrowp1
7558 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_eq
7559 26, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_fp0 -> SPILLTOVSRRC_and_F4RC
7560 26, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_fp1 -> SPILLTOVSRRC_and_F4RC
7561 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_gp8_x0
7562 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_gp8_x1
7563 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_gt
7564 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_lt
7565 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair0
7566 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1
7567 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_un
7568 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_vsx0
7569 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_vsx1
7570 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi
7571 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_lo
7572 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_vsx1_then_sub_64
7573 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
7574 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_64
7575 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
7576 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0
7577 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1
7578 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
7579 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7580 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
7581 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
7582 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
7583 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
7584 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
7585 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
7586 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7587 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7588 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
7589 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
7590 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
7591 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
7592 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
7593 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
7594 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7595 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7596 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7597 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7598 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7599 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7600 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7601 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7602 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
7603 },
7604 { // DMRROWpRC
7605 0, // DMRROWpRC:sub_32
7606 0, // DMRROWpRC:sub_32_hi_phony
7607 0, // DMRROWpRC:sub_64
7608 0, // DMRROWpRC:sub_64_hi_phony
7609 0, // DMRROWpRC:sub_dmr0
7610 0, // DMRROWpRC:sub_dmr1
7611 29, // DMRROWpRC:sub_dmrrow0 -> DMRROWRC
7612 29, // DMRROWpRC:sub_dmrrow1 -> DMRROWRC
7613 0, // DMRROWpRC:sub_dmrrowp0
7614 0, // DMRROWpRC:sub_dmrrowp1
7615 0, // DMRROWpRC:sub_eq
7616 0, // DMRROWpRC:sub_fp0
7617 0, // DMRROWpRC:sub_fp1
7618 0, // DMRROWpRC:sub_gp8_x0
7619 0, // DMRROWpRC:sub_gp8_x1
7620 0, // DMRROWpRC:sub_gt
7621 0, // DMRROWpRC:sub_lt
7622 0, // DMRROWpRC:sub_pair0
7623 0, // DMRROWpRC:sub_pair1
7624 0, // DMRROWpRC:sub_un
7625 0, // DMRROWpRC:sub_vsx0
7626 0, // DMRROWpRC:sub_vsx1
7627 0, // DMRROWpRC:sub_wacc_hi
7628 0, // DMRROWpRC:sub_wacc_lo
7629 0, // DMRROWpRC:sub_vsx1_then_sub_64
7630 0, // DMRROWpRC:sub_vsx1_then_sub_64_hi_phony
7631 0, // DMRROWpRC:sub_pair1_then_sub_64
7632 0, // DMRROWpRC:sub_pair1_then_sub_64_hi_phony
7633 0, // DMRROWpRC:sub_pair1_then_sub_vsx0
7634 0, // DMRROWpRC:sub_pair1_then_sub_vsx1
7635 0, // DMRROWpRC:sub_pair1_then_sub_vsx1_then_sub_64
7636 0, // DMRROWpRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7637 0, // DMRROWpRC:sub_dmrrowp1_then_sub_dmrrow0
7638 0, // DMRROWpRC:sub_dmrrowp1_then_sub_dmrrow1
7639 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrow0
7640 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrow1
7641 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrowp0
7642 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrowp1
7643 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7644 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7645 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrow0
7646 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrow1
7647 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrowp0
7648 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrowp1
7649 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi
7650 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_lo
7651 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7652 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7653 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7654 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7655 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7656 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7657 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7658 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7659 0, // DMRROWpRC:sub_gp8_x1_then_sub_32
7660 },
7661 { // VSRpRC
7662 0, // VSRpRC:sub_32
7663 0, // VSRpRC:sub_32_hi_phony
7664 14, // VSRpRC:sub_64 -> VSFRC
7665 0, // VSRpRC:sub_64_hi_phony
7666 0, // VSRpRC:sub_dmr0
7667 0, // VSRpRC:sub_dmr1
7668 0, // VSRpRC:sub_dmrrow0
7669 0, // VSRpRC:sub_dmrrow1
7670 0, // VSRpRC:sub_dmrrowp0
7671 0, // VSRpRC:sub_dmrrowp1
7672 0, // VSRpRC:sub_eq
7673 0, // VSRpRC:sub_fp0
7674 0, // VSRpRC:sub_fp1
7675 0, // VSRpRC:sub_gp8_x0
7676 0, // VSRpRC:sub_gp8_x1
7677 0, // VSRpRC:sub_gt
7678 0, // VSRpRC:sub_lt
7679 0, // VSRpRC:sub_pair0
7680 0, // VSRpRC:sub_pair1
7681 0, // VSRpRC:sub_un
7682 30, // VSRpRC:sub_vsx0 -> VSRC
7683 30, // VSRpRC:sub_vsx1 -> VSRC
7684 0, // VSRpRC:sub_wacc_hi
7685 0, // VSRpRC:sub_wacc_lo
7686 14, // VSRpRC:sub_vsx1_then_sub_64 -> VSFRC
7687 0, // VSRpRC:sub_vsx1_then_sub_64_hi_phony
7688 0, // VSRpRC:sub_pair1_then_sub_64
7689 0, // VSRpRC:sub_pair1_then_sub_64_hi_phony
7690 0, // VSRpRC:sub_pair1_then_sub_vsx0
7691 0, // VSRpRC:sub_pair1_then_sub_vsx1
7692 0, // VSRpRC:sub_pair1_then_sub_vsx1_then_sub_64
7693 0, // VSRpRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7694 0, // VSRpRC:sub_dmrrowp1_then_sub_dmrrow0
7695 0, // VSRpRC:sub_dmrrowp1_then_sub_dmrrow1
7696 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrow0
7697 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrow1
7698 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrowp0
7699 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrowp1
7700 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7701 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7702 0, // VSRpRC:sub_dmr1_then_sub_dmrrow0
7703 0, // VSRpRC:sub_dmr1_then_sub_dmrrow1
7704 0, // VSRpRC:sub_dmr1_then_sub_dmrrowp0
7705 0, // VSRpRC:sub_dmr1_then_sub_dmrrowp1
7706 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi
7707 0, // VSRpRC:sub_dmr1_then_sub_wacc_lo
7708 0, // VSRpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7709 0, // VSRpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7710 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7711 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7712 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7713 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7714 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7715 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7716 0, // VSRpRC:sub_gp8_x1_then_sub_32
7717 },
7718 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC
7719 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_32
7720 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
7721 17, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_VSFRC
7722 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
7723 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
7724 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
7725 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
7726 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
7727 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
7728 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
7729 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
7730 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
7731 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
7732 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
7733 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
7734 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
7735 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
7736 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0
7737 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1
7738 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_un
7739 31, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0 -> VSRC_with_sub_64_in_SPILLTOVSRRC
7740 31, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1 -> VSRC_with_sub_64_in_SPILLTOVSRRC
7741 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
7742 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
7743 17, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_VSFRC
7744 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
7745 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64
7746 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
7747 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0
7748 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1
7749 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
7750 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7751 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
7752 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
7753 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
7754 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
7755 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
7756 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
7757 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7758 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7759 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
7760 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
7761 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
7762 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
7763 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
7764 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
7765 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7766 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7767 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7768 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7769 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7770 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7771 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7772 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7773 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
7774 },
7775 { // VSRpRC_with_sub_64_in_F4RC
7776 0, // VSRpRC_with_sub_64_in_F4RC:sub_32
7777 0, // VSRpRC_with_sub_64_in_F4RC:sub_32_hi_phony
7778 19, // VSRpRC_with_sub_64_in_F4RC:sub_64 -> F8RC
7779 0, // VSRpRC_with_sub_64_in_F4RC:sub_64_hi_phony
7780 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr0
7781 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1
7782 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrow0
7783 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrow1
7784 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrowp0
7785 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrowp1
7786 0, // VSRpRC_with_sub_64_in_F4RC:sub_eq
7787 0, // VSRpRC_with_sub_64_in_F4RC:sub_fp0
7788 0, // VSRpRC_with_sub_64_in_F4RC:sub_fp1
7789 0, // VSRpRC_with_sub_64_in_F4RC:sub_gp8_x0
7790 0, // VSRpRC_with_sub_64_in_F4RC:sub_gp8_x1
7791 0, // VSRpRC_with_sub_64_in_F4RC:sub_gt
7792 0, // VSRpRC_with_sub_64_in_F4RC:sub_lt
7793 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair0
7794 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1
7795 0, // VSRpRC_with_sub_64_in_F4RC:sub_un
7796 33, // VSRpRC_with_sub_64_in_F4RC:sub_vsx0 -> VSLRC
7797 33, // VSRpRC_with_sub_64_in_F4RC:sub_vsx1 -> VSLRC
7798 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi
7799 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_lo
7800 19, // VSRpRC_with_sub_64_in_F4RC:sub_vsx1_then_sub_64 -> F8RC
7801 0, // VSRpRC_with_sub_64_in_F4RC:sub_vsx1_then_sub_64_hi_phony
7802 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_64
7803 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_64_hi_phony
7804 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_vsx0
7805 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_vsx1
7806 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_vsx1_then_sub_64
7807 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7808 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrowp1_then_sub_dmrrow0
7809 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrowp1_then_sub_dmrrow1
7810 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrow0
7811 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrow1
7812 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrowp0
7813 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrowp1
7814 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7815 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7816 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrow0
7817 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrow1
7818 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrowp0
7819 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrowp1
7820 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi
7821 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_lo
7822 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7823 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7824 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7825 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7826 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7827 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7828 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7829 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7830 0, // VSRpRC_with_sub_64_in_F4RC:sub_gp8_x1_then_sub_32
7831 },
7832 { // VSRpRC_with_sub_64_in_VFRC
7833 0, // VSRpRC_with_sub_64_in_VFRC:sub_32
7834 0, // VSRpRC_with_sub_64_in_VFRC:sub_32_hi_phony
7835 23, // VSRpRC_with_sub_64_in_VFRC:sub_64 -> VFRC
7836 0, // VSRpRC_with_sub_64_in_VFRC:sub_64_hi_phony
7837 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr0
7838 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1
7839 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrow0
7840 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrow1
7841 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrowp0
7842 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrowp1
7843 0, // VSRpRC_with_sub_64_in_VFRC:sub_eq
7844 0, // VSRpRC_with_sub_64_in_VFRC:sub_fp0
7845 0, // VSRpRC_with_sub_64_in_VFRC:sub_fp1
7846 0, // VSRpRC_with_sub_64_in_VFRC:sub_gp8_x0
7847 0, // VSRpRC_with_sub_64_in_VFRC:sub_gp8_x1
7848 0, // VSRpRC_with_sub_64_in_VFRC:sub_gt
7849 0, // VSRpRC_with_sub_64_in_VFRC:sub_lt
7850 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair0
7851 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1
7852 0, // VSRpRC_with_sub_64_in_VFRC:sub_un
7853 32, // VSRpRC_with_sub_64_in_VFRC:sub_vsx0 -> VRRC
7854 32, // VSRpRC_with_sub_64_in_VFRC:sub_vsx1 -> VRRC
7855 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi
7856 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_lo
7857 23, // VSRpRC_with_sub_64_in_VFRC:sub_vsx1_then_sub_64 -> VFRC
7858 0, // VSRpRC_with_sub_64_in_VFRC:sub_vsx1_then_sub_64_hi_phony
7859 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_64
7860 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_64_hi_phony
7861 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_vsx0
7862 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_vsx1
7863 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_vsx1_then_sub_64
7864 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7865 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrowp1_then_sub_dmrrow0
7866 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrowp1_then_sub_dmrrow1
7867 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrow0
7868 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrow1
7869 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrowp0
7870 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrowp1
7871 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7872 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7873 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrow0
7874 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrow1
7875 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrowp0
7876 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrowp1
7877 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi
7878 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_lo
7879 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7880 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7881 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7882 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7883 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7884 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7885 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7886 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7887 0, // VSRpRC_with_sub_64_in_VFRC:sub_gp8_x1_then_sub_32
7888 },
7889 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
7890 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_32
7891 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_32_hi_phony
7892 25, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_64 -> SPILLTOVSRRC_and_VFRC
7893 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_64_hi_phony
7894 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr0
7895 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1
7896 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrow0
7897 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrow1
7898 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrowp0
7899 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrowp1
7900 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_eq
7901 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_fp0
7902 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_fp1
7903 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_gp8_x0
7904 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_gp8_x1
7905 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_gt
7906 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_lt
7907 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair0
7908 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1
7909 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_un
7910 34, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_vsx0 -> VRRC_with_sub_64_in_SPILLTOVSRRC
7911 34, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_vsx1 -> VRRC_with_sub_64_in_SPILLTOVSRRC
7912 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi
7913 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_lo
7914 25, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_VFRC
7915 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_vsx1_then_sub_64_hi_phony
7916 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_64
7917 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_64_hi_phony
7918 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx0
7919 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1
7920 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1_then_sub_64
7921 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7922 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrowp1_then_sub_dmrrow0
7923 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrowp1_then_sub_dmrrow1
7924 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrow0
7925 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrow1
7926 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp0
7927 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1
7928 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7929 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7930 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrow0
7931 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrow1
7932 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp0
7933 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1
7934 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi
7935 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_lo
7936 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7937 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7938 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7939 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7940 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7941 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7942 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7943 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7944 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_gp8_x1_then_sub_32
7945 },
7946 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
7947 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_32
7948 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_32_hi_phony
7949 26, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_64 -> SPILLTOVSRRC_and_F4RC
7950 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_64_hi_phony
7951 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr0
7952 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1
7953 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrow0
7954 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrow1
7955 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrowp0
7956 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrowp1
7957 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_eq
7958 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_fp0
7959 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_fp1
7960 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_gp8_x0
7961 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_gp8_x1
7962 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_gt
7963 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_lt
7964 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair0
7965 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1
7966 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_un
7967 38, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
7968 38, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
7969 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi
7970 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_lo
7971 26, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
7972 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_vsx1_then_sub_64_hi_phony
7973 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_64
7974 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_64_hi_phony
7975 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx0
7976 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1
7977 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1_then_sub_64
7978 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7979 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrowp1_then_sub_dmrrow0
7980 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrowp1_then_sub_dmrrow1
7981 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrow0
7982 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrow1
7983 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp0
7984 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1
7985 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7986 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7987 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrow0
7988 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrow1
7989 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp0
7990 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1
7991 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi
7992 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_lo
7993 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7994 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7995 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7996 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7997 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7998 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7999 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8000 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8001 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_gp8_x1_then_sub_32
8002 },
8003 { // ACCRC
8004 0, // ACCRC:sub_32
8005 0, // ACCRC:sub_32_hi_phony
8006 19, // ACCRC:sub_64 -> F8RC
8007 0, // ACCRC:sub_64_hi_phony
8008 0, // ACCRC:sub_dmr0
8009 0, // ACCRC:sub_dmr1
8010 0, // ACCRC:sub_dmrrow0
8011 0, // ACCRC:sub_dmrrow1
8012 0, // ACCRC:sub_dmrrowp0
8013 0, // ACCRC:sub_dmrrowp1
8014 0, // ACCRC:sub_eq
8015 0, // ACCRC:sub_fp0
8016 0, // ACCRC:sub_fp1
8017 0, // ACCRC:sub_gp8_x0
8018 0, // ACCRC:sub_gp8_x1
8019 0, // ACCRC:sub_gt
8020 0, // ACCRC:sub_lt
8021 43, // ACCRC:sub_pair0 -> VSRpRC_with_sub_64_in_F4RC
8022 43, // ACCRC:sub_pair1 -> VSRpRC_with_sub_64_in_F4RC
8023 0, // ACCRC:sub_un
8024 33, // ACCRC:sub_vsx0 -> VSLRC
8025 33, // ACCRC:sub_vsx1 -> VSLRC
8026 0, // ACCRC:sub_wacc_hi
8027 0, // ACCRC:sub_wacc_lo
8028 19, // ACCRC:sub_vsx1_then_sub_64 -> F8RC
8029 0, // ACCRC:sub_vsx1_then_sub_64_hi_phony
8030 19, // ACCRC:sub_pair1_then_sub_64 -> F8RC
8031 0, // ACCRC:sub_pair1_then_sub_64_hi_phony
8032 33, // ACCRC:sub_pair1_then_sub_vsx0 -> VSLRC
8033 33, // ACCRC:sub_pair1_then_sub_vsx1 -> VSLRC
8034 19, // ACCRC:sub_pair1_then_sub_vsx1_then_sub_64 -> F8RC
8035 0, // ACCRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8036 0, // ACCRC:sub_dmrrowp1_then_sub_dmrrow0
8037 0, // ACCRC:sub_dmrrowp1_then_sub_dmrrow1
8038 0, // ACCRC:sub_wacc_hi_then_sub_dmrrow0
8039 0, // ACCRC:sub_wacc_hi_then_sub_dmrrow1
8040 0, // ACCRC:sub_wacc_hi_then_sub_dmrrowp0
8041 0, // ACCRC:sub_wacc_hi_then_sub_dmrrowp1
8042 0, // ACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8043 0, // ACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8044 0, // ACCRC:sub_dmr1_then_sub_dmrrow0
8045 0, // ACCRC:sub_dmr1_then_sub_dmrrow1
8046 0, // ACCRC:sub_dmr1_then_sub_dmrrowp0
8047 0, // ACCRC:sub_dmr1_then_sub_dmrrowp1
8048 0, // ACCRC:sub_dmr1_then_sub_wacc_hi
8049 0, // ACCRC:sub_dmr1_then_sub_wacc_lo
8050 0, // ACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8051 0, // ACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8052 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8053 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8054 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8055 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8056 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8057 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8058 0, // ACCRC:sub_gp8_x1_then_sub_32
8059 },
8060 { // UACCRC
8061 0, // UACCRC:sub_32
8062 0, // UACCRC:sub_32_hi_phony
8063 19, // UACCRC:sub_64 -> F8RC
8064 0, // UACCRC:sub_64_hi_phony
8065 0, // UACCRC:sub_dmr0
8066 0, // UACCRC:sub_dmr1
8067 0, // UACCRC:sub_dmrrow0
8068 0, // UACCRC:sub_dmrrow1
8069 0, // UACCRC:sub_dmrrowp0
8070 0, // UACCRC:sub_dmrrowp1
8071 0, // UACCRC:sub_eq
8072 0, // UACCRC:sub_fp0
8073 0, // UACCRC:sub_fp1
8074 0, // UACCRC:sub_gp8_x0
8075 0, // UACCRC:sub_gp8_x1
8076 0, // UACCRC:sub_gt
8077 0, // UACCRC:sub_lt
8078 43, // UACCRC:sub_pair0 -> VSRpRC_with_sub_64_in_F4RC
8079 43, // UACCRC:sub_pair1 -> VSRpRC_with_sub_64_in_F4RC
8080 0, // UACCRC:sub_un
8081 33, // UACCRC:sub_vsx0 -> VSLRC
8082 33, // UACCRC:sub_vsx1 -> VSLRC
8083 0, // UACCRC:sub_wacc_hi
8084 0, // UACCRC:sub_wacc_lo
8085 19, // UACCRC:sub_vsx1_then_sub_64 -> F8RC
8086 0, // UACCRC:sub_vsx1_then_sub_64_hi_phony
8087 19, // UACCRC:sub_pair1_then_sub_64 -> F8RC
8088 0, // UACCRC:sub_pair1_then_sub_64_hi_phony
8089 33, // UACCRC:sub_pair1_then_sub_vsx0 -> VSLRC
8090 33, // UACCRC:sub_pair1_then_sub_vsx1 -> VSLRC
8091 19, // UACCRC:sub_pair1_then_sub_vsx1_then_sub_64 -> F8RC
8092 0, // UACCRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8093 0, // UACCRC:sub_dmrrowp1_then_sub_dmrrow0
8094 0, // UACCRC:sub_dmrrowp1_then_sub_dmrrow1
8095 0, // UACCRC:sub_wacc_hi_then_sub_dmrrow0
8096 0, // UACCRC:sub_wacc_hi_then_sub_dmrrow1
8097 0, // UACCRC:sub_wacc_hi_then_sub_dmrrowp0
8098 0, // UACCRC:sub_wacc_hi_then_sub_dmrrowp1
8099 0, // UACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8100 0, // UACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8101 0, // UACCRC:sub_dmr1_then_sub_dmrrow0
8102 0, // UACCRC:sub_dmr1_then_sub_dmrrow1
8103 0, // UACCRC:sub_dmr1_then_sub_dmrrowp0
8104 0, // UACCRC:sub_dmr1_then_sub_dmrrowp1
8105 0, // UACCRC:sub_dmr1_then_sub_wacc_hi
8106 0, // UACCRC:sub_dmr1_then_sub_wacc_lo
8107 0, // UACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8108 0, // UACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8109 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8110 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8111 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8112 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8113 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8114 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8115 0, // UACCRC:sub_gp8_x1_then_sub_32
8116 },
8117 { // WACCRC
8118 0, // WACCRC:sub_32
8119 0, // WACCRC:sub_32_hi_phony
8120 0, // WACCRC:sub_64
8121 0, // WACCRC:sub_64_hi_phony
8122 0, // WACCRC:sub_dmr0
8123 0, // WACCRC:sub_dmr1
8124 29, // WACCRC:sub_dmrrow0 -> DMRROWRC
8125 29, // WACCRC:sub_dmrrow1 -> DMRROWRC
8126 40, // WACCRC:sub_dmrrowp0 -> DMRROWpRC
8127 40, // WACCRC:sub_dmrrowp1 -> DMRROWpRC
8128 0, // WACCRC:sub_eq
8129 0, // WACCRC:sub_fp0
8130 0, // WACCRC:sub_fp1
8131 0, // WACCRC:sub_gp8_x0
8132 0, // WACCRC:sub_gp8_x1
8133 0, // WACCRC:sub_gt
8134 0, // WACCRC:sub_lt
8135 0, // WACCRC:sub_pair0
8136 0, // WACCRC:sub_pair1
8137 0, // WACCRC:sub_un
8138 0, // WACCRC:sub_vsx0
8139 0, // WACCRC:sub_vsx1
8140 0, // WACCRC:sub_wacc_hi
8141 0, // WACCRC:sub_wacc_lo
8142 0, // WACCRC:sub_vsx1_then_sub_64
8143 0, // WACCRC:sub_vsx1_then_sub_64_hi_phony
8144 0, // WACCRC:sub_pair1_then_sub_64
8145 0, // WACCRC:sub_pair1_then_sub_64_hi_phony
8146 0, // WACCRC:sub_pair1_then_sub_vsx0
8147 0, // WACCRC:sub_pair1_then_sub_vsx1
8148 0, // WACCRC:sub_pair1_then_sub_vsx1_then_sub_64
8149 0, // WACCRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8150 29, // WACCRC:sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8151 29, // WACCRC:sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8152 0, // WACCRC:sub_wacc_hi_then_sub_dmrrow0
8153 0, // WACCRC:sub_wacc_hi_then_sub_dmrrow1
8154 0, // WACCRC:sub_wacc_hi_then_sub_dmrrowp0
8155 0, // WACCRC:sub_wacc_hi_then_sub_dmrrowp1
8156 0, // WACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8157 0, // WACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8158 0, // WACCRC:sub_dmr1_then_sub_dmrrow0
8159 0, // WACCRC:sub_dmr1_then_sub_dmrrow1
8160 0, // WACCRC:sub_dmr1_then_sub_dmrrowp0
8161 0, // WACCRC:sub_dmr1_then_sub_dmrrowp1
8162 0, // WACCRC:sub_dmr1_then_sub_wacc_hi
8163 0, // WACCRC:sub_dmr1_then_sub_wacc_lo
8164 0, // WACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8165 0, // WACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8166 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8167 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8168 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8169 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8170 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8171 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8172 0, // WACCRC:sub_gp8_x1_then_sub_32
8173 },
8174 { // WACC_HIRC
8175 0, // WACC_HIRC:sub_32
8176 0, // WACC_HIRC:sub_32_hi_phony
8177 0, // WACC_HIRC:sub_64
8178 0, // WACC_HIRC:sub_64_hi_phony
8179 0, // WACC_HIRC:sub_dmr0
8180 0, // WACC_HIRC:sub_dmr1
8181 29, // WACC_HIRC:sub_dmrrow0 -> DMRROWRC
8182 29, // WACC_HIRC:sub_dmrrow1 -> DMRROWRC
8183 40, // WACC_HIRC:sub_dmrrowp0 -> DMRROWpRC
8184 40, // WACC_HIRC:sub_dmrrowp1 -> DMRROWpRC
8185 0, // WACC_HIRC:sub_eq
8186 0, // WACC_HIRC:sub_fp0
8187 0, // WACC_HIRC:sub_fp1
8188 0, // WACC_HIRC:sub_gp8_x0
8189 0, // WACC_HIRC:sub_gp8_x1
8190 0, // WACC_HIRC:sub_gt
8191 0, // WACC_HIRC:sub_lt
8192 0, // WACC_HIRC:sub_pair0
8193 0, // WACC_HIRC:sub_pair1
8194 0, // WACC_HIRC:sub_un
8195 0, // WACC_HIRC:sub_vsx0
8196 0, // WACC_HIRC:sub_vsx1
8197 0, // WACC_HIRC:sub_wacc_hi
8198 0, // WACC_HIRC:sub_wacc_lo
8199 0, // WACC_HIRC:sub_vsx1_then_sub_64
8200 0, // WACC_HIRC:sub_vsx1_then_sub_64_hi_phony
8201 0, // WACC_HIRC:sub_pair1_then_sub_64
8202 0, // WACC_HIRC:sub_pair1_then_sub_64_hi_phony
8203 0, // WACC_HIRC:sub_pair1_then_sub_vsx0
8204 0, // WACC_HIRC:sub_pair1_then_sub_vsx1
8205 0, // WACC_HIRC:sub_pair1_then_sub_vsx1_then_sub_64
8206 0, // WACC_HIRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8207 29, // WACC_HIRC:sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8208 29, // WACC_HIRC:sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8209 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrow0
8210 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrow1
8211 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrowp0
8212 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrowp1
8213 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8214 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8215 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrow0
8216 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrow1
8217 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrowp0
8218 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrowp1
8219 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi
8220 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_lo
8221 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8222 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8223 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8224 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8225 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8226 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8227 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8228 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8229 0, // WACC_HIRC:sub_gp8_x1_then_sub_32
8230 },
8231 { // ACCRC_with_sub_64_in_SPILLTOVSRRC
8232 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_32
8233 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
8234 26, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_F4RC
8235 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
8236 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
8237 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
8238 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
8239 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
8240 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
8241 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
8242 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
8243 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
8244 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
8245 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
8246 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
8247 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
8248 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
8249 46, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8250 43, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1 -> VSRpRC_with_sub_64_in_F4RC
8251 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_un
8252 38, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8253 38, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8254 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
8255 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
8256 26, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8257 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
8258 19, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64 -> F8RC
8259 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
8260 33, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0 -> VSLRC
8261 33, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1 -> VSLRC
8262 19, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64 -> F8RC
8263 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8264 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
8265 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
8266 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
8267 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
8268 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
8269 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
8270 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8271 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8272 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
8273 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
8274 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
8275 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
8276 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
8277 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
8278 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8279 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8280 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8281 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8282 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8283 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8284 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8285 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8286 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
8287 },
8288 { // UACCRC_with_sub_64_in_SPILLTOVSRRC
8289 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_32
8290 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
8291 26, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_F4RC
8292 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
8293 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
8294 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
8295 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
8296 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
8297 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
8298 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
8299 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
8300 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
8301 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
8302 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
8303 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
8304 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
8305 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
8306 46, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8307 43, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1 -> VSRpRC_with_sub_64_in_F4RC
8308 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_un
8309 38, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8310 38, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8311 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
8312 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
8313 26, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8314 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
8315 19, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64 -> F8RC
8316 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
8317 33, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0 -> VSLRC
8318 33, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1 -> VSLRC
8319 19, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64 -> F8RC
8320 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8321 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
8322 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
8323 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
8324 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
8325 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
8326 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
8327 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8328 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8329 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
8330 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
8331 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
8332 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
8333 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
8334 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
8335 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8336 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8337 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8338 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8339 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8340 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8341 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8342 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8343 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
8344 },
8345 { // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
8346 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_32
8347 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
8348 26, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_F4RC
8349 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
8350 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr0
8351 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1
8352 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
8353 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
8354 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
8355 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
8356 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_eq
8357 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_fp0
8358 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_fp1
8359 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
8360 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
8361 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gt
8362 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_lt
8363 46, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8364 46, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8365 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_un
8366 38, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8367 38, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8368 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
8369 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
8370 26, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8371 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
8372 26, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8373 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
8374 38, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8375 38, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8376 26, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8377 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8378 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
8379 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
8380 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
8381 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
8382 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
8383 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
8384 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8385 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8386 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
8387 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
8388 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
8389 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
8390 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
8391 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
8392 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8393 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8394 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8395 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8396 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8397 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8398 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8399 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8400 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
8401 },
8402 { // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
8403 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_32
8404 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
8405 26, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_F4RC
8406 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
8407 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr0
8408 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1
8409 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
8410 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
8411 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
8412 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
8413 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_eq
8414 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_fp0
8415 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_fp1
8416 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
8417 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
8418 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gt
8419 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_lt
8420 46, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8421 46, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8422 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_un
8423 38, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8424 38, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8425 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
8426 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
8427 26, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8428 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
8429 26, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8430 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
8431 38, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8432 38, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8433 26, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8434 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8435 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
8436 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
8437 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
8438 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
8439 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
8440 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
8441 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8442 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8443 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
8444 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
8445 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
8446 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
8447 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
8448 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
8449 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8450 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8451 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8452 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8453 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8454 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8455 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8456 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8457 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
8458 },
8459 { // DMRRC
8460 0, // DMRRC:sub_32
8461 0, // DMRRC:sub_32_hi_phony
8462 0, // DMRRC:sub_64
8463 0, // DMRRC:sub_64_hi_phony
8464 0, // DMRRC:sub_dmr0
8465 0, // DMRRC:sub_dmr1
8466 29, // DMRRC:sub_dmrrow0 -> DMRROWRC
8467 29, // DMRRC:sub_dmrrow1 -> DMRROWRC
8468 40, // DMRRC:sub_dmrrowp0 -> DMRROWpRC
8469 40, // DMRRC:sub_dmrrowp1 -> DMRROWpRC
8470 0, // DMRRC:sub_eq
8471 0, // DMRRC:sub_fp0
8472 0, // DMRRC:sub_fp1
8473 0, // DMRRC:sub_gp8_x0
8474 0, // DMRRC:sub_gp8_x1
8475 0, // DMRRC:sub_gt
8476 0, // DMRRC:sub_lt
8477 0, // DMRRC:sub_pair0
8478 0, // DMRRC:sub_pair1
8479 0, // DMRRC:sub_un
8480 0, // DMRRC:sub_vsx0
8481 0, // DMRRC:sub_vsx1
8482 50, // DMRRC:sub_wacc_hi -> WACC_HIRC
8483 49, // DMRRC:sub_wacc_lo -> WACCRC
8484 0, // DMRRC:sub_vsx1_then_sub_64
8485 0, // DMRRC:sub_vsx1_then_sub_64_hi_phony
8486 0, // DMRRC:sub_pair1_then_sub_64
8487 0, // DMRRC:sub_pair1_then_sub_64_hi_phony
8488 0, // DMRRC:sub_pair1_then_sub_vsx0
8489 0, // DMRRC:sub_pair1_then_sub_vsx1
8490 0, // DMRRC:sub_pair1_then_sub_vsx1_then_sub_64
8491 0, // DMRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8492 29, // DMRRC:sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8493 29, // DMRRC:sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8494 29, // DMRRC:sub_wacc_hi_then_sub_dmrrow0 -> DMRROWRC
8495 29, // DMRRC:sub_wacc_hi_then_sub_dmrrow1 -> DMRROWRC
8496 40, // DMRRC:sub_wacc_hi_then_sub_dmrrowp0 -> DMRROWpRC
8497 40, // DMRRC:sub_wacc_hi_then_sub_dmrrowp1 -> DMRROWpRC
8498 29, // DMRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8499 29, // DMRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8500 0, // DMRRC:sub_dmr1_then_sub_dmrrow0
8501 0, // DMRRC:sub_dmr1_then_sub_dmrrow1
8502 0, // DMRRC:sub_dmr1_then_sub_dmrrowp0
8503 0, // DMRRC:sub_dmr1_then_sub_dmrrowp1
8504 0, // DMRRC:sub_dmr1_then_sub_wacc_hi
8505 0, // DMRRC:sub_dmr1_then_sub_wacc_lo
8506 0, // DMRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8507 0, // DMRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8508 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8509 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8510 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8511 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8512 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8513 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8514 0, // DMRRC:sub_gp8_x1_then_sub_32
8515 },
8516 { // DMRpRC
8517 0, // DMRpRC:sub_32
8518 0, // DMRpRC:sub_32_hi_phony
8519 0, // DMRpRC:sub_64
8520 0, // DMRpRC:sub_64_hi_phony
8521 55, // DMRpRC:sub_dmr0 -> DMRRC
8522 55, // DMRpRC:sub_dmr1 -> DMRRC
8523 29, // DMRpRC:sub_dmrrow0 -> DMRROWRC
8524 29, // DMRpRC:sub_dmrrow1 -> DMRROWRC
8525 40, // DMRpRC:sub_dmrrowp0 -> DMRROWpRC
8526 40, // DMRpRC:sub_dmrrowp1 -> DMRROWpRC
8527 0, // DMRpRC:sub_eq
8528 0, // DMRpRC:sub_fp0
8529 0, // DMRpRC:sub_fp1
8530 0, // DMRpRC:sub_gp8_x0
8531 0, // DMRpRC:sub_gp8_x1
8532 0, // DMRpRC:sub_gt
8533 0, // DMRpRC:sub_lt
8534 0, // DMRpRC:sub_pair0
8535 0, // DMRpRC:sub_pair1
8536 0, // DMRpRC:sub_un
8537 0, // DMRpRC:sub_vsx0
8538 0, // DMRpRC:sub_vsx1
8539 50, // DMRpRC:sub_wacc_hi -> WACC_HIRC
8540 49, // DMRpRC:sub_wacc_lo -> WACCRC
8541 0, // DMRpRC:sub_vsx1_then_sub_64
8542 0, // DMRpRC:sub_vsx1_then_sub_64_hi_phony
8543 0, // DMRpRC:sub_pair1_then_sub_64
8544 0, // DMRpRC:sub_pair1_then_sub_64_hi_phony
8545 0, // DMRpRC:sub_pair1_then_sub_vsx0
8546 0, // DMRpRC:sub_pair1_then_sub_vsx1
8547 0, // DMRpRC:sub_pair1_then_sub_vsx1_then_sub_64
8548 0, // DMRpRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8549 29, // DMRpRC:sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8550 29, // DMRpRC:sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8551 29, // DMRpRC:sub_wacc_hi_then_sub_dmrrow0 -> DMRROWRC
8552 29, // DMRpRC:sub_wacc_hi_then_sub_dmrrow1 -> DMRROWRC
8553 40, // DMRpRC:sub_wacc_hi_then_sub_dmrrowp0 -> DMRROWpRC
8554 40, // DMRpRC:sub_wacc_hi_then_sub_dmrrowp1 -> DMRROWpRC
8555 29, // DMRpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8556 29, // DMRpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8557 29, // DMRpRC:sub_dmr1_then_sub_dmrrow0 -> DMRROWRC
8558 29, // DMRpRC:sub_dmr1_then_sub_dmrrow1 -> DMRROWRC
8559 40, // DMRpRC:sub_dmr1_then_sub_dmrrowp0 -> DMRROWpRC
8560 40, // DMRpRC:sub_dmr1_then_sub_dmrrowp1 -> DMRROWpRC
8561 50, // DMRpRC:sub_dmr1_then_sub_wacc_hi -> WACC_HIRC
8562 49, // DMRpRC:sub_dmr1_then_sub_wacc_lo -> WACCRC
8563 29, // DMRpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8564 29, // DMRpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8565 29, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0 -> DMRROWRC
8566 29, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1 -> DMRROWRC
8567 40, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0 -> DMRROWpRC
8568 40, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1 -> DMRROWpRC
8569 29, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8570 29, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8571 0, // DMRpRC:sub_gp8_x1_then_sub_32
8572 },
8573
8574 };
8575 assert(RC && "Missing regclass");
8576 if (!Idx) return RC;
8577 --Idx;
8578 assert(Idx < 55 && "Bad subreg");
8579 unsigned TV = Table[RC->getID()][Idx];
8580 return TV ? getRegClass(i: TV - 1) : nullptr;
8581}/// Get the weight in units of pressure for this register class.
8582const RegClassWeight &PPCGenRegisterInfo::
8583getRegClassWeight(const TargetRegisterClass *RC) const {
8584 static const RegClassWeight RCWeightTable[] = {
8585 {.RegWeight: 1, .WeightLimit: 64}, // VSSRC
8586 {.RegWeight: 1, .WeightLimit: 34}, // GPRC
8587 {.RegWeight: 1, .WeightLimit: 34}, // GPRC_NOR0
8588 {.RegWeight: 1, .WeightLimit: 33}, // GPRC_and_GPRC_NOR0
8589 {.RegWeight: 1, .WeightLimit: 32}, // CRBITRC
8590 {.RegWeight: 1, .WeightLimit: 32}, // F4RC
8591 {.RegWeight: 0, .WeightLimit: 0}, // GPRC32
8592 {.RegWeight: 4, .WeightLimit: 32}, // CRRC
8593 {.RegWeight: 0, .WeightLimit: 0}, // CARRYRC
8594 {.RegWeight: 0, .WeightLimit: 0}, // CTRRC
8595 {.RegWeight: 0, .WeightLimit: 0}, // LRRC
8596 {.RegWeight: 1, .WeightLimit: 1}, // VRSAVERC
8597 {.RegWeight: 1, .WeightLimit: 68}, // SPILLTOVSRRC
8598 {.RegWeight: 1, .WeightLimit: 64}, // VSFRC
8599 {.RegWeight: 1, .WeightLimit: 34}, // G8RC
8600 {.RegWeight: 1, .WeightLimit: 34}, // G8RC_NOX0
8601 {.RegWeight: 1, .WeightLimit: 34}, // SPILLTOVSRRC_and_VSFRC
8602 {.RegWeight: 1, .WeightLimit: 33}, // G8RC_and_G8RC_NOX0
8603 {.RegWeight: 1, .WeightLimit: 32}, // F8RC
8604 {.RegWeight: 0, .WeightLimit: 0}, // FHRC
8605 {.RegWeight: 1, .WeightLimit: 32}, // SPERC
8606 {.RegWeight: 0, .WeightLimit: 0}, // VFHRC
8607 {.RegWeight: 1, .WeightLimit: 32}, // VFRC
8608 {.RegWeight: 1, .WeightLimit: 31}, // SPERC_with_sub_32_in_GPRC_NOR0
8609 {.RegWeight: 1, .WeightLimit: 20}, // SPILLTOVSRRC_and_VFRC
8610 {.RegWeight: 1, .WeightLimit: 14}, // SPILLTOVSRRC_and_F4RC
8611 {.RegWeight: 0, .WeightLimit: 0}, // CTRRC8
8612 {.RegWeight: 0, .WeightLimit: 0}, // LR8RC
8613 {.RegWeight: 1, .WeightLimit: 64}, // DMRROWRC
8614 {.RegWeight: 1, .WeightLimit: 64}, // VSRC
8615 {.RegWeight: 1, .WeightLimit: 34}, // VSRC_with_sub_64_in_SPILLTOVSRRC
8616 {.RegWeight: 1, .WeightLimit: 32}, // VRRC
8617 {.RegWeight: 1, .WeightLimit: 32}, // VSLRC
8618 {.RegWeight: 1, .WeightLimit: 20}, // VRRC_with_sub_64_in_SPILLTOVSRRC
8619 {.RegWeight: 2, .WeightLimit: 32}, // FpRC
8620 {.RegWeight: 2, .WeightLimit: 32}, // G8pRC
8621 {.RegWeight: 2, .WeightLimit: 30}, // G8pRC_with_sub_32_in_GPRC_NOR0
8622 {.RegWeight: 1, .WeightLimit: 14}, // VSLRC_with_sub_64_in_SPILLTOVSRRC
8623 {.RegWeight: 2, .WeightLimit: 14}, // FpRC_with_sub_fp0_in_SPILLTOVSRRC
8624 {.RegWeight: 2, .WeightLimit: 64}, // DMRROWpRC
8625 {.RegWeight: 2, .WeightLimit: 64}, // VSRpRC
8626 {.RegWeight: 2, .WeightLimit: 34}, // VSRpRC_with_sub_64_in_SPILLTOVSRRC
8627 {.RegWeight: 2, .WeightLimit: 32}, // VSRpRC_with_sub_64_in_F4RC
8628 {.RegWeight: 2, .WeightLimit: 32}, // VSRpRC_with_sub_64_in_VFRC
8629 {.RegWeight: 2, .WeightLimit: 20}, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
8630 {.RegWeight: 2, .WeightLimit: 14}, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8631 {.RegWeight: 4, .WeightLimit: 32}, // ACCRC
8632 {.RegWeight: 4, .WeightLimit: 32}, // UACCRC
8633 {.RegWeight: 4, .WeightLimit: 32}, // WACCRC
8634 {.RegWeight: 4, .WeightLimit: 32}, // WACC_HIRC
8635 {.RegWeight: 4, .WeightLimit: 16}, // ACCRC_with_sub_64_in_SPILLTOVSRRC
8636 {.RegWeight: 4, .WeightLimit: 16}, // UACCRC_with_sub_64_in_SPILLTOVSRRC
8637 {.RegWeight: 4, .WeightLimit: 12}, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
8638 {.RegWeight: 4, .WeightLimit: 12}, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
8639 {.RegWeight: 8, .WeightLimit: 64}, // DMRRC
8640 {.RegWeight: 16, .WeightLimit: 64}, // DMRpRC
8641 };
8642 return RCWeightTable[RC->getID()];
8643}
8644
8645/// Get the weight in units of pressure for this register unit.
8646unsigned PPCGenRegisterInfo::
8647getRegUnitWeight(MCRegUnit RegUnit) const {
8648 assert(static_cast<unsigned>(RegUnit) < 335 && "invalid register unit");
8649 // All register units have unit weight.
8650 return 1;
8651}
8652
8653
8654// Get the number of dimensions of register pressure.
8655unsigned PPCGenRegisterInfo::getNumRegPressureSets() const {
8656 return 19;
8657}
8658
8659// Get the name of this register unit pressure set.
8660const char *PPCGenRegisterInfo::
8661getRegPressureSetName(unsigned Idx) const {
8662 static const char *PressureNameTable[] = {
8663 "VRSAVERC",
8664 "SPILLTOVSRRC_and_F4RC",
8665 "SPILLTOVSRRC_and_VFRC",
8666 "CRBITRC",
8667 "F4RC",
8668 "VFRC",
8669 "WACCRC",
8670 "WACC_HIRC",
8671 "GPRC",
8672 "SPILLTOVSRRC_and_VSFRC",
8673 "SPILLTOVSRRC_and_VSFRC_with_VFRC",
8674 "F4RC_with_SPILLTOVSRRC_and_VSFRC",
8675 "VSSRC",
8676 "DMRROWRC",
8677 "SPILLTOVSRRC",
8678 "SPILLTOVSRRC_with_SPILLTOVSRRC_and_F4RC",
8679 "SPILLTOVSRRC_with_VFRC",
8680 "F4RC_with_SPILLTOVSRRC",
8681 "VSSRC_with_SPILLTOVSRRC",
8682 };
8683 return PressureNameTable[Idx];
8684}
8685
8686// Get the register unit pressure limit for this dimension.
8687// This limit must be adjusted dynamically for reserved registers.
8688unsigned PPCGenRegisterInfo::
8689getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const {
8690 static const uint8_t PressureLimitTable[] = {
8691 1, // 0: VRSAVERC
8692 16, // 1: SPILLTOVSRRC_and_F4RC
8693 20, // 2: SPILLTOVSRRC_and_VFRC
8694 32, // 3: CRBITRC
8695 32, // 4: F4RC
8696 32, // 5: VFRC
8697 32, // 6: WACCRC
8698 32, // 7: WACC_HIRC
8699 35, // 8: GPRC
8700 36, // 9: SPILLTOVSRRC_and_VSFRC
8701 46, // 10: SPILLTOVSRRC_and_VSFRC_with_VFRC
8702 52, // 11: F4RC_with_SPILLTOVSRRC_and_VSFRC
8703 64, // 12: VSSRC
8704 64, // 13: DMRROWRC
8705 69, // 14: SPILLTOVSRRC
8706 70, // 15: SPILLTOVSRRC_with_SPILLTOVSRRC_and_F4RC
8707 80, // 16: SPILLTOVSRRC_with_VFRC
8708 86, // 17: F4RC_with_SPILLTOVSRRC
8709 98, // 18: VSSRC_with_SPILLTOVSRRC
8710 };
8711 return PressureLimitTable[Idx];
8712}
8713
8714/// Table of pressure sets per register class or unit.
8715static const int RCSetsTable[] = {
8716 /* 0 */ 0, -1,
8717 /* 2 */ 3, -1,
8718 /* 4 */ 6, 13, -1,
8719 /* 7 */ 7, 13, -1,
8720 /* 10 */ 8, 14, -1,
8721 /* 13 */ 12, 18, -1,
8722 /* 16 */ 5, 10, 12, 16, 18, -1,
8723 /* 22 */ 4, 11, 12, 17, 18, -1,
8724 /* 28 */ 1, 4, 9, 11, 12, 15, 17, 18, -1,
8725 /* 37 */ 8, 14, 15, 16, 17, 18, -1,
8726 /* 44 */ 1, 4, 9, 10, 11, 12, 14, 15, 16, 17, 18, -1,
8727 /* 56 */ 2, 5, 9, 10, 11, 12, 14, 15, 16, 17, 18, -1,
8728};
8729
8730/// Get the dimensions of register pressure impacted by this register class.
8731/// Returns a -1 terminated array of pressure set IDs
8732const int *PPCGenRegisterInfo::
8733getRegClassPressureSets(const TargetRegisterClass *RC) const {
8734 static const uint8_t RCSetStartTable[] = {
8735 13,37,10,37,2,22,1,2,1,1,1,0,38,13,37,10,46,37,22,1,37,1,16,37,56,44,1,1,5,13,46,16,22,56,22,37,37,44,44,5,13,46,22,16,56,44,22,22,4,7,28,28,44,44,5,5,};
8736 return &RCSetsTable[RCSetStartTable[RC->getID()]];
8737}
8738
8739/// Get the dimensions of register pressure impacted by this register unit.
8740/// Returns a -1 terminated array of pressure set IDs
8741const int *PPCGenRegisterInfo::
8742getRegUnitPressureSets(MCRegUnit RegUnit) const {
8743 assert(static_cast<unsigned>(RegUnit) < 335 && "invalid register unit");
8744 static const uint8_t RUSetStartTable[] = {
8745 37,1,1,1,1,37,1,1,1,1,0,1,10,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,28,1,28,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,1,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,};
8746 return &RCSetsTable[RUSetStartTable[static_cast<unsigned>(RegUnit)]];
8747}
8748
8749extern const MCRegisterDesc PPCRegDesc[];
8750extern const int16_t PPCRegDiffLists[];
8751extern const LaneBitmask PPCLaneMaskLists[];
8752extern const char PPCRegStrings[];
8753extern const char PPCRegClassStrings[];
8754extern const MCPhysReg PPCRegUnitRoots[][2];
8755extern const uint16_t PPCSubRegIdxLists[];
8756extern const uint16_t PPCRegEncodingTable[];
8757// PPC Dwarf<->LLVM register mappings.
8758extern const MCRegisterInfo::DwarfLLVMRegPair PPCDwarfFlavour0Dwarf2L[];
8759extern const unsigned PPCDwarfFlavour0Dwarf2LSize;
8760
8761extern const MCRegisterInfo::DwarfLLVMRegPair PPCDwarfFlavour1Dwarf2L[];
8762extern const unsigned PPCDwarfFlavour1Dwarf2LSize;
8763
8764extern const MCRegisterInfo::DwarfLLVMRegPair PPCEHFlavour0Dwarf2L[];
8765extern const unsigned PPCEHFlavour0Dwarf2LSize;
8766
8767extern const MCRegisterInfo::DwarfLLVMRegPair PPCEHFlavour1Dwarf2L[];
8768extern const unsigned PPCEHFlavour1Dwarf2LSize;
8769
8770extern const MCRegisterInfo::DwarfLLVMRegPair PPCDwarfFlavour0L2Dwarf[];
8771extern const unsigned PPCDwarfFlavour0L2DwarfSize;
8772
8773extern const MCRegisterInfo::DwarfLLVMRegPair PPCDwarfFlavour1L2Dwarf[];
8774extern const unsigned PPCDwarfFlavour1L2DwarfSize;
8775
8776extern const MCRegisterInfo::DwarfLLVMRegPair PPCEHFlavour0L2Dwarf[];
8777extern const unsigned PPCEHFlavour0L2DwarfSize;
8778
8779extern const MCRegisterInfo::DwarfLLVMRegPair PPCEHFlavour1L2Dwarf[];
8780extern const unsigned PPCEHFlavour1L2DwarfSize;
8781
8782
8783PPCGenRegisterInfo::
8784PPCGenRegisterInfo(unsigned RA, unsigned DwarfFlavour, unsigned EHFlavour,
8785 unsigned PC, unsigned HwMode)
8786 : TargetRegisterInfo(&PPCRegInfoDesc, RegisterClasses, RegisterClasses+56,
8787 PPCSubRegIndexStrings, PPCSubRegIndexNameOffsets,
8788 SubRegIdxRangeTable, SubRegIndexLaneMaskTable,
8789
8790 LaneBitmask(0xFFFFFFFE00000002), RegClassInfos, VTLists, HwMode) {
8791 InitMCRegisterInfo(D: PPCRegDesc, NR: 612, RA, PC,
8792 C: PPCMCRegisterClasses, NC: 56,
8793 RURoots: PPCRegUnitRoots,
8794 NRU: 335,
8795 DL: PPCRegDiffLists,
8796 RUMS: PPCLaneMaskLists,
8797 Strings: PPCRegStrings,
8798 ClassStrings: PPCRegClassStrings,
8799 SubIndices: PPCSubRegIdxLists,
8800 NumIndices: 56,
8801 RET: PPCRegEncodingTable,
8802 RUI: nullptr);
8803
8804 switch (DwarfFlavour) {
8805 default:
8806 llvm_unreachable("Unknown DWARF flavour");
8807 case 0:
8808 mapDwarfRegsToLLVMRegs(Map: PPCDwarfFlavour0Dwarf2L, Size: PPCDwarfFlavour0Dwarf2LSize, isEH: false);
8809 break;
8810 case 1:
8811 mapDwarfRegsToLLVMRegs(Map: PPCDwarfFlavour1Dwarf2L, Size: PPCDwarfFlavour1Dwarf2LSize, isEH: false);
8812 break;
8813 }
8814 switch (EHFlavour) {
8815 default:
8816 llvm_unreachable("Unknown DWARF flavour");
8817 case 0:
8818 mapDwarfRegsToLLVMRegs(Map: PPCEHFlavour0Dwarf2L, Size: PPCEHFlavour0Dwarf2LSize, isEH: true);
8819 break;
8820 case 1:
8821 mapDwarfRegsToLLVMRegs(Map: PPCEHFlavour1Dwarf2L, Size: PPCEHFlavour1Dwarf2LSize, isEH: true);
8822 break;
8823 }
8824 switch (DwarfFlavour) {
8825 default:
8826 llvm_unreachable("Unknown DWARF flavour");
8827 case 0:
8828 mapLLVMRegsToDwarfRegs(Map: PPCDwarfFlavour0L2Dwarf, Size: PPCDwarfFlavour0L2DwarfSize, isEH: false);
8829 break;
8830 case 1:
8831 mapLLVMRegsToDwarfRegs(Map: PPCDwarfFlavour1L2Dwarf, Size: PPCDwarfFlavour1L2DwarfSize, isEH: false);
8832 break;
8833 }
8834 switch (EHFlavour) {
8835 default:
8836 llvm_unreachable("Unknown DWARF flavour");
8837 case 0:
8838 mapLLVMRegsToDwarfRegs(Map: PPCEHFlavour0L2Dwarf, Size: PPCEHFlavour0L2DwarfSize, isEH: true);
8839 break;
8840 case 1:
8841 mapLLVMRegsToDwarfRegs(Map: PPCEHFlavour1L2Dwarf, Size: PPCEHFlavour1L2DwarfSize, isEH: true);
8842 break;
8843 }
8844}
8845
8846static const MCPhysReg CSR_64_AllRegs_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, 0 };
8847static const uint32_t CSR_64_AllRegs_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0x000001ff, 0x00000000, 0xc8000000, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
8848static const MCPhysReg CSR_64_AllRegs_AIX_Dflt_Altivec_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, 0 };
8849static const uint32_t CSR_64_AllRegs_AIX_Dflt_Altivec_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0x000001ff, 0x00000000, 0xc8000000, 0x07fffe3f, 0x00000000, 0x007ffff8, 0x007ffff8, 0x007ffff8, 0x00000000, 0x00000000, 0x00000000, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
8850static const MCPhysReg CSR_64_AllRegs_AIX_Dflt_VSX_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSL0, PPC::VSL1, PPC::VSL2, PPC::VSL3, PPC::VSL4, PPC::VSL5, PPC::VSL6, PPC::VSL7, PPC::VSL8, PPC::VSL9, PPC::VSL10, PPC::VSL11, PPC::VSL12, PPC::VSL13, PPC::VSL14, PPC::VSL15, PPC::VSL16, PPC::VSL17, PPC::VSL18, PPC::VSL19, 0 };
8851static const uint32_t CSR_64_AllRegs_AIX_Dflt_VSX_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0x1fffffff, 0x00000000, 0xc8000000, 0x07fffe3f, 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0x007fffff, 0x00000000, 0x00000000, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
8852static const MCPhysReg CSR_64_AllRegs_Altivec_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8853static const uint32_t CSR_64_AllRegs_Altivec_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0x000001ff, 0x00000000, 0xc8000000, 0x07fffe3f, 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0x00000007, 0x00000000, 0x00000000, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
8854static const MCPhysReg CSR_64_AllRegs_VSRP_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSL0, PPC::VSL1, PPC::VSL2, PPC::VSL3, PPC::VSL4, PPC::VSL5, PPC::VSL6, PPC::VSL7, PPC::VSL8, PPC::VSL9, PPC::VSL10, PPC::VSL11, PPC::VSL12, PPC::VSL13, PPC::VSL14, PPC::VSL15, PPC::VSL16, PPC::VSL17, PPC::VSL18, PPC::VSL19, PPC::VSL20, PPC::VSL21, PPC::VSL22, PPC::VSL23, PPC::VSL24, PPC::VSL25, PPC::VSL26, PPC::VSL27, PPC::VSL28, PPC::VSL29, PPC::VSL30, PPC::VSL31, PPC::VSRp0, PPC::VSRp1, PPC::VSRp2, PPC::VSRp3, PPC::VSRp4, PPC::VSRp5, PPC::VSRp6, PPC::VSRp7, PPC::VSRp8, PPC::VSRp9, PPC::VSRp10, PPC::VSRp11, PPC::VSRp12, PPC::VSRp13, PPC::VSRp14, PPC::VSRp15, PPC::VSRp16, PPC::VSRp17, PPC::VSRp18, PPC::VSRp19, PPC::VSRp20, PPC::VSRp21, PPC::VSRp22, PPC::VSRp23, PPC::VSRp24, PPC::VSRp25, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8855static const uint32_t CSR_64_AllRegs_VSRP_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0xc8000000, 0x07fffe3f, 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000007, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
8856static const MCPhysReg CSR_64_AllRegs_VSX_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSL0, PPC::VSL1, PPC::VSL2, PPC::VSL3, PPC::VSL4, PPC::VSL5, PPC::VSL6, PPC::VSL7, PPC::VSL8, PPC::VSL9, PPC::VSL10, PPC::VSL11, PPC::VSL12, PPC::VSL13, PPC::VSL14, PPC::VSL15, PPC::VSL16, PPC::VSL17, PPC::VSL18, PPC::VSL19, PPC::VSL20, PPC::VSL21, PPC::VSL22, PPC::VSL23, PPC::VSL24, PPC::VSL25, PPC::VSL26, PPC::VSL27, PPC::VSL28, PPC::VSL29, PPC::VSL30, PPC::VSL31, 0 };
8857static const uint32_t CSR_64_AllRegs_VSX_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0xc8000000, 0x07fffe3f, 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000007, 0x00000000, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
8858static const MCPhysReg CSR_AIX32_SaveList[] = { PPC::R13, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, 0 };
8859static const uint32_t CSR_AIX32_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07ffff00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8860static const MCPhysReg CSR_AIX32_Altivec_SaveList[] = { PPC::R13, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8861static const uint32_t CSR_AIX32_Altivec_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07ffff00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8862static const MCPhysReg CSR_AIX32_VSRP_SaveList[] = { PPC::R13, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8863static const uint32_t CSR_AIX32_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07ffff00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8864static const MCPhysReg CSR_AIX64_R2_VSRP_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, PPC::X2, 0 };
8865static const uint32_t CSR_AIX64_R2_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x20000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00200000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8866static const MCPhysReg CSR_AIX64_VSRP_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8867static const uint32_t CSR_AIX64_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00000000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8868static const MCPhysReg CSR_ALL_VSRP_SaveList[] = { PPC::VSRp0, PPC::VSRp1, PPC::VSRp2, PPC::VSRp3, PPC::VSRp4, PPC::VSRp5, PPC::VSRp6, PPC::VSRp7, PPC::VSRp8, PPC::VSRp9, PPC::VSRp10, PPC::VSRp11, PPC::VSRp12, PPC::VSRp13, PPC::VSRp14, PPC::VSRp15, PPC::VSRp16, PPC::VSRp17, PPC::VSRp18, PPC::VSRp19, PPC::VSRp20, PPC::VSRp21, PPC::VSRp22, PPC::VSRp23, PPC::VSRp24, PPC::VSRp25, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8869static const uint32_t CSR_ALL_VSRP_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0x00000000, 0x00000000, 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000007, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
8870static const MCPhysReg CSR_Altivec_SaveList[] = { PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8871static const uint32_t CSR_Altivec_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
8872static const MCPhysReg CSR_NoRegs_SaveList[] = { 0 };
8873static const uint32_t CSR_NoRegs_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
8874static const MCPhysReg CSR_PPC64_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, 0 };
8875static const uint32_t CSR_PPC64_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8876static const MCPhysReg CSR_PPC64_Altivec_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8877static const uint32_t CSR_PPC64_Altivec_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8878static const MCPhysReg CSR_PPC64_R2_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::X2, 0 };
8879static const uint32_t CSR_PPC64_R2_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x20000000, 0x07fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8880static const MCPhysReg CSR_PPC64_R2_Altivec_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::X2, 0 };
8881static const uint32_t CSR_PPC64_R2_Altivec_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x20000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0x00000000, 0x00000000, 0x00200000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8882static const MCPhysReg CSR_SPE_SaveList[] = { PPC::S14, PPC::S15, PPC::S16, PPC::S17, PPC::S18, PPC::S19, PPC::S20, PPC::S21, PPC::S22, PPC::S23, PPC::S24, PPC::S25, PPC::S26, PPC::S27, PPC::S28, PPC::S29, PPC::S30, 0 };
8883static const uint32_t CSR_SPE_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01ffff00, 0x03fffe00, 0x03fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
8884static const MCPhysReg CSR_SPE_NO_S30_31_SaveList[] = { PPC::S14, PPC::S15, PPC::S16, PPC::S17, PPC::S18, PPC::S19, PPC::S20, PPC::S21, PPC::S22, PPC::S23, PPC::S24, PPC::S25, PPC::S26, PPC::S27, PPC::S28, PPC::S29, 0 };
8885static const uint32_t CSR_SPE_NO_S30_31_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00ffff00, 0x01fffe00, 0x01fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
8886static const MCPhysReg CSR_SVR32_ColdCC_SaveList[] = { PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, 0 };
8887static const uint32_t CSR_SVR32_ColdCC_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0x80000000, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff80000, 0x000fffff, 0x00000000, };
8888static const MCPhysReg CSR_SVR32_ColdCC_Altivec_SaveList[] = { PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::V0, PPC::V1, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8889static const uint32_t CSR_SVR32_ColdCC_Altivec_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0x80000000, 0x07fffe3f, 0x00000000, 0xffffffd8, 0xffffffdf, 0xffffffdf, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0xfff80000, 0x000fffff, 0x00000000, };
8890static const MCPhysReg CSR_SVR32_ColdCC_Common_SaveList[] = { PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, 0 };
8891static const uint32_t CSR_SVR32_ColdCC_Common_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff80000, 0x000fffff, 0x00000000, };
8892static const MCPhysReg CSR_SVR32_ColdCC_SPE_SaveList[] = { PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::S4, PPC::S5, PPC::S6, PPC::S7, PPC::S8, PPC::S9, PPC::S10, PPC::S14, PPC::S15, PPC::S16, PPC::S17, PPC::S18, PPC::S19, PPC::S20, PPC::S21, PPC::S22, PPC::S23, PPC::S24, PPC::S25, PPC::S26, PPC::S27, PPC::S28, PPC::S29, PPC::S30, PPC::S31, 0 };
8893static const uint32_t CSR_SVR32_ColdCC_SPE_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc0000000, 0x83ffff1f, 0x87fffe3f, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff80000, 0x000fffff, 0x00000000, };
8894static const MCPhysReg CSR_SVR32_ColdCC_VSRP_SaveList[] = { PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::V0, PPC::V1, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp0, PPC::VSRp1, PPC::VSRp2, PPC::VSRp3, PPC::VSRp4, PPC::VSRp5, PPC::VSRp6, PPC::VSRp7, PPC::VSRp8, PPC::VSRp9, PPC::VSRp10, PPC::VSRp11, PPC::VSRp12, PPC::VSRp13, PPC::VSRp14, PPC::VSRp15, PPC::VSRp16, PPC::VSRp18, PPC::VSRp19, PPC::VSRp20, PPC::VSRp21, PPC::VSRp22, PPC::VSRp23, PPC::VSRp24, PPC::VSRp25, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8895static const uint32_t CSR_SVR32_ColdCC_VSRP_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0x80000000, 0x07fffe3f, 0x00000000, 0xffffffd8, 0xffffffdf, 0xffffffdf, 0xffffffff, 0xffefffff, 0x00000007, 0x00000000, 0xfff80000, 0x000fffff, 0x00000000, };
8896static const MCPhysReg CSR_SVR64_ColdCC_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, 0 };
8897static const uint32_t CSR_SVR64_ColdCC_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0x80000000, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3f800000, 0xfffffffe, 0x000fffff, 0x00000000, };
8898static const MCPhysReg CSR_SVR64_ColdCC_Altivec_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8899static const uint32_t CSR_SVR64_ColdCC_Altivec_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0x80000000, 0x07fffe3f, 0x00000000, 0xffffffd8, 0xffffffdf, 0xffffffdf, 0x00000007, 0x00000000, 0x00000000, 0x3f800000, 0xfffffffe, 0x000fffff, 0x00000000, };
8900static const MCPhysReg CSR_SVR64_ColdCC_R2_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::X2, 0 };
8901static const uint32_t CSR_SVR64_ColdCC_R2_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0xa0000000, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3fa00000, 0xfffffffe, 0x000fffff, 0x00000000, };
8902static const MCPhysReg CSR_SVR64_ColdCC_R2_Altivec_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::X2, 0 };
8903static const uint32_t CSR_SVR64_ColdCC_R2_Altivec_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0xa0000000, 0x07fffe3f, 0x00000000, 0xffffffd8, 0xffffffdf, 0xffffffdf, 0x00000007, 0x00000000, 0x00000000, 0x3fa00000, 0xfffffffe, 0x000fffff, 0x00000000, };
8904static const MCPhysReg CSR_SVR64_ColdCC_R2_VSRP_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::VSRp0, PPC::VSRp1, PPC::VSRp2, PPC::VSRp3, PPC::VSRp4, PPC::VSRp5, PPC::VSRp6, PPC::VSRp7, PPC::VSRp8, PPC::VSRp9, PPC::VSRp10, PPC::VSRp11, PPC::VSRp12, PPC::VSRp13, PPC::VSRp14, PPC::VSRp15, PPC::VSRp16, PPC::VSRp18, PPC::VSRp19, PPC::VSRp20, PPC::VSRp21, PPC::VSRp22, PPC::VSRp23, PPC::VSRp24, PPC::VSRp25, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, PPC::X2, 0 };
8905static const uint32_t CSR_SVR64_ColdCC_R2_VSRP_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0xa0000000, 0x07fffe3f, 0x00000000, 0xffffff98, 0xffffff9f, 0xffffff9f, 0xffffffff, 0xffefffff, 0x00000007, 0x3fa00000, 0xfffffffe, 0x000fffff, 0x00000000, };
8906static const MCPhysReg CSR_SVR64_ColdCC_VSRP_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::VSRp0, PPC::VSRp1, PPC::VSRp2, PPC::VSRp3, PPC::VSRp4, PPC::VSRp5, PPC::VSRp6, PPC::VSRp7, PPC::VSRp8, PPC::VSRp9, PPC::VSRp10, PPC::VSRp11, PPC::VSRp12, PPC::VSRp13, PPC::VSRp14, PPC::VSRp15, PPC::VSRp16, PPC::VSRp18, PPC::VSRp19, PPC::VSRp20, PPC::VSRp21, PPC::VSRp22, PPC::VSRp23, PPC::VSRp24, PPC::VSRp25, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8907static const uint32_t CSR_SVR64_ColdCC_VSRP_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0x80000000, 0x07fffe3f, 0x00000000, 0xffffff98, 0xffffff9f, 0xffffff9f, 0xffffffff, 0xffefffff, 0x00000007, 0x3f800000, 0xfffffffe, 0x000fffff, 0x00000000, };
8908static const MCPhysReg CSR_SVR432_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, 0 };
8909static const uint32_t CSR_SVR432_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8910static const MCPhysReg CSR_SVR432_Altivec_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8911static const uint32_t CSR_SVR432_Altivec_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8912static const MCPhysReg CSR_SVR432_COMM_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, 0 };
8913static const uint32_t CSR_SVR432_COMM_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8914static const MCPhysReg CSR_SVR432_SPE_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::S14, PPC::S15, PPC::S16, PPC::S17, PPC::S18, PPC::S19, PPC::S20, PPC::S21, PPC::S22, PPC::S23, PPC::S24, PPC::S25, PPC::S26, PPC::S27, PPC::S28, PPC::S29, PPC::S30, 0 };
8915static const uint32_t CSR_SVR432_SPE_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01ffff00, 0x07fffe00, 0x03fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8916static const MCPhysReg CSR_SVR432_SPE_NO_S30_31_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::S14, PPC::S15, PPC::S16, PPC::S17, PPC::S18, PPC::S19, PPC::S20, PPC::S21, PPC::S22, PPC::S23, PPC::S24, PPC::S25, PPC::S26, PPC::S27, PPC::S28, PPC::S29, 0 };
8917static const uint32_t CSR_SVR432_SPE_NO_S30_31_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00ffff00, 0x07fffe00, 0x01fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8918static const MCPhysReg CSR_SVR432_VSRP_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8919static const uint32_t CSR_SVR432_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8920static const MCPhysReg CSR_SVR464_R2_VSRP_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, PPC::X2, 0 };
8921static const uint32_t CSR_SVR464_R2_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x20000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00200000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8922static const MCPhysReg CSR_SVR464_VSRP_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8923static const uint32_t CSR_SVR464_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00000000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8924static const MCPhysReg CSR_VSRP_SaveList[] = { PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8925static const uint32_t CSR_VSRP_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
8926
8927
8928ArrayRef<const uint32_t *> PPCGenRegisterInfo::getRegMasks() const {
8929 static const uint32_t *const Masks[] = {
8930 CSR_64_AllRegs_RegMask,
8931 CSR_64_AllRegs_AIX_Dflt_Altivec_RegMask,
8932 CSR_64_AllRegs_AIX_Dflt_VSX_RegMask,
8933 CSR_64_AllRegs_Altivec_RegMask,
8934 CSR_64_AllRegs_VSRP_RegMask,
8935 CSR_64_AllRegs_VSX_RegMask,
8936 CSR_AIX32_RegMask,
8937 CSR_AIX32_Altivec_RegMask,
8938 CSR_AIX32_VSRP_RegMask,
8939 CSR_AIX64_R2_VSRP_RegMask,
8940 CSR_AIX64_VSRP_RegMask,
8941 CSR_ALL_VSRP_RegMask,
8942 CSR_Altivec_RegMask,
8943 CSR_NoRegs_RegMask,
8944 CSR_PPC64_RegMask,
8945 CSR_PPC64_Altivec_RegMask,
8946 CSR_PPC64_R2_RegMask,
8947 CSR_PPC64_R2_Altivec_RegMask,
8948 CSR_SPE_RegMask,
8949 CSR_SPE_NO_S30_31_RegMask,
8950 CSR_SVR32_ColdCC_RegMask,
8951 CSR_SVR32_ColdCC_Altivec_RegMask,
8952 CSR_SVR32_ColdCC_Common_RegMask,
8953 CSR_SVR32_ColdCC_SPE_RegMask,
8954 CSR_SVR32_ColdCC_VSRP_RegMask,
8955 CSR_SVR64_ColdCC_RegMask,
8956 CSR_SVR64_ColdCC_Altivec_RegMask,
8957 CSR_SVR64_ColdCC_R2_RegMask,
8958 CSR_SVR64_ColdCC_R2_Altivec_RegMask,
8959 CSR_SVR64_ColdCC_R2_VSRP_RegMask,
8960 CSR_SVR64_ColdCC_VSRP_RegMask,
8961 CSR_SVR432_RegMask,
8962 CSR_SVR432_Altivec_RegMask,
8963 CSR_SVR432_COMM_RegMask,
8964 CSR_SVR432_SPE_RegMask,
8965 CSR_SVR432_SPE_NO_S30_31_RegMask,
8966 CSR_SVR432_VSRP_RegMask,
8967 CSR_SVR464_R2_VSRP_RegMask,
8968 CSR_SVR464_VSRP_RegMask,
8969 CSR_VSRP_RegMask,
8970 };
8971 return ArrayRef(Masks);
8972}
8973
8974bool PPCGenRegisterInfo::
8975isGeneralPurposeRegister(const MachineFunction &MF, MCRegister PhysReg) const {
8976 return
8977 false;
8978}
8979
8980bool PPCGenRegisterInfo::
8981isGeneralPurposeRegisterClass(const TargetRegisterClass *RC) const {
8982 return
8983 false;
8984}
8985
8986bool PPCGenRegisterInfo::
8987isFixedRegister(const MachineFunction &MF, MCRegister PhysReg) const {
8988 return
8989 false;
8990}
8991
8992bool PPCGenRegisterInfo::
8993isArgumentRegister(const MachineFunction &MF, MCRegister PhysReg) const {
8994 return
8995 false;
8996}
8997
8998bool PPCGenRegisterInfo::
8999isConstantPhysReg(MCRegister PhysReg) const {
9000 return
9001 PhysReg == PPC::ZERO ||
9002 PhysReg == PPC::ZERO8 ||
9003 false;
9004}
9005
9006ArrayRef<const char *> PPCGenRegisterInfo::getRegMaskNames() const {
9007 static const char *Names[] = {
9008 "CSR_64_AllRegs",
9009 "CSR_64_AllRegs_AIX_Dflt_Altivec",
9010 "CSR_64_AllRegs_AIX_Dflt_VSX",
9011 "CSR_64_AllRegs_Altivec",
9012 "CSR_64_AllRegs_VSRP",
9013 "CSR_64_AllRegs_VSX",
9014 "CSR_AIX32",
9015 "CSR_AIX32_Altivec",
9016 "CSR_AIX32_VSRP",
9017 "CSR_AIX64_R2_VSRP",
9018 "CSR_AIX64_VSRP",
9019 "CSR_ALL_VSRP",
9020 "CSR_Altivec",
9021 "CSR_NoRegs",
9022 "CSR_PPC64",
9023 "CSR_PPC64_Altivec",
9024 "CSR_PPC64_R2",
9025 "CSR_PPC64_R2_Altivec",
9026 "CSR_SPE",
9027 "CSR_SPE_NO_S30_31",
9028 "CSR_SVR32_ColdCC",
9029 "CSR_SVR32_ColdCC_Altivec",
9030 "CSR_SVR32_ColdCC_Common",
9031 "CSR_SVR32_ColdCC_SPE",
9032 "CSR_SVR32_ColdCC_VSRP",
9033 "CSR_SVR64_ColdCC",
9034 "CSR_SVR64_ColdCC_Altivec",
9035 "CSR_SVR64_ColdCC_R2",
9036 "CSR_SVR64_ColdCC_R2_Altivec",
9037 "CSR_SVR64_ColdCC_R2_VSRP",
9038 "CSR_SVR64_ColdCC_VSRP",
9039 "CSR_SVR432",
9040 "CSR_SVR432_Altivec",
9041 "CSR_SVR432_COMM",
9042 "CSR_SVR432_SPE",
9043 "CSR_SVR432_SPE_NO_S30_31",
9044 "CSR_SVR432_VSRP",
9045 "CSR_SVR464_R2_VSRP",
9046 "CSR_SVR464_VSRP",
9047 "CSR_VSRP",
9048 };
9049 return ArrayRef(Names);
9050}
9051
9052const PPCFrameLowering *
9053PPCGenRegisterInfo::getFrameLowering(const MachineFunction &MF) {
9054 return static_cast<const PPCFrameLowering *>(
9055 MF.getSubtarget().getFrameLowering());
9056}
9057
9058
9059} // namespace llvm
9060