1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target Register and Register Classes Information *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9namespace llvm {
10
11extern const MCRegisterClass PPCMCRegisterClasses[];
12
13static const MVT::SimpleValueType PPCVTLists[] = {
14 /* 0 */ MVT::i1, MVT::Other,
15 /* 2 */ MVT::i32, MVT::Other,
16 /* 4 */ MVT::i64, MVT::Other,
17 /* 6 */ MVT::i32, MVT::f32, MVT::Other,
18 /* 9 */ MVT::i64, MVT::f64, MVT::Other,
19 /* 12 */ MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v1i128, MVT::v4f32, MVT::v2f64, MVT::f128, MVT::Other,
20 /* 21 */ MVT::ppcf128, MVT::Other,
21 /* 23 */ MVT::v128i1, MVT::Other,
22 /* 25 */ MVT::v256i1, MVT::Other,
23 /* 27 */ MVT::v512i1, MVT::Other,
24 /* 29 */ MVT::v1024i1, MVT::Other,
25 /* 31 */ MVT::v2048i1, MVT::Other,
26 /* 33 */ MVT::v4i32, MVT::v4f32, MVT::v2f64, MVT::v2i64, MVT::Other,
27 /* 38 */ MVT::Untyped, MVT::Other,
28};
29
30#ifdef __GNUC__
31#pragma GCC diagnostic push
32#pragma GCC diagnostic ignored "-Woverlength-strings"
33#endif
34static constexpr char PPCSubRegIndexStrings[] = {
35 /* 0 */ "sub_fp0\000"
36 /* 8 */ "sub_dmr1_then_sub_dmrrowp0\000"
37 /* 35 */ "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0\000"
38 /* 79 */ "sub_pair0\000"
39 /* 89 */ "sub_dmr0\000"
40 /* 98 */ "sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0\000"
41 /* 142 */ "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0\000"
42 /* 203 */ "sub_dmr1_then_sub_dmrrow0\000"
43 /* 229 */ "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0\000"
44 /* 272 */ "sub_gp8_x0\000"
45 /* 283 */ "sub_pair1_then_sub_vsx0\000"
46 /* 307 */ "sub_fp1\000"
47 /* 315 */ "sub_dmr1_then_sub_dmrrowp1\000"
48 /* 342 */ "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1\000"
49 /* 386 */ "sub_pair1\000"
50 /* 396 */ "sub_dmr1\000"
51 /* 405 */ "sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1\000"
52 /* 449 */ "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1\000"
53 /* 510 */ "sub_dmr1_then_sub_dmrrow1\000"
54 /* 536 */ "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1\000"
55 /* 579 */ "sub_gp8_x1\000"
56 /* 590 */ "sub_pair1_then_sub_vsx1\000"
57 /* 614 */ "sub_gp8_x1_then_sub_32\000"
58 /* 637 */ "sub_pair1_then_sub_64\000"
59 /* 659 */ "sub_pair1_then_sub_vsx1_then_sub_64\000"
60 /* 695 */ "sub_dmr1_then_sub_wacc_hi\000"
61 /* 721 */ "sub_un\000"
62 /* 728 */ "sub_dmr1_then_sub_wacc_lo\000"
63 /* 754 */ "sub_eq\000"
64 /* 761 */ "sub_gt\000"
65 /* 768 */ "sub_lt\000"
66 /* 775 */ "sub_32_hi_phony\000"
67 /* 791 */ "sub_pair1_then_sub_64_hi_phony\000"
68 /* 822 */ "sub_pair1_then_sub_vsx1_then_sub_64_hi_phony\000"
69};
70#ifdef __GNUC__
71#pragma GCC diagnostic pop
72#endif
73
74
75static constexpr uint32_t PPCSubRegIndexNameOffsets[] = {
76 630,
77 775,
78 652,
79 806,
80 89,
81 396,
82 130,
83 437,
84 22,
85 329,
86 754,
87 0,
88 307,
89 272,
90 579,
91 761,
92 768,
93 79,
94 386,
95 721,
96 298,
97 605,
98 709,
99 742,
100 674,
101 837,
102 637,
103 791,
104 283,
105 590,
106 659,
107 822,
108 112,
109 419,
110 243,
111 550,
112 49,
113 356,
114 156,
115 463,
116 203,
117 510,
118 8,
119 315,
120 695,
121 728,
122 98,
123 405,
124 229,
125 536,
126 35,
127 342,
128 142,
129 449,
130 614,
131};
132
133static const TargetRegisterInfo::SubRegCoveredBits PPCSubRegIdxRangeTable[] = {
134 { .Offset: 4294967295, .Size: 4294967295 },
135 { .Offset: 0, .Size: 32 }, // sub_32
136 { .Offset: 32, .Size: 32 }, // sub_32_hi_phony
137 { .Offset: 0, .Size: 64 }, // sub_64
138 { .Offset: 64, .Size: 64 }, // sub_64_hi_phony
139 { .Offset: 0, .Size: 1024 }, // sub_dmr0
140 { .Offset: 1024, .Size: 1024 }, // sub_dmr1
141 { .Offset: 0, .Size: 128 }, // sub_dmrrow0
142 { .Offset: 128, .Size: 128 }, // sub_dmrrow1
143 { .Offset: 0, .Size: 256 }, // sub_dmrrowp0
144 { .Offset: 256, .Size: 256 }, // sub_dmrrowp1
145 { .Offset: 2, .Size: 1 }, // sub_eq
146 { .Offset: 0, .Size: 64 }, // sub_fp0
147 { .Offset: 64, .Size: 64 }, // sub_fp1
148 { .Offset: 0, .Size: 64 }, // sub_gp8_x0
149 { .Offset: 64, .Size: 64 }, // sub_gp8_x1
150 { .Offset: 1, .Size: 1 }, // sub_gt
151 { .Offset: 0, .Size: 1 }, // sub_lt
152 { .Offset: 0, .Size: 256 }, // sub_pair0
153 { .Offset: 256, .Size: 256 }, // sub_pair1
154 { .Offset: 3, .Size: 1 }, // sub_un
155 { .Offset: 0, .Size: 128 }, // sub_vsx0
156 { .Offset: 128, .Size: 128 }, // sub_vsx1
157 { .Offset: 512, .Size: 512 }, // sub_wacc_hi
158 { .Offset: 0, .Size: 512 }, // sub_wacc_lo
159 { .Offset: 128, .Size: 64 }, // sub_vsx1_then_sub_64
160 { .Offset: 192, .Size: 64 }, // sub_vsx1_then_sub_64_hi_phony
161 { .Offset: 256, .Size: 64 }, // sub_pair1_then_sub_64
162 { .Offset: 320, .Size: 64 }, // sub_pair1_then_sub_64_hi_phony
163 { .Offset: 256, .Size: 128 }, // sub_pair1_then_sub_vsx0
164 { .Offset: 384, .Size: 128 }, // sub_pair1_then_sub_vsx1
165 { .Offset: 384, .Size: 64 }, // sub_pair1_then_sub_vsx1_then_sub_64
166 { .Offset: 448, .Size: 64 }, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
167 { .Offset: 256, .Size: 128 }, // sub_dmrrowp1_then_sub_dmrrow0
168 { .Offset: 384, .Size: 128 }, // sub_dmrrowp1_then_sub_dmrrow1
169 { .Offset: 512, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrow0
170 { .Offset: 640, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrow1
171 { .Offset: 512, .Size: 256 }, // sub_wacc_hi_then_sub_dmrrowp0
172 { .Offset: 768, .Size: 256 }, // sub_wacc_hi_then_sub_dmrrowp1
173 { .Offset: 768, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
174 { .Offset: 896, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
175 { .Offset: 1024, .Size: 128 }, // sub_dmr1_then_sub_dmrrow0
176 { .Offset: 1152, .Size: 128 }, // sub_dmr1_then_sub_dmrrow1
177 { .Offset: 1024, .Size: 256 }, // sub_dmr1_then_sub_dmrrowp0
178 { .Offset: 1280, .Size: 256 }, // sub_dmr1_then_sub_dmrrowp1
179 { .Offset: 1536, .Size: 512 }, // sub_dmr1_then_sub_wacc_hi
180 { .Offset: 1024, .Size: 512 }, // sub_dmr1_then_sub_wacc_lo
181 { .Offset: 1280, .Size: 128 }, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
182 { .Offset: 1408, .Size: 128 }, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
183 { .Offset: 1536, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
184 { .Offset: 1664, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
185 { .Offset: 1536, .Size: 256 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
186 { .Offset: 1792, .Size: 256 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
187 { .Offset: 1792, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
188 { .Offset: 1920, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
189 { .Offset: 64, .Size: 32 }, // sub_gp8_x1_then_sub_32
190 { .Offset: 4294967295, .Size: 4294967295 },
191 { .Offset: 0, .Size: 32 }, // sub_32
192 { .Offset: 32, .Size: 32 }, // sub_32_hi_phony
193 { .Offset: 0, .Size: 64 }, // sub_64
194 { .Offset: 64, .Size: 64 }, // sub_64_hi_phony
195 { .Offset: 0, .Size: 1024 }, // sub_dmr0
196 { .Offset: 1024, .Size: 1024 }, // sub_dmr1
197 { .Offset: 0, .Size: 128 }, // sub_dmrrow0
198 { .Offset: 128, .Size: 128 }, // sub_dmrrow1
199 { .Offset: 0, .Size: 256 }, // sub_dmrrowp0
200 { .Offset: 256, .Size: 256 }, // sub_dmrrowp1
201 { .Offset: 2, .Size: 1 }, // sub_eq
202 { .Offset: 0, .Size: 64 }, // sub_fp0
203 { .Offset: 64, .Size: 64 }, // sub_fp1
204 { .Offset: 0, .Size: 64 }, // sub_gp8_x0
205 { .Offset: 64, .Size: 64 }, // sub_gp8_x1
206 { .Offset: 1, .Size: 1 }, // sub_gt
207 { .Offset: 0, .Size: 1 }, // sub_lt
208 { .Offset: 0, .Size: 256 }, // sub_pair0
209 { .Offset: 256, .Size: 256 }, // sub_pair1
210 { .Offset: 3, .Size: 1 }, // sub_un
211 { .Offset: 0, .Size: 128 }, // sub_vsx0
212 { .Offset: 128, .Size: 128 }, // sub_vsx1
213 { .Offset: 512, .Size: 512 }, // sub_wacc_hi
214 { .Offset: 0, .Size: 512 }, // sub_wacc_lo
215 { .Offset: 128, .Size: 64 }, // sub_vsx1_then_sub_64
216 { .Offset: 192, .Size: 64 }, // sub_vsx1_then_sub_64_hi_phony
217 { .Offset: 256, .Size: 64 }, // sub_pair1_then_sub_64
218 { .Offset: 320, .Size: 64 }, // sub_pair1_then_sub_64_hi_phony
219 { .Offset: 256, .Size: 128 }, // sub_pair1_then_sub_vsx0
220 { .Offset: 384, .Size: 128 }, // sub_pair1_then_sub_vsx1
221 { .Offset: 384, .Size: 64 }, // sub_pair1_then_sub_vsx1_then_sub_64
222 { .Offset: 448, .Size: 64 }, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
223 { .Offset: 256, .Size: 128 }, // sub_dmrrowp1_then_sub_dmrrow0
224 { .Offset: 384, .Size: 128 }, // sub_dmrrowp1_then_sub_dmrrow1
225 { .Offset: 512, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrow0
226 { .Offset: 640, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrow1
227 { .Offset: 512, .Size: 256 }, // sub_wacc_hi_then_sub_dmrrowp0
228 { .Offset: 768, .Size: 256 }, // sub_wacc_hi_then_sub_dmrrowp1
229 { .Offset: 768, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
230 { .Offset: 896, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
231 { .Offset: 1024, .Size: 128 }, // sub_dmr1_then_sub_dmrrow0
232 { .Offset: 1152, .Size: 128 }, // sub_dmr1_then_sub_dmrrow1
233 { .Offset: 1024, .Size: 256 }, // sub_dmr1_then_sub_dmrrowp0
234 { .Offset: 1280, .Size: 256 }, // sub_dmr1_then_sub_dmrrowp1
235 { .Offset: 1536, .Size: 512 }, // sub_dmr1_then_sub_wacc_hi
236 { .Offset: 1024, .Size: 512 }, // sub_dmr1_then_sub_wacc_lo
237 { .Offset: 1280, .Size: 128 }, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
238 { .Offset: 1408, .Size: 128 }, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
239 { .Offset: 1536, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
240 { .Offset: 1664, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
241 { .Offset: 1536, .Size: 256 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
242 { .Offset: 1792, .Size: 256 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
243 { .Offset: 1792, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
244 { .Offset: 1920, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
245 { .Offset: 64, .Size: 32 }, // sub_gp8_x1_then_sub_32
246};
247
248
249static const LaneBitmask PPCSubRegIndexLaneMaskTable[] = {
250 LaneBitmask::getAll(),
251 LaneBitmask(0x0000000000000001), // sub_32
252 LaneBitmask(0x0000000000000002), // sub_32_hi_phony
253 LaneBitmask(0x0000000000000004), // sub_64
254 LaneBitmask(0x0000000000000008), // sub_64_hi_phony
255 LaneBitmask(0x0000000000FC0030), // sub_dmr0
256 LaneBitmask(0x00000000FF000000), // sub_dmr1
257 LaneBitmask(0x0000000000000010), // sub_dmrrow0
258 LaneBitmask(0x0000000000000020), // sub_dmrrow1
259 LaneBitmask(0x0000000000000030), // sub_dmrrowp0
260 LaneBitmask(0x00000000000C0000), // sub_dmrrowp1
261 LaneBitmask(0x0000000000000040), // sub_eq
262 LaneBitmask(0x0000000000000080), // sub_fp0
263 LaneBitmask(0x0000000000000100), // sub_fp1
264 LaneBitmask(0x0000000000000001), // sub_gp8_x0
265 LaneBitmask(0x0000000100000000), // sub_gp8_x1
266 LaneBitmask(0x0000000000000200), // sub_gt
267 LaneBitmask(0x0000000000000400), // sub_lt
268 LaneBitmask(0x000000000000300C), // sub_pair0
269 LaneBitmask(0x000000000003C000), // sub_pair1
270 LaneBitmask(0x0000000000000800), // sub_un
271 LaneBitmask(0x000000000000000C), // sub_vsx0
272 LaneBitmask(0x0000000000003000), // sub_vsx1
273 LaneBitmask(0x0000000000F00000), // sub_wacc_hi
274 LaneBitmask(0x00000000000C0030), // sub_wacc_lo
275 LaneBitmask(0x0000000000001000), // sub_vsx1_then_sub_64
276 LaneBitmask(0x0000000000002000), // sub_vsx1_then_sub_64_hi_phony
277 LaneBitmask(0x0000000000004000), // sub_pair1_then_sub_64
278 LaneBitmask(0x0000000000008000), // sub_pair1_then_sub_64_hi_phony
279 LaneBitmask(0x000000000000C000), // sub_pair1_then_sub_vsx0
280 LaneBitmask(0x0000000000030000), // sub_pair1_then_sub_vsx1
281 LaneBitmask(0x0000000000010000), // sub_pair1_then_sub_vsx1_then_sub_64
282 LaneBitmask(0x0000000000020000), // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
283 LaneBitmask(0x0000000000040000), // sub_dmrrowp1_then_sub_dmrrow0
284 LaneBitmask(0x0000000000080000), // sub_dmrrowp1_then_sub_dmrrow1
285 LaneBitmask(0x0000000000100000), // sub_wacc_hi_then_sub_dmrrow0
286 LaneBitmask(0x0000000000200000), // sub_wacc_hi_then_sub_dmrrow1
287 LaneBitmask(0x0000000000300000), // sub_wacc_hi_then_sub_dmrrowp0
288 LaneBitmask(0x0000000000C00000), // sub_wacc_hi_then_sub_dmrrowp1
289 LaneBitmask(0x0000000000400000), // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
290 LaneBitmask(0x0000000000800000), // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
291 LaneBitmask(0x0000000001000000), // sub_dmr1_then_sub_dmrrow0
292 LaneBitmask(0x0000000002000000), // sub_dmr1_then_sub_dmrrow1
293 LaneBitmask(0x0000000003000000), // sub_dmr1_then_sub_dmrrowp0
294 LaneBitmask(0x000000000C000000), // sub_dmr1_then_sub_dmrrowp1
295 LaneBitmask(0x00000000F0000000), // sub_dmr1_then_sub_wacc_hi
296 LaneBitmask(0x000000000F000000), // sub_dmr1_then_sub_wacc_lo
297 LaneBitmask(0x0000000004000000), // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
298 LaneBitmask(0x0000000008000000), // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
299 LaneBitmask(0x0000000010000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
300 LaneBitmask(0x0000000020000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
301 LaneBitmask(0x0000000030000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
302 LaneBitmask(0x00000000C0000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
303 LaneBitmask(0x0000000040000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
304 LaneBitmask(0x0000000080000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
305 LaneBitmask(0x0000000100000000), // sub_gp8_x1_then_sub_32
306 };
307
308
309
310static const TargetRegisterInfo::RegClassInfo PPCRegClassInfos[] = {
311 // Mode = 0 (DefaultMode)
312 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 7 }, // VSSRC
313 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 6 }, // GPRC
314 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 6 }, // GPRC_NOR0
315 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 6 }, // GPRC_and_GPRC_NOR0
316 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 0 }, // CRBITRC
317 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 7 }, // F4RC
318 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 6 }, // GPRC32
319 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 2 }, // CRRC
320 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 2 }, // CARRYRC
321 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 2 }, // CTRRC
322 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 2 }, // LRRC
323 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 2 }, // VRSAVERC
324 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 9 }, // SPILLTOVSRRC
325 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // VSFRC
326 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 4 }, // G8RC
327 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 4 }, // G8RC_NOX0
328 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_VSFRC
329 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 4 }, // G8RC_and_G8RC_NOX0
330 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // F8RC
331 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // FHRC
332 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // SPERC
333 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // VFHRC
334 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // VFRC
335 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // SPERC_with_sub_32_in_GPRC_NOR0
336 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_VFRC
337 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_F4RC
338 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 4 }, // CTRRC8
339 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 4 }, // LR8RC
340 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 23 }, // DMRROWRC
341 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 33 }, // VSRC
342 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 33 }, // VSRC_with_sub_64_in_SPILLTOVSRRC
343 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 12 }, // VRRC
344 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 33 }, // VSLRC
345 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 12 }, // VRRC_with_sub_64_in_SPILLTOVSRRC
346 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 21 }, // FpRC
347 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 38 }, // G8pRC
348 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 38 }, // G8pRC_with_sub_32_in_GPRC_NOR0
349 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 33 }, // VSLRC_with_sub_64_in_SPILLTOVSRRC
350 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 21 }, // FpRC_with_sub_fp0_in_SPILLTOVSRRC
351 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // DMRROWpRC
352 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC
353 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC
354 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_F4RC
355 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_VFRC
356 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
357 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
358 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // ACCRC
359 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // UACCRC
360 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // WACCRC
361 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // WACC_HIRC
362 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // ACCRC_with_sub_64_in_SPILLTOVSRRC
363 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // UACCRC_with_sub_64_in_SPILLTOVSRRC
364 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
365 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
366 { .RegSize: 1024, .SpillSize: 1024, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 29 }, // DMRRC
367 { .RegSize: 2048, .SpillSize: 2048, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 31 }, // DMRpRC
368 // Mode = 1 (PPC64)
369 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 7 }, // VSSRC
370 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 6 }, // GPRC
371 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 6 }, // GPRC_NOR0
372 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 6 }, // GPRC_and_GPRC_NOR0
373 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 0 }, // CRBITRC
374 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 7 }, // F4RC
375 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 6 }, // GPRC32
376 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 2 }, // CRRC
377 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 2 }, // CARRYRC
378 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 2 }, // CTRRC
379 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 2 }, // LRRC
380 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 2 }, // VRSAVERC
381 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 9 }, // SPILLTOVSRRC
382 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // VSFRC
383 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 4 }, // G8RC
384 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 4 }, // G8RC_NOX0
385 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_VSFRC
386 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 4 }, // G8RC_and_G8RC_NOX0
387 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // F8RC
388 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // FHRC
389 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // SPERC
390 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // VFHRC
391 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // VFRC
392 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // SPERC_with_sub_32_in_GPRC_NOR0
393 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_VFRC
394 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_F4RC
395 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 4 }, // CTRRC8
396 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 4 }, // LR8RC
397 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 23 }, // DMRROWRC
398 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 33 }, // VSRC
399 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 33 }, // VSRC_with_sub_64_in_SPILLTOVSRRC
400 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 12 }, // VRRC
401 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 33 }, // VSLRC
402 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 12 }, // VRRC_with_sub_64_in_SPILLTOVSRRC
403 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 21 }, // FpRC
404 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 38 }, // G8pRC
405 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 38 }, // G8pRC_with_sub_32_in_GPRC_NOR0
406 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 33 }, // VSLRC_with_sub_64_in_SPILLTOVSRRC
407 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 21 }, // FpRC_with_sub_fp0_in_SPILLTOVSRRC
408 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // DMRROWpRC
409 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC
410 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC
411 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_F4RC
412 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_VFRC
413 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
414 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
415 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // ACCRC
416 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // UACCRC
417 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // WACCRC
418 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // WACC_HIRC
419 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // ACCRC_with_sub_64_in_SPILLTOVSRRC
420 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // UACCRC_with_sub_64_in_SPILLTOVSRRC
421 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
422 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
423 { .RegSize: 1024, .SpillSize: 1024, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 29 }, // DMRRC
424 { .RegSize: 2048, .SpillSize: 2048, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 31 }, // DMRpRC
425};
426static const uint32_t VSSRCSubClassMask[] = {
427 0x03452021, 0x00000000,
428 0xe0000000, 0x003cff23, // sub_64
429 0x00000000, 0x00000044, // sub_fp0
430 0x00000000, 0x00000044, // sub_fp1
431 0x00000000, 0x003cff00, // sub_vsx1_then_sub_64
432 0x00000000, 0x003cc000, // sub_pair1_then_sub_64
433 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1_then_sub_64
434};
435
436static const uint32_t GPRCSubClassMask[] = {
437 0x0000000a, 0x00000000,
438 0x00924000, 0x00000018, // sub_32
439 0x00000000, 0x00000018, // sub_gp8_x1_then_sub_32
440};
441
442static const uint32_t GPRC_NOR0SubClassMask[] = {
443 0x0000000c, 0x00000000,
444 0x00828000, 0x00000010, // sub_32
445 0x00000000, 0x00000018, // sub_gp8_x1_then_sub_32
446};
447
448static const uint32_t GPRC_and_GPRC_NOR0SubClassMask[] = {
449 0x00000008, 0x00000000,
450 0x00820000, 0x00000010, // sub_32
451 0x00000000, 0x00000018, // sub_gp8_x1_then_sub_32
452};
453
454static const uint32_t CRBITRCSubClassMask[] = {
455 0x00000010, 0x00000000,
456 0x00000080, 0x00000000, // sub_eq
457 0x00000080, 0x00000000, // sub_gt
458 0x00000080, 0x00000000, // sub_lt
459 0x00000080, 0x00000000, // sub_un
460};
461
462static const uint32_t F4RCSubClassMask[] = {
463 0x02040020, 0x00000000,
464 0x00000000, 0x003ce421, // sub_64
465 0x00000000, 0x00000044, // sub_fp0
466 0x00000000, 0x00000044, // sub_fp1
467 0x00000000, 0x003ce400, // sub_vsx1_then_sub_64
468 0x00000000, 0x003cc000, // sub_pair1_then_sub_64
469 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1_then_sub_64
470};
471
472static const uint32_t GPRC32SubClassMask[] = {
473 0x00000040, 0x00000000,
474};
475
476static const uint32_t CRRCSubClassMask[] = {
477 0x00000080, 0x00000000,
478};
479
480static const uint32_t CARRYRCSubClassMask[] = {
481 0x00000100, 0x00000000,
482};
483
484static const uint32_t CTRRCSubClassMask[] = {
485 0x00000200, 0x00000000,
486};
487
488static const uint32_t LRRCSubClassMask[] = {
489 0x00000400, 0x00000000,
490};
491
492static const uint32_t VRSAVERCSubClassMask[] = {
493 0x00000800, 0x00000000,
494};
495
496static const uint32_t SPILLTOVSRRCSubClassMask[] = {
497 0x03035000, 0x00000000,
498 0x40000000, 0x003c3222, // sub_64
499 0x00000000, 0x00000040, // sub_fp0
500 0x00000000, 0x00000040, // sub_fp1
501 0x00000000, 0x00000018, // sub_gp8_x0
502 0x00000000, 0x00000018, // sub_gp8_x1
503 0x00000000, 0x003c3200, // sub_vsx1_then_sub_64
504 0x00000000, 0x00300000, // sub_pair1_then_sub_64
505 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx1_then_sub_64
506};
507
508static const uint32_t VSFRCSubClassMask[] = {
509 0x03452000, 0x00000000,
510 0xe0000000, 0x003cff23, // sub_64
511 0x00000000, 0x00000044, // sub_fp0
512 0x00000000, 0x00000044, // sub_fp1
513 0x00000000, 0x003cff00, // sub_vsx1_then_sub_64
514 0x00000000, 0x003cc000, // sub_pair1_then_sub_64
515 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1_then_sub_64
516};
517
518static const uint32_t G8RCSubClassMask[] = {
519 0x00024000, 0x00000000,
520 0x00000000, 0x00000018, // sub_gp8_x0
521 0x00000000, 0x00000018, // sub_gp8_x1
522};
523
524static const uint32_t G8RC_NOX0SubClassMask[] = {
525 0x00028000, 0x00000000,
526 0x00000000, 0x00000010, // sub_gp8_x0
527 0x00000000, 0x00000018, // sub_gp8_x1
528};
529
530static const uint32_t SPILLTOVSRRC_and_VSFRCSubClassMask[] = {
531 0x03010000, 0x00000000,
532 0x40000000, 0x003c3222, // sub_64
533 0x00000000, 0x00000040, // sub_fp0
534 0x00000000, 0x00000040, // sub_fp1
535 0x00000000, 0x003c3200, // sub_vsx1_then_sub_64
536 0x00000000, 0x00300000, // sub_pair1_then_sub_64
537 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx1_then_sub_64
538};
539
540static const uint32_t G8RC_and_G8RC_NOX0SubClassMask[] = {
541 0x00020000, 0x00000000,
542 0x00000000, 0x00000010, // sub_gp8_x0
543 0x00000000, 0x00000018, // sub_gp8_x1
544};
545
546static const uint32_t F8RCSubClassMask[] = {
547 0x02040000, 0x00000000,
548 0x00000000, 0x003ce421, // sub_64
549 0x00000000, 0x00000044, // sub_fp0
550 0x00000000, 0x00000044, // sub_fp1
551 0x00000000, 0x003ce400, // sub_vsx1_then_sub_64
552 0x00000000, 0x003cc000, // sub_pair1_then_sub_64
553 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1_then_sub_64
554};
555
556static const uint32_t FHRCSubClassMask[] = {
557 0x00080000, 0x00000000,
558};
559
560static const uint32_t SPERCSubClassMask[] = {
561 0x00900000, 0x00000000,
562};
563
564static const uint32_t VFHRCSubClassMask[] = {
565 0x00200000, 0x00000000,
566};
567
568static const uint32_t VFRCSubClassMask[] = {
569 0x01400000, 0x00000000,
570 0x80000000, 0x00001802, // sub_64
571 0x00000000, 0x00001800, // sub_vsx1_then_sub_64
572};
573
574static const uint32_t SPERC_with_sub_32_in_GPRC_NOR0SubClassMask[] = {
575 0x00800000, 0x00000000,
576};
577
578static const uint32_t SPILLTOVSRRC_and_VFRCSubClassMask[] = {
579 0x01000000, 0x00000000,
580 0x00000000, 0x00001002, // sub_64
581 0x00000000, 0x00001000, // sub_vsx1_then_sub_64
582};
583
584static const uint32_t SPILLTOVSRRC_and_F4RCSubClassMask[] = {
585 0x02000000, 0x00000000,
586 0x00000000, 0x003c2020, // sub_64
587 0x00000000, 0x00000040, // sub_fp0
588 0x00000000, 0x00000040, // sub_fp1
589 0x00000000, 0x003c2000, // sub_vsx1_then_sub_64
590 0x00000000, 0x00300000, // sub_pair1_then_sub_64
591 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx1_then_sub_64
592};
593
594static const uint32_t CTRRC8SubClassMask[] = {
595 0x04000000, 0x00000000,
596};
597
598static const uint32_t LR8RCSubClassMask[] = {
599 0x08000000, 0x00000000,
600};
601
602static const uint32_t DMRROWRCSubClassMask[] = {
603 0x10000000, 0x00000000,
604 0x00000000, 0x00c30080, // sub_dmrrow0
605 0x00000000, 0x00c30080, // sub_dmrrow1
606 0x00000000, 0x00c30000, // sub_dmrrowp1_then_sub_dmrrow0
607 0x00000000, 0x00c30000, // sub_dmrrowp1_then_sub_dmrrow1
608 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrow0
609 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrow1
610 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
611 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
612 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrow0
613 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrow1
614 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
615 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
616 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
617 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
618 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
619 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
620};
621
622static const uint32_t VSRCSubClassMask[] = {
623 0xe0000000, 0x00000023,
624 0x00000000, 0x003cff00, // sub_vsx0
625 0x00000000, 0x003cff00, // sub_vsx1
626 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx0
627 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1
628};
629
630static const uint32_t VSRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
631 0x40000000, 0x00000022,
632 0x00000000, 0x003c3200, // sub_vsx0
633 0x00000000, 0x003c3200, // sub_vsx1
634 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx0
635 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx1
636};
637
638static const uint32_t VRRCSubClassMask[] = {
639 0x80000000, 0x00000002,
640 0x00000000, 0x00001800, // sub_vsx0
641 0x00000000, 0x00001800, // sub_vsx1
642};
643
644static const uint32_t VSLRCSubClassMask[] = {
645 0x00000000, 0x00000021,
646 0x00000000, 0x003ce400, // sub_vsx0
647 0x00000000, 0x003ce400, // sub_vsx1
648 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx0
649 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1
650};
651
652static const uint32_t VRRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
653 0x00000000, 0x00000002,
654 0x00000000, 0x00001000, // sub_vsx0
655 0x00000000, 0x00001000, // sub_vsx1
656};
657
658static const uint32_t FpRCSubClassMask[] = {
659 0x00000000, 0x00000044,
660};
661
662static const uint32_t G8pRCSubClassMask[] = {
663 0x00000000, 0x00000018,
664};
665
666static const uint32_t G8pRC_with_sub_32_in_GPRC_NOR0SubClassMask[] = {
667 0x00000000, 0x00000010,
668};
669
670static const uint32_t VSLRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
671 0x00000000, 0x00000020,
672 0x00000000, 0x003c2000, // sub_vsx0
673 0x00000000, 0x003c2000, // sub_vsx1
674 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx0
675 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx1
676};
677
678static const uint32_t FpRC_with_sub_fp0_in_SPILLTOVSRRCSubClassMask[] = {
679 0x00000000, 0x00000040,
680};
681
682static const uint32_t DMRROWpRCSubClassMask[] = {
683 0x00000000, 0x00000080,
684 0x00000000, 0x00c30000, // sub_dmrrowp0
685 0x00000000, 0x00c30000, // sub_dmrrowp1
686 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrowp0
687 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrowp1
688 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrowp0
689 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrowp1
690 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
691 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
692};
693
694static const uint32_t VSRpRCSubClassMask[] = {
695 0x00000000, 0x00003f00,
696 0x00000000, 0x003cc000, // sub_pair0
697 0x00000000, 0x003cc000, // sub_pair1
698};
699
700static const uint32_t VSRpRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
701 0x00000000, 0x00003200,
702 0x00000000, 0x003c0000, // sub_pair0
703 0x00000000, 0x00300000, // sub_pair1
704};
705
706static const uint32_t VSRpRC_with_sub_64_in_F4RCSubClassMask[] = {
707 0x00000000, 0x00002400,
708 0x00000000, 0x003cc000, // sub_pair0
709 0x00000000, 0x003cc000, // sub_pair1
710};
711
712static const uint32_t VSRpRC_with_sub_64_in_VFRCSubClassMask[] = {
713 0x00000000, 0x00001800,
714};
715
716static const uint32_t VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCSubClassMask[] = {
717 0x00000000, 0x00001000,
718};
719
720static const uint32_t VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCSubClassMask[] = {
721 0x00000000, 0x00002000,
722 0x00000000, 0x003c0000, // sub_pair0
723 0x00000000, 0x00300000, // sub_pair1
724};
725
726static const uint32_t ACCRCSubClassMask[] = {
727 0x00000000, 0x00144000,
728};
729
730static const uint32_t UACCRCSubClassMask[] = {
731 0x00000000, 0x00288000,
732};
733
734static const uint32_t WACCRCSubClassMask[] = {
735 0x00000000, 0x00010000,
736 0x00000000, 0x00c00000, // sub_wacc_lo
737 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_lo
738};
739
740static const uint32_t WACC_HIRCSubClassMask[] = {
741 0x00000000, 0x00020000,
742 0x00000000, 0x00c00000, // sub_wacc_hi
743 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi
744};
745
746static const uint32_t ACCRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
747 0x00000000, 0x00140000,
748};
749
750static const uint32_t UACCRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
751 0x00000000, 0x00280000,
752};
753
754static const uint32_t ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
755 0x00000000, 0x00100000,
756};
757
758static const uint32_t UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
759 0x00000000, 0x00200000,
760};
761
762static const uint32_t DMRRCSubClassMask[] = {
763 0x00000000, 0x00400000,
764 0x00000000, 0x00800000, // sub_dmr0
765 0x00000000, 0x00800000, // sub_dmr1
766};
767
768static const uint32_t DMRpRCSubClassMask[] = {
769 0x00000000, 0x00800000,
770};
771
772static const uint16_t SuperRegIdxSeqs[] = {
773 /* 0 */ 5, 6, 0,
774 /* 3 */ 14, 15, 0,
775 /* 6 */ 18, 19, 0,
776 /* 9 */ 11, 16, 17, 20, 0,
777 /* 14 */ 21, 22, 0,
778 /* 17 */ 3, 25, 0,
779 /* 20 */ 21, 22, 29, 30, 0,
780 /* 25 */ 3, 12, 13, 25, 27, 31, 0,
781 /* 32 */ 3, 12, 13, 14, 15, 25, 27, 31, 0,
782 /* 41 */ 23, 45, 0,
783 /* 44 */ 24, 46, 0,
784 /* 47 */ 9, 10, 37, 38, 43, 44, 51, 52, 0,
785 /* 56 */ 7, 8, 33, 34, 35, 36, 39, 40, 41, 42, 47, 48, 49, 50, 53, 54, 0,
786 /* 73 */ 1, 55, 0,
787};
788
789static unsigned const GPRC_and_GPRC_NOR0Superclasses[] = {
790 PPC::GPRCRegClassID,
791 PPC::GPRC_NOR0RegClassID,
792};
793
794static unsigned const F4RCSuperclasses[] = {
795 PPC::VSSRCRegClassID,
796};
797
798static unsigned const VSFRCSuperclasses[] = {
799 PPC::VSSRCRegClassID,
800};
801
802static unsigned const G8RCSuperclasses[] = {
803 PPC::SPILLTOVSRRCRegClassID,
804};
805
806static unsigned const SPILLTOVSRRC_and_VSFRCSuperclasses[] = {
807 PPC::VSSRCRegClassID,
808 PPC::SPILLTOVSRRCRegClassID,
809 PPC::VSFRCRegClassID,
810};
811
812static unsigned const G8RC_and_G8RC_NOX0Superclasses[] = {
813 PPC::SPILLTOVSRRCRegClassID,
814 PPC::G8RCRegClassID,
815 PPC::G8RC_NOX0RegClassID,
816};
817
818static unsigned const F8RCSuperclasses[] = {
819 PPC::VSSRCRegClassID,
820 PPC::F4RCRegClassID,
821 PPC::VSFRCRegClassID,
822};
823
824static unsigned const VFRCSuperclasses[] = {
825 PPC::VSSRCRegClassID,
826 PPC::VSFRCRegClassID,
827};
828
829static unsigned const SPERC_with_sub_32_in_GPRC_NOR0Superclasses[] = {
830 PPC::SPERCRegClassID,
831};
832
833static unsigned const SPILLTOVSRRC_and_VFRCSuperclasses[] = {
834 PPC::VSSRCRegClassID,
835 PPC::SPILLTOVSRRCRegClassID,
836 PPC::VSFRCRegClassID,
837 PPC::SPILLTOVSRRC_and_VSFRCRegClassID,
838 PPC::VFRCRegClassID,
839};
840
841static unsigned const SPILLTOVSRRC_and_F4RCSuperclasses[] = {
842 PPC::VSSRCRegClassID,
843 PPC::F4RCRegClassID,
844 PPC::SPILLTOVSRRCRegClassID,
845 PPC::VSFRCRegClassID,
846 PPC::SPILLTOVSRRC_and_VSFRCRegClassID,
847 PPC::F8RCRegClassID,
848};
849
850static unsigned const VSRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
851 PPC::VSRCRegClassID,
852};
853
854static unsigned const VRRCSuperclasses[] = {
855 PPC::VSRCRegClassID,
856};
857
858static unsigned const VSLRCSuperclasses[] = {
859 PPC::VSRCRegClassID,
860};
861
862static unsigned const VRRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
863 PPC::VSRCRegClassID,
864 PPC::VSRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
865 PPC::VRRCRegClassID,
866};
867
868static unsigned const G8pRC_with_sub_32_in_GPRC_NOR0Superclasses[] = {
869 PPC::G8pRCRegClassID,
870};
871
872static unsigned const VSLRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
873 PPC::VSRCRegClassID,
874 PPC::VSRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
875 PPC::VSLRCRegClassID,
876};
877
878static unsigned const FpRC_with_sub_fp0_in_SPILLTOVSRRCSuperclasses[] = {
879 PPC::FpRCRegClassID,
880};
881
882static unsigned const VSRpRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
883 PPC::VSRpRCRegClassID,
884};
885
886static unsigned const VSRpRC_with_sub_64_in_F4RCSuperclasses[] = {
887 PPC::VSRpRCRegClassID,
888};
889
890static unsigned const VSRpRC_with_sub_64_in_VFRCSuperclasses[] = {
891 PPC::VSRpRCRegClassID,
892};
893
894static unsigned const VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCSuperclasses[] = {
895 PPC::VSRpRCRegClassID,
896 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
897 PPC::VSRpRC_with_sub_64_in_VFRCRegClassID,
898};
899
900static unsigned const VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCSuperclasses[] = {
901 PPC::VSRpRCRegClassID,
902 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
903 PPC::VSRpRC_with_sub_64_in_F4RCRegClassID,
904};
905
906static unsigned const ACCRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
907 PPC::ACCRCRegClassID,
908};
909
910static unsigned const UACCRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
911 PPC::UACCRCRegClassID,
912};
913
914static unsigned const ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
915 PPC::ACCRCRegClassID,
916 PPC::ACCRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
917};
918
919static unsigned const UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
920 PPC::UACCRCRegClassID,
921 PPC::UACCRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
922};
923
924
925static inline unsigned GPRCAltOrderSelect(const MachineFunction &MF, bool Rev) {
926 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
927 }
928
929static ArrayRef<MCPhysReg> GPRCGetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
930 static const MCPhysReg AltOrder1[] = { PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R31, PPC::R0, PPC::R1, PPC::FP, PPC::BP, PPC::R2 };
931 static const MCPhysReg AltOrder2[] = { PPC::R2, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R31, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R0, PPC::R1, PPC::FP, PPC::BP };
932 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::GPRCRegClassID];
933 const ArrayRef<MCPhysReg> Order[] = {
934 ArrayRef(MCR.begin(), MCR.getNumRegs()),
935 ArrayRef(AltOrder1),
936 ArrayRef(AltOrder2)
937 };
938 const unsigned Select = GPRCAltOrderSelect(MF, Rev);
939 assert(Select < 3);
940 return Order[Select];
941}
942
943static inline unsigned GPRC_NOR0AltOrderSelect(const MachineFunction &MF, bool Rev) {
944 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
945 }
946
947static ArrayRef<MCPhysReg> GPRC_NOR0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
948 static const MCPhysReg AltOrder1[] = { PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R31, PPC::R1, PPC::FP, PPC::BP, PPC::ZERO, PPC::R2 };
949 static const MCPhysReg AltOrder2[] = { PPC::R2, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R31, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R1, PPC::FP, PPC::BP, PPC::ZERO };
950 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::GPRC_NOR0RegClassID];
951 const ArrayRef<MCPhysReg> Order[] = {
952 ArrayRef(MCR.begin(), MCR.getNumRegs()),
953 ArrayRef(AltOrder1),
954 ArrayRef(AltOrder2)
955 };
956 const unsigned Select = GPRC_NOR0AltOrderSelect(MF, Rev);
957 assert(Select < 3);
958 return Order[Select];
959}
960
961static inline unsigned GPRC_and_GPRC_NOR0AltOrderSelect(const MachineFunction &MF, bool Rev) {
962 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
963 }
964
965static ArrayRef<MCPhysReg> GPRC_and_GPRC_NOR0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
966 static const MCPhysReg AltOrder1[] = { PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R31, PPC::R1, PPC::FP, PPC::BP, PPC::R2 };
967 static const MCPhysReg AltOrder2[] = { PPC::R2, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R31, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R1, PPC::FP, PPC::BP };
968 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::GPRC_and_GPRC_NOR0RegClassID];
969 const ArrayRef<MCPhysReg> Order[] = {
970 ArrayRef(MCR.begin(), MCR.getNumRegs()),
971 ArrayRef(AltOrder1),
972 ArrayRef(AltOrder2)
973 };
974 const unsigned Select = GPRC_and_GPRC_NOR0AltOrderSelect(MF, Rev);
975 assert(Select < 3);
976 return Order[Select];
977}
978
979static inline unsigned CRBITRCAltOrderSelect(const MachineFunction &MF, bool Rev) {
980 return MF.getSubtarget<PPCSubtarget>().isELFv2ABI() &&
981 MF.getInfo<PPCFunctionInfo>()->isNonVolatileCRDisabled();
982 }
983
984static ArrayRef<MCPhysReg> CRBITRCGetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
985 static const MCPhysReg AltOrder1[] = { PPC::CR5LT, PPC::CR5GT, PPC::CR5EQ, PPC::CR5UN, PPC::CR6LT, PPC::CR6GT, PPC::CR6EQ, PPC::CR6UN, PPC::CR7LT, PPC::CR7GT, PPC::CR7EQ, PPC::CR7UN, PPC::CR1LT, PPC::CR1GT, PPC::CR1EQ, PPC::CR1UN, PPC::CR0LT, PPC::CR0GT, PPC::CR0EQ, PPC::CR0UN };
986 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::CRBITRCRegClassID];
987 const ArrayRef<MCPhysReg> Order[] = {
988 ArrayRef(MCR.begin(), MCR.getNumRegs()),
989 ArrayRef(AltOrder1)
990 };
991 const unsigned Select = CRBITRCAltOrderSelect(MF, Rev);
992 assert(Select < 2);
993 return Order[Select];
994}
995
996static inline unsigned CRRCAltOrderSelect(const MachineFunction &MF, bool Rev) {
997 return MF.getSubtarget<PPCSubtarget>().isELFv2ABI() &&
998 MF.getInfo<PPCFunctionInfo>()->isNonVolatileCRDisabled();
999 }
1000
1001static ArrayRef<MCPhysReg> CRRCGetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
1002 static const MCPhysReg AltOrder1[] = { PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7 };
1003 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::CRRCRegClassID];
1004 const ArrayRef<MCPhysReg> Order[] = {
1005 ArrayRef(MCR.begin(), MCR.getNumRegs()),
1006 ArrayRef(AltOrder1)
1007 };
1008 const unsigned Select = CRRCAltOrderSelect(MF, Rev);
1009 assert(Select < 2);
1010 return Order[Select];
1011}
1012
1013static inline unsigned G8RCAltOrderSelect(const MachineFunction &MF, bool Rev) {
1014 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
1015 }
1016
1017static ArrayRef<MCPhysReg> G8RCGetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
1018 static const MCPhysReg AltOrder1[] = { PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X31, PPC::X13, PPC::X0, PPC::X1, PPC::FP8, PPC::BP8, PPC::X2 };
1019 static const MCPhysReg AltOrder2[] = { PPC::X2, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X31, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X13, PPC::X0, PPC::X1, PPC::FP8, PPC::BP8 };
1020 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::G8RCRegClassID];
1021 const ArrayRef<MCPhysReg> Order[] = {
1022 ArrayRef(MCR.begin(), MCR.getNumRegs()),
1023 ArrayRef(AltOrder1),
1024 ArrayRef(AltOrder2)
1025 };
1026 const unsigned Select = G8RCAltOrderSelect(MF, Rev);
1027 assert(Select < 3);
1028 return Order[Select];
1029}
1030
1031static inline unsigned G8RC_NOX0AltOrderSelect(const MachineFunction &MF, bool Rev) {
1032 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
1033 }
1034
1035static ArrayRef<MCPhysReg> G8RC_NOX0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
1036 static const MCPhysReg AltOrder1[] = { PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X31, PPC::X13, PPC::X1, PPC::FP8, PPC::BP8, PPC::ZERO8, PPC::X2 };
1037 static const MCPhysReg AltOrder2[] = { PPC::X2, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X31, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X13, PPC::X1, PPC::FP8, PPC::BP8, PPC::ZERO8 };
1038 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::G8RC_NOX0RegClassID];
1039 const ArrayRef<MCPhysReg> Order[] = {
1040 ArrayRef(MCR.begin(), MCR.getNumRegs()),
1041 ArrayRef(AltOrder1),
1042 ArrayRef(AltOrder2)
1043 };
1044 const unsigned Select = G8RC_NOX0AltOrderSelect(MF, Rev);
1045 assert(Select < 3);
1046 return Order[Select];
1047}
1048
1049static inline unsigned G8RC_and_G8RC_NOX0AltOrderSelect(const MachineFunction &MF, bool Rev) {
1050 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
1051 }
1052
1053static ArrayRef<MCPhysReg> G8RC_and_G8RC_NOX0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
1054 static const MCPhysReg AltOrder1[] = { PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X31, PPC::X13, PPC::X1, PPC::FP8, PPC::BP8, PPC::X2 };
1055 static const MCPhysReg AltOrder2[] = { PPC::X2, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X31, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X13, PPC::X1, PPC::FP8, PPC::BP8 };
1056 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::G8RC_and_G8RC_NOX0RegClassID];
1057 const ArrayRef<MCPhysReg> Order[] = {
1058 ArrayRef(MCR.begin(), MCR.getNumRegs()),
1059 ArrayRef(AltOrder1),
1060 ArrayRef(AltOrder2)
1061 };
1062 const unsigned Select = G8RC_and_G8RC_NOX0AltOrderSelect(MF, Rev);
1063 assert(Select < 3);
1064 return Order[Select];
1065}
1066
1067static inline unsigned G8pRCAltOrderSelect(const MachineFunction &MF, bool Rev) {
1068 return MF.getSubtarget<PPCSubtarget>().is64BitELFABI();
1069 }
1070
1071static ArrayRef<MCPhysReg> G8pRCGetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
1072 static const MCPhysReg AltOrder1[] = { PPC::G8p2, PPC::G8p3, PPC::G8p4, PPC::G8p5, PPC::G8p14, PPC::G8p13, PPC::G8p12, PPC::G8p11, PPC::G8p10, PPC::G8p9, PPC::G8p8, PPC::G8p7, PPC::G8p15, PPC::G8p6, PPC::G8p0, PPC::G8p1 };
1073 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::G8pRCRegClassID];
1074 const ArrayRef<MCPhysReg> Order[] = {
1075 ArrayRef(MCR.begin(), MCR.getNumRegs()),
1076 ArrayRef(AltOrder1)
1077 };
1078 const unsigned Select = G8pRCAltOrderSelect(MF, Rev);
1079 assert(Select < 2);
1080 return Order[Select];
1081}
1082
1083static inline unsigned G8pRC_with_sub_32_in_GPRC_NOR0AltOrderSelect(const MachineFunction &MF, bool Rev) {
1084 return MF.getSubtarget<PPCSubtarget>().is64BitELFABI();
1085 }
1086
1087static ArrayRef<MCPhysReg> G8pRC_with_sub_32_in_GPRC_NOR0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
1088 static const MCPhysReg AltOrder1[] = { PPC::G8p2, PPC::G8p3, PPC::G8p4, PPC::G8p5, PPC::G8p14, PPC::G8p13, PPC::G8p12, PPC::G8p11, PPC::G8p10, PPC::G8p9, PPC::G8p8, PPC::G8p7, PPC::G8p15, PPC::G8p6, PPC::G8p1 };
1089 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClassID];
1090 const ArrayRef<MCPhysReg> Order[] = {
1091 ArrayRef(MCR.begin(), MCR.getNumRegs()),
1092 ArrayRef(AltOrder1)
1093 };
1094 const unsigned Select = G8pRC_with_sub_32_in_GPRC_NOR0AltOrderSelect(MF, Rev);
1095 assert(Select < 2);
1096 return Order[Select];
1097}
1098namespace PPC {
1099
1100// Register class instances.
1101 extern const TargetRegisterClass VSSRCRegClass = {
1102 .MC: &PPCMCRegisterClasses[VSSRCRegClassID],
1103 .SubClassMask: VSSRCSubClassMask,
1104 .SuperRegIndices: SuperRegIdxSeqs + 25,
1105 .LaneMask: LaneBitmask(0x0000000000000001),
1106 .AllocationPriority: 0,
1107 .GlobalPriority: false,
1108 .TSFlags: 0x00, /* TSFlags */
1109 .SpillStackID: 0, /* SpillStackID */
1110 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1111 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1112 .SuperClasses: nullptr, .SuperClassesSize: 0,
1113 .OrderFunc: nullptr
1114 };
1115
1116 extern const TargetRegisterClass GPRCRegClass = {
1117 .MC: &PPCMCRegisterClasses[GPRCRegClassID],
1118 .SubClassMask: GPRCSubClassMask,
1119 .SuperRegIndices: SuperRegIdxSeqs + 73,
1120 .LaneMask: LaneBitmask(0x0000000000000001),
1121 .AllocationPriority: 0,
1122 .GlobalPriority: false,
1123 .TSFlags: 0x00, /* TSFlags */
1124 .SpillStackID: 0, /* SpillStackID */
1125 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1126 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1127 .SuperClasses: nullptr, .SuperClassesSize: 0,
1128 .OrderFunc: GPRCGetRawAllocationOrder
1129 };
1130
1131 extern const TargetRegisterClass GPRC_NOR0RegClass = {
1132 .MC: &PPCMCRegisterClasses[GPRC_NOR0RegClassID],
1133 .SubClassMask: GPRC_NOR0SubClassMask,
1134 .SuperRegIndices: SuperRegIdxSeqs + 73,
1135 .LaneMask: LaneBitmask(0x0000000000000001),
1136 .AllocationPriority: 0,
1137 .GlobalPriority: false,
1138 .TSFlags: 0x00, /* TSFlags */
1139 .SpillStackID: 0, /* SpillStackID */
1140 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1141 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1142 .SuperClasses: nullptr, .SuperClassesSize: 0,
1143 .OrderFunc: GPRC_NOR0GetRawAllocationOrder
1144 };
1145
1146 extern const TargetRegisterClass GPRC_and_GPRC_NOR0RegClass = {
1147 .MC: &PPCMCRegisterClasses[GPRC_and_GPRC_NOR0RegClassID],
1148 .SubClassMask: GPRC_and_GPRC_NOR0SubClassMask,
1149 .SuperRegIndices: SuperRegIdxSeqs + 73,
1150 .LaneMask: LaneBitmask(0x0000000000000001),
1151 .AllocationPriority: 0,
1152 .GlobalPriority: false,
1153 .TSFlags: 0x00, /* TSFlags */
1154 .SpillStackID: 0, /* SpillStackID */
1155 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1156 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1157 .SuperClasses: GPRC_and_GPRC_NOR0Superclasses, .SuperClassesSize: 2,
1158 .OrderFunc: GPRC_and_GPRC_NOR0GetRawAllocationOrder
1159 };
1160
1161 extern const TargetRegisterClass CRBITRCRegClass = {
1162 .MC: &PPCMCRegisterClasses[CRBITRCRegClassID],
1163 .SubClassMask: CRBITRCSubClassMask,
1164 .SuperRegIndices: SuperRegIdxSeqs + 9,
1165 .LaneMask: LaneBitmask(0x0000000000000001),
1166 .AllocationPriority: 0,
1167 .GlobalPriority: false,
1168 .TSFlags: 0x00, /* TSFlags */
1169 .SpillStackID: 0, /* SpillStackID */
1170 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1171 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1172 .SuperClasses: nullptr, .SuperClassesSize: 0,
1173 .OrderFunc: CRBITRCGetRawAllocationOrder
1174 };
1175
1176 extern const TargetRegisterClass F4RCRegClass = {
1177 .MC: &PPCMCRegisterClasses[F4RCRegClassID],
1178 .SubClassMask: F4RCSubClassMask,
1179 .SuperRegIndices: SuperRegIdxSeqs + 25,
1180 .LaneMask: LaneBitmask(0x0000000000000001),
1181 .AllocationPriority: 0,
1182 .GlobalPriority: false,
1183 .TSFlags: 0x00, /* TSFlags */
1184 .SpillStackID: 0, /* SpillStackID */
1185 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1186 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1187 .SuperClasses: F4RCSuperclasses, .SuperClassesSize: 1,
1188 .OrderFunc: nullptr
1189 };
1190
1191 extern const TargetRegisterClass GPRC32RegClass = {
1192 .MC: &PPCMCRegisterClasses[GPRC32RegClassID],
1193 .SubClassMask: GPRC32SubClassMask,
1194 .SuperRegIndices: SuperRegIdxSeqs + 2,
1195 .LaneMask: LaneBitmask(0x0000000000000001),
1196 .AllocationPriority: 0,
1197 .GlobalPriority: false,
1198 .TSFlags: 0x00, /* TSFlags */
1199 .SpillStackID: 0, /* SpillStackID */
1200 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1201 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1202 .SuperClasses: nullptr, .SuperClassesSize: 0,
1203 .OrderFunc: nullptr
1204 };
1205
1206 extern const TargetRegisterClass CRRCRegClass = {
1207 .MC: &PPCMCRegisterClasses[CRRCRegClassID],
1208 .SubClassMask: CRRCSubClassMask,
1209 .SuperRegIndices: SuperRegIdxSeqs + 2,
1210 .LaneMask: LaneBitmask(0x0000000000000E40),
1211 .AllocationPriority: 0,
1212 .GlobalPriority: false,
1213 .TSFlags: 0x00, /* TSFlags */
1214 .SpillStackID: 0, /* SpillStackID */
1215 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1216 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1217 .SuperClasses: nullptr, .SuperClassesSize: 0,
1218 .OrderFunc: CRRCGetRawAllocationOrder
1219 };
1220
1221 extern const TargetRegisterClass CARRYRCRegClass = {
1222 .MC: &PPCMCRegisterClasses[CARRYRCRegClassID],
1223 .SubClassMask: CARRYRCSubClassMask,
1224 .SuperRegIndices: SuperRegIdxSeqs + 2,
1225 .LaneMask: LaneBitmask(0x0000000000000001),
1226 .AllocationPriority: 0,
1227 .GlobalPriority: false,
1228 .TSFlags: 0x00, /* TSFlags */
1229 .SpillStackID: 0, /* SpillStackID */
1230 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1231 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1232 .SuperClasses: nullptr, .SuperClassesSize: 0,
1233 .OrderFunc: nullptr
1234 };
1235
1236 extern const TargetRegisterClass CTRRCRegClass = {
1237 .MC: &PPCMCRegisterClasses[CTRRCRegClassID],
1238 .SubClassMask: CTRRCSubClassMask,
1239 .SuperRegIndices: SuperRegIdxSeqs + 2,
1240 .LaneMask: LaneBitmask(0x0000000000000001),
1241 .AllocationPriority: 0,
1242 .GlobalPriority: false,
1243 .TSFlags: 0x00, /* TSFlags */
1244 .SpillStackID: 0, /* SpillStackID */
1245 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1246 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1247 .SuperClasses: nullptr, .SuperClassesSize: 0,
1248 .OrderFunc: nullptr
1249 };
1250
1251 extern const TargetRegisterClass LRRCRegClass = {
1252 .MC: &PPCMCRegisterClasses[LRRCRegClassID],
1253 .SubClassMask: LRRCSubClassMask,
1254 .SuperRegIndices: SuperRegIdxSeqs + 2,
1255 .LaneMask: LaneBitmask(0x0000000000000001),
1256 .AllocationPriority: 0,
1257 .GlobalPriority: false,
1258 .TSFlags: 0x00, /* TSFlags */
1259 .SpillStackID: 0, /* SpillStackID */
1260 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1261 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1262 .SuperClasses: nullptr, .SuperClassesSize: 0,
1263 .OrderFunc: nullptr
1264 };
1265
1266 extern const TargetRegisterClass VRSAVERCRegClass = {
1267 .MC: &PPCMCRegisterClasses[VRSAVERCRegClassID],
1268 .SubClassMask: VRSAVERCSubClassMask,
1269 .SuperRegIndices: SuperRegIdxSeqs + 2,
1270 .LaneMask: LaneBitmask(0x0000000000000001),
1271 .AllocationPriority: 0,
1272 .GlobalPriority: false,
1273 .TSFlags: 0x00, /* TSFlags */
1274 .SpillStackID: 0, /* SpillStackID */
1275 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1276 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1277 .SuperClasses: nullptr, .SuperClassesSize: 0,
1278 .OrderFunc: nullptr
1279 };
1280
1281 extern const TargetRegisterClass SPILLTOVSRRCRegClass = {
1282 .MC: &PPCMCRegisterClasses[SPILLTOVSRRCRegClassID],
1283 .SubClassMask: SPILLTOVSRRCSubClassMask,
1284 .SuperRegIndices: SuperRegIdxSeqs + 32,
1285 .LaneMask: LaneBitmask(0x0000000000000001),
1286 .AllocationPriority: 0,
1287 .GlobalPriority: false,
1288 .TSFlags: 0x00, /* TSFlags */
1289 .SpillStackID: 0, /* SpillStackID */
1290 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1291 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1292 .SuperClasses: nullptr, .SuperClassesSize: 0,
1293 .OrderFunc: nullptr
1294 };
1295
1296 extern const TargetRegisterClass VSFRCRegClass = {
1297 .MC: &PPCMCRegisterClasses[VSFRCRegClassID],
1298 .SubClassMask: VSFRCSubClassMask,
1299 .SuperRegIndices: SuperRegIdxSeqs + 25,
1300 .LaneMask: LaneBitmask(0x0000000000000001),
1301 .AllocationPriority: 0,
1302 .GlobalPriority: false,
1303 .TSFlags: 0x00, /* TSFlags */
1304 .SpillStackID: 0, /* SpillStackID */
1305 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1306 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1307 .SuperClasses: VSFRCSuperclasses, .SuperClassesSize: 1,
1308 .OrderFunc: nullptr
1309 };
1310
1311 extern const TargetRegisterClass G8RCRegClass = {
1312 .MC: &PPCMCRegisterClasses[G8RCRegClassID],
1313 .SubClassMask: G8RCSubClassMask,
1314 .SuperRegIndices: SuperRegIdxSeqs + 3,
1315 .LaneMask: LaneBitmask(0x0000000000000001),
1316 .AllocationPriority: 0,
1317 .GlobalPriority: false,
1318 .TSFlags: 0x00, /* TSFlags */
1319 .SpillStackID: 0, /* SpillStackID */
1320 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1321 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1322 .SuperClasses: G8RCSuperclasses, .SuperClassesSize: 1,
1323 .OrderFunc: G8RCGetRawAllocationOrder
1324 };
1325
1326 extern const TargetRegisterClass G8RC_NOX0RegClass = {
1327 .MC: &PPCMCRegisterClasses[G8RC_NOX0RegClassID],
1328 .SubClassMask: G8RC_NOX0SubClassMask,
1329 .SuperRegIndices: SuperRegIdxSeqs + 3,
1330 .LaneMask: LaneBitmask(0x0000000000000001),
1331 .AllocationPriority: 0,
1332 .GlobalPriority: false,
1333 .TSFlags: 0x00, /* TSFlags */
1334 .SpillStackID: 0, /* SpillStackID */
1335 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1336 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1337 .SuperClasses: nullptr, .SuperClassesSize: 0,
1338 .OrderFunc: G8RC_NOX0GetRawAllocationOrder
1339 };
1340
1341 extern const TargetRegisterClass SPILLTOVSRRC_and_VSFRCRegClass = {
1342 .MC: &PPCMCRegisterClasses[SPILLTOVSRRC_and_VSFRCRegClassID],
1343 .SubClassMask: SPILLTOVSRRC_and_VSFRCSubClassMask,
1344 .SuperRegIndices: SuperRegIdxSeqs + 25,
1345 .LaneMask: LaneBitmask(0x0000000000000001),
1346 .AllocationPriority: 0,
1347 .GlobalPriority: false,
1348 .TSFlags: 0x00, /* TSFlags */
1349 .SpillStackID: 0, /* SpillStackID */
1350 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1351 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1352 .SuperClasses: SPILLTOVSRRC_and_VSFRCSuperclasses, .SuperClassesSize: 3,
1353 .OrderFunc: nullptr
1354 };
1355
1356 extern const TargetRegisterClass G8RC_and_G8RC_NOX0RegClass = {
1357 .MC: &PPCMCRegisterClasses[G8RC_and_G8RC_NOX0RegClassID],
1358 .SubClassMask: G8RC_and_G8RC_NOX0SubClassMask,
1359 .SuperRegIndices: SuperRegIdxSeqs + 3,
1360 .LaneMask: LaneBitmask(0x0000000000000001),
1361 .AllocationPriority: 0,
1362 .GlobalPriority: false,
1363 .TSFlags: 0x00, /* TSFlags */
1364 .SpillStackID: 0, /* SpillStackID */
1365 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1366 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1367 .SuperClasses: G8RC_and_G8RC_NOX0Superclasses, .SuperClassesSize: 3,
1368 .OrderFunc: G8RC_and_G8RC_NOX0GetRawAllocationOrder
1369 };
1370
1371 extern const TargetRegisterClass F8RCRegClass = {
1372 .MC: &PPCMCRegisterClasses[F8RCRegClassID],
1373 .SubClassMask: F8RCSubClassMask,
1374 .SuperRegIndices: SuperRegIdxSeqs + 25,
1375 .LaneMask: LaneBitmask(0x0000000000000001),
1376 .AllocationPriority: 0,
1377 .GlobalPriority: false,
1378 .TSFlags: 0x00, /* TSFlags */
1379 .SpillStackID: 0, /* SpillStackID */
1380 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1381 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1382 .SuperClasses: F8RCSuperclasses, .SuperClassesSize: 3,
1383 .OrderFunc: nullptr
1384 };
1385
1386 extern const TargetRegisterClass FHRCRegClass = {
1387 .MC: &PPCMCRegisterClasses[FHRCRegClassID],
1388 .SubClassMask: FHRCSubClassMask,
1389 .SuperRegIndices: SuperRegIdxSeqs + 2,
1390 .LaneMask: LaneBitmask(0x0000000000000001),
1391 .AllocationPriority: 0,
1392 .GlobalPriority: false,
1393 .TSFlags: 0x00, /* TSFlags */
1394 .SpillStackID: 0, /* SpillStackID */
1395 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1396 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1397 .SuperClasses: nullptr, .SuperClassesSize: 0,
1398 .OrderFunc: nullptr
1399 };
1400
1401 extern const TargetRegisterClass SPERCRegClass = {
1402 .MC: &PPCMCRegisterClasses[SPERCRegClassID],
1403 .SubClassMask: SPERCSubClassMask,
1404 .SuperRegIndices: SuperRegIdxSeqs + 2,
1405 .LaneMask: LaneBitmask(0x0000000000000003),
1406 .AllocationPriority: 0,
1407 .GlobalPriority: false,
1408 .TSFlags: 0x00, /* TSFlags */
1409 .SpillStackID: 0, /* SpillStackID */
1410 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1411 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1412 .SuperClasses: nullptr, .SuperClassesSize: 0,
1413 .OrderFunc: nullptr
1414 };
1415
1416 extern const TargetRegisterClass VFHRCRegClass = {
1417 .MC: &PPCMCRegisterClasses[VFHRCRegClassID],
1418 .SubClassMask: VFHRCSubClassMask,
1419 .SuperRegIndices: SuperRegIdxSeqs + 2,
1420 .LaneMask: LaneBitmask(0x0000000000000001),
1421 .AllocationPriority: 0,
1422 .GlobalPriority: false,
1423 .TSFlags: 0x00, /* TSFlags */
1424 .SpillStackID: 0, /* SpillStackID */
1425 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1426 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1427 .SuperClasses: nullptr, .SuperClassesSize: 0,
1428 .OrderFunc: nullptr
1429 };
1430
1431 extern const TargetRegisterClass VFRCRegClass = {
1432 .MC: &PPCMCRegisterClasses[VFRCRegClassID],
1433 .SubClassMask: VFRCSubClassMask,
1434 .SuperRegIndices: SuperRegIdxSeqs + 17,
1435 .LaneMask: LaneBitmask(0x0000000000000001),
1436 .AllocationPriority: 0,
1437 .GlobalPriority: false,
1438 .TSFlags: 0x00, /* TSFlags */
1439 .SpillStackID: 0, /* SpillStackID */
1440 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1441 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1442 .SuperClasses: VFRCSuperclasses, .SuperClassesSize: 2,
1443 .OrderFunc: nullptr
1444 };
1445
1446 extern const TargetRegisterClass SPERC_with_sub_32_in_GPRC_NOR0RegClass = {
1447 .MC: &PPCMCRegisterClasses[SPERC_with_sub_32_in_GPRC_NOR0RegClassID],
1448 .SubClassMask: SPERC_with_sub_32_in_GPRC_NOR0SubClassMask,
1449 .SuperRegIndices: SuperRegIdxSeqs + 2,
1450 .LaneMask: LaneBitmask(0x0000000000000003),
1451 .AllocationPriority: 0,
1452 .GlobalPriority: false,
1453 .TSFlags: 0x00, /* TSFlags */
1454 .SpillStackID: 0, /* SpillStackID */
1455 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1456 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1457 .SuperClasses: SPERC_with_sub_32_in_GPRC_NOR0Superclasses, .SuperClassesSize: 1,
1458 .OrderFunc: nullptr
1459 };
1460
1461 extern const TargetRegisterClass SPILLTOVSRRC_and_VFRCRegClass = {
1462 .MC: &PPCMCRegisterClasses[SPILLTOVSRRC_and_VFRCRegClassID],
1463 .SubClassMask: SPILLTOVSRRC_and_VFRCSubClassMask,
1464 .SuperRegIndices: SuperRegIdxSeqs + 17,
1465 .LaneMask: LaneBitmask(0x0000000000000001),
1466 .AllocationPriority: 0,
1467 .GlobalPriority: false,
1468 .TSFlags: 0x00, /* TSFlags */
1469 .SpillStackID: 0, /* SpillStackID */
1470 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1471 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1472 .SuperClasses: SPILLTOVSRRC_and_VFRCSuperclasses, .SuperClassesSize: 5,
1473 .OrderFunc: nullptr
1474 };
1475
1476 extern const TargetRegisterClass SPILLTOVSRRC_and_F4RCRegClass = {
1477 .MC: &PPCMCRegisterClasses[SPILLTOVSRRC_and_F4RCRegClassID],
1478 .SubClassMask: SPILLTOVSRRC_and_F4RCSubClassMask,
1479 .SuperRegIndices: SuperRegIdxSeqs + 25,
1480 .LaneMask: LaneBitmask(0x0000000000000001),
1481 .AllocationPriority: 0,
1482 .GlobalPriority: false,
1483 .TSFlags: 0x00, /* TSFlags */
1484 .SpillStackID: 0, /* SpillStackID */
1485 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1486 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1487 .SuperClasses: SPILLTOVSRRC_and_F4RCSuperclasses, .SuperClassesSize: 6,
1488 .OrderFunc: nullptr
1489 };
1490
1491 extern const TargetRegisterClass CTRRC8RegClass = {
1492 .MC: &PPCMCRegisterClasses[CTRRC8RegClassID],
1493 .SubClassMask: CTRRC8SubClassMask,
1494 .SuperRegIndices: SuperRegIdxSeqs + 2,
1495 .LaneMask: LaneBitmask(0x0000000000000001),
1496 .AllocationPriority: 0,
1497 .GlobalPriority: false,
1498 .TSFlags: 0x00, /* TSFlags */
1499 .SpillStackID: 0, /* SpillStackID */
1500 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1501 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1502 .SuperClasses: nullptr, .SuperClassesSize: 0,
1503 .OrderFunc: nullptr
1504 };
1505
1506 extern const TargetRegisterClass LR8RCRegClass = {
1507 .MC: &PPCMCRegisterClasses[LR8RCRegClassID],
1508 .SubClassMask: LR8RCSubClassMask,
1509 .SuperRegIndices: SuperRegIdxSeqs + 2,
1510 .LaneMask: LaneBitmask(0x0000000000000001),
1511 .AllocationPriority: 0,
1512 .GlobalPriority: false,
1513 .TSFlags: 0x00, /* TSFlags */
1514 .SpillStackID: 0, /* SpillStackID */
1515 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1516 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1517 .SuperClasses: nullptr, .SuperClassesSize: 0,
1518 .OrderFunc: nullptr
1519 };
1520
1521 extern const TargetRegisterClass DMRROWRCRegClass = {
1522 .MC: &PPCMCRegisterClasses[DMRROWRCRegClassID],
1523 .SubClassMask: DMRROWRCSubClassMask,
1524 .SuperRegIndices: SuperRegIdxSeqs + 56,
1525 .LaneMask: LaneBitmask(0x0000000000000001),
1526 .AllocationPriority: 0,
1527 .GlobalPriority: false,
1528 .TSFlags: 0x00, /* TSFlags */
1529 .SpillStackID: 0, /* SpillStackID */
1530 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1531 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1532 .SuperClasses: nullptr, .SuperClassesSize: 0,
1533 .OrderFunc: nullptr
1534 };
1535
1536 extern const TargetRegisterClass VSRCRegClass = {
1537 .MC: &PPCMCRegisterClasses[VSRCRegClassID],
1538 .SubClassMask: VSRCSubClassMask,
1539 .SuperRegIndices: SuperRegIdxSeqs + 20,
1540 .LaneMask: LaneBitmask(0x000000000000000C),
1541 .AllocationPriority: 0,
1542 .GlobalPriority: false,
1543 .TSFlags: 0x00, /* TSFlags */
1544 .SpillStackID: 0, /* SpillStackID */
1545 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1546 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1547 .SuperClasses: nullptr, .SuperClassesSize: 0,
1548 .OrderFunc: nullptr
1549 };
1550
1551 extern const TargetRegisterClass VSRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1552 .MC: &PPCMCRegisterClasses[VSRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1553 .SubClassMask: VSRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1554 .SuperRegIndices: SuperRegIdxSeqs + 20,
1555 .LaneMask: LaneBitmask(0x000000000000000C),
1556 .AllocationPriority: 0,
1557 .GlobalPriority: false,
1558 .TSFlags: 0x00, /* TSFlags */
1559 .SpillStackID: 0, /* SpillStackID */
1560 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1561 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1562 .SuperClasses: VSRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 1,
1563 .OrderFunc: nullptr
1564 };
1565
1566 extern const TargetRegisterClass VRRCRegClass = {
1567 .MC: &PPCMCRegisterClasses[VRRCRegClassID],
1568 .SubClassMask: VRRCSubClassMask,
1569 .SuperRegIndices: SuperRegIdxSeqs + 14,
1570 .LaneMask: LaneBitmask(0x000000000000000C),
1571 .AllocationPriority: 0,
1572 .GlobalPriority: false,
1573 .TSFlags: 0x00, /* TSFlags */
1574 .SpillStackID: 0, /* SpillStackID */
1575 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1576 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1577 .SuperClasses: VRRCSuperclasses, .SuperClassesSize: 1,
1578 .OrderFunc: nullptr
1579 };
1580
1581 extern const TargetRegisterClass VSLRCRegClass = {
1582 .MC: &PPCMCRegisterClasses[VSLRCRegClassID],
1583 .SubClassMask: VSLRCSubClassMask,
1584 .SuperRegIndices: SuperRegIdxSeqs + 20,
1585 .LaneMask: LaneBitmask(0x000000000000000C),
1586 .AllocationPriority: 0,
1587 .GlobalPriority: false,
1588 .TSFlags: 0x00, /* TSFlags */
1589 .SpillStackID: 0, /* SpillStackID */
1590 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1591 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1592 .SuperClasses: VSLRCSuperclasses, .SuperClassesSize: 1,
1593 .OrderFunc: nullptr
1594 };
1595
1596 extern const TargetRegisterClass VRRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1597 .MC: &PPCMCRegisterClasses[VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1598 .SubClassMask: VRRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1599 .SuperRegIndices: SuperRegIdxSeqs + 14,
1600 .LaneMask: LaneBitmask(0x000000000000000C),
1601 .AllocationPriority: 0,
1602 .GlobalPriority: false,
1603 .TSFlags: 0x00, /* TSFlags */
1604 .SpillStackID: 0, /* SpillStackID */
1605 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1606 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1607 .SuperClasses: VRRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 3,
1608 .OrderFunc: nullptr
1609 };
1610
1611 extern const TargetRegisterClass FpRCRegClass = {
1612 .MC: &PPCMCRegisterClasses[FpRCRegClassID],
1613 .SubClassMask: FpRCSubClassMask,
1614 .SuperRegIndices: SuperRegIdxSeqs + 2,
1615 .LaneMask: LaneBitmask(0x0000000000000180),
1616 .AllocationPriority: 0,
1617 .GlobalPriority: false,
1618 .TSFlags: 0x00, /* TSFlags */
1619 .SpillStackID: 0, /* SpillStackID */
1620 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1621 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1622 .SuperClasses: nullptr, .SuperClassesSize: 0,
1623 .OrderFunc: nullptr
1624 };
1625
1626 extern const TargetRegisterClass G8pRCRegClass = {
1627 .MC: &PPCMCRegisterClasses[G8pRCRegClassID],
1628 .SubClassMask: G8pRCSubClassMask,
1629 .SuperRegIndices: SuperRegIdxSeqs + 2,
1630 .LaneMask: LaneBitmask(0x0000000100000001),
1631 .AllocationPriority: 0,
1632 .GlobalPriority: false,
1633 .TSFlags: 0x00, /* TSFlags */
1634 .SpillStackID: 0, /* SpillStackID */
1635 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1636 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1637 .SuperClasses: nullptr, .SuperClassesSize: 0,
1638 .OrderFunc: G8pRCGetRawAllocationOrder
1639 };
1640
1641 extern const TargetRegisterClass G8pRC_with_sub_32_in_GPRC_NOR0RegClass = {
1642 .MC: &PPCMCRegisterClasses[G8pRC_with_sub_32_in_GPRC_NOR0RegClassID],
1643 .SubClassMask: G8pRC_with_sub_32_in_GPRC_NOR0SubClassMask,
1644 .SuperRegIndices: SuperRegIdxSeqs + 2,
1645 .LaneMask: LaneBitmask(0x0000000100000001),
1646 .AllocationPriority: 0,
1647 .GlobalPriority: false,
1648 .TSFlags: 0x00, /* TSFlags */
1649 .SpillStackID: 0, /* SpillStackID */
1650 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1651 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1652 .SuperClasses: G8pRC_with_sub_32_in_GPRC_NOR0Superclasses, .SuperClassesSize: 1,
1653 .OrderFunc: G8pRC_with_sub_32_in_GPRC_NOR0GetRawAllocationOrder
1654 };
1655
1656 extern const TargetRegisterClass VSLRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1657 .MC: &PPCMCRegisterClasses[VSLRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1658 .SubClassMask: VSLRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1659 .SuperRegIndices: SuperRegIdxSeqs + 20,
1660 .LaneMask: LaneBitmask(0x000000000000000C),
1661 .AllocationPriority: 0,
1662 .GlobalPriority: false,
1663 .TSFlags: 0x00, /* TSFlags */
1664 .SpillStackID: 0, /* SpillStackID */
1665 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1666 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1667 .SuperClasses: VSLRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 3,
1668 .OrderFunc: nullptr
1669 };
1670
1671 extern const TargetRegisterClass FpRC_with_sub_fp0_in_SPILLTOVSRRCRegClass = {
1672 .MC: &PPCMCRegisterClasses[FpRC_with_sub_fp0_in_SPILLTOVSRRCRegClassID],
1673 .SubClassMask: FpRC_with_sub_fp0_in_SPILLTOVSRRCSubClassMask,
1674 .SuperRegIndices: SuperRegIdxSeqs + 2,
1675 .LaneMask: LaneBitmask(0x0000000000000180),
1676 .AllocationPriority: 0,
1677 .GlobalPriority: false,
1678 .TSFlags: 0x00, /* TSFlags */
1679 .SpillStackID: 0, /* SpillStackID */
1680 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1681 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1682 .SuperClasses: FpRC_with_sub_fp0_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 1,
1683 .OrderFunc: nullptr
1684 };
1685
1686 extern const TargetRegisterClass DMRROWpRCRegClass = {
1687 .MC: &PPCMCRegisterClasses[DMRROWpRCRegClassID],
1688 .SubClassMask: DMRROWpRCSubClassMask,
1689 .SuperRegIndices: SuperRegIdxSeqs + 47,
1690 .LaneMask: LaneBitmask(0x0000000000000030),
1691 .AllocationPriority: 0,
1692 .GlobalPriority: false,
1693 .TSFlags: 0x00, /* TSFlags */
1694 .SpillStackID: 0, /* SpillStackID */
1695 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1696 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1697 .SuperClasses: nullptr, .SuperClassesSize: 0,
1698 .OrderFunc: nullptr
1699 };
1700
1701 extern const TargetRegisterClass VSRpRCRegClass = {
1702 .MC: &PPCMCRegisterClasses[VSRpRCRegClassID],
1703 .SubClassMask: VSRpRCSubClassMask,
1704 .SuperRegIndices: SuperRegIdxSeqs + 6,
1705 .LaneMask: LaneBitmask(0x000000000000300C),
1706 .AllocationPriority: 2,
1707 .GlobalPriority: false,
1708 .TSFlags: 0x00, /* TSFlags */
1709 .SpillStackID: 0, /* SpillStackID */
1710 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1711 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1712 .SuperClasses: nullptr, .SuperClassesSize: 0,
1713 .OrderFunc: nullptr
1714 };
1715
1716 extern const TargetRegisterClass VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1717 .MC: &PPCMCRegisterClasses[VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1718 .SubClassMask: VSRpRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1719 .SuperRegIndices: SuperRegIdxSeqs + 6,
1720 .LaneMask: LaneBitmask(0x000000000000300C),
1721 .AllocationPriority: 2,
1722 .GlobalPriority: false,
1723 .TSFlags: 0x00, /* TSFlags */
1724 .SpillStackID: 0, /* SpillStackID */
1725 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1726 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1727 .SuperClasses: VSRpRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 1,
1728 .OrderFunc: nullptr
1729 };
1730
1731 extern const TargetRegisterClass VSRpRC_with_sub_64_in_F4RCRegClass = {
1732 .MC: &PPCMCRegisterClasses[VSRpRC_with_sub_64_in_F4RCRegClassID],
1733 .SubClassMask: VSRpRC_with_sub_64_in_F4RCSubClassMask,
1734 .SuperRegIndices: SuperRegIdxSeqs + 6,
1735 .LaneMask: LaneBitmask(0x000000000000300C),
1736 .AllocationPriority: 2,
1737 .GlobalPriority: false,
1738 .TSFlags: 0x00, /* TSFlags */
1739 .SpillStackID: 0, /* SpillStackID */
1740 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1741 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1742 .SuperClasses: VSRpRC_with_sub_64_in_F4RCSuperclasses, .SuperClassesSize: 1,
1743 .OrderFunc: nullptr
1744 };
1745
1746 extern const TargetRegisterClass VSRpRC_with_sub_64_in_VFRCRegClass = {
1747 .MC: &PPCMCRegisterClasses[VSRpRC_with_sub_64_in_VFRCRegClassID],
1748 .SubClassMask: VSRpRC_with_sub_64_in_VFRCSubClassMask,
1749 .SuperRegIndices: SuperRegIdxSeqs + 2,
1750 .LaneMask: LaneBitmask(0x000000000000300C),
1751 .AllocationPriority: 2,
1752 .GlobalPriority: false,
1753 .TSFlags: 0x00, /* TSFlags */
1754 .SpillStackID: 0, /* SpillStackID */
1755 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1756 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1757 .SuperClasses: VSRpRC_with_sub_64_in_VFRCSuperclasses, .SuperClassesSize: 1,
1758 .OrderFunc: nullptr
1759 };
1760
1761 extern const TargetRegisterClass VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClass = {
1762 .MC: &PPCMCRegisterClasses[VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClassID],
1763 .SubClassMask: VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCSubClassMask,
1764 .SuperRegIndices: SuperRegIdxSeqs + 2,
1765 .LaneMask: LaneBitmask(0x000000000000300C),
1766 .AllocationPriority: 2,
1767 .GlobalPriority: false,
1768 .TSFlags: 0x00, /* TSFlags */
1769 .SpillStackID: 0, /* SpillStackID */
1770 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1771 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1772 .SuperClasses: VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCSuperclasses, .SuperClassesSize: 3,
1773 .OrderFunc: nullptr
1774 };
1775
1776 extern const TargetRegisterClass VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCRegClass = {
1777 .MC: &PPCMCRegisterClasses[VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCRegClassID],
1778 .SubClassMask: VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCSubClassMask,
1779 .SuperRegIndices: SuperRegIdxSeqs + 6,
1780 .LaneMask: LaneBitmask(0x000000000000300C),
1781 .AllocationPriority: 2,
1782 .GlobalPriority: false,
1783 .TSFlags: 0x00, /* TSFlags */
1784 .SpillStackID: 0, /* SpillStackID */
1785 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1786 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1787 .SuperClasses: VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCSuperclasses, .SuperClassesSize: 3,
1788 .OrderFunc: nullptr
1789 };
1790
1791 extern const TargetRegisterClass ACCRCRegClass = {
1792 .MC: &PPCMCRegisterClasses[ACCRCRegClassID],
1793 .SubClassMask: ACCRCSubClassMask,
1794 .SuperRegIndices: SuperRegIdxSeqs + 2,
1795 .LaneMask: LaneBitmask(0x000000000003F00C),
1796 .AllocationPriority: 31,
1797 .GlobalPriority: true,
1798 .TSFlags: 0x00, /* TSFlags */
1799 .SpillStackID: 0, /* SpillStackID */
1800 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1801 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1802 .SuperClasses: nullptr, .SuperClassesSize: 0,
1803 .OrderFunc: nullptr
1804 };
1805
1806 extern const TargetRegisterClass UACCRCRegClass = {
1807 .MC: &PPCMCRegisterClasses[UACCRCRegClassID],
1808 .SubClassMask: UACCRCSubClassMask,
1809 .SuperRegIndices: SuperRegIdxSeqs + 2,
1810 .LaneMask: LaneBitmask(0x000000000003F00C),
1811 .AllocationPriority: 4,
1812 .GlobalPriority: true,
1813 .TSFlags: 0x00, /* TSFlags */
1814 .SpillStackID: 0, /* SpillStackID */
1815 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1816 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1817 .SuperClasses: nullptr, .SuperClassesSize: 0,
1818 .OrderFunc: nullptr
1819 };
1820
1821 extern const TargetRegisterClass WACCRCRegClass = {
1822 .MC: &PPCMCRegisterClasses[WACCRCRegClassID],
1823 .SubClassMask: WACCRCSubClassMask,
1824 .SuperRegIndices: SuperRegIdxSeqs + 44,
1825 .LaneMask: LaneBitmask(0x00000000000C0030),
1826 .AllocationPriority: 0,
1827 .GlobalPriority: false,
1828 .TSFlags: 0x00, /* TSFlags */
1829 .SpillStackID: 0, /* SpillStackID */
1830 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1831 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1832 .SuperClasses: nullptr, .SuperClassesSize: 0,
1833 .OrderFunc: nullptr
1834 };
1835
1836 extern const TargetRegisterClass WACC_HIRCRegClass = {
1837 .MC: &PPCMCRegisterClasses[WACC_HIRCRegClassID],
1838 .SubClassMask: WACC_HIRCSubClassMask,
1839 .SuperRegIndices: SuperRegIdxSeqs + 41,
1840 .LaneMask: LaneBitmask(0x00000000000C0030),
1841 .AllocationPriority: 0,
1842 .GlobalPriority: false,
1843 .TSFlags: 0x00, /* TSFlags */
1844 .SpillStackID: 0, /* SpillStackID */
1845 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1846 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1847 .SuperClasses: nullptr, .SuperClassesSize: 0,
1848 .OrderFunc: nullptr
1849 };
1850
1851 extern const TargetRegisterClass ACCRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1852 .MC: &PPCMCRegisterClasses[ACCRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1853 .SubClassMask: ACCRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1854 .SuperRegIndices: SuperRegIdxSeqs + 2,
1855 .LaneMask: LaneBitmask(0x000000000003F00C),
1856 .AllocationPriority: 31,
1857 .GlobalPriority: true,
1858 .TSFlags: 0x00, /* TSFlags */
1859 .SpillStackID: 0, /* SpillStackID */
1860 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1861 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1862 .SuperClasses: ACCRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 1,
1863 .OrderFunc: nullptr
1864 };
1865
1866 extern const TargetRegisterClass UACCRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1867 .MC: &PPCMCRegisterClasses[UACCRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1868 .SubClassMask: UACCRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1869 .SuperRegIndices: SuperRegIdxSeqs + 2,
1870 .LaneMask: LaneBitmask(0x000000000003F00C),
1871 .AllocationPriority: 4,
1872 .GlobalPriority: true,
1873 .TSFlags: 0x00, /* TSFlags */
1874 .SpillStackID: 0, /* SpillStackID */
1875 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1876 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1877 .SuperClasses: UACCRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 1,
1878 .OrderFunc: nullptr
1879 };
1880
1881 extern const TargetRegisterClass ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClass = {
1882 .MC: &PPCMCRegisterClasses[ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClassID],
1883 .SubClassMask: ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSubClassMask,
1884 .SuperRegIndices: SuperRegIdxSeqs + 2,
1885 .LaneMask: LaneBitmask(0x000000000003F00C),
1886 .AllocationPriority: 31,
1887 .GlobalPriority: true,
1888 .TSFlags: 0x00, /* TSFlags */
1889 .SpillStackID: 0, /* SpillStackID */
1890 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1891 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1892 .SuperClasses: ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 2,
1893 .OrderFunc: nullptr
1894 };
1895
1896 extern const TargetRegisterClass UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClass = {
1897 .MC: &PPCMCRegisterClasses[UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClassID],
1898 .SubClassMask: UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSubClassMask,
1899 .SuperRegIndices: SuperRegIdxSeqs + 2,
1900 .LaneMask: LaneBitmask(0x000000000003F00C),
1901 .AllocationPriority: 4,
1902 .GlobalPriority: true,
1903 .TSFlags: 0x00, /* TSFlags */
1904 .SpillStackID: 0, /* SpillStackID */
1905 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1906 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1907 .SuperClasses: UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 2,
1908 .OrderFunc: nullptr
1909 };
1910
1911 extern const TargetRegisterClass DMRRCRegClass = {
1912 .MC: &PPCMCRegisterClasses[DMRRCRegClassID],
1913 .SubClassMask: DMRRCSubClassMask,
1914 .SuperRegIndices: SuperRegIdxSeqs + 0,
1915 .LaneMask: LaneBitmask(0x0000000000FC0030),
1916 .AllocationPriority: 0,
1917 .GlobalPriority: false,
1918 .TSFlags: 0x00, /* TSFlags */
1919 .SpillStackID: 0, /* SpillStackID */
1920 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1921 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1922 .SuperClasses: nullptr, .SuperClassesSize: 0,
1923 .OrderFunc: nullptr
1924 };
1925
1926 extern const TargetRegisterClass DMRpRCRegClass = {
1927 .MC: &PPCMCRegisterClasses[DMRpRCRegClassID],
1928 .SubClassMask: DMRpRCSubClassMask,
1929 .SuperRegIndices: SuperRegIdxSeqs + 2,
1930 .LaneMask: LaneBitmask(0x00000000FFFC0030),
1931 .AllocationPriority: 0,
1932 .GlobalPriority: false,
1933 .TSFlags: 0x00, /* TSFlags */
1934 .SpillStackID: 0, /* SpillStackID */
1935 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1936 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1937 .SuperClasses: nullptr, .SuperClassesSize: 0,
1938 .OrderFunc: nullptr
1939 };
1940
1941
1942} // namespace PPC
1943static const TargetRegisterClass *const PPCRegisterClasses[] = {
1944 &PPC::VSSRCRegClass,
1945 &PPC::GPRCRegClass,
1946 &PPC::GPRC_NOR0RegClass,
1947 &PPC::GPRC_and_GPRC_NOR0RegClass,
1948 &PPC::CRBITRCRegClass,
1949 &PPC::F4RCRegClass,
1950 &PPC::GPRC32RegClass,
1951 &PPC::CRRCRegClass,
1952 &PPC::CARRYRCRegClass,
1953 &PPC::CTRRCRegClass,
1954 &PPC::LRRCRegClass,
1955 &PPC::VRSAVERCRegClass,
1956 &PPC::SPILLTOVSRRCRegClass,
1957 &PPC::VSFRCRegClass,
1958 &PPC::G8RCRegClass,
1959 &PPC::G8RC_NOX0RegClass,
1960 &PPC::SPILLTOVSRRC_and_VSFRCRegClass,
1961 &PPC::G8RC_and_G8RC_NOX0RegClass,
1962 &PPC::F8RCRegClass,
1963 &PPC::FHRCRegClass,
1964 &PPC::SPERCRegClass,
1965 &PPC::VFHRCRegClass,
1966 &PPC::VFRCRegClass,
1967 &PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClass,
1968 &PPC::SPILLTOVSRRC_and_VFRCRegClass,
1969 &PPC::SPILLTOVSRRC_and_F4RCRegClass,
1970 &PPC::CTRRC8RegClass,
1971 &PPC::LR8RCRegClass,
1972 &PPC::DMRROWRCRegClass,
1973 &PPC::VSRCRegClass,
1974 &PPC::VSRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1975 &PPC::VRRCRegClass,
1976 &PPC::VSLRCRegClass,
1977 &PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1978 &PPC::FpRCRegClass,
1979 &PPC::G8pRCRegClass,
1980 &PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClass,
1981 &PPC::VSLRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1982 &PPC::FpRC_with_sub_fp0_in_SPILLTOVSRRCRegClass,
1983 &PPC::DMRROWpRCRegClass,
1984 &PPC::VSRpRCRegClass,
1985 &PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1986 &PPC::VSRpRC_with_sub_64_in_F4RCRegClass,
1987 &PPC::VSRpRC_with_sub_64_in_VFRCRegClass,
1988 &PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClass,
1989 &PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCRegClass,
1990 &PPC::ACCRCRegClass,
1991 &PPC::UACCRCRegClass,
1992 &PPC::WACCRCRegClass,
1993 &PPC::WACC_HIRCRegClass,
1994 &PPC::ACCRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1995 &PPC::UACCRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1996 &PPC::ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClass,
1997 &PPC::UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClass,
1998 &PPC::DMRRCRegClass,
1999 &PPC::DMRpRCRegClass,
2000 };
2001
2002static const uint8_t PPCCostPerUseTable[] = {
20030, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
2004
2005
2006static const bool PPCInAllocatableClassTable[] = {
2007false, true, false, false, true, false, false, false, true, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, };
2008
2009
2010static const TargetRegisterInfoDesc PPCRegInfoDesc = { // Extra Descriptors
2011.CostPerUse: PPCCostPerUseTable, .NumCosts: 1, .InAllocatableClass: PPCInAllocatableClassTable};
2012
2013unsigned PPCGenRegisterInfo::composeSubRegIndicesImpl(unsigned IdxA, unsigned IdxB) const {
2014 static const uint8_t RowMap[55] = {
2015 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 2, 3, 0, 0, 0, 0, 0, 1, 3, 0, 0, 0, 0, 0, 0, 3, 4, 0, 0, 0, 0, 1, 5, 6, 1, 0, 0, 0, 0, 6, 7, 0, 0, 0,
2016 };
2017 static const uint8_t Rows[8][55] = {
2018 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2019 { PPC::sub_gp8_x1_then_sub_32, 0, PPC::sub_pair1_then_sub_64, PPC::sub_pair1_then_sub_64_hi_phony, 0, 0, PPC::sub_dmr1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_dmrrow1, PPC::sub_dmr1_then_sub_dmrrowp0, PPC::sub_dmr1_then_sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_pair1_then_sub_vsx0, PPC::sub_pair1_then_sub_vsx1, PPC::sub_dmr1_then_sub_wacc_hi, PPC::sub_dmr1_then_sub_wacc_lo, PPC::sub_pair1_then_sub_vsx1_then_sub_64, PPC::sub_pair1_then_sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2020 { 0, 0, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2021 { 0, 0, PPC::sub_pair1_then_sub_vsx1_then_sub_64, PPC::sub_pair1_then_sub_vsx1_then_sub_64_hi_phony, 0, 0, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2022 { 0, 0, 0, 0, 0, 0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2023 { 0, 0, 0, 0, 0, 0, PPC::sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2024 { 0, 0, 0, 0, 0, 0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2025 { 0, 0, 0, 0, 0, 0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2026 };
2027
2028 --IdxA; assert(IdxA < 55); (void) IdxA;
2029 --IdxB; assert(IdxB < 55);
2030 return Rows[RowMap[IdxA]][IdxB];
2031}
2032
2033unsigned PPCGenRegisterInfo::reverseComposeSubRegIndicesImpl(unsigned IdxA, unsigned IdxB) const {
2034 static const uint8_t Table[55][55] = {
2035 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2036 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2037 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2038 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2039 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2040 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
2041 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2042 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2043 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2044 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2045 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2046 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2047 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2048 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2049 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
2050 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2051 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2052 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2053 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
2054 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2055 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2056 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2057 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2058 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2059 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2060 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2061 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2062 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2063 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
2064 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2065 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2066 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2067 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2068 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2069 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2070 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2071 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2072 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2073 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2074 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2075 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2076 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2077 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
2078 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, },
2079 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, },
2080 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
2081 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2082 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2083 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2084 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2085 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, },
2086 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, 0, },
2087 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2088 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2089 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2090 };
2091
2092 --IdxA; assert(IdxA < 55);
2093 --IdxB; assert(IdxB < 55);
2094 return Table[IdxA][IdxB];
2095 }
2096
2097 struct MaskRolOp {
2098 LaneBitmask Mask;
2099 uint8_t RotateLeft;
2100 };
2101 static const MaskRolOp LaneMaskComposeSequences[] = {
2102 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 0 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 0
2103 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 1 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 2
2104 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 2 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 4
2105 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 3 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 6
2106 { .Mask: LaneBitmask(0x0000000000000030), .RotateLeft: 20 }, { .Mask: LaneBitmask(0x0000000000FC0000), .RotateLeft: 8 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 8
2107 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 4 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 11
2108 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 5 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 13
2109 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 14 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 15
2110 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 6 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 17
2111 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 7 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 19
2112 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 8 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 21
2113 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 32 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 23
2114 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 9 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 25
2115 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 10 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 27
2116 { .Mask: LaneBitmask(0x000000000000000C), .RotateLeft: 12 }, { .Mask: LaneBitmask(0x0000000000003000), .RotateLeft: 4 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 29
2117 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 11 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 32
2118 { .Mask: LaneBitmask(0x0000000000000030), .RotateLeft: 16 }, { .Mask: LaneBitmask(0x00000000000C0000), .RotateLeft: 4 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 34
2119 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 12 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 37
2120 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 13 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 39
2121 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 15 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 41
2122 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 16 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 43
2123 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 17 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 45
2124 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 18 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 47
2125 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 19 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 49
2126 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 20 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 51
2127 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 21 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 53
2128 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 22 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 55
2129 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 23 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 57
2130 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 24 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 59
2131 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 25 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 61
2132 { .Mask: LaneBitmask(0x0000000000000030), .RotateLeft: 24 }, { .Mask: LaneBitmask(0x00000000000C0000), .RotateLeft: 12 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 63
2133 { .Mask: LaneBitmask(0x0000000000000030), .RotateLeft: 20 }, { .Mask: LaneBitmask(0x00000000000C0000), .RotateLeft: 8 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 66
2134 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 26 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 69
2135 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 27 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 71
2136 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 28 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 73
2137 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 29 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 75
2138 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 30 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 77
2139 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 31 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 } // Sequence 79
2140 };
2141 static const uint8_t CompositeSequences[] = {
2142 0, // to sub_32
2143 2, // to sub_32_hi_phony
2144 4, // to sub_64
2145 6, // to sub_64_hi_phony
2146 0, // to sub_dmr0
2147 8, // to sub_dmr1
2148 11, // to sub_dmrrow0
2149 13, // to sub_dmrrow1
2150 0, // to sub_dmrrowp0
2151 15, // to sub_dmrrowp1
2152 17, // to sub_eq
2153 19, // to sub_fp0
2154 21, // to sub_fp1
2155 0, // to sub_gp8_x0
2156 23, // to sub_gp8_x1
2157 25, // to sub_gt
2158 27, // to sub_lt
2159 0, // to sub_pair0
2160 29, // to sub_pair1
2161 32, // to sub_un
2162 0, // to sub_vsx0
2163 27, // to sub_vsx1
2164 34, // to sub_wacc_hi
2165 0, // to sub_wacc_lo
2166 37, // to sub_vsx1_then_sub_64
2167 39, // to sub_vsx1_then_sub_64_hi_phony
2168 15, // to sub_pair1_then_sub_64
2169 41, // to sub_pair1_then_sub_64_hi_phony
2170 37, // to sub_pair1_then_sub_vsx0
2171 15, // to sub_pair1_then_sub_vsx1
2172 43, // to sub_pair1_then_sub_vsx1_then_sub_64
2173 45, // to sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2174 47, // to sub_dmrrowp1_then_sub_dmrrow0
2175 49, // to sub_dmrrowp1_then_sub_dmrrow1
2176 51, // to sub_wacc_hi_then_sub_dmrrow0
2177 53, // to sub_wacc_hi_then_sub_dmrrow1
2178 43, // to sub_wacc_hi_then_sub_dmrrowp0
2179 47, // to sub_wacc_hi_then_sub_dmrrowp1
2180 55, // to sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2181 57, // to sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2182 59, // to sub_dmr1_then_sub_dmrrow0
2183 61, // to sub_dmr1_then_sub_dmrrow1
2184 51, // to sub_dmr1_then_sub_dmrrowp0
2185 55, // to sub_dmr1_then_sub_dmrrowp1
2186 63, // to sub_dmr1_then_sub_wacc_hi
2187 66, // to sub_dmr1_then_sub_wacc_lo
2188 69, // to sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2189 71, // to sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2190 73, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2191 75, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2192 59, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2193 69, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2194 77, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2195 79, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2196 23 // to sub_gp8_x1_then_sub_32
2197 };
2198
2199LaneBitmask PPCGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
2200 --IdxA; assert(IdxA < 55 && "Subregister index out of bounds");
2201 LaneBitmask Result;
2202 for (const MaskRolOp *Ops =
2203 &LaneMaskComposeSequences[CompositeSequences[IdxA]];
2204 Ops->Mask.any(); ++Ops) {
2205 LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
2206 if (unsigned S = Ops->RotateLeft)
2207 Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
2208 else
2209 Result |= LaneBitmask(M);
2210 }
2211 return Result;
2212}
2213
2214LaneBitmask PPCGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
2215 LaneMask &= getSubRegIndexLaneMask(SubIdx: IdxA);
2216 --IdxA; assert(IdxA < 55 && "Subregister index out of bounds");
2217 LaneBitmask Result;
2218 for (const MaskRolOp *Ops =
2219 &LaneMaskComposeSequences[CompositeSequences[IdxA]];
2220 Ops->Mask.any(); ++Ops) {
2221 LaneBitmask::Type M = LaneMask.getAsInteger();
2222 if (unsigned S = Ops->RotateLeft)
2223 Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
2224 else
2225 Result |= LaneBitmask(M);
2226 }
2227 return Result;
2228}
2229
2230const TargetRegisterClass *PPCGenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
2231 static constexpr uint8_t Table[56][55] = {
2232 { // VSSRC
2233 0, // sub_32
2234 0, // sub_32_hi_phony
2235 0, // sub_64
2236 0, // sub_64_hi_phony
2237 0, // sub_dmr0
2238 0, // sub_dmr1
2239 0, // sub_dmrrow0
2240 0, // sub_dmrrow1
2241 0, // sub_dmrrowp0
2242 0, // sub_dmrrowp1
2243 0, // sub_eq
2244 0, // sub_fp0
2245 0, // sub_fp1
2246 0, // sub_gp8_x0
2247 0, // sub_gp8_x1
2248 0, // sub_gt
2249 0, // sub_lt
2250 0, // sub_pair0
2251 0, // sub_pair1
2252 0, // sub_un
2253 0, // sub_vsx0
2254 0, // sub_vsx1
2255 0, // sub_wacc_hi
2256 0, // sub_wacc_lo
2257 0, // sub_vsx1_then_sub_64
2258 0, // sub_vsx1_then_sub_64_hi_phony
2259 0, // sub_pair1_then_sub_64
2260 0, // sub_pair1_then_sub_64_hi_phony
2261 0, // sub_pair1_then_sub_vsx0
2262 0, // sub_pair1_then_sub_vsx1
2263 0, // sub_pair1_then_sub_vsx1_then_sub_64
2264 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2265 0, // sub_dmrrowp1_then_sub_dmrrow0
2266 0, // sub_dmrrowp1_then_sub_dmrrow1
2267 0, // sub_wacc_hi_then_sub_dmrrow0
2268 0, // sub_wacc_hi_then_sub_dmrrow1
2269 0, // sub_wacc_hi_then_sub_dmrrowp0
2270 0, // sub_wacc_hi_then_sub_dmrrowp1
2271 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2272 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2273 0, // sub_dmr1_then_sub_dmrrow0
2274 0, // sub_dmr1_then_sub_dmrrow1
2275 0, // sub_dmr1_then_sub_dmrrowp0
2276 0, // sub_dmr1_then_sub_dmrrowp1
2277 0, // sub_dmr1_then_sub_wacc_hi
2278 0, // sub_dmr1_then_sub_wacc_lo
2279 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2280 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2281 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2282 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2283 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2284 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2285 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2286 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2287 0, // sub_gp8_x1_then_sub_32
2288 },
2289 { // GPRC
2290 0, // sub_32
2291 0, // sub_32_hi_phony
2292 0, // sub_64
2293 0, // sub_64_hi_phony
2294 0, // sub_dmr0
2295 0, // sub_dmr1
2296 0, // sub_dmrrow0
2297 0, // sub_dmrrow1
2298 0, // sub_dmrrowp0
2299 0, // sub_dmrrowp1
2300 0, // sub_eq
2301 0, // sub_fp0
2302 0, // sub_fp1
2303 0, // sub_gp8_x0
2304 0, // sub_gp8_x1
2305 0, // sub_gt
2306 0, // sub_lt
2307 0, // sub_pair0
2308 0, // sub_pair1
2309 0, // sub_un
2310 0, // sub_vsx0
2311 0, // sub_vsx1
2312 0, // sub_wacc_hi
2313 0, // sub_wacc_lo
2314 0, // sub_vsx1_then_sub_64
2315 0, // sub_vsx1_then_sub_64_hi_phony
2316 0, // sub_pair1_then_sub_64
2317 0, // sub_pair1_then_sub_64_hi_phony
2318 0, // sub_pair1_then_sub_vsx0
2319 0, // sub_pair1_then_sub_vsx1
2320 0, // sub_pair1_then_sub_vsx1_then_sub_64
2321 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2322 0, // sub_dmrrowp1_then_sub_dmrrow0
2323 0, // sub_dmrrowp1_then_sub_dmrrow1
2324 0, // sub_wacc_hi_then_sub_dmrrow0
2325 0, // sub_wacc_hi_then_sub_dmrrow1
2326 0, // sub_wacc_hi_then_sub_dmrrowp0
2327 0, // sub_wacc_hi_then_sub_dmrrowp1
2328 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2329 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2330 0, // sub_dmr1_then_sub_dmrrow0
2331 0, // sub_dmr1_then_sub_dmrrow1
2332 0, // sub_dmr1_then_sub_dmrrowp0
2333 0, // sub_dmr1_then_sub_dmrrowp1
2334 0, // sub_dmr1_then_sub_wacc_hi
2335 0, // sub_dmr1_then_sub_wacc_lo
2336 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2337 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2338 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2339 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2340 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2341 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2342 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2343 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2344 0, // sub_gp8_x1_then_sub_32
2345 },
2346 { // GPRC_NOR0
2347 0, // sub_32
2348 0, // sub_32_hi_phony
2349 0, // sub_64
2350 0, // sub_64_hi_phony
2351 0, // sub_dmr0
2352 0, // sub_dmr1
2353 0, // sub_dmrrow0
2354 0, // sub_dmrrow1
2355 0, // sub_dmrrowp0
2356 0, // sub_dmrrowp1
2357 0, // sub_eq
2358 0, // sub_fp0
2359 0, // sub_fp1
2360 0, // sub_gp8_x0
2361 0, // sub_gp8_x1
2362 0, // sub_gt
2363 0, // sub_lt
2364 0, // sub_pair0
2365 0, // sub_pair1
2366 0, // sub_un
2367 0, // sub_vsx0
2368 0, // sub_vsx1
2369 0, // sub_wacc_hi
2370 0, // sub_wacc_lo
2371 0, // sub_vsx1_then_sub_64
2372 0, // sub_vsx1_then_sub_64_hi_phony
2373 0, // sub_pair1_then_sub_64
2374 0, // sub_pair1_then_sub_64_hi_phony
2375 0, // sub_pair1_then_sub_vsx0
2376 0, // sub_pair1_then_sub_vsx1
2377 0, // sub_pair1_then_sub_vsx1_then_sub_64
2378 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2379 0, // sub_dmrrowp1_then_sub_dmrrow0
2380 0, // sub_dmrrowp1_then_sub_dmrrow1
2381 0, // sub_wacc_hi_then_sub_dmrrow0
2382 0, // sub_wacc_hi_then_sub_dmrrow1
2383 0, // sub_wacc_hi_then_sub_dmrrowp0
2384 0, // sub_wacc_hi_then_sub_dmrrowp1
2385 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2386 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2387 0, // sub_dmr1_then_sub_dmrrow0
2388 0, // sub_dmr1_then_sub_dmrrow1
2389 0, // sub_dmr1_then_sub_dmrrowp0
2390 0, // sub_dmr1_then_sub_dmrrowp1
2391 0, // sub_dmr1_then_sub_wacc_hi
2392 0, // sub_dmr1_then_sub_wacc_lo
2393 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2394 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2395 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2396 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2397 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2398 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2399 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2400 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2401 0, // sub_gp8_x1_then_sub_32
2402 },
2403 { // GPRC_and_GPRC_NOR0
2404 0, // sub_32
2405 0, // sub_32_hi_phony
2406 0, // sub_64
2407 0, // sub_64_hi_phony
2408 0, // sub_dmr0
2409 0, // sub_dmr1
2410 0, // sub_dmrrow0
2411 0, // sub_dmrrow1
2412 0, // sub_dmrrowp0
2413 0, // sub_dmrrowp1
2414 0, // sub_eq
2415 0, // sub_fp0
2416 0, // sub_fp1
2417 0, // sub_gp8_x0
2418 0, // sub_gp8_x1
2419 0, // sub_gt
2420 0, // sub_lt
2421 0, // sub_pair0
2422 0, // sub_pair1
2423 0, // sub_un
2424 0, // sub_vsx0
2425 0, // sub_vsx1
2426 0, // sub_wacc_hi
2427 0, // sub_wacc_lo
2428 0, // sub_vsx1_then_sub_64
2429 0, // sub_vsx1_then_sub_64_hi_phony
2430 0, // sub_pair1_then_sub_64
2431 0, // sub_pair1_then_sub_64_hi_phony
2432 0, // sub_pair1_then_sub_vsx0
2433 0, // sub_pair1_then_sub_vsx1
2434 0, // sub_pair1_then_sub_vsx1_then_sub_64
2435 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2436 0, // sub_dmrrowp1_then_sub_dmrrow0
2437 0, // sub_dmrrowp1_then_sub_dmrrow1
2438 0, // sub_wacc_hi_then_sub_dmrrow0
2439 0, // sub_wacc_hi_then_sub_dmrrow1
2440 0, // sub_wacc_hi_then_sub_dmrrowp0
2441 0, // sub_wacc_hi_then_sub_dmrrowp1
2442 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2443 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2444 0, // sub_dmr1_then_sub_dmrrow0
2445 0, // sub_dmr1_then_sub_dmrrow1
2446 0, // sub_dmr1_then_sub_dmrrowp0
2447 0, // sub_dmr1_then_sub_dmrrowp1
2448 0, // sub_dmr1_then_sub_wacc_hi
2449 0, // sub_dmr1_then_sub_wacc_lo
2450 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2451 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2452 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2453 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2454 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2455 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2456 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2457 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2458 0, // sub_gp8_x1_then_sub_32
2459 },
2460 { // CRBITRC
2461 0, // sub_32
2462 0, // sub_32_hi_phony
2463 0, // sub_64
2464 0, // sub_64_hi_phony
2465 0, // sub_dmr0
2466 0, // sub_dmr1
2467 0, // sub_dmrrow0
2468 0, // sub_dmrrow1
2469 0, // sub_dmrrowp0
2470 0, // sub_dmrrowp1
2471 0, // sub_eq
2472 0, // sub_fp0
2473 0, // sub_fp1
2474 0, // sub_gp8_x0
2475 0, // sub_gp8_x1
2476 0, // sub_gt
2477 0, // sub_lt
2478 0, // sub_pair0
2479 0, // sub_pair1
2480 0, // sub_un
2481 0, // sub_vsx0
2482 0, // sub_vsx1
2483 0, // sub_wacc_hi
2484 0, // sub_wacc_lo
2485 0, // sub_vsx1_then_sub_64
2486 0, // sub_vsx1_then_sub_64_hi_phony
2487 0, // sub_pair1_then_sub_64
2488 0, // sub_pair1_then_sub_64_hi_phony
2489 0, // sub_pair1_then_sub_vsx0
2490 0, // sub_pair1_then_sub_vsx1
2491 0, // sub_pair1_then_sub_vsx1_then_sub_64
2492 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2493 0, // sub_dmrrowp1_then_sub_dmrrow0
2494 0, // sub_dmrrowp1_then_sub_dmrrow1
2495 0, // sub_wacc_hi_then_sub_dmrrow0
2496 0, // sub_wacc_hi_then_sub_dmrrow1
2497 0, // sub_wacc_hi_then_sub_dmrrowp0
2498 0, // sub_wacc_hi_then_sub_dmrrowp1
2499 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2500 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2501 0, // sub_dmr1_then_sub_dmrrow0
2502 0, // sub_dmr1_then_sub_dmrrow1
2503 0, // sub_dmr1_then_sub_dmrrowp0
2504 0, // sub_dmr1_then_sub_dmrrowp1
2505 0, // sub_dmr1_then_sub_wacc_hi
2506 0, // sub_dmr1_then_sub_wacc_lo
2507 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2508 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2509 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2510 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2511 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2512 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2513 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2514 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2515 0, // sub_gp8_x1_then_sub_32
2516 },
2517 { // F4RC
2518 0, // sub_32
2519 0, // sub_32_hi_phony
2520 0, // sub_64
2521 0, // sub_64_hi_phony
2522 0, // sub_dmr0
2523 0, // sub_dmr1
2524 0, // sub_dmrrow0
2525 0, // sub_dmrrow1
2526 0, // sub_dmrrowp0
2527 0, // sub_dmrrowp1
2528 0, // sub_eq
2529 0, // sub_fp0
2530 0, // sub_fp1
2531 0, // sub_gp8_x0
2532 0, // sub_gp8_x1
2533 0, // sub_gt
2534 0, // sub_lt
2535 0, // sub_pair0
2536 0, // sub_pair1
2537 0, // sub_un
2538 0, // sub_vsx0
2539 0, // sub_vsx1
2540 0, // sub_wacc_hi
2541 0, // sub_wacc_lo
2542 0, // sub_vsx1_then_sub_64
2543 0, // sub_vsx1_then_sub_64_hi_phony
2544 0, // sub_pair1_then_sub_64
2545 0, // sub_pair1_then_sub_64_hi_phony
2546 0, // sub_pair1_then_sub_vsx0
2547 0, // sub_pair1_then_sub_vsx1
2548 0, // sub_pair1_then_sub_vsx1_then_sub_64
2549 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2550 0, // sub_dmrrowp1_then_sub_dmrrow0
2551 0, // sub_dmrrowp1_then_sub_dmrrow1
2552 0, // sub_wacc_hi_then_sub_dmrrow0
2553 0, // sub_wacc_hi_then_sub_dmrrow1
2554 0, // sub_wacc_hi_then_sub_dmrrowp0
2555 0, // sub_wacc_hi_then_sub_dmrrowp1
2556 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2557 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2558 0, // sub_dmr1_then_sub_dmrrow0
2559 0, // sub_dmr1_then_sub_dmrrow1
2560 0, // sub_dmr1_then_sub_dmrrowp0
2561 0, // sub_dmr1_then_sub_dmrrowp1
2562 0, // sub_dmr1_then_sub_wacc_hi
2563 0, // sub_dmr1_then_sub_wacc_lo
2564 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2565 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2566 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2567 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2568 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2569 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2570 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2571 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2572 0, // sub_gp8_x1_then_sub_32
2573 },
2574 { // GPRC32
2575 0, // sub_32
2576 0, // sub_32_hi_phony
2577 0, // sub_64
2578 0, // sub_64_hi_phony
2579 0, // sub_dmr0
2580 0, // sub_dmr1
2581 0, // sub_dmrrow0
2582 0, // sub_dmrrow1
2583 0, // sub_dmrrowp0
2584 0, // sub_dmrrowp1
2585 0, // sub_eq
2586 0, // sub_fp0
2587 0, // sub_fp1
2588 0, // sub_gp8_x0
2589 0, // sub_gp8_x1
2590 0, // sub_gt
2591 0, // sub_lt
2592 0, // sub_pair0
2593 0, // sub_pair1
2594 0, // sub_un
2595 0, // sub_vsx0
2596 0, // sub_vsx1
2597 0, // sub_wacc_hi
2598 0, // sub_wacc_lo
2599 0, // sub_vsx1_then_sub_64
2600 0, // sub_vsx1_then_sub_64_hi_phony
2601 0, // sub_pair1_then_sub_64
2602 0, // sub_pair1_then_sub_64_hi_phony
2603 0, // sub_pair1_then_sub_vsx0
2604 0, // sub_pair1_then_sub_vsx1
2605 0, // sub_pair1_then_sub_vsx1_then_sub_64
2606 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2607 0, // sub_dmrrowp1_then_sub_dmrrow0
2608 0, // sub_dmrrowp1_then_sub_dmrrow1
2609 0, // sub_wacc_hi_then_sub_dmrrow0
2610 0, // sub_wacc_hi_then_sub_dmrrow1
2611 0, // sub_wacc_hi_then_sub_dmrrowp0
2612 0, // sub_wacc_hi_then_sub_dmrrowp1
2613 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2614 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2615 0, // sub_dmr1_then_sub_dmrrow0
2616 0, // sub_dmr1_then_sub_dmrrow1
2617 0, // sub_dmr1_then_sub_dmrrowp0
2618 0, // sub_dmr1_then_sub_dmrrowp1
2619 0, // sub_dmr1_then_sub_wacc_hi
2620 0, // sub_dmr1_then_sub_wacc_lo
2621 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2622 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2623 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2624 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2625 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2626 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2627 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2628 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2629 0, // sub_gp8_x1_then_sub_32
2630 },
2631 { // CRRC
2632 0, // sub_32
2633 0, // sub_32_hi_phony
2634 0, // sub_64
2635 0, // sub_64_hi_phony
2636 0, // sub_dmr0
2637 0, // sub_dmr1
2638 0, // sub_dmrrow0
2639 0, // sub_dmrrow1
2640 0, // sub_dmrrowp0
2641 0, // sub_dmrrowp1
2642 8, // sub_eq -> CRRC
2643 0, // sub_fp0
2644 0, // sub_fp1
2645 0, // sub_gp8_x0
2646 0, // sub_gp8_x1
2647 8, // sub_gt -> CRRC
2648 8, // sub_lt -> CRRC
2649 0, // sub_pair0
2650 0, // sub_pair1
2651 8, // sub_un -> CRRC
2652 0, // sub_vsx0
2653 0, // sub_vsx1
2654 0, // sub_wacc_hi
2655 0, // sub_wacc_lo
2656 0, // sub_vsx1_then_sub_64
2657 0, // sub_vsx1_then_sub_64_hi_phony
2658 0, // sub_pair1_then_sub_64
2659 0, // sub_pair1_then_sub_64_hi_phony
2660 0, // sub_pair1_then_sub_vsx0
2661 0, // sub_pair1_then_sub_vsx1
2662 0, // sub_pair1_then_sub_vsx1_then_sub_64
2663 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2664 0, // sub_dmrrowp1_then_sub_dmrrow0
2665 0, // sub_dmrrowp1_then_sub_dmrrow1
2666 0, // sub_wacc_hi_then_sub_dmrrow0
2667 0, // sub_wacc_hi_then_sub_dmrrow1
2668 0, // sub_wacc_hi_then_sub_dmrrowp0
2669 0, // sub_wacc_hi_then_sub_dmrrowp1
2670 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2671 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2672 0, // sub_dmr1_then_sub_dmrrow0
2673 0, // sub_dmr1_then_sub_dmrrow1
2674 0, // sub_dmr1_then_sub_dmrrowp0
2675 0, // sub_dmr1_then_sub_dmrrowp1
2676 0, // sub_dmr1_then_sub_wacc_hi
2677 0, // sub_dmr1_then_sub_wacc_lo
2678 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2679 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2680 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2681 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2682 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2683 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2684 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2685 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2686 0, // sub_gp8_x1_then_sub_32
2687 },
2688 { // CARRYRC
2689 0, // sub_32
2690 0, // sub_32_hi_phony
2691 0, // sub_64
2692 0, // sub_64_hi_phony
2693 0, // sub_dmr0
2694 0, // sub_dmr1
2695 0, // sub_dmrrow0
2696 0, // sub_dmrrow1
2697 0, // sub_dmrrowp0
2698 0, // sub_dmrrowp1
2699 0, // sub_eq
2700 0, // sub_fp0
2701 0, // sub_fp1
2702 0, // sub_gp8_x0
2703 0, // sub_gp8_x1
2704 0, // sub_gt
2705 0, // sub_lt
2706 0, // sub_pair0
2707 0, // sub_pair1
2708 0, // sub_un
2709 0, // sub_vsx0
2710 0, // sub_vsx1
2711 0, // sub_wacc_hi
2712 0, // sub_wacc_lo
2713 0, // sub_vsx1_then_sub_64
2714 0, // sub_vsx1_then_sub_64_hi_phony
2715 0, // sub_pair1_then_sub_64
2716 0, // sub_pair1_then_sub_64_hi_phony
2717 0, // sub_pair1_then_sub_vsx0
2718 0, // sub_pair1_then_sub_vsx1
2719 0, // sub_pair1_then_sub_vsx1_then_sub_64
2720 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2721 0, // sub_dmrrowp1_then_sub_dmrrow0
2722 0, // sub_dmrrowp1_then_sub_dmrrow1
2723 0, // sub_wacc_hi_then_sub_dmrrow0
2724 0, // sub_wacc_hi_then_sub_dmrrow1
2725 0, // sub_wacc_hi_then_sub_dmrrowp0
2726 0, // sub_wacc_hi_then_sub_dmrrowp1
2727 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2728 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2729 0, // sub_dmr1_then_sub_dmrrow0
2730 0, // sub_dmr1_then_sub_dmrrow1
2731 0, // sub_dmr1_then_sub_dmrrowp0
2732 0, // sub_dmr1_then_sub_dmrrowp1
2733 0, // sub_dmr1_then_sub_wacc_hi
2734 0, // sub_dmr1_then_sub_wacc_lo
2735 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2736 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2737 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2738 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2739 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2740 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2741 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2742 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2743 0, // sub_gp8_x1_then_sub_32
2744 },
2745 { // CTRRC
2746 0, // sub_32
2747 0, // sub_32_hi_phony
2748 0, // sub_64
2749 0, // sub_64_hi_phony
2750 0, // sub_dmr0
2751 0, // sub_dmr1
2752 0, // sub_dmrrow0
2753 0, // sub_dmrrow1
2754 0, // sub_dmrrowp0
2755 0, // sub_dmrrowp1
2756 0, // sub_eq
2757 0, // sub_fp0
2758 0, // sub_fp1
2759 0, // sub_gp8_x0
2760 0, // sub_gp8_x1
2761 0, // sub_gt
2762 0, // sub_lt
2763 0, // sub_pair0
2764 0, // sub_pair1
2765 0, // sub_un
2766 0, // sub_vsx0
2767 0, // sub_vsx1
2768 0, // sub_wacc_hi
2769 0, // sub_wacc_lo
2770 0, // sub_vsx1_then_sub_64
2771 0, // sub_vsx1_then_sub_64_hi_phony
2772 0, // sub_pair1_then_sub_64
2773 0, // sub_pair1_then_sub_64_hi_phony
2774 0, // sub_pair1_then_sub_vsx0
2775 0, // sub_pair1_then_sub_vsx1
2776 0, // sub_pair1_then_sub_vsx1_then_sub_64
2777 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2778 0, // sub_dmrrowp1_then_sub_dmrrow0
2779 0, // sub_dmrrowp1_then_sub_dmrrow1
2780 0, // sub_wacc_hi_then_sub_dmrrow0
2781 0, // sub_wacc_hi_then_sub_dmrrow1
2782 0, // sub_wacc_hi_then_sub_dmrrowp0
2783 0, // sub_wacc_hi_then_sub_dmrrowp1
2784 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2785 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2786 0, // sub_dmr1_then_sub_dmrrow0
2787 0, // sub_dmr1_then_sub_dmrrow1
2788 0, // sub_dmr1_then_sub_dmrrowp0
2789 0, // sub_dmr1_then_sub_dmrrowp1
2790 0, // sub_dmr1_then_sub_wacc_hi
2791 0, // sub_dmr1_then_sub_wacc_lo
2792 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2793 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2794 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2795 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2796 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2797 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2798 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2799 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2800 0, // sub_gp8_x1_then_sub_32
2801 },
2802 { // LRRC
2803 0, // sub_32
2804 0, // sub_32_hi_phony
2805 0, // sub_64
2806 0, // sub_64_hi_phony
2807 0, // sub_dmr0
2808 0, // sub_dmr1
2809 0, // sub_dmrrow0
2810 0, // sub_dmrrow1
2811 0, // sub_dmrrowp0
2812 0, // sub_dmrrowp1
2813 0, // sub_eq
2814 0, // sub_fp0
2815 0, // sub_fp1
2816 0, // sub_gp8_x0
2817 0, // sub_gp8_x1
2818 0, // sub_gt
2819 0, // sub_lt
2820 0, // sub_pair0
2821 0, // sub_pair1
2822 0, // sub_un
2823 0, // sub_vsx0
2824 0, // sub_vsx1
2825 0, // sub_wacc_hi
2826 0, // sub_wacc_lo
2827 0, // sub_vsx1_then_sub_64
2828 0, // sub_vsx1_then_sub_64_hi_phony
2829 0, // sub_pair1_then_sub_64
2830 0, // sub_pair1_then_sub_64_hi_phony
2831 0, // sub_pair1_then_sub_vsx0
2832 0, // sub_pair1_then_sub_vsx1
2833 0, // sub_pair1_then_sub_vsx1_then_sub_64
2834 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2835 0, // sub_dmrrowp1_then_sub_dmrrow0
2836 0, // sub_dmrrowp1_then_sub_dmrrow1
2837 0, // sub_wacc_hi_then_sub_dmrrow0
2838 0, // sub_wacc_hi_then_sub_dmrrow1
2839 0, // sub_wacc_hi_then_sub_dmrrowp0
2840 0, // sub_wacc_hi_then_sub_dmrrowp1
2841 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2842 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2843 0, // sub_dmr1_then_sub_dmrrow0
2844 0, // sub_dmr1_then_sub_dmrrow1
2845 0, // sub_dmr1_then_sub_dmrrowp0
2846 0, // sub_dmr1_then_sub_dmrrowp1
2847 0, // sub_dmr1_then_sub_wacc_hi
2848 0, // sub_dmr1_then_sub_wacc_lo
2849 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2850 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2851 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2852 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2853 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2854 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2855 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2856 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2857 0, // sub_gp8_x1_then_sub_32
2858 },
2859 { // VRSAVERC
2860 0, // sub_32
2861 0, // sub_32_hi_phony
2862 0, // sub_64
2863 0, // sub_64_hi_phony
2864 0, // sub_dmr0
2865 0, // sub_dmr1
2866 0, // sub_dmrrow0
2867 0, // sub_dmrrow1
2868 0, // sub_dmrrowp0
2869 0, // sub_dmrrowp1
2870 0, // sub_eq
2871 0, // sub_fp0
2872 0, // sub_fp1
2873 0, // sub_gp8_x0
2874 0, // sub_gp8_x1
2875 0, // sub_gt
2876 0, // sub_lt
2877 0, // sub_pair0
2878 0, // sub_pair1
2879 0, // sub_un
2880 0, // sub_vsx0
2881 0, // sub_vsx1
2882 0, // sub_wacc_hi
2883 0, // sub_wacc_lo
2884 0, // sub_vsx1_then_sub_64
2885 0, // sub_vsx1_then_sub_64_hi_phony
2886 0, // sub_pair1_then_sub_64
2887 0, // sub_pair1_then_sub_64_hi_phony
2888 0, // sub_pair1_then_sub_vsx0
2889 0, // sub_pair1_then_sub_vsx1
2890 0, // sub_pair1_then_sub_vsx1_then_sub_64
2891 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2892 0, // sub_dmrrowp1_then_sub_dmrrow0
2893 0, // sub_dmrrowp1_then_sub_dmrrow1
2894 0, // sub_wacc_hi_then_sub_dmrrow0
2895 0, // sub_wacc_hi_then_sub_dmrrow1
2896 0, // sub_wacc_hi_then_sub_dmrrowp0
2897 0, // sub_wacc_hi_then_sub_dmrrowp1
2898 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2899 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2900 0, // sub_dmr1_then_sub_dmrrow0
2901 0, // sub_dmr1_then_sub_dmrrow1
2902 0, // sub_dmr1_then_sub_dmrrowp0
2903 0, // sub_dmr1_then_sub_dmrrowp1
2904 0, // sub_dmr1_then_sub_wacc_hi
2905 0, // sub_dmr1_then_sub_wacc_lo
2906 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2907 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2908 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2909 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2910 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2911 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2912 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2913 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2914 0, // sub_gp8_x1_then_sub_32
2915 },
2916 { // SPILLTOVSRRC
2917 15, // sub_32 -> G8RC
2918 0, // sub_32_hi_phony
2919 0, // sub_64
2920 0, // sub_64_hi_phony
2921 0, // sub_dmr0
2922 0, // sub_dmr1
2923 0, // sub_dmrrow0
2924 0, // sub_dmrrow1
2925 0, // sub_dmrrowp0
2926 0, // sub_dmrrowp1
2927 0, // sub_eq
2928 0, // sub_fp0
2929 0, // sub_fp1
2930 0, // sub_gp8_x0
2931 0, // sub_gp8_x1
2932 0, // sub_gt
2933 0, // sub_lt
2934 0, // sub_pair0
2935 0, // sub_pair1
2936 0, // sub_un
2937 0, // sub_vsx0
2938 0, // sub_vsx1
2939 0, // sub_wacc_hi
2940 0, // sub_wacc_lo
2941 0, // sub_vsx1_then_sub_64
2942 0, // sub_vsx1_then_sub_64_hi_phony
2943 0, // sub_pair1_then_sub_64
2944 0, // sub_pair1_then_sub_64_hi_phony
2945 0, // sub_pair1_then_sub_vsx0
2946 0, // sub_pair1_then_sub_vsx1
2947 0, // sub_pair1_then_sub_vsx1_then_sub_64
2948 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2949 0, // sub_dmrrowp1_then_sub_dmrrow0
2950 0, // sub_dmrrowp1_then_sub_dmrrow1
2951 0, // sub_wacc_hi_then_sub_dmrrow0
2952 0, // sub_wacc_hi_then_sub_dmrrow1
2953 0, // sub_wacc_hi_then_sub_dmrrowp0
2954 0, // sub_wacc_hi_then_sub_dmrrowp1
2955 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2956 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2957 0, // sub_dmr1_then_sub_dmrrow0
2958 0, // sub_dmr1_then_sub_dmrrow1
2959 0, // sub_dmr1_then_sub_dmrrowp0
2960 0, // sub_dmr1_then_sub_dmrrowp1
2961 0, // sub_dmr1_then_sub_wacc_hi
2962 0, // sub_dmr1_then_sub_wacc_lo
2963 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2964 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2965 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2966 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2967 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2968 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2969 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2970 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2971 0, // sub_gp8_x1_then_sub_32
2972 },
2973 { // VSFRC
2974 0, // sub_32
2975 0, // sub_32_hi_phony
2976 0, // sub_64
2977 0, // sub_64_hi_phony
2978 0, // sub_dmr0
2979 0, // sub_dmr1
2980 0, // sub_dmrrow0
2981 0, // sub_dmrrow1
2982 0, // sub_dmrrowp0
2983 0, // sub_dmrrowp1
2984 0, // sub_eq
2985 0, // sub_fp0
2986 0, // sub_fp1
2987 0, // sub_gp8_x0
2988 0, // sub_gp8_x1
2989 0, // sub_gt
2990 0, // sub_lt
2991 0, // sub_pair0
2992 0, // sub_pair1
2993 0, // sub_un
2994 0, // sub_vsx0
2995 0, // sub_vsx1
2996 0, // sub_wacc_hi
2997 0, // sub_wacc_lo
2998 0, // sub_vsx1_then_sub_64
2999 0, // sub_vsx1_then_sub_64_hi_phony
3000 0, // sub_pair1_then_sub_64
3001 0, // sub_pair1_then_sub_64_hi_phony
3002 0, // sub_pair1_then_sub_vsx0
3003 0, // sub_pair1_then_sub_vsx1
3004 0, // sub_pair1_then_sub_vsx1_then_sub_64
3005 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3006 0, // sub_dmrrowp1_then_sub_dmrrow0
3007 0, // sub_dmrrowp1_then_sub_dmrrow1
3008 0, // sub_wacc_hi_then_sub_dmrrow0
3009 0, // sub_wacc_hi_then_sub_dmrrow1
3010 0, // sub_wacc_hi_then_sub_dmrrowp0
3011 0, // sub_wacc_hi_then_sub_dmrrowp1
3012 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3013 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3014 0, // sub_dmr1_then_sub_dmrrow0
3015 0, // sub_dmr1_then_sub_dmrrow1
3016 0, // sub_dmr1_then_sub_dmrrowp0
3017 0, // sub_dmr1_then_sub_dmrrowp1
3018 0, // sub_dmr1_then_sub_wacc_hi
3019 0, // sub_dmr1_then_sub_wacc_lo
3020 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3021 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3022 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3023 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3024 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3025 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3026 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3027 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3028 0, // sub_gp8_x1_then_sub_32
3029 },
3030 { // G8RC
3031 15, // sub_32 -> G8RC
3032 0, // sub_32_hi_phony
3033 0, // sub_64
3034 0, // sub_64_hi_phony
3035 0, // sub_dmr0
3036 0, // sub_dmr1
3037 0, // sub_dmrrow0
3038 0, // sub_dmrrow1
3039 0, // sub_dmrrowp0
3040 0, // sub_dmrrowp1
3041 0, // sub_eq
3042 0, // sub_fp0
3043 0, // sub_fp1
3044 0, // sub_gp8_x0
3045 0, // sub_gp8_x1
3046 0, // sub_gt
3047 0, // sub_lt
3048 0, // sub_pair0
3049 0, // sub_pair1
3050 0, // sub_un
3051 0, // sub_vsx0
3052 0, // sub_vsx1
3053 0, // sub_wacc_hi
3054 0, // sub_wacc_lo
3055 0, // sub_vsx1_then_sub_64
3056 0, // sub_vsx1_then_sub_64_hi_phony
3057 0, // sub_pair1_then_sub_64
3058 0, // sub_pair1_then_sub_64_hi_phony
3059 0, // sub_pair1_then_sub_vsx0
3060 0, // sub_pair1_then_sub_vsx1
3061 0, // sub_pair1_then_sub_vsx1_then_sub_64
3062 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3063 0, // sub_dmrrowp1_then_sub_dmrrow0
3064 0, // sub_dmrrowp1_then_sub_dmrrow1
3065 0, // sub_wacc_hi_then_sub_dmrrow0
3066 0, // sub_wacc_hi_then_sub_dmrrow1
3067 0, // sub_wacc_hi_then_sub_dmrrowp0
3068 0, // sub_wacc_hi_then_sub_dmrrowp1
3069 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3070 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3071 0, // sub_dmr1_then_sub_dmrrow0
3072 0, // sub_dmr1_then_sub_dmrrow1
3073 0, // sub_dmr1_then_sub_dmrrowp0
3074 0, // sub_dmr1_then_sub_dmrrowp1
3075 0, // sub_dmr1_then_sub_wacc_hi
3076 0, // sub_dmr1_then_sub_wacc_lo
3077 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3078 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3079 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3080 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3081 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3082 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3083 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3084 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3085 0, // sub_gp8_x1_then_sub_32
3086 },
3087 { // G8RC_NOX0
3088 16, // sub_32 -> G8RC_NOX0
3089 0, // sub_32_hi_phony
3090 0, // sub_64
3091 0, // sub_64_hi_phony
3092 0, // sub_dmr0
3093 0, // sub_dmr1
3094 0, // sub_dmrrow0
3095 0, // sub_dmrrow1
3096 0, // sub_dmrrowp0
3097 0, // sub_dmrrowp1
3098 0, // sub_eq
3099 0, // sub_fp0
3100 0, // sub_fp1
3101 0, // sub_gp8_x0
3102 0, // sub_gp8_x1
3103 0, // sub_gt
3104 0, // sub_lt
3105 0, // sub_pair0
3106 0, // sub_pair1
3107 0, // sub_un
3108 0, // sub_vsx0
3109 0, // sub_vsx1
3110 0, // sub_wacc_hi
3111 0, // sub_wacc_lo
3112 0, // sub_vsx1_then_sub_64
3113 0, // sub_vsx1_then_sub_64_hi_phony
3114 0, // sub_pair1_then_sub_64
3115 0, // sub_pair1_then_sub_64_hi_phony
3116 0, // sub_pair1_then_sub_vsx0
3117 0, // sub_pair1_then_sub_vsx1
3118 0, // sub_pair1_then_sub_vsx1_then_sub_64
3119 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3120 0, // sub_dmrrowp1_then_sub_dmrrow0
3121 0, // sub_dmrrowp1_then_sub_dmrrow1
3122 0, // sub_wacc_hi_then_sub_dmrrow0
3123 0, // sub_wacc_hi_then_sub_dmrrow1
3124 0, // sub_wacc_hi_then_sub_dmrrowp0
3125 0, // sub_wacc_hi_then_sub_dmrrowp1
3126 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3127 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3128 0, // sub_dmr1_then_sub_dmrrow0
3129 0, // sub_dmr1_then_sub_dmrrow1
3130 0, // sub_dmr1_then_sub_dmrrowp0
3131 0, // sub_dmr1_then_sub_dmrrowp1
3132 0, // sub_dmr1_then_sub_wacc_hi
3133 0, // sub_dmr1_then_sub_wacc_lo
3134 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3135 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3136 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3137 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3138 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3139 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3140 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3141 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3142 0, // sub_gp8_x1_then_sub_32
3143 },
3144 { // SPILLTOVSRRC_and_VSFRC
3145 0, // sub_32
3146 0, // sub_32_hi_phony
3147 0, // sub_64
3148 0, // sub_64_hi_phony
3149 0, // sub_dmr0
3150 0, // sub_dmr1
3151 0, // sub_dmrrow0
3152 0, // sub_dmrrow1
3153 0, // sub_dmrrowp0
3154 0, // sub_dmrrowp1
3155 0, // sub_eq
3156 0, // sub_fp0
3157 0, // sub_fp1
3158 0, // sub_gp8_x0
3159 0, // sub_gp8_x1
3160 0, // sub_gt
3161 0, // sub_lt
3162 0, // sub_pair0
3163 0, // sub_pair1
3164 0, // sub_un
3165 0, // sub_vsx0
3166 0, // sub_vsx1
3167 0, // sub_wacc_hi
3168 0, // sub_wacc_lo
3169 0, // sub_vsx1_then_sub_64
3170 0, // sub_vsx1_then_sub_64_hi_phony
3171 0, // sub_pair1_then_sub_64
3172 0, // sub_pair1_then_sub_64_hi_phony
3173 0, // sub_pair1_then_sub_vsx0
3174 0, // sub_pair1_then_sub_vsx1
3175 0, // sub_pair1_then_sub_vsx1_then_sub_64
3176 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3177 0, // sub_dmrrowp1_then_sub_dmrrow0
3178 0, // sub_dmrrowp1_then_sub_dmrrow1
3179 0, // sub_wacc_hi_then_sub_dmrrow0
3180 0, // sub_wacc_hi_then_sub_dmrrow1
3181 0, // sub_wacc_hi_then_sub_dmrrowp0
3182 0, // sub_wacc_hi_then_sub_dmrrowp1
3183 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3184 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3185 0, // sub_dmr1_then_sub_dmrrow0
3186 0, // sub_dmr1_then_sub_dmrrow1
3187 0, // sub_dmr1_then_sub_dmrrowp0
3188 0, // sub_dmr1_then_sub_dmrrowp1
3189 0, // sub_dmr1_then_sub_wacc_hi
3190 0, // sub_dmr1_then_sub_wacc_lo
3191 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3192 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3193 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3194 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3195 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3196 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3197 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3198 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3199 0, // sub_gp8_x1_then_sub_32
3200 },
3201 { // G8RC_and_G8RC_NOX0
3202 18, // sub_32 -> G8RC_and_G8RC_NOX0
3203 0, // sub_32_hi_phony
3204 0, // sub_64
3205 0, // sub_64_hi_phony
3206 0, // sub_dmr0
3207 0, // sub_dmr1
3208 0, // sub_dmrrow0
3209 0, // sub_dmrrow1
3210 0, // sub_dmrrowp0
3211 0, // sub_dmrrowp1
3212 0, // sub_eq
3213 0, // sub_fp0
3214 0, // sub_fp1
3215 0, // sub_gp8_x0
3216 0, // sub_gp8_x1
3217 0, // sub_gt
3218 0, // sub_lt
3219 0, // sub_pair0
3220 0, // sub_pair1
3221 0, // sub_un
3222 0, // sub_vsx0
3223 0, // sub_vsx1
3224 0, // sub_wacc_hi
3225 0, // sub_wacc_lo
3226 0, // sub_vsx1_then_sub_64
3227 0, // sub_vsx1_then_sub_64_hi_phony
3228 0, // sub_pair1_then_sub_64
3229 0, // sub_pair1_then_sub_64_hi_phony
3230 0, // sub_pair1_then_sub_vsx0
3231 0, // sub_pair1_then_sub_vsx1
3232 0, // sub_pair1_then_sub_vsx1_then_sub_64
3233 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3234 0, // sub_dmrrowp1_then_sub_dmrrow0
3235 0, // sub_dmrrowp1_then_sub_dmrrow1
3236 0, // sub_wacc_hi_then_sub_dmrrow0
3237 0, // sub_wacc_hi_then_sub_dmrrow1
3238 0, // sub_wacc_hi_then_sub_dmrrowp0
3239 0, // sub_wacc_hi_then_sub_dmrrowp1
3240 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3241 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3242 0, // sub_dmr1_then_sub_dmrrow0
3243 0, // sub_dmr1_then_sub_dmrrow1
3244 0, // sub_dmr1_then_sub_dmrrowp0
3245 0, // sub_dmr1_then_sub_dmrrowp1
3246 0, // sub_dmr1_then_sub_wacc_hi
3247 0, // sub_dmr1_then_sub_wacc_lo
3248 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3249 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3250 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3251 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3252 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3253 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3254 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3255 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3256 0, // sub_gp8_x1_then_sub_32
3257 },
3258 { // F8RC
3259 0, // sub_32
3260 0, // sub_32_hi_phony
3261 0, // sub_64
3262 0, // sub_64_hi_phony
3263 0, // sub_dmr0
3264 0, // sub_dmr1
3265 0, // sub_dmrrow0
3266 0, // sub_dmrrow1
3267 0, // sub_dmrrowp0
3268 0, // sub_dmrrowp1
3269 0, // sub_eq
3270 0, // sub_fp0
3271 0, // sub_fp1
3272 0, // sub_gp8_x0
3273 0, // sub_gp8_x1
3274 0, // sub_gt
3275 0, // sub_lt
3276 0, // sub_pair0
3277 0, // sub_pair1
3278 0, // sub_un
3279 0, // sub_vsx0
3280 0, // sub_vsx1
3281 0, // sub_wacc_hi
3282 0, // sub_wacc_lo
3283 0, // sub_vsx1_then_sub_64
3284 0, // sub_vsx1_then_sub_64_hi_phony
3285 0, // sub_pair1_then_sub_64
3286 0, // sub_pair1_then_sub_64_hi_phony
3287 0, // sub_pair1_then_sub_vsx0
3288 0, // sub_pair1_then_sub_vsx1
3289 0, // sub_pair1_then_sub_vsx1_then_sub_64
3290 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3291 0, // sub_dmrrowp1_then_sub_dmrrow0
3292 0, // sub_dmrrowp1_then_sub_dmrrow1
3293 0, // sub_wacc_hi_then_sub_dmrrow0
3294 0, // sub_wacc_hi_then_sub_dmrrow1
3295 0, // sub_wacc_hi_then_sub_dmrrowp0
3296 0, // sub_wacc_hi_then_sub_dmrrowp1
3297 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3298 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3299 0, // sub_dmr1_then_sub_dmrrow0
3300 0, // sub_dmr1_then_sub_dmrrow1
3301 0, // sub_dmr1_then_sub_dmrrowp0
3302 0, // sub_dmr1_then_sub_dmrrowp1
3303 0, // sub_dmr1_then_sub_wacc_hi
3304 0, // sub_dmr1_then_sub_wacc_lo
3305 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3306 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3307 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3308 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3309 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3310 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3311 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3312 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3313 0, // sub_gp8_x1_then_sub_32
3314 },
3315 { // FHRC
3316 0, // sub_32
3317 0, // sub_32_hi_phony
3318 0, // sub_64
3319 0, // sub_64_hi_phony
3320 0, // sub_dmr0
3321 0, // sub_dmr1
3322 0, // sub_dmrrow0
3323 0, // sub_dmrrow1
3324 0, // sub_dmrrowp0
3325 0, // sub_dmrrowp1
3326 0, // sub_eq
3327 0, // sub_fp0
3328 0, // sub_fp1
3329 0, // sub_gp8_x0
3330 0, // sub_gp8_x1
3331 0, // sub_gt
3332 0, // sub_lt
3333 0, // sub_pair0
3334 0, // sub_pair1
3335 0, // sub_un
3336 0, // sub_vsx0
3337 0, // sub_vsx1
3338 0, // sub_wacc_hi
3339 0, // sub_wacc_lo
3340 0, // sub_vsx1_then_sub_64
3341 0, // sub_vsx1_then_sub_64_hi_phony
3342 0, // sub_pair1_then_sub_64
3343 0, // sub_pair1_then_sub_64_hi_phony
3344 0, // sub_pair1_then_sub_vsx0
3345 0, // sub_pair1_then_sub_vsx1
3346 0, // sub_pair1_then_sub_vsx1_then_sub_64
3347 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3348 0, // sub_dmrrowp1_then_sub_dmrrow0
3349 0, // sub_dmrrowp1_then_sub_dmrrow1
3350 0, // sub_wacc_hi_then_sub_dmrrow0
3351 0, // sub_wacc_hi_then_sub_dmrrow1
3352 0, // sub_wacc_hi_then_sub_dmrrowp0
3353 0, // sub_wacc_hi_then_sub_dmrrowp1
3354 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3355 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3356 0, // sub_dmr1_then_sub_dmrrow0
3357 0, // sub_dmr1_then_sub_dmrrow1
3358 0, // sub_dmr1_then_sub_dmrrowp0
3359 0, // sub_dmr1_then_sub_dmrrowp1
3360 0, // sub_dmr1_then_sub_wacc_hi
3361 0, // sub_dmr1_then_sub_wacc_lo
3362 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3363 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3364 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3365 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3366 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3367 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3368 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3369 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3370 0, // sub_gp8_x1_then_sub_32
3371 },
3372 { // SPERC
3373 21, // sub_32 -> SPERC
3374 21, // sub_32_hi_phony -> SPERC
3375 0, // sub_64
3376 0, // sub_64_hi_phony
3377 0, // sub_dmr0
3378 0, // sub_dmr1
3379 0, // sub_dmrrow0
3380 0, // sub_dmrrow1
3381 0, // sub_dmrrowp0
3382 0, // sub_dmrrowp1
3383 0, // sub_eq
3384 0, // sub_fp0
3385 0, // sub_fp1
3386 0, // sub_gp8_x0
3387 0, // sub_gp8_x1
3388 0, // sub_gt
3389 0, // sub_lt
3390 0, // sub_pair0
3391 0, // sub_pair1
3392 0, // sub_un
3393 0, // sub_vsx0
3394 0, // sub_vsx1
3395 0, // sub_wacc_hi
3396 0, // sub_wacc_lo
3397 0, // sub_vsx1_then_sub_64
3398 0, // sub_vsx1_then_sub_64_hi_phony
3399 0, // sub_pair1_then_sub_64
3400 0, // sub_pair1_then_sub_64_hi_phony
3401 0, // sub_pair1_then_sub_vsx0
3402 0, // sub_pair1_then_sub_vsx1
3403 0, // sub_pair1_then_sub_vsx1_then_sub_64
3404 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3405 0, // sub_dmrrowp1_then_sub_dmrrow0
3406 0, // sub_dmrrowp1_then_sub_dmrrow1
3407 0, // sub_wacc_hi_then_sub_dmrrow0
3408 0, // sub_wacc_hi_then_sub_dmrrow1
3409 0, // sub_wacc_hi_then_sub_dmrrowp0
3410 0, // sub_wacc_hi_then_sub_dmrrowp1
3411 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3412 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3413 0, // sub_dmr1_then_sub_dmrrow0
3414 0, // sub_dmr1_then_sub_dmrrow1
3415 0, // sub_dmr1_then_sub_dmrrowp0
3416 0, // sub_dmr1_then_sub_dmrrowp1
3417 0, // sub_dmr1_then_sub_wacc_hi
3418 0, // sub_dmr1_then_sub_wacc_lo
3419 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3420 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3421 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3422 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3423 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3424 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3425 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3426 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3427 0, // sub_gp8_x1_then_sub_32
3428 },
3429 { // VFHRC
3430 0, // sub_32
3431 0, // sub_32_hi_phony
3432 0, // sub_64
3433 0, // sub_64_hi_phony
3434 0, // sub_dmr0
3435 0, // sub_dmr1
3436 0, // sub_dmrrow0
3437 0, // sub_dmrrow1
3438 0, // sub_dmrrowp0
3439 0, // sub_dmrrowp1
3440 0, // sub_eq
3441 0, // sub_fp0
3442 0, // sub_fp1
3443 0, // sub_gp8_x0
3444 0, // sub_gp8_x1
3445 0, // sub_gt
3446 0, // sub_lt
3447 0, // sub_pair0
3448 0, // sub_pair1
3449 0, // sub_un
3450 0, // sub_vsx0
3451 0, // sub_vsx1
3452 0, // sub_wacc_hi
3453 0, // sub_wacc_lo
3454 0, // sub_vsx1_then_sub_64
3455 0, // sub_vsx1_then_sub_64_hi_phony
3456 0, // sub_pair1_then_sub_64
3457 0, // sub_pair1_then_sub_64_hi_phony
3458 0, // sub_pair1_then_sub_vsx0
3459 0, // sub_pair1_then_sub_vsx1
3460 0, // sub_pair1_then_sub_vsx1_then_sub_64
3461 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3462 0, // sub_dmrrowp1_then_sub_dmrrow0
3463 0, // sub_dmrrowp1_then_sub_dmrrow1
3464 0, // sub_wacc_hi_then_sub_dmrrow0
3465 0, // sub_wacc_hi_then_sub_dmrrow1
3466 0, // sub_wacc_hi_then_sub_dmrrowp0
3467 0, // sub_wacc_hi_then_sub_dmrrowp1
3468 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3469 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3470 0, // sub_dmr1_then_sub_dmrrow0
3471 0, // sub_dmr1_then_sub_dmrrow1
3472 0, // sub_dmr1_then_sub_dmrrowp0
3473 0, // sub_dmr1_then_sub_dmrrowp1
3474 0, // sub_dmr1_then_sub_wacc_hi
3475 0, // sub_dmr1_then_sub_wacc_lo
3476 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3477 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3478 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3479 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3480 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3481 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3482 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3483 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3484 0, // sub_gp8_x1_then_sub_32
3485 },
3486 { // VFRC
3487 0, // sub_32
3488 0, // sub_32_hi_phony
3489 0, // sub_64
3490 0, // sub_64_hi_phony
3491 0, // sub_dmr0
3492 0, // sub_dmr1
3493 0, // sub_dmrrow0
3494 0, // sub_dmrrow1
3495 0, // sub_dmrrowp0
3496 0, // sub_dmrrowp1
3497 0, // sub_eq
3498 0, // sub_fp0
3499 0, // sub_fp1
3500 0, // sub_gp8_x0
3501 0, // sub_gp8_x1
3502 0, // sub_gt
3503 0, // sub_lt
3504 0, // sub_pair0
3505 0, // sub_pair1
3506 0, // sub_un
3507 0, // sub_vsx0
3508 0, // sub_vsx1
3509 0, // sub_wacc_hi
3510 0, // sub_wacc_lo
3511 0, // sub_vsx1_then_sub_64
3512 0, // sub_vsx1_then_sub_64_hi_phony
3513 0, // sub_pair1_then_sub_64
3514 0, // sub_pair1_then_sub_64_hi_phony
3515 0, // sub_pair1_then_sub_vsx0
3516 0, // sub_pair1_then_sub_vsx1
3517 0, // sub_pair1_then_sub_vsx1_then_sub_64
3518 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3519 0, // sub_dmrrowp1_then_sub_dmrrow0
3520 0, // sub_dmrrowp1_then_sub_dmrrow1
3521 0, // sub_wacc_hi_then_sub_dmrrow0
3522 0, // sub_wacc_hi_then_sub_dmrrow1
3523 0, // sub_wacc_hi_then_sub_dmrrowp0
3524 0, // sub_wacc_hi_then_sub_dmrrowp1
3525 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3526 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3527 0, // sub_dmr1_then_sub_dmrrow0
3528 0, // sub_dmr1_then_sub_dmrrow1
3529 0, // sub_dmr1_then_sub_dmrrowp0
3530 0, // sub_dmr1_then_sub_dmrrowp1
3531 0, // sub_dmr1_then_sub_wacc_hi
3532 0, // sub_dmr1_then_sub_wacc_lo
3533 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3534 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3535 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3536 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3537 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3538 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3539 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3540 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3541 0, // sub_gp8_x1_then_sub_32
3542 },
3543 { // SPERC_with_sub_32_in_GPRC_NOR0
3544 24, // sub_32 -> SPERC_with_sub_32_in_GPRC_NOR0
3545 24, // sub_32_hi_phony -> SPERC_with_sub_32_in_GPRC_NOR0
3546 0, // sub_64
3547 0, // sub_64_hi_phony
3548 0, // sub_dmr0
3549 0, // sub_dmr1
3550 0, // sub_dmrrow0
3551 0, // sub_dmrrow1
3552 0, // sub_dmrrowp0
3553 0, // sub_dmrrowp1
3554 0, // sub_eq
3555 0, // sub_fp0
3556 0, // sub_fp1
3557 0, // sub_gp8_x0
3558 0, // sub_gp8_x1
3559 0, // sub_gt
3560 0, // sub_lt
3561 0, // sub_pair0
3562 0, // sub_pair1
3563 0, // sub_un
3564 0, // sub_vsx0
3565 0, // sub_vsx1
3566 0, // sub_wacc_hi
3567 0, // sub_wacc_lo
3568 0, // sub_vsx1_then_sub_64
3569 0, // sub_vsx1_then_sub_64_hi_phony
3570 0, // sub_pair1_then_sub_64
3571 0, // sub_pair1_then_sub_64_hi_phony
3572 0, // sub_pair1_then_sub_vsx0
3573 0, // sub_pair1_then_sub_vsx1
3574 0, // sub_pair1_then_sub_vsx1_then_sub_64
3575 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3576 0, // sub_dmrrowp1_then_sub_dmrrow0
3577 0, // sub_dmrrowp1_then_sub_dmrrow1
3578 0, // sub_wacc_hi_then_sub_dmrrow0
3579 0, // sub_wacc_hi_then_sub_dmrrow1
3580 0, // sub_wacc_hi_then_sub_dmrrowp0
3581 0, // sub_wacc_hi_then_sub_dmrrowp1
3582 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3583 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3584 0, // sub_dmr1_then_sub_dmrrow0
3585 0, // sub_dmr1_then_sub_dmrrow1
3586 0, // sub_dmr1_then_sub_dmrrowp0
3587 0, // sub_dmr1_then_sub_dmrrowp1
3588 0, // sub_dmr1_then_sub_wacc_hi
3589 0, // sub_dmr1_then_sub_wacc_lo
3590 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3591 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3592 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3593 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3594 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3595 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3596 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3597 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3598 0, // sub_gp8_x1_then_sub_32
3599 },
3600 { // SPILLTOVSRRC_and_VFRC
3601 0, // sub_32
3602 0, // sub_32_hi_phony
3603 0, // sub_64
3604 0, // sub_64_hi_phony
3605 0, // sub_dmr0
3606 0, // sub_dmr1
3607 0, // sub_dmrrow0
3608 0, // sub_dmrrow1
3609 0, // sub_dmrrowp0
3610 0, // sub_dmrrowp1
3611 0, // sub_eq
3612 0, // sub_fp0
3613 0, // sub_fp1
3614 0, // sub_gp8_x0
3615 0, // sub_gp8_x1
3616 0, // sub_gt
3617 0, // sub_lt
3618 0, // sub_pair0
3619 0, // sub_pair1
3620 0, // sub_un
3621 0, // sub_vsx0
3622 0, // sub_vsx1
3623 0, // sub_wacc_hi
3624 0, // sub_wacc_lo
3625 0, // sub_vsx1_then_sub_64
3626 0, // sub_vsx1_then_sub_64_hi_phony
3627 0, // sub_pair1_then_sub_64
3628 0, // sub_pair1_then_sub_64_hi_phony
3629 0, // sub_pair1_then_sub_vsx0
3630 0, // sub_pair1_then_sub_vsx1
3631 0, // sub_pair1_then_sub_vsx1_then_sub_64
3632 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3633 0, // sub_dmrrowp1_then_sub_dmrrow0
3634 0, // sub_dmrrowp1_then_sub_dmrrow1
3635 0, // sub_wacc_hi_then_sub_dmrrow0
3636 0, // sub_wacc_hi_then_sub_dmrrow1
3637 0, // sub_wacc_hi_then_sub_dmrrowp0
3638 0, // sub_wacc_hi_then_sub_dmrrowp1
3639 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3640 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3641 0, // sub_dmr1_then_sub_dmrrow0
3642 0, // sub_dmr1_then_sub_dmrrow1
3643 0, // sub_dmr1_then_sub_dmrrowp0
3644 0, // sub_dmr1_then_sub_dmrrowp1
3645 0, // sub_dmr1_then_sub_wacc_hi
3646 0, // sub_dmr1_then_sub_wacc_lo
3647 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3648 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3649 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3650 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3651 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3652 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3653 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3654 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3655 0, // sub_gp8_x1_then_sub_32
3656 },
3657 { // SPILLTOVSRRC_and_F4RC
3658 0, // sub_32
3659 0, // sub_32_hi_phony
3660 0, // sub_64
3661 0, // sub_64_hi_phony
3662 0, // sub_dmr0
3663 0, // sub_dmr1
3664 0, // sub_dmrrow0
3665 0, // sub_dmrrow1
3666 0, // sub_dmrrowp0
3667 0, // sub_dmrrowp1
3668 0, // sub_eq
3669 0, // sub_fp0
3670 0, // sub_fp1
3671 0, // sub_gp8_x0
3672 0, // sub_gp8_x1
3673 0, // sub_gt
3674 0, // sub_lt
3675 0, // sub_pair0
3676 0, // sub_pair1
3677 0, // sub_un
3678 0, // sub_vsx0
3679 0, // sub_vsx1
3680 0, // sub_wacc_hi
3681 0, // sub_wacc_lo
3682 0, // sub_vsx1_then_sub_64
3683 0, // sub_vsx1_then_sub_64_hi_phony
3684 0, // sub_pair1_then_sub_64
3685 0, // sub_pair1_then_sub_64_hi_phony
3686 0, // sub_pair1_then_sub_vsx0
3687 0, // sub_pair1_then_sub_vsx1
3688 0, // sub_pair1_then_sub_vsx1_then_sub_64
3689 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3690 0, // sub_dmrrowp1_then_sub_dmrrow0
3691 0, // sub_dmrrowp1_then_sub_dmrrow1
3692 0, // sub_wacc_hi_then_sub_dmrrow0
3693 0, // sub_wacc_hi_then_sub_dmrrow1
3694 0, // sub_wacc_hi_then_sub_dmrrowp0
3695 0, // sub_wacc_hi_then_sub_dmrrowp1
3696 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3697 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3698 0, // sub_dmr1_then_sub_dmrrow0
3699 0, // sub_dmr1_then_sub_dmrrow1
3700 0, // sub_dmr1_then_sub_dmrrowp0
3701 0, // sub_dmr1_then_sub_dmrrowp1
3702 0, // sub_dmr1_then_sub_wacc_hi
3703 0, // sub_dmr1_then_sub_wacc_lo
3704 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3705 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3706 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3707 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3708 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3709 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3710 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3711 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3712 0, // sub_gp8_x1_then_sub_32
3713 },
3714 { // CTRRC8
3715 0, // sub_32
3716 0, // sub_32_hi_phony
3717 0, // sub_64
3718 0, // sub_64_hi_phony
3719 0, // sub_dmr0
3720 0, // sub_dmr1
3721 0, // sub_dmrrow0
3722 0, // sub_dmrrow1
3723 0, // sub_dmrrowp0
3724 0, // sub_dmrrowp1
3725 0, // sub_eq
3726 0, // sub_fp0
3727 0, // sub_fp1
3728 0, // sub_gp8_x0
3729 0, // sub_gp8_x1
3730 0, // sub_gt
3731 0, // sub_lt
3732 0, // sub_pair0
3733 0, // sub_pair1
3734 0, // sub_un
3735 0, // sub_vsx0
3736 0, // sub_vsx1
3737 0, // sub_wacc_hi
3738 0, // sub_wacc_lo
3739 0, // sub_vsx1_then_sub_64
3740 0, // sub_vsx1_then_sub_64_hi_phony
3741 0, // sub_pair1_then_sub_64
3742 0, // sub_pair1_then_sub_64_hi_phony
3743 0, // sub_pair1_then_sub_vsx0
3744 0, // sub_pair1_then_sub_vsx1
3745 0, // sub_pair1_then_sub_vsx1_then_sub_64
3746 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3747 0, // sub_dmrrowp1_then_sub_dmrrow0
3748 0, // sub_dmrrowp1_then_sub_dmrrow1
3749 0, // sub_wacc_hi_then_sub_dmrrow0
3750 0, // sub_wacc_hi_then_sub_dmrrow1
3751 0, // sub_wacc_hi_then_sub_dmrrowp0
3752 0, // sub_wacc_hi_then_sub_dmrrowp1
3753 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3754 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3755 0, // sub_dmr1_then_sub_dmrrow0
3756 0, // sub_dmr1_then_sub_dmrrow1
3757 0, // sub_dmr1_then_sub_dmrrowp0
3758 0, // sub_dmr1_then_sub_dmrrowp1
3759 0, // sub_dmr1_then_sub_wacc_hi
3760 0, // sub_dmr1_then_sub_wacc_lo
3761 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3762 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3763 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3764 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3765 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3766 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3767 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3768 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3769 0, // sub_gp8_x1_then_sub_32
3770 },
3771 { // LR8RC
3772 0, // sub_32
3773 0, // sub_32_hi_phony
3774 0, // sub_64
3775 0, // sub_64_hi_phony
3776 0, // sub_dmr0
3777 0, // sub_dmr1
3778 0, // sub_dmrrow0
3779 0, // sub_dmrrow1
3780 0, // sub_dmrrowp0
3781 0, // sub_dmrrowp1
3782 0, // sub_eq
3783 0, // sub_fp0
3784 0, // sub_fp1
3785 0, // sub_gp8_x0
3786 0, // sub_gp8_x1
3787 0, // sub_gt
3788 0, // sub_lt
3789 0, // sub_pair0
3790 0, // sub_pair1
3791 0, // sub_un
3792 0, // sub_vsx0
3793 0, // sub_vsx1
3794 0, // sub_wacc_hi
3795 0, // sub_wacc_lo
3796 0, // sub_vsx1_then_sub_64
3797 0, // sub_vsx1_then_sub_64_hi_phony
3798 0, // sub_pair1_then_sub_64
3799 0, // sub_pair1_then_sub_64_hi_phony
3800 0, // sub_pair1_then_sub_vsx0
3801 0, // sub_pair1_then_sub_vsx1
3802 0, // sub_pair1_then_sub_vsx1_then_sub_64
3803 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3804 0, // sub_dmrrowp1_then_sub_dmrrow0
3805 0, // sub_dmrrowp1_then_sub_dmrrow1
3806 0, // sub_wacc_hi_then_sub_dmrrow0
3807 0, // sub_wacc_hi_then_sub_dmrrow1
3808 0, // sub_wacc_hi_then_sub_dmrrowp0
3809 0, // sub_wacc_hi_then_sub_dmrrowp1
3810 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3811 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3812 0, // sub_dmr1_then_sub_dmrrow0
3813 0, // sub_dmr1_then_sub_dmrrow1
3814 0, // sub_dmr1_then_sub_dmrrowp0
3815 0, // sub_dmr1_then_sub_dmrrowp1
3816 0, // sub_dmr1_then_sub_wacc_hi
3817 0, // sub_dmr1_then_sub_wacc_lo
3818 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3819 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3820 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3821 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3822 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3823 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3824 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3825 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3826 0, // sub_gp8_x1_then_sub_32
3827 },
3828 { // DMRROWRC
3829 0, // sub_32
3830 0, // sub_32_hi_phony
3831 0, // sub_64
3832 0, // sub_64_hi_phony
3833 0, // sub_dmr0
3834 0, // sub_dmr1
3835 0, // sub_dmrrow0
3836 0, // sub_dmrrow1
3837 0, // sub_dmrrowp0
3838 0, // sub_dmrrowp1
3839 0, // sub_eq
3840 0, // sub_fp0
3841 0, // sub_fp1
3842 0, // sub_gp8_x0
3843 0, // sub_gp8_x1
3844 0, // sub_gt
3845 0, // sub_lt
3846 0, // sub_pair0
3847 0, // sub_pair1
3848 0, // sub_un
3849 0, // sub_vsx0
3850 0, // sub_vsx1
3851 0, // sub_wacc_hi
3852 0, // sub_wacc_lo
3853 0, // sub_vsx1_then_sub_64
3854 0, // sub_vsx1_then_sub_64_hi_phony
3855 0, // sub_pair1_then_sub_64
3856 0, // sub_pair1_then_sub_64_hi_phony
3857 0, // sub_pair1_then_sub_vsx0
3858 0, // sub_pair1_then_sub_vsx1
3859 0, // sub_pair1_then_sub_vsx1_then_sub_64
3860 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3861 0, // sub_dmrrowp1_then_sub_dmrrow0
3862 0, // sub_dmrrowp1_then_sub_dmrrow1
3863 0, // sub_wacc_hi_then_sub_dmrrow0
3864 0, // sub_wacc_hi_then_sub_dmrrow1
3865 0, // sub_wacc_hi_then_sub_dmrrowp0
3866 0, // sub_wacc_hi_then_sub_dmrrowp1
3867 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3868 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3869 0, // sub_dmr1_then_sub_dmrrow0
3870 0, // sub_dmr1_then_sub_dmrrow1
3871 0, // sub_dmr1_then_sub_dmrrowp0
3872 0, // sub_dmr1_then_sub_dmrrowp1
3873 0, // sub_dmr1_then_sub_wacc_hi
3874 0, // sub_dmr1_then_sub_wacc_lo
3875 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3876 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3877 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3878 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3879 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3880 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3881 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3882 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3883 0, // sub_gp8_x1_then_sub_32
3884 },
3885 { // VSRC
3886 0, // sub_32
3887 0, // sub_32_hi_phony
3888 30, // sub_64 -> VSRC
3889 30, // sub_64_hi_phony -> VSRC
3890 0, // sub_dmr0
3891 0, // sub_dmr1
3892 0, // sub_dmrrow0
3893 0, // sub_dmrrow1
3894 0, // sub_dmrrowp0
3895 0, // sub_dmrrowp1
3896 0, // sub_eq
3897 0, // sub_fp0
3898 0, // sub_fp1
3899 0, // sub_gp8_x0
3900 0, // sub_gp8_x1
3901 0, // sub_gt
3902 0, // sub_lt
3903 0, // sub_pair0
3904 0, // sub_pair1
3905 0, // sub_un
3906 0, // sub_vsx0
3907 0, // sub_vsx1
3908 0, // sub_wacc_hi
3909 0, // sub_wacc_lo
3910 0, // sub_vsx1_then_sub_64
3911 0, // sub_vsx1_then_sub_64_hi_phony
3912 0, // sub_pair1_then_sub_64
3913 0, // sub_pair1_then_sub_64_hi_phony
3914 0, // sub_pair1_then_sub_vsx0
3915 0, // sub_pair1_then_sub_vsx1
3916 0, // sub_pair1_then_sub_vsx1_then_sub_64
3917 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3918 0, // sub_dmrrowp1_then_sub_dmrrow0
3919 0, // sub_dmrrowp1_then_sub_dmrrow1
3920 0, // sub_wacc_hi_then_sub_dmrrow0
3921 0, // sub_wacc_hi_then_sub_dmrrow1
3922 0, // sub_wacc_hi_then_sub_dmrrowp0
3923 0, // sub_wacc_hi_then_sub_dmrrowp1
3924 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3925 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3926 0, // sub_dmr1_then_sub_dmrrow0
3927 0, // sub_dmr1_then_sub_dmrrow1
3928 0, // sub_dmr1_then_sub_dmrrowp0
3929 0, // sub_dmr1_then_sub_dmrrowp1
3930 0, // sub_dmr1_then_sub_wacc_hi
3931 0, // sub_dmr1_then_sub_wacc_lo
3932 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3933 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3934 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3935 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3936 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3937 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3938 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3939 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3940 0, // sub_gp8_x1_then_sub_32
3941 },
3942 { // VSRC_with_sub_64_in_SPILLTOVSRRC
3943 0, // sub_32
3944 0, // sub_32_hi_phony
3945 31, // sub_64 -> VSRC_with_sub_64_in_SPILLTOVSRRC
3946 31, // sub_64_hi_phony -> VSRC_with_sub_64_in_SPILLTOVSRRC
3947 0, // sub_dmr0
3948 0, // sub_dmr1
3949 0, // sub_dmrrow0
3950 0, // sub_dmrrow1
3951 0, // sub_dmrrowp0
3952 0, // sub_dmrrowp1
3953 0, // sub_eq
3954 0, // sub_fp0
3955 0, // sub_fp1
3956 0, // sub_gp8_x0
3957 0, // sub_gp8_x1
3958 0, // sub_gt
3959 0, // sub_lt
3960 0, // sub_pair0
3961 0, // sub_pair1
3962 0, // sub_un
3963 0, // sub_vsx0
3964 0, // sub_vsx1
3965 0, // sub_wacc_hi
3966 0, // sub_wacc_lo
3967 0, // sub_vsx1_then_sub_64
3968 0, // sub_vsx1_then_sub_64_hi_phony
3969 0, // sub_pair1_then_sub_64
3970 0, // sub_pair1_then_sub_64_hi_phony
3971 0, // sub_pair1_then_sub_vsx0
3972 0, // sub_pair1_then_sub_vsx1
3973 0, // sub_pair1_then_sub_vsx1_then_sub_64
3974 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3975 0, // sub_dmrrowp1_then_sub_dmrrow0
3976 0, // sub_dmrrowp1_then_sub_dmrrow1
3977 0, // sub_wacc_hi_then_sub_dmrrow0
3978 0, // sub_wacc_hi_then_sub_dmrrow1
3979 0, // sub_wacc_hi_then_sub_dmrrowp0
3980 0, // sub_wacc_hi_then_sub_dmrrowp1
3981 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3982 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3983 0, // sub_dmr1_then_sub_dmrrow0
3984 0, // sub_dmr1_then_sub_dmrrow1
3985 0, // sub_dmr1_then_sub_dmrrowp0
3986 0, // sub_dmr1_then_sub_dmrrowp1
3987 0, // sub_dmr1_then_sub_wacc_hi
3988 0, // sub_dmr1_then_sub_wacc_lo
3989 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3990 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3991 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3992 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3993 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3994 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3995 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3996 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3997 0, // sub_gp8_x1_then_sub_32
3998 },
3999 { // VRRC
4000 0, // sub_32
4001 0, // sub_32_hi_phony
4002 32, // sub_64 -> VRRC
4003 32, // sub_64_hi_phony -> VRRC
4004 0, // sub_dmr0
4005 0, // sub_dmr1
4006 0, // sub_dmrrow0
4007 0, // sub_dmrrow1
4008 0, // sub_dmrrowp0
4009 0, // sub_dmrrowp1
4010 0, // sub_eq
4011 0, // sub_fp0
4012 0, // sub_fp1
4013 0, // sub_gp8_x0
4014 0, // sub_gp8_x1
4015 0, // sub_gt
4016 0, // sub_lt
4017 0, // sub_pair0
4018 0, // sub_pair1
4019 0, // sub_un
4020 0, // sub_vsx0
4021 0, // sub_vsx1
4022 0, // sub_wacc_hi
4023 0, // sub_wacc_lo
4024 0, // sub_vsx1_then_sub_64
4025 0, // sub_vsx1_then_sub_64_hi_phony
4026 0, // sub_pair1_then_sub_64
4027 0, // sub_pair1_then_sub_64_hi_phony
4028 0, // sub_pair1_then_sub_vsx0
4029 0, // sub_pair1_then_sub_vsx1
4030 0, // sub_pair1_then_sub_vsx1_then_sub_64
4031 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4032 0, // sub_dmrrowp1_then_sub_dmrrow0
4033 0, // sub_dmrrowp1_then_sub_dmrrow1
4034 0, // sub_wacc_hi_then_sub_dmrrow0
4035 0, // sub_wacc_hi_then_sub_dmrrow1
4036 0, // sub_wacc_hi_then_sub_dmrrowp0
4037 0, // sub_wacc_hi_then_sub_dmrrowp1
4038 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4039 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4040 0, // sub_dmr1_then_sub_dmrrow0
4041 0, // sub_dmr1_then_sub_dmrrow1
4042 0, // sub_dmr1_then_sub_dmrrowp0
4043 0, // sub_dmr1_then_sub_dmrrowp1
4044 0, // sub_dmr1_then_sub_wacc_hi
4045 0, // sub_dmr1_then_sub_wacc_lo
4046 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4047 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4048 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4049 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4050 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4051 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4052 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4053 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4054 0, // sub_gp8_x1_then_sub_32
4055 },
4056 { // VSLRC
4057 0, // sub_32
4058 0, // sub_32_hi_phony
4059 33, // sub_64 -> VSLRC
4060 33, // sub_64_hi_phony -> VSLRC
4061 0, // sub_dmr0
4062 0, // sub_dmr1
4063 0, // sub_dmrrow0
4064 0, // sub_dmrrow1
4065 0, // sub_dmrrowp0
4066 0, // sub_dmrrowp1
4067 0, // sub_eq
4068 0, // sub_fp0
4069 0, // sub_fp1
4070 0, // sub_gp8_x0
4071 0, // sub_gp8_x1
4072 0, // sub_gt
4073 0, // sub_lt
4074 0, // sub_pair0
4075 0, // sub_pair1
4076 0, // sub_un
4077 0, // sub_vsx0
4078 0, // sub_vsx1
4079 0, // sub_wacc_hi
4080 0, // sub_wacc_lo
4081 0, // sub_vsx1_then_sub_64
4082 0, // sub_vsx1_then_sub_64_hi_phony
4083 0, // sub_pair1_then_sub_64
4084 0, // sub_pair1_then_sub_64_hi_phony
4085 0, // sub_pair1_then_sub_vsx0
4086 0, // sub_pair1_then_sub_vsx1
4087 0, // sub_pair1_then_sub_vsx1_then_sub_64
4088 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4089 0, // sub_dmrrowp1_then_sub_dmrrow0
4090 0, // sub_dmrrowp1_then_sub_dmrrow1
4091 0, // sub_wacc_hi_then_sub_dmrrow0
4092 0, // sub_wacc_hi_then_sub_dmrrow1
4093 0, // sub_wacc_hi_then_sub_dmrrowp0
4094 0, // sub_wacc_hi_then_sub_dmrrowp1
4095 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4096 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4097 0, // sub_dmr1_then_sub_dmrrow0
4098 0, // sub_dmr1_then_sub_dmrrow1
4099 0, // sub_dmr1_then_sub_dmrrowp0
4100 0, // sub_dmr1_then_sub_dmrrowp1
4101 0, // sub_dmr1_then_sub_wacc_hi
4102 0, // sub_dmr1_then_sub_wacc_lo
4103 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4104 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4105 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4106 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4107 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4108 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4109 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4110 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4111 0, // sub_gp8_x1_then_sub_32
4112 },
4113 { // VRRC_with_sub_64_in_SPILLTOVSRRC
4114 0, // sub_32
4115 0, // sub_32_hi_phony
4116 34, // sub_64 -> VRRC_with_sub_64_in_SPILLTOVSRRC
4117 34, // sub_64_hi_phony -> VRRC_with_sub_64_in_SPILLTOVSRRC
4118 0, // sub_dmr0
4119 0, // sub_dmr1
4120 0, // sub_dmrrow0
4121 0, // sub_dmrrow1
4122 0, // sub_dmrrowp0
4123 0, // sub_dmrrowp1
4124 0, // sub_eq
4125 0, // sub_fp0
4126 0, // sub_fp1
4127 0, // sub_gp8_x0
4128 0, // sub_gp8_x1
4129 0, // sub_gt
4130 0, // sub_lt
4131 0, // sub_pair0
4132 0, // sub_pair1
4133 0, // sub_un
4134 0, // sub_vsx0
4135 0, // sub_vsx1
4136 0, // sub_wacc_hi
4137 0, // sub_wacc_lo
4138 0, // sub_vsx1_then_sub_64
4139 0, // sub_vsx1_then_sub_64_hi_phony
4140 0, // sub_pair1_then_sub_64
4141 0, // sub_pair1_then_sub_64_hi_phony
4142 0, // sub_pair1_then_sub_vsx0
4143 0, // sub_pair1_then_sub_vsx1
4144 0, // sub_pair1_then_sub_vsx1_then_sub_64
4145 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4146 0, // sub_dmrrowp1_then_sub_dmrrow0
4147 0, // sub_dmrrowp1_then_sub_dmrrow1
4148 0, // sub_wacc_hi_then_sub_dmrrow0
4149 0, // sub_wacc_hi_then_sub_dmrrow1
4150 0, // sub_wacc_hi_then_sub_dmrrowp0
4151 0, // sub_wacc_hi_then_sub_dmrrowp1
4152 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4153 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4154 0, // sub_dmr1_then_sub_dmrrow0
4155 0, // sub_dmr1_then_sub_dmrrow1
4156 0, // sub_dmr1_then_sub_dmrrowp0
4157 0, // sub_dmr1_then_sub_dmrrowp1
4158 0, // sub_dmr1_then_sub_wacc_hi
4159 0, // sub_dmr1_then_sub_wacc_lo
4160 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4161 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4162 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4163 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4164 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4165 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4166 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4167 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4168 0, // sub_gp8_x1_then_sub_32
4169 },
4170 { // FpRC
4171 0, // sub_32
4172 0, // sub_32_hi_phony
4173 0, // sub_64
4174 0, // sub_64_hi_phony
4175 0, // sub_dmr0
4176 0, // sub_dmr1
4177 0, // sub_dmrrow0
4178 0, // sub_dmrrow1
4179 0, // sub_dmrrowp0
4180 0, // sub_dmrrowp1
4181 0, // sub_eq
4182 35, // sub_fp0 -> FpRC
4183 35, // sub_fp1 -> FpRC
4184 0, // sub_gp8_x0
4185 0, // sub_gp8_x1
4186 0, // sub_gt
4187 0, // sub_lt
4188 0, // sub_pair0
4189 0, // sub_pair1
4190 0, // sub_un
4191 0, // sub_vsx0
4192 0, // sub_vsx1
4193 0, // sub_wacc_hi
4194 0, // sub_wacc_lo
4195 0, // sub_vsx1_then_sub_64
4196 0, // sub_vsx1_then_sub_64_hi_phony
4197 0, // sub_pair1_then_sub_64
4198 0, // sub_pair1_then_sub_64_hi_phony
4199 0, // sub_pair1_then_sub_vsx0
4200 0, // sub_pair1_then_sub_vsx1
4201 0, // sub_pair1_then_sub_vsx1_then_sub_64
4202 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4203 0, // sub_dmrrowp1_then_sub_dmrrow0
4204 0, // sub_dmrrowp1_then_sub_dmrrow1
4205 0, // sub_wacc_hi_then_sub_dmrrow0
4206 0, // sub_wacc_hi_then_sub_dmrrow1
4207 0, // sub_wacc_hi_then_sub_dmrrowp0
4208 0, // sub_wacc_hi_then_sub_dmrrowp1
4209 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4210 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4211 0, // sub_dmr1_then_sub_dmrrow0
4212 0, // sub_dmr1_then_sub_dmrrow1
4213 0, // sub_dmr1_then_sub_dmrrowp0
4214 0, // sub_dmr1_then_sub_dmrrowp1
4215 0, // sub_dmr1_then_sub_wacc_hi
4216 0, // sub_dmr1_then_sub_wacc_lo
4217 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4218 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4219 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4220 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4221 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4222 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4223 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4224 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4225 0, // sub_gp8_x1_then_sub_32
4226 },
4227 { // G8pRC
4228 36, // sub_32 -> G8pRC
4229 0, // sub_32_hi_phony
4230 0, // sub_64
4231 0, // sub_64_hi_phony
4232 0, // sub_dmr0
4233 0, // sub_dmr1
4234 0, // sub_dmrrow0
4235 0, // sub_dmrrow1
4236 0, // sub_dmrrowp0
4237 0, // sub_dmrrowp1
4238 0, // sub_eq
4239 0, // sub_fp0
4240 0, // sub_fp1
4241 36, // sub_gp8_x0 -> G8pRC
4242 36, // sub_gp8_x1 -> G8pRC
4243 0, // sub_gt
4244 0, // sub_lt
4245 0, // sub_pair0
4246 0, // sub_pair1
4247 0, // sub_un
4248 0, // sub_vsx0
4249 0, // sub_vsx1
4250 0, // sub_wacc_hi
4251 0, // sub_wacc_lo
4252 0, // sub_vsx1_then_sub_64
4253 0, // sub_vsx1_then_sub_64_hi_phony
4254 0, // sub_pair1_then_sub_64
4255 0, // sub_pair1_then_sub_64_hi_phony
4256 0, // sub_pair1_then_sub_vsx0
4257 0, // sub_pair1_then_sub_vsx1
4258 0, // sub_pair1_then_sub_vsx1_then_sub_64
4259 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4260 0, // sub_dmrrowp1_then_sub_dmrrow0
4261 0, // sub_dmrrowp1_then_sub_dmrrow1
4262 0, // sub_wacc_hi_then_sub_dmrrow0
4263 0, // sub_wacc_hi_then_sub_dmrrow1
4264 0, // sub_wacc_hi_then_sub_dmrrowp0
4265 0, // sub_wacc_hi_then_sub_dmrrowp1
4266 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4267 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4268 0, // sub_dmr1_then_sub_dmrrow0
4269 0, // sub_dmr1_then_sub_dmrrow1
4270 0, // sub_dmr1_then_sub_dmrrowp0
4271 0, // sub_dmr1_then_sub_dmrrowp1
4272 0, // sub_dmr1_then_sub_wacc_hi
4273 0, // sub_dmr1_then_sub_wacc_lo
4274 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4275 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4276 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4277 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4278 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4279 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4280 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4281 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4282 36, // sub_gp8_x1_then_sub_32 -> G8pRC
4283 },
4284 { // G8pRC_with_sub_32_in_GPRC_NOR0
4285 37, // sub_32 -> G8pRC_with_sub_32_in_GPRC_NOR0
4286 0, // sub_32_hi_phony
4287 0, // sub_64
4288 0, // sub_64_hi_phony
4289 0, // sub_dmr0
4290 0, // sub_dmr1
4291 0, // sub_dmrrow0
4292 0, // sub_dmrrow1
4293 0, // sub_dmrrowp0
4294 0, // sub_dmrrowp1
4295 0, // sub_eq
4296 0, // sub_fp0
4297 0, // sub_fp1
4298 37, // sub_gp8_x0 -> G8pRC_with_sub_32_in_GPRC_NOR0
4299 37, // sub_gp8_x1 -> G8pRC_with_sub_32_in_GPRC_NOR0
4300 0, // sub_gt
4301 0, // sub_lt
4302 0, // sub_pair0
4303 0, // sub_pair1
4304 0, // sub_un
4305 0, // sub_vsx0
4306 0, // sub_vsx1
4307 0, // sub_wacc_hi
4308 0, // sub_wacc_lo
4309 0, // sub_vsx1_then_sub_64
4310 0, // sub_vsx1_then_sub_64_hi_phony
4311 0, // sub_pair1_then_sub_64
4312 0, // sub_pair1_then_sub_64_hi_phony
4313 0, // sub_pair1_then_sub_vsx0
4314 0, // sub_pair1_then_sub_vsx1
4315 0, // sub_pair1_then_sub_vsx1_then_sub_64
4316 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4317 0, // sub_dmrrowp1_then_sub_dmrrow0
4318 0, // sub_dmrrowp1_then_sub_dmrrow1
4319 0, // sub_wacc_hi_then_sub_dmrrow0
4320 0, // sub_wacc_hi_then_sub_dmrrow1
4321 0, // sub_wacc_hi_then_sub_dmrrowp0
4322 0, // sub_wacc_hi_then_sub_dmrrowp1
4323 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4324 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4325 0, // sub_dmr1_then_sub_dmrrow0
4326 0, // sub_dmr1_then_sub_dmrrow1
4327 0, // sub_dmr1_then_sub_dmrrowp0
4328 0, // sub_dmr1_then_sub_dmrrowp1
4329 0, // sub_dmr1_then_sub_wacc_hi
4330 0, // sub_dmr1_then_sub_wacc_lo
4331 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4332 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4333 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4334 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4335 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4336 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4337 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4338 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4339 37, // sub_gp8_x1_then_sub_32 -> G8pRC_with_sub_32_in_GPRC_NOR0
4340 },
4341 { // VSLRC_with_sub_64_in_SPILLTOVSRRC
4342 0, // sub_32
4343 0, // sub_32_hi_phony
4344 38, // sub_64 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
4345 38, // sub_64_hi_phony -> VSLRC_with_sub_64_in_SPILLTOVSRRC
4346 0, // sub_dmr0
4347 0, // sub_dmr1
4348 0, // sub_dmrrow0
4349 0, // sub_dmrrow1
4350 0, // sub_dmrrowp0
4351 0, // sub_dmrrowp1
4352 0, // sub_eq
4353 0, // sub_fp0
4354 0, // sub_fp1
4355 0, // sub_gp8_x0
4356 0, // sub_gp8_x1
4357 0, // sub_gt
4358 0, // sub_lt
4359 0, // sub_pair0
4360 0, // sub_pair1
4361 0, // sub_un
4362 0, // sub_vsx0
4363 0, // sub_vsx1
4364 0, // sub_wacc_hi
4365 0, // sub_wacc_lo
4366 0, // sub_vsx1_then_sub_64
4367 0, // sub_vsx1_then_sub_64_hi_phony
4368 0, // sub_pair1_then_sub_64
4369 0, // sub_pair1_then_sub_64_hi_phony
4370 0, // sub_pair1_then_sub_vsx0
4371 0, // sub_pair1_then_sub_vsx1
4372 0, // sub_pair1_then_sub_vsx1_then_sub_64
4373 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4374 0, // sub_dmrrowp1_then_sub_dmrrow0
4375 0, // sub_dmrrowp1_then_sub_dmrrow1
4376 0, // sub_wacc_hi_then_sub_dmrrow0
4377 0, // sub_wacc_hi_then_sub_dmrrow1
4378 0, // sub_wacc_hi_then_sub_dmrrowp0
4379 0, // sub_wacc_hi_then_sub_dmrrowp1
4380 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4381 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4382 0, // sub_dmr1_then_sub_dmrrow0
4383 0, // sub_dmr1_then_sub_dmrrow1
4384 0, // sub_dmr1_then_sub_dmrrowp0
4385 0, // sub_dmr1_then_sub_dmrrowp1
4386 0, // sub_dmr1_then_sub_wacc_hi
4387 0, // sub_dmr1_then_sub_wacc_lo
4388 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4389 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4390 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4391 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4392 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4393 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4394 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4395 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4396 0, // sub_gp8_x1_then_sub_32
4397 },
4398 { // FpRC_with_sub_fp0_in_SPILLTOVSRRC
4399 0, // sub_32
4400 0, // sub_32_hi_phony
4401 0, // sub_64
4402 0, // sub_64_hi_phony
4403 0, // sub_dmr0
4404 0, // sub_dmr1
4405 0, // sub_dmrrow0
4406 0, // sub_dmrrow1
4407 0, // sub_dmrrowp0
4408 0, // sub_dmrrowp1
4409 0, // sub_eq
4410 39, // sub_fp0 -> FpRC_with_sub_fp0_in_SPILLTOVSRRC
4411 39, // sub_fp1 -> FpRC_with_sub_fp0_in_SPILLTOVSRRC
4412 0, // sub_gp8_x0
4413 0, // sub_gp8_x1
4414 0, // sub_gt
4415 0, // sub_lt
4416 0, // sub_pair0
4417 0, // sub_pair1
4418 0, // sub_un
4419 0, // sub_vsx0
4420 0, // sub_vsx1
4421 0, // sub_wacc_hi
4422 0, // sub_wacc_lo
4423 0, // sub_vsx1_then_sub_64
4424 0, // sub_vsx1_then_sub_64_hi_phony
4425 0, // sub_pair1_then_sub_64
4426 0, // sub_pair1_then_sub_64_hi_phony
4427 0, // sub_pair1_then_sub_vsx0
4428 0, // sub_pair1_then_sub_vsx1
4429 0, // sub_pair1_then_sub_vsx1_then_sub_64
4430 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4431 0, // sub_dmrrowp1_then_sub_dmrrow0
4432 0, // sub_dmrrowp1_then_sub_dmrrow1
4433 0, // sub_wacc_hi_then_sub_dmrrow0
4434 0, // sub_wacc_hi_then_sub_dmrrow1
4435 0, // sub_wacc_hi_then_sub_dmrrowp0
4436 0, // sub_wacc_hi_then_sub_dmrrowp1
4437 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4438 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4439 0, // sub_dmr1_then_sub_dmrrow0
4440 0, // sub_dmr1_then_sub_dmrrow1
4441 0, // sub_dmr1_then_sub_dmrrowp0
4442 0, // sub_dmr1_then_sub_dmrrowp1
4443 0, // sub_dmr1_then_sub_wacc_hi
4444 0, // sub_dmr1_then_sub_wacc_lo
4445 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4446 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4447 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4448 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4449 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4450 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4451 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4452 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4453 0, // sub_gp8_x1_then_sub_32
4454 },
4455 { // DMRROWpRC
4456 0, // sub_32
4457 0, // sub_32_hi_phony
4458 0, // sub_64
4459 0, // sub_64_hi_phony
4460 0, // sub_dmr0
4461 0, // sub_dmr1
4462 40, // sub_dmrrow0 -> DMRROWpRC
4463 40, // sub_dmrrow1 -> DMRROWpRC
4464 0, // sub_dmrrowp0
4465 0, // sub_dmrrowp1
4466 0, // sub_eq
4467 0, // sub_fp0
4468 0, // sub_fp1
4469 0, // sub_gp8_x0
4470 0, // sub_gp8_x1
4471 0, // sub_gt
4472 0, // sub_lt
4473 0, // sub_pair0
4474 0, // sub_pair1
4475 0, // sub_un
4476 0, // sub_vsx0
4477 0, // sub_vsx1
4478 0, // sub_wacc_hi
4479 0, // sub_wacc_lo
4480 0, // sub_vsx1_then_sub_64
4481 0, // sub_vsx1_then_sub_64_hi_phony
4482 0, // sub_pair1_then_sub_64
4483 0, // sub_pair1_then_sub_64_hi_phony
4484 0, // sub_pair1_then_sub_vsx0
4485 0, // sub_pair1_then_sub_vsx1
4486 0, // sub_pair1_then_sub_vsx1_then_sub_64
4487 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4488 0, // sub_dmrrowp1_then_sub_dmrrow0
4489 0, // sub_dmrrowp1_then_sub_dmrrow1
4490 0, // sub_wacc_hi_then_sub_dmrrow0
4491 0, // sub_wacc_hi_then_sub_dmrrow1
4492 0, // sub_wacc_hi_then_sub_dmrrowp0
4493 0, // sub_wacc_hi_then_sub_dmrrowp1
4494 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4495 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4496 0, // sub_dmr1_then_sub_dmrrow0
4497 0, // sub_dmr1_then_sub_dmrrow1
4498 0, // sub_dmr1_then_sub_dmrrowp0
4499 0, // sub_dmr1_then_sub_dmrrowp1
4500 0, // sub_dmr1_then_sub_wacc_hi
4501 0, // sub_dmr1_then_sub_wacc_lo
4502 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4503 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4504 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4505 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4506 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4507 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4508 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4509 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4510 0, // sub_gp8_x1_then_sub_32
4511 },
4512 { // VSRpRC
4513 0, // sub_32
4514 0, // sub_32_hi_phony
4515 41, // sub_64 -> VSRpRC
4516 41, // sub_64_hi_phony -> VSRpRC
4517 0, // sub_dmr0
4518 0, // sub_dmr1
4519 0, // sub_dmrrow0
4520 0, // sub_dmrrow1
4521 0, // sub_dmrrowp0
4522 0, // sub_dmrrowp1
4523 0, // sub_eq
4524 0, // sub_fp0
4525 0, // sub_fp1
4526 0, // sub_gp8_x0
4527 0, // sub_gp8_x1
4528 0, // sub_gt
4529 0, // sub_lt
4530 0, // sub_pair0
4531 0, // sub_pair1
4532 0, // sub_un
4533 41, // sub_vsx0 -> VSRpRC
4534 41, // sub_vsx1 -> VSRpRC
4535 0, // sub_wacc_hi
4536 0, // sub_wacc_lo
4537 41, // sub_vsx1_then_sub_64 -> VSRpRC
4538 41, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC
4539 0, // sub_pair1_then_sub_64
4540 0, // sub_pair1_then_sub_64_hi_phony
4541 0, // sub_pair1_then_sub_vsx0
4542 0, // sub_pair1_then_sub_vsx1
4543 0, // sub_pair1_then_sub_vsx1_then_sub_64
4544 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4545 0, // sub_dmrrowp1_then_sub_dmrrow0
4546 0, // sub_dmrrowp1_then_sub_dmrrow1
4547 0, // sub_wacc_hi_then_sub_dmrrow0
4548 0, // sub_wacc_hi_then_sub_dmrrow1
4549 0, // sub_wacc_hi_then_sub_dmrrowp0
4550 0, // sub_wacc_hi_then_sub_dmrrowp1
4551 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4552 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4553 0, // sub_dmr1_then_sub_dmrrow0
4554 0, // sub_dmr1_then_sub_dmrrow1
4555 0, // sub_dmr1_then_sub_dmrrowp0
4556 0, // sub_dmr1_then_sub_dmrrowp1
4557 0, // sub_dmr1_then_sub_wacc_hi
4558 0, // sub_dmr1_then_sub_wacc_lo
4559 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4560 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4561 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4562 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4563 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4564 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4565 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4566 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4567 0, // sub_gp8_x1_then_sub_32
4568 },
4569 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC
4570 0, // sub_32
4571 0, // sub_32_hi_phony
4572 42, // sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4573 42, // sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4574 0, // sub_dmr0
4575 0, // sub_dmr1
4576 0, // sub_dmrrow0
4577 0, // sub_dmrrow1
4578 0, // sub_dmrrowp0
4579 0, // sub_dmrrowp1
4580 0, // sub_eq
4581 0, // sub_fp0
4582 0, // sub_fp1
4583 0, // sub_gp8_x0
4584 0, // sub_gp8_x1
4585 0, // sub_gt
4586 0, // sub_lt
4587 0, // sub_pair0
4588 0, // sub_pair1
4589 0, // sub_un
4590 42, // sub_vsx0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4591 42, // sub_vsx1 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4592 0, // sub_wacc_hi
4593 0, // sub_wacc_lo
4594 42, // sub_vsx1_then_sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4595 42, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4596 0, // sub_pair1_then_sub_64
4597 0, // sub_pair1_then_sub_64_hi_phony
4598 0, // sub_pair1_then_sub_vsx0
4599 0, // sub_pair1_then_sub_vsx1
4600 0, // sub_pair1_then_sub_vsx1_then_sub_64
4601 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4602 0, // sub_dmrrowp1_then_sub_dmrrow0
4603 0, // sub_dmrrowp1_then_sub_dmrrow1
4604 0, // sub_wacc_hi_then_sub_dmrrow0
4605 0, // sub_wacc_hi_then_sub_dmrrow1
4606 0, // sub_wacc_hi_then_sub_dmrrowp0
4607 0, // sub_wacc_hi_then_sub_dmrrowp1
4608 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4609 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4610 0, // sub_dmr1_then_sub_dmrrow0
4611 0, // sub_dmr1_then_sub_dmrrow1
4612 0, // sub_dmr1_then_sub_dmrrowp0
4613 0, // sub_dmr1_then_sub_dmrrowp1
4614 0, // sub_dmr1_then_sub_wacc_hi
4615 0, // sub_dmr1_then_sub_wacc_lo
4616 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4617 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4618 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4619 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4620 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4621 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4622 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4623 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4624 0, // sub_gp8_x1_then_sub_32
4625 },
4626 { // VSRpRC_with_sub_64_in_F4RC
4627 0, // sub_32
4628 0, // sub_32_hi_phony
4629 43, // sub_64 -> VSRpRC_with_sub_64_in_F4RC
4630 43, // sub_64_hi_phony -> VSRpRC_with_sub_64_in_F4RC
4631 0, // sub_dmr0
4632 0, // sub_dmr1
4633 0, // sub_dmrrow0
4634 0, // sub_dmrrow1
4635 0, // sub_dmrrowp0
4636 0, // sub_dmrrowp1
4637 0, // sub_eq
4638 0, // sub_fp0
4639 0, // sub_fp1
4640 0, // sub_gp8_x0
4641 0, // sub_gp8_x1
4642 0, // sub_gt
4643 0, // sub_lt
4644 0, // sub_pair0
4645 0, // sub_pair1
4646 0, // sub_un
4647 43, // sub_vsx0 -> VSRpRC_with_sub_64_in_F4RC
4648 43, // sub_vsx1 -> VSRpRC_with_sub_64_in_F4RC
4649 0, // sub_wacc_hi
4650 0, // sub_wacc_lo
4651 43, // sub_vsx1_then_sub_64 -> VSRpRC_with_sub_64_in_F4RC
4652 43, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC_with_sub_64_in_F4RC
4653 0, // sub_pair1_then_sub_64
4654 0, // sub_pair1_then_sub_64_hi_phony
4655 0, // sub_pair1_then_sub_vsx0
4656 0, // sub_pair1_then_sub_vsx1
4657 0, // sub_pair1_then_sub_vsx1_then_sub_64
4658 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4659 0, // sub_dmrrowp1_then_sub_dmrrow0
4660 0, // sub_dmrrowp1_then_sub_dmrrow1
4661 0, // sub_wacc_hi_then_sub_dmrrow0
4662 0, // sub_wacc_hi_then_sub_dmrrow1
4663 0, // sub_wacc_hi_then_sub_dmrrowp0
4664 0, // sub_wacc_hi_then_sub_dmrrowp1
4665 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4666 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4667 0, // sub_dmr1_then_sub_dmrrow0
4668 0, // sub_dmr1_then_sub_dmrrow1
4669 0, // sub_dmr1_then_sub_dmrrowp0
4670 0, // sub_dmr1_then_sub_dmrrowp1
4671 0, // sub_dmr1_then_sub_wacc_hi
4672 0, // sub_dmr1_then_sub_wacc_lo
4673 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4674 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4675 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4676 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4677 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4678 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4679 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4680 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4681 0, // sub_gp8_x1_then_sub_32
4682 },
4683 { // VSRpRC_with_sub_64_in_VFRC
4684 0, // sub_32
4685 0, // sub_32_hi_phony
4686 44, // sub_64 -> VSRpRC_with_sub_64_in_VFRC
4687 44, // sub_64_hi_phony -> VSRpRC_with_sub_64_in_VFRC
4688 0, // sub_dmr0
4689 0, // sub_dmr1
4690 0, // sub_dmrrow0
4691 0, // sub_dmrrow1
4692 0, // sub_dmrrowp0
4693 0, // sub_dmrrowp1
4694 0, // sub_eq
4695 0, // sub_fp0
4696 0, // sub_fp1
4697 0, // sub_gp8_x0
4698 0, // sub_gp8_x1
4699 0, // sub_gt
4700 0, // sub_lt
4701 0, // sub_pair0
4702 0, // sub_pair1
4703 0, // sub_un
4704 44, // sub_vsx0 -> VSRpRC_with_sub_64_in_VFRC
4705 44, // sub_vsx1 -> VSRpRC_with_sub_64_in_VFRC
4706 0, // sub_wacc_hi
4707 0, // sub_wacc_lo
4708 44, // sub_vsx1_then_sub_64 -> VSRpRC_with_sub_64_in_VFRC
4709 44, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC_with_sub_64_in_VFRC
4710 0, // sub_pair1_then_sub_64
4711 0, // sub_pair1_then_sub_64_hi_phony
4712 0, // sub_pair1_then_sub_vsx0
4713 0, // sub_pair1_then_sub_vsx1
4714 0, // sub_pair1_then_sub_vsx1_then_sub_64
4715 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4716 0, // sub_dmrrowp1_then_sub_dmrrow0
4717 0, // sub_dmrrowp1_then_sub_dmrrow1
4718 0, // sub_wacc_hi_then_sub_dmrrow0
4719 0, // sub_wacc_hi_then_sub_dmrrow1
4720 0, // sub_wacc_hi_then_sub_dmrrowp0
4721 0, // sub_wacc_hi_then_sub_dmrrowp1
4722 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4723 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4724 0, // sub_dmr1_then_sub_dmrrow0
4725 0, // sub_dmr1_then_sub_dmrrow1
4726 0, // sub_dmr1_then_sub_dmrrowp0
4727 0, // sub_dmr1_then_sub_dmrrowp1
4728 0, // sub_dmr1_then_sub_wacc_hi
4729 0, // sub_dmr1_then_sub_wacc_lo
4730 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4731 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4732 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4733 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4734 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4735 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4736 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4737 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4738 0, // sub_gp8_x1_then_sub_32
4739 },
4740 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4741 0, // sub_32
4742 0, // sub_32_hi_phony
4743 45, // sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4744 45, // sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4745 0, // sub_dmr0
4746 0, // sub_dmr1
4747 0, // sub_dmrrow0
4748 0, // sub_dmrrow1
4749 0, // sub_dmrrowp0
4750 0, // sub_dmrrowp1
4751 0, // sub_eq
4752 0, // sub_fp0
4753 0, // sub_fp1
4754 0, // sub_gp8_x0
4755 0, // sub_gp8_x1
4756 0, // sub_gt
4757 0, // sub_lt
4758 0, // sub_pair0
4759 0, // sub_pair1
4760 0, // sub_un
4761 45, // sub_vsx0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4762 45, // sub_vsx1 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4763 0, // sub_wacc_hi
4764 0, // sub_wacc_lo
4765 45, // sub_vsx1_then_sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4766 45, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4767 0, // sub_pair1_then_sub_64
4768 0, // sub_pair1_then_sub_64_hi_phony
4769 0, // sub_pair1_then_sub_vsx0
4770 0, // sub_pair1_then_sub_vsx1
4771 0, // sub_pair1_then_sub_vsx1_then_sub_64
4772 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4773 0, // sub_dmrrowp1_then_sub_dmrrow0
4774 0, // sub_dmrrowp1_then_sub_dmrrow1
4775 0, // sub_wacc_hi_then_sub_dmrrow0
4776 0, // sub_wacc_hi_then_sub_dmrrow1
4777 0, // sub_wacc_hi_then_sub_dmrrowp0
4778 0, // sub_wacc_hi_then_sub_dmrrowp1
4779 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4780 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4781 0, // sub_dmr1_then_sub_dmrrow0
4782 0, // sub_dmr1_then_sub_dmrrow1
4783 0, // sub_dmr1_then_sub_dmrrowp0
4784 0, // sub_dmr1_then_sub_dmrrowp1
4785 0, // sub_dmr1_then_sub_wacc_hi
4786 0, // sub_dmr1_then_sub_wacc_lo
4787 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4788 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4789 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4790 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4791 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4792 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4793 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4794 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4795 0, // sub_gp8_x1_then_sub_32
4796 },
4797 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4798 0, // sub_32
4799 0, // sub_32_hi_phony
4800 46, // sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4801 46, // sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4802 0, // sub_dmr0
4803 0, // sub_dmr1
4804 0, // sub_dmrrow0
4805 0, // sub_dmrrow1
4806 0, // sub_dmrrowp0
4807 0, // sub_dmrrowp1
4808 0, // sub_eq
4809 0, // sub_fp0
4810 0, // sub_fp1
4811 0, // sub_gp8_x0
4812 0, // sub_gp8_x1
4813 0, // sub_gt
4814 0, // sub_lt
4815 0, // sub_pair0
4816 0, // sub_pair1
4817 0, // sub_un
4818 46, // sub_vsx0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4819 46, // sub_vsx1 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4820 0, // sub_wacc_hi
4821 0, // sub_wacc_lo
4822 46, // sub_vsx1_then_sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4823 46, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4824 0, // sub_pair1_then_sub_64
4825 0, // sub_pair1_then_sub_64_hi_phony
4826 0, // sub_pair1_then_sub_vsx0
4827 0, // sub_pair1_then_sub_vsx1
4828 0, // sub_pair1_then_sub_vsx1_then_sub_64
4829 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4830 0, // sub_dmrrowp1_then_sub_dmrrow0
4831 0, // sub_dmrrowp1_then_sub_dmrrow1
4832 0, // sub_wacc_hi_then_sub_dmrrow0
4833 0, // sub_wacc_hi_then_sub_dmrrow1
4834 0, // sub_wacc_hi_then_sub_dmrrowp0
4835 0, // sub_wacc_hi_then_sub_dmrrowp1
4836 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4837 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4838 0, // sub_dmr1_then_sub_dmrrow0
4839 0, // sub_dmr1_then_sub_dmrrow1
4840 0, // sub_dmr1_then_sub_dmrrowp0
4841 0, // sub_dmr1_then_sub_dmrrowp1
4842 0, // sub_dmr1_then_sub_wacc_hi
4843 0, // sub_dmr1_then_sub_wacc_lo
4844 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4845 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4846 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4847 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4848 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4849 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4850 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4851 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4852 0, // sub_gp8_x1_then_sub_32
4853 },
4854 { // ACCRC
4855 0, // sub_32
4856 0, // sub_32_hi_phony
4857 47, // sub_64 -> ACCRC
4858 47, // sub_64_hi_phony -> ACCRC
4859 0, // sub_dmr0
4860 0, // sub_dmr1
4861 0, // sub_dmrrow0
4862 0, // sub_dmrrow1
4863 0, // sub_dmrrowp0
4864 0, // sub_dmrrowp1
4865 0, // sub_eq
4866 0, // sub_fp0
4867 0, // sub_fp1
4868 0, // sub_gp8_x0
4869 0, // sub_gp8_x1
4870 0, // sub_gt
4871 0, // sub_lt
4872 47, // sub_pair0 -> ACCRC
4873 47, // sub_pair1 -> ACCRC
4874 0, // sub_un
4875 47, // sub_vsx0 -> ACCRC
4876 47, // sub_vsx1 -> ACCRC
4877 0, // sub_wacc_hi
4878 0, // sub_wacc_lo
4879 47, // sub_vsx1_then_sub_64 -> ACCRC
4880 47, // sub_vsx1_then_sub_64_hi_phony -> ACCRC
4881 47, // sub_pair1_then_sub_64 -> ACCRC
4882 47, // sub_pair1_then_sub_64_hi_phony -> ACCRC
4883 47, // sub_pair1_then_sub_vsx0 -> ACCRC
4884 47, // sub_pair1_then_sub_vsx1 -> ACCRC
4885 47, // sub_pair1_then_sub_vsx1_then_sub_64 -> ACCRC
4886 47, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> ACCRC
4887 0, // sub_dmrrowp1_then_sub_dmrrow0
4888 0, // sub_dmrrowp1_then_sub_dmrrow1
4889 0, // sub_wacc_hi_then_sub_dmrrow0
4890 0, // sub_wacc_hi_then_sub_dmrrow1
4891 0, // sub_wacc_hi_then_sub_dmrrowp0
4892 0, // sub_wacc_hi_then_sub_dmrrowp1
4893 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4894 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4895 0, // sub_dmr1_then_sub_dmrrow0
4896 0, // sub_dmr1_then_sub_dmrrow1
4897 0, // sub_dmr1_then_sub_dmrrowp0
4898 0, // sub_dmr1_then_sub_dmrrowp1
4899 0, // sub_dmr1_then_sub_wacc_hi
4900 0, // sub_dmr1_then_sub_wacc_lo
4901 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4902 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4903 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4904 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4905 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4906 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4907 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4908 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4909 0, // sub_gp8_x1_then_sub_32
4910 },
4911 { // UACCRC
4912 0, // sub_32
4913 0, // sub_32_hi_phony
4914 48, // sub_64 -> UACCRC
4915 48, // sub_64_hi_phony -> UACCRC
4916 0, // sub_dmr0
4917 0, // sub_dmr1
4918 0, // sub_dmrrow0
4919 0, // sub_dmrrow1
4920 0, // sub_dmrrowp0
4921 0, // sub_dmrrowp1
4922 0, // sub_eq
4923 0, // sub_fp0
4924 0, // sub_fp1
4925 0, // sub_gp8_x0
4926 0, // sub_gp8_x1
4927 0, // sub_gt
4928 0, // sub_lt
4929 48, // sub_pair0 -> UACCRC
4930 48, // sub_pair1 -> UACCRC
4931 0, // sub_un
4932 48, // sub_vsx0 -> UACCRC
4933 48, // sub_vsx1 -> UACCRC
4934 0, // sub_wacc_hi
4935 0, // sub_wacc_lo
4936 48, // sub_vsx1_then_sub_64 -> UACCRC
4937 48, // sub_vsx1_then_sub_64_hi_phony -> UACCRC
4938 48, // sub_pair1_then_sub_64 -> UACCRC
4939 48, // sub_pair1_then_sub_64_hi_phony -> UACCRC
4940 48, // sub_pair1_then_sub_vsx0 -> UACCRC
4941 48, // sub_pair1_then_sub_vsx1 -> UACCRC
4942 48, // sub_pair1_then_sub_vsx1_then_sub_64 -> UACCRC
4943 48, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> UACCRC
4944 0, // sub_dmrrowp1_then_sub_dmrrow0
4945 0, // sub_dmrrowp1_then_sub_dmrrow1
4946 0, // sub_wacc_hi_then_sub_dmrrow0
4947 0, // sub_wacc_hi_then_sub_dmrrow1
4948 0, // sub_wacc_hi_then_sub_dmrrowp0
4949 0, // sub_wacc_hi_then_sub_dmrrowp1
4950 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4951 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4952 0, // sub_dmr1_then_sub_dmrrow0
4953 0, // sub_dmr1_then_sub_dmrrow1
4954 0, // sub_dmr1_then_sub_dmrrowp0
4955 0, // sub_dmr1_then_sub_dmrrowp1
4956 0, // sub_dmr1_then_sub_wacc_hi
4957 0, // sub_dmr1_then_sub_wacc_lo
4958 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4959 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4960 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4961 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4962 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4963 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4964 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4965 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4966 0, // sub_gp8_x1_then_sub_32
4967 },
4968 { // WACCRC
4969 0, // sub_32
4970 0, // sub_32_hi_phony
4971 0, // sub_64
4972 0, // sub_64_hi_phony
4973 0, // sub_dmr0
4974 0, // sub_dmr1
4975 49, // sub_dmrrow0 -> WACCRC
4976 49, // sub_dmrrow1 -> WACCRC
4977 49, // sub_dmrrowp0 -> WACCRC
4978 49, // sub_dmrrowp1 -> WACCRC
4979 0, // sub_eq
4980 0, // sub_fp0
4981 0, // sub_fp1
4982 0, // sub_gp8_x0
4983 0, // sub_gp8_x1
4984 0, // sub_gt
4985 0, // sub_lt
4986 0, // sub_pair0
4987 0, // sub_pair1
4988 0, // sub_un
4989 0, // sub_vsx0
4990 0, // sub_vsx1
4991 0, // sub_wacc_hi
4992 0, // sub_wacc_lo
4993 0, // sub_vsx1_then_sub_64
4994 0, // sub_vsx1_then_sub_64_hi_phony
4995 0, // sub_pair1_then_sub_64
4996 0, // sub_pair1_then_sub_64_hi_phony
4997 0, // sub_pair1_then_sub_vsx0
4998 0, // sub_pair1_then_sub_vsx1
4999 0, // sub_pair1_then_sub_vsx1_then_sub_64
5000 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5001 49, // sub_dmrrowp1_then_sub_dmrrow0 -> WACCRC
5002 49, // sub_dmrrowp1_then_sub_dmrrow1 -> WACCRC
5003 0, // sub_wacc_hi_then_sub_dmrrow0
5004 0, // sub_wacc_hi_then_sub_dmrrow1
5005 0, // sub_wacc_hi_then_sub_dmrrowp0
5006 0, // sub_wacc_hi_then_sub_dmrrowp1
5007 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5008 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5009 0, // sub_dmr1_then_sub_dmrrow0
5010 0, // sub_dmr1_then_sub_dmrrow1
5011 0, // sub_dmr1_then_sub_dmrrowp0
5012 0, // sub_dmr1_then_sub_dmrrowp1
5013 0, // sub_dmr1_then_sub_wacc_hi
5014 0, // sub_dmr1_then_sub_wacc_lo
5015 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5016 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5017 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5018 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5019 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5020 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5021 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5022 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5023 0, // sub_gp8_x1_then_sub_32
5024 },
5025 { // WACC_HIRC
5026 0, // sub_32
5027 0, // sub_32_hi_phony
5028 0, // sub_64
5029 0, // sub_64_hi_phony
5030 0, // sub_dmr0
5031 0, // sub_dmr1
5032 50, // sub_dmrrow0 -> WACC_HIRC
5033 50, // sub_dmrrow1 -> WACC_HIRC
5034 50, // sub_dmrrowp0 -> WACC_HIRC
5035 50, // sub_dmrrowp1 -> WACC_HIRC
5036 0, // sub_eq
5037 0, // sub_fp0
5038 0, // sub_fp1
5039 0, // sub_gp8_x0
5040 0, // sub_gp8_x1
5041 0, // sub_gt
5042 0, // sub_lt
5043 0, // sub_pair0
5044 0, // sub_pair1
5045 0, // sub_un
5046 0, // sub_vsx0
5047 0, // sub_vsx1
5048 0, // sub_wacc_hi
5049 0, // sub_wacc_lo
5050 0, // sub_vsx1_then_sub_64
5051 0, // sub_vsx1_then_sub_64_hi_phony
5052 0, // sub_pair1_then_sub_64
5053 0, // sub_pair1_then_sub_64_hi_phony
5054 0, // sub_pair1_then_sub_vsx0
5055 0, // sub_pair1_then_sub_vsx1
5056 0, // sub_pair1_then_sub_vsx1_then_sub_64
5057 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5058 50, // sub_dmrrowp1_then_sub_dmrrow0 -> WACC_HIRC
5059 50, // sub_dmrrowp1_then_sub_dmrrow1 -> WACC_HIRC
5060 0, // sub_wacc_hi_then_sub_dmrrow0
5061 0, // sub_wacc_hi_then_sub_dmrrow1
5062 0, // sub_wacc_hi_then_sub_dmrrowp0
5063 0, // sub_wacc_hi_then_sub_dmrrowp1
5064 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5065 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5066 0, // sub_dmr1_then_sub_dmrrow0
5067 0, // sub_dmr1_then_sub_dmrrow1
5068 0, // sub_dmr1_then_sub_dmrrowp0
5069 0, // sub_dmr1_then_sub_dmrrowp1
5070 0, // sub_dmr1_then_sub_wacc_hi
5071 0, // sub_dmr1_then_sub_wacc_lo
5072 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5073 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5074 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5075 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5076 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5077 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5078 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5079 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5080 0, // sub_gp8_x1_then_sub_32
5081 },
5082 { // ACCRC_with_sub_64_in_SPILLTOVSRRC
5083 0, // sub_32
5084 0, // sub_32_hi_phony
5085 51, // sub_64 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5086 51, // sub_64_hi_phony -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5087 0, // sub_dmr0
5088 0, // sub_dmr1
5089 0, // sub_dmrrow0
5090 0, // sub_dmrrow1
5091 0, // sub_dmrrowp0
5092 0, // sub_dmrrowp1
5093 0, // sub_eq
5094 0, // sub_fp0
5095 0, // sub_fp1
5096 0, // sub_gp8_x0
5097 0, // sub_gp8_x1
5098 0, // sub_gt
5099 0, // sub_lt
5100 51, // sub_pair0 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5101 51, // sub_pair1 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5102 0, // sub_un
5103 51, // sub_vsx0 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5104 51, // sub_vsx1 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5105 0, // sub_wacc_hi
5106 0, // sub_wacc_lo
5107 51, // sub_vsx1_then_sub_64 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5108 51, // sub_vsx1_then_sub_64_hi_phony -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5109 51, // sub_pair1_then_sub_64 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5110 51, // sub_pair1_then_sub_64_hi_phony -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5111 51, // sub_pair1_then_sub_vsx0 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5112 51, // sub_pair1_then_sub_vsx1 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5113 51, // sub_pair1_then_sub_vsx1_then_sub_64 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5114 51, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5115 0, // sub_dmrrowp1_then_sub_dmrrow0
5116 0, // sub_dmrrowp1_then_sub_dmrrow1
5117 0, // sub_wacc_hi_then_sub_dmrrow0
5118 0, // sub_wacc_hi_then_sub_dmrrow1
5119 0, // sub_wacc_hi_then_sub_dmrrowp0
5120 0, // sub_wacc_hi_then_sub_dmrrowp1
5121 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5122 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5123 0, // sub_dmr1_then_sub_dmrrow0
5124 0, // sub_dmr1_then_sub_dmrrow1
5125 0, // sub_dmr1_then_sub_dmrrowp0
5126 0, // sub_dmr1_then_sub_dmrrowp1
5127 0, // sub_dmr1_then_sub_wacc_hi
5128 0, // sub_dmr1_then_sub_wacc_lo
5129 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5130 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5131 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5132 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5133 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5134 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5135 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5136 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5137 0, // sub_gp8_x1_then_sub_32
5138 },
5139 { // UACCRC_with_sub_64_in_SPILLTOVSRRC
5140 0, // sub_32
5141 0, // sub_32_hi_phony
5142 52, // sub_64 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5143 52, // sub_64_hi_phony -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5144 0, // sub_dmr0
5145 0, // sub_dmr1
5146 0, // sub_dmrrow0
5147 0, // sub_dmrrow1
5148 0, // sub_dmrrowp0
5149 0, // sub_dmrrowp1
5150 0, // sub_eq
5151 0, // sub_fp0
5152 0, // sub_fp1
5153 0, // sub_gp8_x0
5154 0, // sub_gp8_x1
5155 0, // sub_gt
5156 0, // sub_lt
5157 52, // sub_pair0 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5158 52, // sub_pair1 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5159 0, // sub_un
5160 52, // sub_vsx0 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5161 52, // sub_vsx1 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5162 0, // sub_wacc_hi
5163 0, // sub_wacc_lo
5164 52, // sub_vsx1_then_sub_64 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5165 52, // sub_vsx1_then_sub_64_hi_phony -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5166 52, // sub_pair1_then_sub_64 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5167 52, // sub_pair1_then_sub_64_hi_phony -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5168 52, // sub_pair1_then_sub_vsx0 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5169 52, // sub_pair1_then_sub_vsx1 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5170 52, // sub_pair1_then_sub_vsx1_then_sub_64 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5171 52, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5172 0, // sub_dmrrowp1_then_sub_dmrrow0
5173 0, // sub_dmrrowp1_then_sub_dmrrow1
5174 0, // sub_wacc_hi_then_sub_dmrrow0
5175 0, // sub_wacc_hi_then_sub_dmrrow1
5176 0, // sub_wacc_hi_then_sub_dmrrowp0
5177 0, // sub_wacc_hi_then_sub_dmrrowp1
5178 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5179 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5180 0, // sub_dmr1_then_sub_dmrrow0
5181 0, // sub_dmr1_then_sub_dmrrow1
5182 0, // sub_dmr1_then_sub_dmrrowp0
5183 0, // sub_dmr1_then_sub_dmrrowp1
5184 0, // sub_dmr1_then_sub_wacc_hi
5185 0, // sub_dmr1_then_sub_wacc_lo
5186 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5187 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5188 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5189 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5190 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5191 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5192 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5193 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5194 0, // sub_gp8_x1_then_sub_32
5195 },
5196 { // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5197 0, // sub_32
5198 0, // sub_32_hi_phony
5199 53, // sub_64 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5200 53, // sub_64_hi_phony -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5201 0, // sub_dmr0
5202 0, // sub_dmr1
5203 0, // sub_dmrrow0
5204 0, // sub_dmrrow1
5205 0, // sub_dmrrowp0
5206 0, // sub_dmrrowp1
5207 0, // sub_eq
5208 0, // sub_fp0
5209 0, // sub_fp1
5210 0, // sub_gp8_x0
5211 0, // sub_gp8_x1
5212 0, // sub_gt
5213 0, // sub_lt
5214 53, // sub_pair0 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5215 53, // sub_pair1 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5216 0, // sub_un
5217 53, // sub_vsx0 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5218 53, // sub_vsx1 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5219 0, // sub_wacc_hi
5220 0, // sub_wacc_lo
5221 53, // sub_vsx1_then_sub_64 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5222 53, // sub_vsx1_then_sub_64_hi_phony -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5223 53, // sub_pair1_then_sub_64 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5224 53, // sub_pair1_then_sub_64_hi_phony -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5225 53, // sub_pair1_then_sub_vsx0 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5226 53, // sub_pair1_then_sub_vsx1 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5227 53, // sub_pair1_then_sub_vsx1_then_sub_64 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5228 53, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5229 0, // sub_dmrrowp1_then_sub_dmrrow0
5230 0, // sub_dmrrowp1_then_sub_dmrrow1
5231 0, // sub_wacc_hi_then_sub_dmrrow0
5232 0, // sub_wacc_hi_then_sub_dmrrow1
5233 0, // sub_wacc_hi_then_sub_dmrrowp0
5234 0, // sub_wacc_hi_then_sub_dmrrowp1
5235 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5236 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5237 0, // sub_dmr1_then_sub_dmrrow0
5238 0, // sub_dmr1_then_sub_dmrrow1
5239 0, // sub_dmr1_then_sub_dmrrowp0
5240 0, // sub_dmr1_then_sub_dmrrowp1
5241 0, // sub_dmr1_then_sub_wacc_hi
5242 0, // sub_dmr1_then_sub_wacc_lo
5243 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5244 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5245 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5246 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5247 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5248 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5249 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5250 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5251 0, // sub_gp8_x1_then_sub_32
5252 },
5253 { // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5254 0, // sub_32
5255 0, // sub_32_hi_phony
5256 54, // sub_64 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5257 54, // sub_64_hi_phony -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5258 0, // sub_dmr0
5259 0, // sub_dmr1
5260 0, // sub_dmrrow0
5261 0, // sub_dmrrow1
5262 0, // sub_dmrrowp0
5263 0, // sub_dmrrowp1
5264 0, // sub_eq
5265 0, // sub_fp0
5266 0, // sub_fp1
5267 0, // sub_gp8_x0
5268 0, // sub_gp8_x1
5269 0, // sub_gt
5270 0, // sub_lt
5271 54, // sub_pair0 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5272 54, // sub_pair1 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5273 0, // sub_un
5274 54, // sub_vsx0 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5275 54, // sub_vsx1 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5276 0, // sub_wacc_hi
5277 0, // sub_wacc_lo
5278 54, // sub_vsx1_then_sub_64 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5279 54, // sub_vsx1_then_sub_64_hi_phony -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5280 54, // sub_pair1_then_sub_64 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5281 54, // sub_pair1_then_sub_64_hi_phony -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5282 54, // sub_pair1_then_sub_vsx0 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5283 54, // sub_pair1_then_sub_vsx1 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5284 54, // sub_pair1_then_sub_vsx1_then_sub_64 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5285 54, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5286 0, // sub_dmrrowp1_then_sub_dmrrow0
5287 0, // sub_dmrrowp1_then_sub_dmrrow1
5288 0, // sub_wacc_hi_then_sub_dmrrow0
5289 0, // sub_wacc_hi_then_sub_dmrrow1
5290 0, // sub_wacc_hi_then_sub_dmrrowp0
5291 0, // sub_wacc_hi_then_sub_dmrrowp1
5292 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5293 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5294 0, // sub_dmr1_then_sub_dmrrow0
5295 0, // sub_dmr1_then_sub_dmrrow1
5296 0, // sub_dmr1_then_sub_dmrrowp0
5297 0, // sub_dmr1_then_sub_dmrrowp1
5298 0, // sub_dmr1_then_sub_wacc_hi
5299 0, // sub_dmr1_then_sub_wacc_lo
5300 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5301 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5302 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5303 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5304 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5305 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5306 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5307 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5308 0, // sub_gp8_x1_then_sub_32
5309 },
5310 { // DMRRC
5311 0, // sub_32
5312 0, // sub_32_hi_phony
5313 0, // sub_64
5314 0, // sub_64_hi_phony
5315 0, // sub_dmr0
5316 0, // sub_dmr1
5317 55, // sub_dmrrow0 -> DMRRC
5318 55, // sub_dmrrow1 -> DMRRC
5319 55, // sub_dmrrowp0 -> DMRRC
5320 55, // sub_dmrrowp1 -> DMRRC
5321 0, // sub_eq
5322 0, // sub_fp0
5323 0, // sub_fp1
5324 0, // sub_gp8_x0
5325 0, // sub_gp8_x1
5326 0, // sub_gt
5327 0, // sub_lt
5328 0, // sub_pair0
5329 0, // sub_pair1
5330 0, // sub_un
5331 0, // sub_vsx0
5332 0, // sub_vsx1
5333 55, // sub_wacc_hi -> DMRRC
5334 55, // sub_wacc_lo -> DMRRC
5335 0, // sub_vsx1_then_sub_64
5336 0, // sub_vsx1_then_sub_64_hi_phony
5337 0, // sub_pair1_then_sub_64
5338 0, // sub_pair1_then_sub_64_hi_phony
5339 0, // sub_pair1_then_sub_vsx0
5340 0, // sub_pair1_then_sub_vsx1
5341 0, // sub_pair1_then_sub_vsx1_then_sub_64
5342 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5343 55, // sub_dmrrowp1_then_sub_dmrrow0 -> DMRRC
5344 55, // sub_dmrrowp1_then_sub_dmrrow1 -> DMRRC
5345 55, // sub_wacc_hi_then_sub_dmrrow0 -> DMRRC
5346 55, // sub_wacc_hi_then_sub_dmrrow1 -> DMRRC
5347 55, // sub_wacc_hi_then_sub_dmrrowp0 -> DMRRC
5348 55, // sub_wacc_hi_then_sub_dmrrowp1 -> DMRRC
5349 55, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRRC
5350 55, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRRC
5351 0, // sub_dmr1_then_sub_dmrrow0
5352 0, // sub_dmr1_then_sub_dmrrow1
5353 0, // sub_dmr1_then_sub_dmrrowp0
5354 0, // sub_dmr1_then_sub_dmrrowp1
5355 0, // sub_dmr1_then_sub_wacc_hi
5356 0, // sub_dmr1_then_sub_wacc_lo
5357 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5358 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5359 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5360 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5361 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5362 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5363 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5364 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5365 0, // sub_gp8_x1_then_sub_32
5366 },
5367 { // DMRpRC
5368 0, // sub_32
5369 0, // sub_32_hi_phony
5370 0, // sub_64
5371 0, // sub_64_hi_phony
5372 56, // sub_dmr0 -> DMRpRC
5373 56, // sub_dmr1 -> DMRpRC
5374 56, // sub_dmrrow0 -> DMRpRC
5375 56, // sub_dmrrow1 -> DMRpRC
5376 56, // sub_dmrrowp0 -> DMRpRC
5377 56, // sub_dmrrowp1 -> DMRpRC
5378 0, // sub_eq
5379 0, // sub_fp0
5380 0, // sub_fp1
5381 0, // sub_gp8_x0
5382 0, // sub_gp8_x1
5383 0, // sub_gt
5384 0, // sub_lt
5385 0, // sub_pair0
5386 0, // sub_pair1
5387 0, // sub_un
5388 0, // sub_vsx0
5389 0, // sub_vsx1
5390 56, // sub_wacc_hi -> DMRpRC
5391 56, // sub_wacc_lo -> DMRpRC
5392 0, // sub_vsx1_then_sub_64
5393 0, // sub_vsx1_then_sub_64_hi_phony
5394 0, // sub_pair1_then_sub_64
5395 0, // sub_pair1_then_sub_64_hi_phony
5396 0, // sub_pair1_then_sub_vsx0
5397 0, // sub_pair1_then_sub_vsx1
5398 0, // sub_pair1_then_sub_vsx1_then_sub_64
5399 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5400 56, // sub_dmrrowp1_then_sub_dmrrow0 -> DMRpRC
5401 56, // sub_dmrrowp1_then_sub_dmrrow1 -> DMRpRC
5402 56, // sub_wacc_hi_then_sub_dmrrow0 -> DMRpRC
5403 56, // sub_wacc_hi_then_sub_dmrrow1 -> DMRpRC
5404 56, // sub_wacc_hi_then_sub_dmrrowp0 -> DMRpRC
5405 56, // sub_wacc_hi_then_sub_dmrrowp1 -> DMRpRC
5406 56, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRpRC
5407 56, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRpRC
5408 56, // sub_dmr1_then_sub_dmrrow0 -> DMRpRC
5409 56, // sub_dmr1_then_sub_dmrrow1 -> DMRpRC
5410 56, // sub_dmr1_then_sub_dmrrowp0 -> DMRpRC
5411 56, // sub_dmr1_then_sub_dmrrowp1 -> DMRpRC
5412 56, // sub_dmr1_then_sub_wacc_hi -> DMRpRC
5413 56, // sub_dmr1_then_sub_wacc_lo -> DMRpRC
5414 56, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRpRC
5415 56, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRpRC
5416 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0 -> DMRpRC
5417 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1 -> DMRpRC
5418 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0 -> DMRpRC
5419 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1 -> DMRpRC
5420 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRpRC
5421 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRpRC
5422 0, // sub_gp8_x1_then_sub_32
5423 },
5424
5425 };
5426 assert(RC && "Missing regclass");
5427 if (!Idx) return RC;
5428 --Idx;
5429 assert(Idx < 55 && "Bad subreg");
5430 unsigned TV = Table[RC->getID()][Idx];
5431 return TV ? getRegClass(i: TV - 1) : nullptr;
5432}const TargetRegisterClass *PPCGenRegisterInfo::getSubRegisterClass(const TargetRegisterClass *RC, unsigned Idx) const {
5433 static constexpr uint8_t Table[56][55] = {
5434 { // VSSRC
5435 0, // VSSRC:sub_32
5436 0, // VSSRC:sub_32_hi_phony
5437 0, // VSSRC:sub_64
5438 0, // VSSRC:sub_64_hi_phony
5439 0, // VSSRC:sub_dmr0
5440 0, // VSSRC:sub_dmr1
5441 0, // VSSRC:sub_dmrrow0
5442 0, // VSSRC:sub_dmrrow1
5443 0, // VSSRC:sub_dmrrowp0
5444 0, // VSSRC:sub_dmrrowp1
5445 0, // VSSRC:sub_eq
5446 0, // VSSRC:sub_fp0
5447 0, // VSSRC:sub_fp1
5448 0, // VSSRC:sub_gp8_x0
5449 0, // VSSRC:sub_gp8_x1
5450 0, // VSSRC:sub_gt
5451 0, // VSSRC:sub_lt
5452 0, // VSSRC:sub_pair0
5453 0, // VSSRC:sub_pair1
5454 0, // VSSRC:sub_un
5455 0, // VSSRC:sub_vsx0
5456 0, // VSSRC:sub_vsx1
5457 0, // VSSRC:sub_wacc_hi
5458 0, // VSSRC:sub_wacc_lo
5459 0, // VSSRC:sub_vsx1_then_sub_64
5460 0, // VSSRC:sub_vsx1_then_sub_64_hi_phony
5461 0, // VSSRC:sub_pair1_then_sub_64
5462 0, // VSSRC:sub_pair1_then_sub_64_hi_phony
5463 0, // VSSRC:sub_pair1_then_sub_vsx0
5464 0, // VSSRC:sub_pair1_then_sub_vsx1
5465 0, // VSSRC:sub_pair1_then_sub_vsx1_then_sub_64
5466 0, // VSSRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5467 0, // VSSRC:sub_dmrrowp1_then_sub_dmrrow0
5468 0, // VSSRC:sub_dmrrowp1_then_sub_dmrrow1
5469 0, // VSSRC:sub_wacc_hi_then_sub_dmrrow0
5470 0, // VSSRC:sub_wacc_hi_then_sub_dmrrow1
5471 0, // VSSRC:sub_wacc_hi_then_sub_dmrrowp0
5472 0, // VSSRC:sub_wacc_hi_then_sub_dmrrowp1
5473 0, // VSSRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5474 0, // VSSRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5475 0, // VSSRC:sub_dmr1_then_sub_dmrrow0
5476 0, // VSSRC:sub_dmr1_then_sub_dmrrow1
5477 0, // VSSRC:sub_dmr1_then_sub_dmrrowp0
5478 0, // VSSRC:sub_dmr1_then_sub_dmrrowp1
5479 0, // VSSRC:sub_dmr1_then_sub_wacc_hi
5480 0, // VSSRC:sub_dmr1_then_sub_wacc_lo
5481 0, // VSSRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5482 0, // VSSRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5483 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5484 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5485 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5486 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5487 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5488 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5489 0, // VSSRC:sub_gp8_x1_then_sub_32
5490 },
5491 { // GPRC
5492 0, // GPRC:sub_32
5493 0, // GPRC:sub_32_hi_phony
5494 0, // GPRC:sub_64
5495 0, // GPRC:sub_64_hi_phony
5496 0, // GPRC:sub_dmr0
5497 0, // GPRC:sub_dmr1
5498 0, // GPRC:sub_dmrrow0
5499 0, // GPRC:sub_dmrrow1
5500 0, // GPRC:sub_dmrrowp0
5501 0, // GPRC:sub_dmrrowp1
5502 0, // GPRC:sub_eq
5503 0, // GPRC:sub_fp0
5504 0, // GPRC:sub_fp1
5505 0, // GPRC:sub_gp8_x0
5506 0, // GPRC:sub_gp8_x1
5507 0, // GPRC:sub_gt
5508 0, // GPRC:sub_lt
5509 0, // GPRC:sub_pair0
5510 0, // GPRC:sub_pair1
5511 0, // GPRC:sub_un
5512 0, // GPRC:sub_vsx0
5513 0, // GPRC:sub_vsx1
5514 0, // GPRC:sub_wacc_hi
5515 0, // GPRC:sub_wacc_lo
5516 0, // GPRC:sub_vsx1_then_sub_64
5517 0, // GPRC:sub_vsx1_then_sub_64_hi_phony
5518 0, // GPRC:sub_pair1_then_sub_64
5519 0, // GPRC:sub_pair1_then_sub_64_hi_phony
5520 0, // GPRC:sub_pair1_then_sub_vsx0
5521 0, // GPRC:sub_pair1_then_sub_vsx1
5522 0, // GPRC:sub_pair1_then_sub_vsx1_then_sub_64
5523 0, // GPRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5524 0, // GPRC:sub_dmrrowp1_then_sub_dmrrow0
5525 0, // GPRC:sub_dmrrowp1_then_sub_dmrrow1
5526 0, // GPRC:sub_wacc_hi_then_sub_dmrrow0
5527 0, // GPRC:sub_wacc_hi_then_sub_dmrrow1
5528 0, // GPRC:sub_wacc_hi_then_sub_dmrrowp0
5529 0, // GPRC:sub_wacc_hi_then_sub_dmrrowp1
5530 0, // GPRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5531 0, // GPRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5532 0, // GPRC:sub_dmr1_then_sub_dmrrow0
5533 0, // GPRC:sub_dmr1_then_sub_dmrrow1
5534 0, // GPRC:sub_dmr1_then_sub_dmrrowp0
5535 0, // GPRC:sub_dmr1_then_sub_dmrrowp1
5536 0, // GPRC:sub_dmr1_then_sub_wacc_hi
5537 0, // GPRC:sub_dmr1_then_sub_wacc_lo
5538 0, // GPRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5539 0, // GPRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5540 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5541 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5542 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5543 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5544 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5545 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5546 0, // GPRC:sub_gp8_x1_then_sub_32
5547 },
5548 { // GPRC_NOR0
5549 0, // GPRC_NOR0:sub_32
5550 0, // GPRC_NOR0:sub_32_hi_phony
5551 0, // GPRC_NOR0:sub_64
5552 0, // GPRC_NOR0:sub_64_hi_phony
5553 0, // GPRC_NOR0:sub_dmr0
5554 0, // GPRC_NOR0:sub_dmr1
5555 0, // GPRC_NOR0:sub_dmrrow0
5556 0, // GPRC_NOR0:sub_dmrrow1
5557 0, // GPRC_NOR0:sub_dmrrowp0
5558 0, // GPRC_NOR0:sub_dmrrowp1
5559 0, // GPRC_NOR0:sub_eq
5560 0, // GPRC_NOR0:sub_fp0
5561 0, // GPRC_NOR0:sub_fp1
5562 0, // GPRC_NOR0:sub_gp8_x0
5563 0, // GPRC_NOR0:sub_gp8_x1
5564 0, // GPRC_NOR0:sub_gt
5565 0, // GPRC_NOR0:sub_lt
5566 0, // GPRC_NOR0:sub_pair0
5567 0, // GPRC_NOR0:sub_pair1
5568 0, // GPRC_NOR0:sub_un
5569 0, // GPRC_NOR0:sub_vsx0
5570 0, // GPRC_NOR0:sub_vsx1
5571 0, // GPRC_NOR0:sub_wacc_hi
5572 0, // GPRC_NOR0:sub_wacc_lo
5573 0, // GPRC_NOR0:sub_vsx1_then_sub_64
5574 0, // GPRC_NOR0:sub_vsx1_then_sub_64_hi_phony
5575 0, // GPRC_NOR0:sub_pair1_then_sub_64
5576 0, // GPRC_NOR0:sub_pair1_then_sub_64_hi_phony
5577 0, // GPRC_NOR0:sub_pair1_then_sub_vsx0
5578 0, // GPRC_NOR0:sub_pair1_then_sub_vsx1
5579 0, // GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64
5580 0, // GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5581 0, // GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow0
5582 0, // GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow1
5583 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow0
5584 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow1
5585 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp0
5586 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1
5587 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5588 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5589 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrow0
5590 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrow1
5591 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrowp0
5592 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1
5593 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi
5594 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_lo
5595 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5596 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5597 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5598 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5599 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5600 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5601 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5602 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5603 0, // GPRC_NOR0:sub_gp8_x1_then_sub_32
5604 },
5605 { // GPRC_and_GPRC_NOR0
5606 0, // GPRC_and_GPRC_NOR0:sub_32
5607 0, // GPRC_and_GPRC_NOR0:sub_32_hi_phony
5608 0, // GPRC_and_GPRC_NOR0:sub_64
5609 0, // GPRC_and_GPRC_NOR0:sub_64_hi_phony
5610 0, // GPRC_and_GPRC_NOR0:sub_dmr0
5611 0, // GPRC_and_GPRC_NOR0:sub_dmr1
5612 0, // GPRC_and_GPRC_NOR0:sub_dmrrow0
5613 0, // GPRC_and_GPRC_NOR0:sub_dmrrow1
5614 0, // GPRC_and_GPRC_NOR0:sub_dmrrowp0
5615 0, // GPRC_and_GPRC_NOR0:sub_dmrrowp1
5616 0, // GPRC_and_GPRC_NOR0:sub_eq
5617 0, // GPRC_and_GPRC_NOR0:sub_fp0
5618 0, // GPRC_and_GPRC_NOR0:sub_fp1
5619 0, // GPRC_and_GPRC_NOR0:sub_gp8_x0
5620 0, // GPRC_and_GPRC_NOR0:sub_gp8_x1
5621 0, // GPRC_and_GPRC_NOR0:sub_gt
5622 0, // GPRC_and_GPRC_NOR0:sub_lt
5623 0, // GPRC_and_GPRC_NOR0:sub_pair0
5624 0, // GPRC_and_GPRC_NOR0:sub_pair1
5625 0, // GPRC_and_GPRC_NOR0:sub_un
5626 0, // GPRC_and_GPRC_NOR0:sub_vsx0
5627 0, // GPRC_and_GPRC_NOR0:sub_vsx1
5628 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi
5629 0, // GPRC_and_GPRC_NOR0:sub_wacc_lo
5630 0, // GPRC_and_GPRC_NOR0:sub_vsx1_then_sub_64
5631 0, // GPRC_and_GPRC_NOR0:sub_vsx1_then_sub_64_hi_phony
5632 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_64
5633 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_64_hi_phony
5634 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_vsx0
5635 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_vsx1
5636 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64
5637 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5638 0, // GPRC_and_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow0
5639 0, // GPRC_and_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow1
5640 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow0
5641 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow1
5642 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp0
5643 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1
5644 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5645 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5646 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrow0
5647 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrow1
5648 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp0
5649 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1
5650 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi
5651 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_lo
5652 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5653 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5654 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5655 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5656 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5657 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5658 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5659 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5660 0, // GPRC_and_GPRC_NOR0:sub_gp8_x1_then_sub_32
5661 },
5662 { // CRBITRC
5663 0, // CRBITRC:sub_32
5664 0, // CRBITRC:sub_32_hi_phony
5665 0, // CRBITRC:sub_64
5666 0, // CRBITRC:sub_64_hi_phony
5667 0, // CRBITRC:sub_dmr0
5668 0, // CRBITRC:sub_dmr1
5669 0, // CRBITRC:sub_dmrrow0
5670 0, // CRBITRC:sub_dmrrow1
5671 0, // CRBITRC:sub_dmrrowp0
5672 0, // CRBITRC:sub_dmrrowp1
5673 0, // CRBITRC:sub_eq
5674 0, // CRBITRC:sub_fp0
5675 0, // CRBITRC:sub_fp1
5676 0, // CRBITRC:sub_gp8_x0
5677 0, // CRBITRC:sub_gp8_x1
5678 0, // CRBITRC:sub_gt
5679 0, // CRBITRC:sub_lt
5680 0, // CRBITRC:sub_pair0
5681 0, // CRBITRC:sub_pair1
5682 0, // CRBITRC:sub_un
5683 0, // CRBITRC:sub_vsx0
5684 0, // CRBITRC:sub_vsx1
5685 0, // CRBITRC:sub_wacc_hi
5686 0, // CRBITRC:sub_wacc_lo
5687 0, // CRBITRC:sub_vsx1_then_sub_64
5688 0, // CRBITRC:sub_vsx1_then_sub_64_hi_phony
5689 0, // CRBITRC:sub_pair1_then_sub_64
5690 0, // CRBITRC:sub_pair1_then_sub_64_hi_phony
5691 0, // CRBITRC:sub_pair1_then_sub_vsx0
5692 0, // CRBITRC:sub_pair1_then_sub_vsx1
5693 0, // CRBITRC:sub_pair1_then_sub_vsx1_then_sub_64
5694 0, // CRBITRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5695 0, // CRBITRC:sub_dmrrowp1_then_sub_dmrrow0
5696 0, // CRBITRC:sub_dmrrowp1_then_sub_dmrrow1
5697 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrow0
5698 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrow1
5699 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrowp0
5700 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrowp1
5701 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5702 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5703 0, // CRBITRC:sub_dmr1_then_sub_dmrrow0
5704 0, // CRBITRC:sub_dmr1_then_sub_dmrrow1
5705 0, // CRBITRC:sub_dmr1_then_sub_dmrrowp0
5706 0, // CRBITRC:sub_dmr1_then_sub_dmrrowp1
5707 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi
5708 0, // CRBITRC:sub_dmr1_then_sub_wacc_lo
5709 0, // CRBITRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5710 0, // CRBITRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5711 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5712 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5713 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5714 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5715 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5716 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5717 0, // CRBITRC:sub_gp8_x1_then_sub_32
5718 },
5719 { // F4RC
5720 0, // F4RC:sub_32
5721 0, // F4RC:sub_32_hi_phony
5722 0, // F4RC:sub_64
5723 0, // F4RC:sub_64_hi_phony
5724 0, // F4RC:sub_dmr0
5725 0, // F4RC:sub_dmr1
5726 0, // F4RC:sub_dmrrow0
5727 0, // F4RC:sub_dmrrow1
5728 0, // F4RC:sub_dmrrowp0
5729 0, // F4RC:sub_dmrrowp1
5730 0, // F4RC:sub_eq
5731 0, // F4RC:sub_fp0
5732 0, // F4RC:sub_fp1
5733 0, // F4RC:sub_gp8_x0
5734 0, // F4RC:sub_gp8_x1
5735 0, // F4RC:sub_gt
5736 0, // F4RC:sub_lt
5737 0, // F4RC:sub_pair0
5738 0, // F4RC:sub_pair1
5739 0, // F4RC:sub_un
5740 0, // F4RC:sub_vsx0
5741 0, // F4RC:sub_vsx1
5742 0, // F4RC:sub_wacc_hi
5743 0, // F4RC:sub_wacc_lo
5744 0, // F4RC:sub_vsx1_then_sub_64
5745 0, // F4RC:sub_vsx1_then_sub_64_hi_phony
5746 0, // F4RC:sub_pair1_then_sub_64
5747 0, // F4RC:sub_pair1_then_sub_64_hi_phony
5748 0, // F4RC:sub_pair1_then_sub_vsx0
5749 0, // F4RC:sub_pair1_then_sub_vsx1
5750 0, // F4RC:sub_pair1_then_sub_vsx1_then_sub_64
5751 0, // F4RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5752 0, // F4RC:sub_dmrrowp1_then_sub_dmrrow0
5753 0, // F4RC:sub_dmrrowp1_then_sub_dmrrow1
5754 0, // F4RC:sub_wacc_hi_then_sub_dmrrow0
5755 0, // F4RC:sub_wacc_hi_then_sub_dmrrow1
5756 0, // F4RC:sub_wacc_hi_then_sub_dmrrowp0
5757 0, // F4RC:sub_wacc_hi_then_sub_dmrrowp1
5758 0, // F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5759 0, // F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5760 0, // F4RC:sub_dmr1_then_sub_dmrrow0
5761 0, // F4RC:sub_dmr1_then_sub_dmrrow1
5762 0, // F4RC:sub_dmr1_then_sub_dmrrowp0
5763 0, // F4RC:sub_dmr1_then_sub_dmrrowp1
5764 0, // F4RC:sub_dmr1_then_sub_wacc_hi
5765 0, // F4RC:sub_dmr1_then_sub_wacc_lo
5766 0, // F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5767 0, // F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5768 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5769 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5770 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5771 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5772 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5773 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5774 0, // F4RC:sub_gp8_x1_then_sub_32
5775 },
5776 { // GPRC32
5777 0, // GPRC32:sub_32
5778 0, // GPRC32:sub_32_hi_phony
5779 0, // GPRC32:sub_64
5780 0, // GPRC32:sub_64_hi_phony
5781 0, // GPRC32:sub_dmr0
5782 0, // GPRC32:sub_dmr1
5783 0, // GPRC32:sub_dmrrow0
5784 0, // GPRC32:sub_dmrrow1
5785 0, // GPRC32:sub_dmrrowp0
5786 0, // GPRC32:sub_dmrrowp1
5787 0, // GPRC32:sub_eq
5788 0, // GPRC32:sub_fp0
5789 0, // GPRC32:sub_fp1
5790 0, // GPRC32:sub_gp8_x0
5791 0, // GPRC32:sub_gp8_x1
5792 0, // GPRC32:sub_gt
5793 0, // GPRC32:sub_lt
5794 0, // GPRC32:sub_pair0
5795 0, // GPRC32:sub_pair1
5796 0, // GPRC32:sub_un
5797 0, // GPRC32:sub_vsx0
5798 0, // GPRC32:sub_vsx1
5799 0, // GPRC32:sub_wacc_hi
5800 0, // GPRC32:sub_wacc_lo
5801 0, // GPRC32:sub_vsx1_then_sub_64
5802 0, // GPRC32:sub_vsx1_then_sub_64_hi_phony
5803 0, // GPRC32:sub_pair1_then_sub_64
5804 0, // GPRC32:sub_pair1_then_sub_64_hi_phony
5805 0, // GPRC32:sub_pair1_then_sub_vsx0
5806 0, // GPRC32:sub_pair1_then_sub_vsx1
5807 0, // GPRC32:sub_pair1_then_sub_vsx1_then_sub_64
5808 0, // GPRC32:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5809 0, // GPRC32:sub_dmrrowp1_then_sub_dmrrow0
5810 0, // GPRC32:sub_dmrrowp1_then_sub_dmrrow1
5811 0, // GPRC32:sub_wacc_hi_then_sub_dmrrow0
5812 0, // GPRC32:sub_wacc_hi_then_sub_dmrrow1
5813 0, // GPRC32:sub_wacc_hi_then_sub_dmrrowp0
5814 0, // GPRC32:sub_wacc_hi_then_sub_dmrrowp1
5815 0, // GPRC32:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5816 0, // GPRC32:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5817 0, // GPRC32:sub_dmr1_then_sub_dmrrow0
5818 0, // GPRC32:sub_dmr1_then_sub_dmrrow1
5819 0, // GPRC32:sub_dmr1_then_sub_dmrrowp0
5820 0, // GPRC32:sub_dmr1_then_sub_dmrrowp1
5821 0, // GPRC32:sub_dmr1_then_sub_wacc_hi
5822 0, // GPRC32:sub_dmr1_then_sub_wacc_lo
5823 0, // GPRC32:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5824 0, // GPRC32:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5825 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5826 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5827 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5828 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5829 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5830 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5831 0, // GPRC32:sub_gp8_x1_then_sub_32
5832 },
5833 { // CRRC
5834 0, // CRRC:sub_32
5835 0, // CRRC:sub_32_hi_phony
5836 0, // CRRC:sub_64
5837 0, // CRRC:sub_64_hi_phony
5838 0, // CRRC:sub_dmr0
5839 0, // CRRC:sub_dmr1
5840 0, // CRRC:sub_dmrrow0
5841 0, // CRRC:sub_dmrrow1
5842 0, // CRRC:sub_dmrrowp0
5843 0, // CRRC:sub_dmrrowp1
5844 5, // CRRC:sub_eq -> CRBITRC
5845 0, // CRRC:sub_fp0
5846 0, // CRRC:sub_fp1
5847 0, // CRRC:sub_gp8_x0
5848 0, // CRRC:sub_gp8_x1
5849 5, // CRRC:sub_gt -> CRBITRC
5850 5, // CRRC:sub_lt -> CRBITRC
5851 0, // CRRC:sub_pair0
5852 0, // CRRC:sub_pair1
5853 5, // CRRC:sub_un -> CRBITRC
5854 0, // CRRC:sub_vsx0
5855 0, // CRRC:sub_vsx1
5856 0, // CRRC:sub_wacc_hi
5857 0, // CRRC:sub_wacc_lo
5858 0, // CRRC:sub_vsx1_then_sub_64
5859 0, // CRRC:sub_vsx1_then_sub_64_hi_phony
5860 0, // CRRC:sub_pair1_then_sub_64
5861 0, // CRRC:sub_pair1_then_sub_64_hi_phony
5862 0, // CRRC:sub_pair1_then_sub_vsx0
5863 0, // CRRC:sub_pair1_then_sub_vsx1
5864 0, // CRRC:sub_pair1_then_sub_vsx1_then_sub_64
5865 0, // CRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5866 0, // CRRC:sub_dmrrowp1_then_sub_dmrrow0
5867 0, // CRRC:sub_dmrrowp1_then_sub_dmrrow1
5868 0, // CRRC:sub_wacc_hi_then_sub_dmrrow0
5869 0, // CRRC:sub_wacc_hi_then_sub_dmrrow1
5870 0, // CRRC:sub_wacc_hi_then_sub_dmrrowp0
5871 0, // CRRC:sub_wacc_hi_then_sub_dmrrowp1
5872 0, // CRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5873 0, // CRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5874 0, // CRRC:sub_dmr1_then_sub_dmrrow0
5875 0, // CRRC:sub_dmr1_then_sub_dmrrow1
5876 0, // CRRC:sub_dmr1_then_sub_dmrrowp0
5877 0, // CRRC:sub_dmr1_then_sub_dmrrowp1
5878 0, // CRRC:sub_dmr1_then_sub_wacc_hi
5879 0, // CRRC:sub_dmr1_then_sub_wacc_lo
5880 0, // CRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5881 0, // CRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5882 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5883 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5884 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5885 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5886 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5887 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5888 0, // CRRC:sub_gp8_x1_then_sub_32
5889 },
5890 { // CARRYRC
5891 0, // CARRYRC:sub_32
5892 0, // CARRYRC:sub_32_hi_phony
5893 0, // CARRYRC:sub_64
5894 0, // CARRYRC:sub_64_hi_phony
5895 0, // CARRYRC:sub_dmr0
5896 0, // CARRYRC:sub_dmr1
5897 0, // CARRYRC:sub_dmrrow0
5898 0, // CARRYRC:sub_dmrrow1
5899 0, // CARRYRC:sub_dmrrowp0
5900 0, // CARRYRC:sub_dmrrowp1
5901 0, // CARRYRC:sub_eq
5902 0, // CARRYRC:sub_fp0
5903 0, // CARRYRC:sub_fp1
5904 0, // CARRYRC:sub_gp8_x0
5905 0, // CARRYRC:sub_gp8_x1
5906 0, // CARRYRC:sub_gt
5907 0, // CARRYRC:sub_lt
5908 0, // CARRYRC:sub_pair0
5909 0, // CARRYRC:sub_pair1
5910 0, // CARRYRC:sub_un
5911 0, // CARRYRC:sub_vsx0
5912 0, // CARRYRC:sub_vsx1
5913 0, // CARRYRC:sub_wacc_hi
5914 0, // CARRYRC:sub_wacc_lo
5915 0, // CARRYRC:sub_vsx1_then_sub_64
5916 0, // CARRYRC:sub_vsx1_then_sub_64_hi_phony
5917 0, // CARRYRC:sub_pair1_then_sub_64
5918 0, // CARRYRC:sub_pair1_then_sub_64_hi_phony
5919 0, // CARRYRC:sub_pair1_then_sub_vsx0
5920 0, // CARRYRC:sub_pair1_then_sub_vsx1
5921 0, // CARRYRC:sub_pair1_then_sub_vsx1_then_sub_64
5922 0, // CARRYRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5923 0, // CARRYRC:sub_dmrrowp1_then_sub_dmrrow0
5924 0, // CARRYRC:sub_dmrrowp1_then_sub_dmrrow1
5925 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrow0
5926 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrow1
5927 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrowp0
5928 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrowp1
5929 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5930 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5931 0, // CARRYRC:sub_dmr1_then_sub_dmrrow0
5932 0, // CARRYRC:sub_dmr1_then_sub_dmrrow1
5933 0, // CARRYRC:sub_dmr1_then_sub_dmrrowp0
5934 0, // CARRYRC:sub_dmr1_then_sub_dmrrowp1
5935 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi
5936 0, // CARRYRC:sub_dmr1_then_sub_wacc_lo
5937 0, // CARRYRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5938 0, // CARRYRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5939 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5940 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5941 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5942 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5943 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5944 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5945 0, // CARRYRC:sub_gp8_x1_then_sub_32
5946 },
5947 { // CTRRC
5948 0, // CTRRC:sub_32
5949 0, // CTRRC:sub_32_hi_phony
5950 0, // CTRRC:sub_64
5951 0, // CTRRC:sub_64_hi_phony
5952 0, // CTRRC:sub_dmr0
5953 0, // CTRRC:sub_dmr1
5954 0, // CTRRC:sub_dmrrow0
5955 0, // CTRRC:sub_dmrrow1
5956 0, // CTRRC:sub_dmrrowp0
5957 0, // CTRRC:sub_dmrrowp1
5958 0, // CTRRC:sub_eq
5959 0, // CTRRC:sub_fp0
5960 0, // CTRRC:sub_fp1
5961 0, // CTRRC:sub_gp8_x0
5962 0, // CTRRC:sub_gp8_x1
5963 0, // CTRRC:sub_gt
5964 0, // CTRRC:sub_lt
5965 0, // CTRRC:sub_pair0
5966 0, // CTRRC:sub_pair1
5967 0, // CTRRC:sub_un
5968 0, // CTRRC:sub_vsx0
5969 0, // CTRRC:sub_vsx1
5970 0, // CTRRC:sub_wacc_hi
5971 0, // CTRRC:sub_wacc_lo
5972 0, // CTRRC:sub_vsx1_then_sub_64
5973 0, // CTRRC:sub_vsx1_then_sub_64_hi_phony
5974 0, // CTRRC:sub_pair1_then_sub_64
5975 0, // CTRRC:sub_pair1_then_sub_64_hi_phony
5976 0, // CTRRC:sub_pair1_then_sub_vsx0
5977 0, // CTRRC:sub_pair1_then_sub_vsx1
5978 0, // CTRRC:sub_pair1_then_sub_vsx1_then_sub_64
5979 0, // CTRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5980 0, // CTRRC:sub_dmrrowp1_then_sub_dmrrow0
5981 0, // CTRRC:sub_dmrrowp1_then_sub_dmrrow1
5982 0, // CTRRC:sub_wacc_hi_then_sub_dmrrow0
5983 0, // CTRRC:sub_wacc_hi_then_sub_dmrrow1
5984 0, // CTRRC:sub_wacc_hi_then_sub_dmrrowp0
5985 0, // CTRRC:sub_wacc_hi_then_sub_dmrrowp1
5986 0, // CTRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5987 0, // CTRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5988 0, // CTRRC:sub_dmr1_then_sub_dmrrow0
5989 0, // CTRRC:sub_dmr1_then_sub_dmrrow1
5990 0, // CTRRC:sub_dmr1_then_sub_dmrrowp0
5991 0, // CTRRC:sub_dmr1_then_sub_dmrrowp1
5992 0, // CTRRC:sub_dmr1_then_sub_wacc_hi
5993 0, // CTRRC:sub_dmr1_then_sub_wacc_lo
5994 0, // CTRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5995 0, // CTRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5996 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5997 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5998 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5999 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6000 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6001 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6002 0, // CTRRC:sub_gp8_x1_then_sub_32
6003 },
6004 { // LRRC
6005 0, // LRRC:sub_32
6006 0, // LRRC:sub_32_hi_phony
6007 0, // LRRC:sub_64
6008 0, // LRRC:sub_64_hi_phony
6009 0, // LRRC:sub_dmr0
6010 0, // LRRC:sub_dmr1
6011 0, // LRRC:sub_dmrrow0
6012 0, // LRRC:sub_dmrrow1
6013 0, // LRRC:sub_dmrrowp0
6014 0, // LRRC:sub_dmrrowp1
6015 0, // LRRC:sub_eq
6016 0, // LRRC:sub_fp0
6017 0, // LRRC:sub_fp1
6018 0, // LRRC:sub_gp8_x0
6019 0, // LRRC:sub_gp8_x1
6020 0, // LRRC:sub_gt
6021 0, // LRRC:sub_lt
6022 0, // LRRC:sub_pair0
6023 0, // LRRC:sub_pair1
6024 0, // LRRC:sub_un
6025 0, // LRRC:sub_vsx0
6026 0, // LRRC:sub_vsx1
6027 0, // LRRC:sub_wacc_hi
6028 0, // LRRC:sub_wacc_lo
6029 0, // LRRC:sub_vsx1_then_sub_64
6030 0, // LRRC:sub_vsx1_then_sub_64_hi_phony
6031 0, // LRRC:sub_pair1_then_sub_64
6032 0, // LRRC:sub_pair1_then_sub_64_hi_phony
6033 0, // LRRC:sub_pair1_then_sub_vsx0
6034 0, // LRRC:sub_pair1_then_sub_vsx1
6035 0, // LRRC:sub_pair1_then_sub_vsx1_then_sub_64
6036 0, // LRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6037 0, // LRRC:sub_dmrrowp1_then_sub_dmrrow0
6038 0, // LRRC:sub_dmrrowp1_then_sub_dmrrow1
6039 0, // LRRC:sub_wacc_hi_then_sub_dmrrow0
6040 0, // LRRC:sub_wacc_hi_then_sub_dmrrow1
6041 0, // LRRC:sub_wacc_hi_then_sub_dmrrowp0
6042 0, // LRRC:sub_wacc_hi_then_sub_dmrrowp1
6043 0, // LRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6044 0, // LRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6045 0, // LRRC:sub_dmr1_then_sub_dmrrow0
6046 0, // LRRC:sub_dmr1_then_sub_dmrrow1
6047 0, // LRRC:sub_dmr1_then_sub_dmrrowp0
6048 0, // LRRC:sub_dmr1_then_sub_dmrrowp1
6049 0, // LRRC:sub_dmr1_then_sub_wacc_hi
6050 0, // LRRC:sub_dmr1_then_sub_wacc_lo
6051 0, // LRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6052 0, // LRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6053 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6054 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6055 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6056 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6057 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6058 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6059 0, // LRRC:sub_gp8_x1_then_sub_32
6060 },
6061 { // VRSAVERC
6062 0, // VRSAVERC:sub_32
6063 0, // VRSAVERC:sub_32_hi_phony
6064 0, // VRSAVERC:sub_64
6065 0, // VRSAVERC:sub_64_hi_phony
6066 0, // VRSAVERC:sub_dmr0
6067 0, // VRSAVERC:sub_dmr1
6068 0, // VRSAVERC:sub_dmrrow0
6069 0, // VRSAVERC:sub_dmrrow1
6070 0, // VRSAVERC:sub_dmrrowp0
6071 0, // VRSAVERC:sub_dmrrowp1
6072 0, // VRSAVERC:sub_eq
6073 0, // VRSAVERC:sub_fp0
6074 0, // VRSAVERC:sub_fp1
6075 0, // VRSAVERC:sub_gp8_x0
6076 0, // VRSAVERC:sub_gp8_x1
6077 0, // VRSAVERC:sub_gt
6078 0, // VRSAVERC:sub_lt
6079 0, // VRSAVERC:sub_pair0
6080 0, // VRSAVERC:sub_pair1
6081 0, // VRSAVERC:sub_un
6082 0, // VRSAVERC:sub_vsx0
6083 0, // VRSAVERC:sub_vsx1
6084 0, // VRSAVERC:sub_wacc_hi
6085 0, // VRSAVERC:sub_wacc_lo
6086 0, // VRSAVERC:sub_vsx1_then_sub_64
6087 0, // VRSAVERC:sub_vsx1_then_sub_64_hi_phony
6088 0, // VRSAVERC:sub_pair1_then_sub_64
6089 0, // VRSAVERC:sub_pair1_then_sub_64_hi_phony
6090 0, // VRSAVERC:sub_pair1_then_sub_vsx0
6091 0, // VRSAVERC:sub_pair1_then_sub_vsx1
6092 0, // VRSAVERC:sub_pair1_then_sub_vsx1_then_sub_64
6093 0, // VRSAVERC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6094 0, // VRSAVERC:sub_dmrrowp1_then_sub_dmrrow0
6095 0, // VRSAVERC:sub_dmrrowp1_then_sub_dmrrow1
6096 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrow0
6097 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrow1
6098 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrowp0
6099 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrowp1
6100 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6101 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6102 0, // VRSAVERC:sub_dmr1_then_sub_dmrrow0
6103 0, // VRSAVERC:sub_dmr1_then_sub_dmrrow1
6104 0, // VRSAVERC:sub_dmr1_then_sub_dmrrowp0
6105 0, // VRSAVERC:sub_dmr1_then_sub_dmrrowp1
6106 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi
6107 0, // VRSAVERC:sub_dmr1_then_sub_wacc_lo
6108 0, // VRSAVERC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6109 0, // VRSAVERC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6110 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6111 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6112 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6113 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6114 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6115 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6116 0, // VRSAVERC:sub_gp8_x1_then_sub_32
6117 },
6118 { // SPILLTOVSRRC
6119 2, // SPILLTOVSRRC:sub_32 -> GPRC
6120 0, // SPILLTOVSRRC:sub_32_hi_phony
6121 0, // SPILLTOVSRRC:sub_64
6122 0, // SPILLTOVSRRC:sub_64_hi_phony
6123 0, // SPILLTOVSRRC:sub_dmr0
6124 0, // SPILLTOVSRRC:sub_dmr1
6125 0, // SPILLTOVSRRC:sub_dmrrow0
6126 0, // SPILLTOVSRRC:sub_dmrrow1
6127 0, // SPILLTOVSRRC:sub_dmrrowp0
6128 0, // SPILLTOVSRRC:sub_dmrrowp1
6129 0, // SPILLTOVSRRC:sub_eq
6130 0, // SPILLTOVSRRC:sub_fp0
6131 0, // SPILLTOVSRRC:sub_fp1
6132 0, // SPILLTOVSRRC:sub_gp8_x0
6133 0, // SPILLTOVSRRC:sub_gp8_x1
6134 0, // SPILLTOVSRRC:sub_gt
6135 0, // SPILLTOVSRRC:sub_lt
6136 0, // SPILLTOVSRRC:sub_pair0
6137 0, // SPILLTOVSRRC:sub_pair1
6138 0, // SPILLTOVSRRC:sub_un
6139 0, // SPILLTOVSRRC:sub_vsx0
6140 0, // SPILLTOVSRRC:sub_vsx1
6141 0, // SPILLTOVSRRC:sub_wacc_hi
6142 0, // SPILLTOVSRRC:sub_wacc_lo
6143 0, // SPILLTOVSRRC:sub_vsx1_then_sub_64
6144 0, // SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
6145 0, // SPILLTOVSRRC:sub_pair1_then_sub_64
6146 0, // SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
6147 0, // SPILLTOVSRRC:sub_pair1_then_sub_vsx0
6148 0, // SPILLTOVSRRC:sub_pair1_then_sub_vsx1
6149 0, // SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
6150 0, // SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6151 0, // SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
6152 0, // SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
6153 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
6154 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
6155 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
6156 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
6157 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6158 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6159 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
6160 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
6161 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
6162 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
6163 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
6164 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
6165 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6166 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6167 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6168 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6169 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6170 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6171 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6172 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6173 0, // SPILLTOVSRRC:sub_gp8_x1_then_sub_32
6174 },
6175 { // VSFRC
6176 0, // VSFRC:sub_32
6177 0, // VSFRC:sub_32_hi_phony
6178 0, // VSFRC:sub_64
6179 0, // VSFRC:sub_64_hi_phony
6180 0, // VSFRC:sub_dmr0
6181 0, // VSFRC:sub_dmr1
6182 0, // VSFRC:sub_dmrrow0
6183 0, // VSFRC:sub_dmrrow1
6184 0, // VSFRC:sub_dmrrowp0
6185 0, // VSFRC:sub_dmrrowp1
6186 0, // VSFRC:sub_eq
6187 0, // VSFRC:sub_fp0
6188 0, // VSFRC:sub_fp1
6189 0, // VSFRC:sub_gp8_x0
6190 0, // VSFRC:sub_gp8_x1
6191 0, // VSFRC:sub_gt
6192 0, // VSFRC:sub_lt
6193 0, // VSFRC:sub_pair0
6194 0, // VSFRC:sub_pair1
6195 0, // VSFRC:sub_un
6196 0, // VSFRC:sub_vsx0
6197 0, // VSFRC:sub_vsx1
6198 0, // VSFRC:sub_wacc_hi
6199 0, // VSFRC:sub_wacc_lo
6200 0, // VSFRC:sub_vsx1_then_sub_64
6201 0, // VSFRC:sub_vsx1_then_sub_64_hi_phony
6202 0, // VSFRC:sub_pair1_then_sub_64
6203 0, // VSFRC:sub_pair1_then_sub_64_hi_phony
6204 0, // VSFRC:sub_pair1_then_sub_vsx0
6205 0, // VSFRC:sub_pair1_then_sub_vsx1
6206 0, // VSFRC:sub_pair1_then_sub_vsx1_then_sub_64
6207 0, // VSFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6208 0, // VSFRC:sub_dmrrowp1_then_sub_dmrrow0
6209 0, // VSFRC:sub_dmrrowp1_then_sub_dmrrow1
6210 0, // VSFRC:sub_wacc_hi_then_sub_dmrrow0
6211 0, // VSFRC:sub_wacc_hi_then_sub_dmrrow1
6212 0, // VSFRC:sub_wacc_hi_then_sub_dmrrowp0
6213 0, // VSFRC:sub_wacc_hi_then_sub_dmrrowp1
6214 0, // VSFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6215 0, // VSFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6216 0, // VSFRC:sub_dmr1_then_sub_dmrrow0
6217 0, // VSFRC:sub_dmr1_then_sub_dmrrow1
6218 0, // VSFRC:sub_dmr1_then_sub_dmrrowp0
6219 0, // VSFRC:sub_dmr1_then_sub_dmrrowp1
6220 0, // VSFRC:sub_dmr1_then_sub_wacc_hi
6221 0, // VSFRC:sub_dmr1_then_sub_wacc_lo
6222 0, // VSFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6223 0, // VSFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6224 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6225 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6226 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6227 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6228 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6229 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6230 0, // VSFRC:sub_gp8_x1_then_sub_32
6231 },
6232 { // G8RC
6233 2, // G8RC:sub_32 -> GPRC
6234 0, // G8RC:sub_32_hi_phony
6235 0, // G8RC:sub_64
6236 0, // G8RC:sub_64_hi_phony
6237 0, // G8RC:sub_dmr0
6238 0, // G8RC:sub_dmr1
6239 0, // G8RC:sub_dmrrow0
6240 0, // G8RC:sub_dmrrow1
6241 0, // G8RC:sub_dmrrowp0
6242 0, // G8RC:sub_dmrrowp1
6243 0, // G8RC:sub_eq
6244 0, // G8RC:sub_fp0
6245 0, // G8RC:sub_fp1
6246 0, // G8RC:sub_gp8_x0
6247 0, // G8RC:sub_gp8_x1
6248 0, // G8RC:sub_gt
6249 0, // G8RC:sub_lt
6250 0, // G8RC:sub_pair0
6251 0, // G8RC:sub_pair1
6252 0, // G8RC:sub_un
6253 0, // G8RC:sub_vsx0
6254 0, // G8RC:sub_vsx1
6255 0, // G8RC:sub_wacc_hi
6256 0, // G8RC:sub_wacc_lo
6257 0, // G8RC:sub_vsx1_then_sub_64
6258 0, // G8RC:sub_vsx1_then_sub_64_hi_phony
6259 0, // G8RC:sub_pair1_then_sub_64
6260 0, // G8RC:sub_pair1_then_sub_64_hi_phony
6261 0, // G8RC:sub_pair1_then_sub_vsx0
6262 0, // G8RC:sub_pair1_then_sub_vsx1
6263 0, // G8RC:sub_pair1_then_sub_vsx1_then_sub_64
6264 0, // G8RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6265 0, // G8RC:sub_dmrrowp1_then_sub_dmrrow0
6266 0, // G8RC:sub_dmrrowp1_then_sub_dmrrow1
6267 0, // G8RC:sub_wacc_hi_then_sub_dmrrow0
6268 0, // G8RC:sub_wacc_hi_then_sub_dmrrow1
6269 0, // G8RC:sub_wacc_hi_then_sub_dmrrowp0
6270 0, // G8RC:sub_wacc_hi_then_sub_dmrrowp1
6271 0, // G8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6272 0, // G8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6273 0, // G8RC:sub_dmr1_then_sub_dmrrow0
6274 0, // G8RC:sub_dmr1_then_sub_dmrrow1
6275 0, // G8RC:sub_dmr1_then_sub_dmrrowp0
6276 0, // G8RC:sub_dmr1_then_sub_dmrrowp1
6277 0, // G8RC:sub_dmr1_then_sub_wacc_hi
6278 0, // G8RC:sub_dmr1_then_sub_wacc_lo
6279 0, // G8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6280 0, // G8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6281 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6282 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6283 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6284 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6285 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6286 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6287 0, // G8RC:sub_gp8_x1_then_sub_32
6288 },
6289 { // G8RC_NOX0
6290 3, // G8RC_NOX0:sub_32 -> GPRC_NOR0
6291 0, // G8RC_NOX0:sub_32_hi_phony
6292 0, // G8RC_NOX0:sub_64
6293 0, // G8RC_NOX0:sub_64_hi_phony
6294 0, // G8RC_NOX0:sub_dmr0
6295 0, // G8RC_NOX0:sub_dmr1
6296 0, // G8RC_NOX0:sub_dmrrow0
6297 0, // G8RC_NOX0:sub_dmrrow1
6298 0, // G8RC_NOX0:sub_dmrrowp0
6299 0, // G8RC_NOX0:sub_dmrrowp1
6300 0, // G8RC_NOX0:sub_eq
6301 0, // G8RC_NOX0:sub_fp0
6302 0, // G8RC_NOX0:sub_fp1
6303 0, // G8RC_NOX0:sub_gp8_x0
6304 0, // G8RC_NOX0:sub_gp8_x1
6305 0, // G8RC_NOX0:sub_gt
6306 0, // G8RC_NOX0:sub_lt
6307 0, // G8RC_NOX0:sub_pair0
6308 0, // G8RC_NOX0:sub_pair1
6309 0, // G8RC_NOX0:sub_un
6310 0, // G8RC_NOX0:sub_vsx0
6311 0, // G8RC_NOX0:sub_vsx1
6312 0, // G8RC_NOX0:sub_wacc_hi
6313 0, // G8RC_NOX0:sub_wacc_lo
6314 0, // G8RC_NOX0:sub_vsx1_then_sub_64
6315 0, // G8RC_NOX0:sub_vsx1_then_sub_64_hi_phony
6316 0, // G8RC_NOX0:sub_pair1_then_sub_64
6317 0, // G8RC_NOX0:sub_pair1_then_sub_64_hi_phony
6318 0, // G8RC_NOX0:sub_pair1_then_sub_vsx0
6319 0, // G8RC_NOX0:sub_pair1_then_sub_vsx1
6320 0, // G8RC_NOX0:sub_pair1_then_sub_vsx1_then_sub_64
6321 0, // G8RC_NOX0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6322 0, // G8RC_NOX0:sub_dmrrowp1_then_sub_dmrrow0
6323 0, // G8RC_NOX0:sub_dmrrowp1_then_sub_dmrrow1
6324 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrow0
6325 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrow1
6326 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp0
6327 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1
6328 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6329 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6330 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrow0
6331 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrow1
6332 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrowp0
6333 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1
6334 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi
6335 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_lo
6336 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6337 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6338 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6339 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6340 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6341 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6342 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6343 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6344 0, // G8RC_NOX0:sub_gp8_x1_then_sub_32
6345 },
6346 { // SPILLTOVSRRC_and_VSFRC
6347 0, // SPILLTOVSRRC_and_VSFRC:sub_32
6348 0, // SPILLTOVSRRC_and_VSFRC:sub_32_hi_phony
6349 0, // SPILLTOVSRRC_and_VSFRC:sub_64
6350 0, // SPILLTOVSRRC_and_VSFRC:sub_64_hi_phony
6351 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr0
6352 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1
6353 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrow0
6354 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrow1
6355 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrowp0
6356 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrowp1
6357 0, // SPILLTOVSRRC_and_VSFRC:sub_eq
6358 0, // SPILLTOVSRRC_and_VSFRC:sub_fp0
6359 0, // SPILLTOVSRRC_and_VSFRC:sub_fp1
6360 0, // SPILLTOVSRRC_and_VSFRC:sub_gp8_x0
6361 0, // SPILLTOVSRRC_and_VSFRC:sub_gp8_x1
6362 0, // SPILLTOVSRRC_and_VSFRC:sub_gt
6363 0, // SPILLTOVSRRC_and_VSFRC:sub_lt
6364 0, // SPILLTOVSRRC_and_VSFRC:sub_pair0
6365 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1
6366 0, // SPILLTOVSRRC_and_VSFRC:sub_un
6367 0, // SPILLTOVSRRC_and_VSFRC:sub_vsx0
6368 0, // SPILLTOVSRRC_and_VSFRC:sub_vsx1
6369 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi
6370 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_lo
6371 0, // SPILLTOVSRRC_and_VSFRC:sub_vsx1_then_sub_64
6372 0, // SPILLTOVSRRC_and_VSFRC:sub_vsx1_then_sub_64_hi_phony
6373 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_64
6374 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_64_hi_phony
6375 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_vsx0
6376 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_vsx1
6377 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_vsx1_then_sub_64
6378 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6379 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrowp1_then_sub_dmrrow0
6380 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrowp1_then_sub_dmrrow1
6381 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrow0
6382 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrow1
6383 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrowp0
6384 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrowp1
6385 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6386 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6387 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrow0
6388 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrow1
6389 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrowp0
6390 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrowp1
6391 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi
6392 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_lo
6393 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6394 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6395 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6396 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6397 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6398 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6399 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6400 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6401 0, // SPILLTOVSRRC_and_VSFRC:sub_gp8_x1_then_sub_32
6402 },
6403 { // G8RC_and_G8RC_NOX0
6404 4, // G8RC_and_G8RC_NOX0:sub_32 -> GPRC_and_GPRC_NOR0
6405 0, // G8RC_and_G8RC_NOX0:sub_32_hi_phony
6406 0, // G8RC_and_G8RC_NOX0:sub_64
6407 0, // G8RC_and_G8RC_NOX0:sub_64_hi_phony
6408 0, // G8RC_and_G8RC_NOX0:sub_dmr0
6409 0, // G8RC_and_G8RC_NOX0:sub_dmr1
6410 0, // G8RC_and_G8RC_NOX0:sub_dmrrow0
6411 0, // G8RC_and_G8RC_NOX0:sub_dmrrow1
6412 0, // G8RC_and_G8RC_NOX0:sub_dmrrowp0
6413 0, // G8RC_and_G8RC_NOX0:sub_dmrrowp1
6414 0, // G8RC_and_G8RC_NOX0:sub_eq
6415 0, // G8RC_and_G8RC_NOX0:sub_fp0
6416 0, // G8RC_and_G8RC_NOX0:sub_fp1
6417 0, // G8RC_and_G8RC_NOX0:sub_gp8_x0
6418 0, // G8RC_and_G8RC_NOX0:sub_gp8_x1
6419 0, // G8RC_and_G8RC_NOX0:sub_gt
6420 0, // G8RC_and_G8RC_NOX0:sub_lt
6421 0, // G8RC_and_G8RC_NOX0:sub_pair0
6422 0, // G8RC_and_G8RC_NOX0:sub_pair1
6423 0, // G8RC_and_G8RC_NOX0:sub_un
6424 0, // G8RC_and_G8RC_NOX0:sub_vsx0
6425 0, // G8RC_and_G8RC_NOX0:sub_vsx1
6426 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi
6427 0, // G8RC_and_G8RC_NOX0:sub_wacc_lo
6428 0, // G8RC_and_G8RC_NOX0:sub_vsx1_then_sub_64
6429 0, // G8RC_and_G8RC_NOX0:sub_vsx1_then_sub_64_hi_phony
6430 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_64
6431 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_64_hi_phony
6432 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_vsx0
6433 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_vsx1
6434 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_vsx1_then_sub_64
6435 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6436 0, // G8RC_and_G8RC_NOX0:sub_dmrrowp1_then_sub_dmrrow0
6437 0, // G8RC_and_G8RC_NOX0:sub_dmrrowp1_then_sub_dmrrow1
6438 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrow0
6439 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrow1
6440 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp0
6441 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1
6442 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6443 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6444 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrow0
6445 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrow1
6446 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrowp0
6447 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1
6448 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi
6449 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_lo
6450 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6451 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6452 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6453 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6454 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6455 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6456 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6457 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6458 0, // G8RC_and_G8RC_NOX0:sub_gp8_x1_then_sub_32
6459 },
6460 { // F8RC
6461 0, // F8RC:sub_32
6462 0, // F8RC:sub_32_hi_phony
6463 0, // F8RC:sub_64
6464 0, // F8RC:sub_64_hi_phony
6465 0, // F8RC:sub_dmr0
6466 0, // F8RC:sub_dmr1
6467 0, // F8RC:sub_dmrrow0
6468 0, // F8RC:sub_dmrrow1
6469 0, // F8RC:sub_dmrrowp0
6470 0, // F8RC:sub_dmrrowp1
6471 0, // F8RC:sub_eq
6472 0, // F8RC:sub_fp0
6473 0, // F8RC:sub_fp1
6474 0, // F8RC:sub_gp8_x0
6475 0, // F8RC:sub_gp8_x1
6476 0, // F8RC:sub_gt
6477 0, // F8RC:sub_lt
6478 0, // F8RC:sub_pair0
6479 0, // F8RC:sub_pair1
6480 0, // F8RC:sub_un
6481 0, // F8RC:sub_vsx0
6482 0, // F8RC:sub_vsx1
6483 0, // F8RC:sub_wacc_hi
6484 0, // F8RC:sub_wacc_lo
6485 0, // F8RC:sub_vsx1_then_sub_64
6486 0, // F8RC:sub_vsx1_then_sub_64_hi_phony
6487 0, // F8RC:sub_pair1_then_sub_64
6488 0, // F8RC:sub_pair1_then_sub_64_hi_phony
6489 0, // F8RC:sub_pair1_then_sub_vsx0
6490 0, // F8RC:sub_pair1_then_sub_vsx1
6491 0, // F8RC:sub_pair1_then_sub_vsx1_then_sub_64
6492 0, // F8RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6493 0, // F8RC:sub_dmrrowp1_then_sub_dmrrow0
6494 0, // F8RC:sub_dmrrowp1_then_sub_dmrrow1
6495 0, // F8RC:sub_wacc_hi_then_sub_dmrrow0
6496 0, // F8RC:sub_wacc_hi_then_sub_dmrrow1
6497 0, // F8RC:sub_wacc_hi_then_sub_dmrrowp0
6498 0, // F8RC:sub_wacc_hi_then_sub_dmrrowp1
6499 0, // F8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6500 0, // F8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6501 0, // F8RC:sub_dmr1_then_sub_dmrrow0
6502 0, // F8RC:sub_dmr1_then_sub_dmrrow1
6503 0, // F8RC:sub_dmr1_then_sub_dmrrowp0
6504 0, // F8RC:sub_dmr1_then_sub_dmrrowp1
6505 0, // F8RC:sub_dmr1_then_sub_wacc_hi
6506 0, // F8RC:sub_dmr1_then_sub_wacc_lo
6507 0, // F8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6508 0, // F8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6509 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6510 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6511 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6512 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6513 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6514 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6515 0, // F8RC:sub_gp8_x1_then_sub_32
6516 },
6517 { // FHRC
6518 0, // FHRC:sub_32
6519 0, // FHRC:sub_32_hi_phony
6520 0, // FHRC:sub_64
6521 0, // FHRC:sub_64_hi_phony
6522 0, // FHRC:sub_dmr0
6523 0, // FHRC:sub_dmr1
6524 0, // FHRC:sub_dmrrow0
6525 0, // FHRC:sub_dmrrow1
6526 0, // FHRC:sub_dmrrowp0
6527 0, // FHRC:sub_dmrrowp1
6528 0, // FHRC:sub_eq
6529 0, // FHRC:sub_fp0
6530 0, // FHRC:sub_fp1
6531 0, // FHRC:sub_gp8_x0
6532 0, // FHRC:sub_gp8_x1
6533 0, // FHRC:sub_gt
6534 0, // FHRC:sub_lt
6535 0, // FHRC:sub_pair0
6536 0, // FHRC:sub_pair1
6537 0, // FHRC:sub_un
6538 0, // FHRC:sub_vsx0
6539 0, // FHRC:sub_vsx1
6540 0, // FHRC:sub_wacc_hi
6541 0, // FHRC:sub_wacc_lo
6542 0, // FHRC:sub_vsx1_then_sub_64
6543 0, // FHRC:sub_vsx1_then_sub_64_hi_phony
6544 0, // FHRC:sub_pair1_then_sub_64
6545 0, // FHRC:sub_pair1_then_sub_64_hi_phony
6546 0, // FHRC:sub_pair1_then_sub_vsx0
6547 0, // FHRC:sub_pair1_then_sub_vsx1
6548 0, // FHRC:sub_pair1_then_sub_vsx1_then_sub_64
6549 0, // FHRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6550 0, // FHRC:sub_dmrrowp1_then_sub_dmrrow0
6551 0, // FHRC:sub_dmrrowp1_then_sub_dmrrow1
6552 0, // FHRC:sub_wacc_hi_then_sub_dmrrow0
6553 0, // FHRC:sub_wacc_hi_then_sub_dmrrow1
6554 0, // FHRC:sub_wacc_hi_then_sub_dmrrowp0
6555 0, // FHRC:sub_wacc_hi_then_sub_dmrrowp1
6556 0, // FHRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6557 0, // FHRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6558 0, // FHRC:sub_dmr1_then_sub_dmrrow0
6559 0, // FHRC:sub_dmr1_then_sub_dmrrow1
6560 0, // FHRC:sub_dmr1_then_sub_dmrrowp0
6561 0, // FHRC:sub_dmr1_then_sub_dmrrowp1
6562 0, // FHRC:sub_dmr1_then_sub_wacc_hi
6563 0, // FHRC:sub_dmr1_then_sub_wacc_lo
6564 0, // FHRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6565 0, // FHRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6566 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6567 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6568 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6569 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6570 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6571 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6572 0, // FHRC:sub_gp8_x1_then_sub_32
6573 },
6574 { // SPERC
6575 2, // SPERC:sub_32 -> GPRC
6576 0, // SPERC:sub_32_hi_phony
6577 0, // SPERC:sub_64
6578 0, // SPERC:sub_64_hi_phony
6579 0, // SPERC:sub_dmr0
6580 0, // SPERC:sub_dmr1
6581 0, // SPERC:sub_dmrrow0
6582 0, // SPERC:sub_dmrrow1
6583 0, // SPERC:sub_dmrrowp0
6584 0, // SPERC:sub_dmrrowp1
6585 0, // SPERC:sub_eq
6586 0, // SPERC:sub_fp0
6587 0, // SPERC:sub_fp1
6588 0, // SPERC:sub_gp8_x0
6589 0, // SPERC:sub_gp8_x1
6590 0, // SPERC:sub_gt
6591 0, // SPERC:sub_lt
6592 0, // SPERC:sub_pair0
6593 0, // SPERC:sub_pair1
6594 0, // SPERC:sub_un
6595 0, // SPERC:sub_vsx0
6596 0, // SPERC:sub_vsx1
6597 0, // SPERC:sub_wacc_hi
6598 0, // SPERC:sub_wacc_lo
6599 0, // SPERC:sub_vsx1_then_sub_64
6600 0, // SPERC:sub_vsx1_then_sub_64_hi_phony
6601 0, // SPERC:sub_pair1_then_sub_64
6602 0, // SPERC:sub_pair1_then_sub_64_hi_phony
6603 0, // SPERC:sub_pair1_then_sub_vsx0
6604 0, // SPERC:sub_pair1_then_sub_vsx1
6605 0, // SPERC:sub_pair1_then_sub_vsx1_then_sub_64
6606 0, // SPERC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6607 0, // SPERC:sub_dmrrowp1_then_sub_dmrrow0
6608 0, // SPERC:sub_dmrrowp1_then_sub_dmrrow1
6609 0, // SPERC:sub_wacc_hi_then_sub_dmrrow0
6610 0, // SPERC:sub_wacc_hi_then_sub_dmrrow1
6611 0, // SPERC:sub_wacc_hi_then_sub_dmrrowp0
6612 0, // SPERC:sub_wacc_hi_then_sub_dmrrowp1
6613 0, // SPERC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6614 0, // SPERC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6615 0, // SPERC:sub_dmr1_then_sub_dmrrow0
6616 0, // SPERC:sub_dmr1_then_sub_dmrrow1
6617 0, // SPERC:sub_dmr1_then_sub_dmrrowp0
6618 0, // SPERC:sub_dmr1_then_sub_dmrrowp1
6619 0, // SPERC:sub_dmr1_then_sub_wacc_hi
6620 0, // SPERC:sub_dmr1_then_sub_wacc_lo
6621 0, // SPERC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6622 0, // SPERC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6623 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6624 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6625 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6626 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6627 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6628 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6629 0, // SPERC:sub_gp8_x1_then_sub_32
6630 },
6631 { // VFHRC
6632 0, // VFHRC:sub_32
6633 0, // VFHRC:sub_32_hi_phony
6634 0, // VFHRC:sub_64
6635 0, // VFHRC:sub_64_hi_phony
6636 0, // VFHRC:sub_dmr0
6637 0, // VFHRC:sub_dmr1
6638 0, // VFHRC:sub_dmrrow0
6639 0, // VFHRC:sub_dmrrow1
6640 0, // VFHRC:sub_dmrrowp0
6641 0, // VFHRC:sub_dmrrowp1
6642 0, // VFHRC:sub_eq
6643 0, // VFHRC:sub_fp0
6644 0, // VFHRC:sub_fp1
6645 0, // VFHRC:sub_gp8_x0
6646 0, // VFHRC:sub_gp8_x1
6647 0, // VFHRC:sub_gt
6648 0, // VFHRC:sub_lt
6649 0, // VFHRC:sub_pair0
6650 0, // VFHRC:sub_pair1
6651 0, // VFHRC:sub_un
6652 0, // VFHRC:sub_vsx0
6653 0, // VFHRC:sub_vsx1
6654 0, // VFHRC:sub_wacc_hi
6655 0, // VFHRC:sub_wacc_lo
6656 0, // VFHRC:sub_vsx1_then_sub_64
6657 0, // VFHRC:sub_vsx1_then_sub_64_hi_phony
6658 0, // VFHRC:sub_pair1_then_sub_64
6659 0, // VFHRC:sub_pair1_then_sub_64_hi_phony
6660 0, // VFHRC:sub_pair1_then_sub_vsx0
6661 0, // VFHRC:sub_pair1_then_sub_vsx1
6662 0, // VFHRC:sub_pair1_then_sub_vsx1_then_sub_64
6663 0, // VFHRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6664 0, // VFHRC:sub_dmrrowp1_then_sub_dmrrow0
6665 0, // VFHRC:sub_dmrrowp1_then_sub_dmrrow1
6666 0, // VFHRC:sub_wacc_hi_then_sub_dmrrow0
6667 0, // VFHRC:sub_wacc_hi_then_sub_dmrrow1
6668 0, // VFHRC:sub_wacc_hi_then_sub_dmrrowp0
6669 0, // VFHRC:sub_wacc_hi_then_sub_dmrrowp1
6670 0, // VFHRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6671 0, // VFHRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6672 0, // VFHRC:sub_dmr1_then_sub_dmrrow0
6673 0, // VFHRC:sub_dmr1_then_sub_dmrrow1
6674 0, // VFHRC:sub_dmr1_then_sub_dmrrowp0
6675 0, // VFHRC:sub_dmr1_then_sub_dmrrowp1
6676 0, // VFHRC:sub_dmr1_then_sub_wacc_hi
6677 0, // VFHRC:sub_dmr1_then_sub_wacc_lo
6678 0, // VFHRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6679 0, // VFHRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6680 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6681 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6682 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6683 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6684 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6685 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6686 0, // VFHRC:sub_gp8_x1_then_sub_32
6687 },
6688 { // VFRC
6689 0, // VFRC:sub_32
6690 0, // VFRC:sub_32_hi_phony
6691 0, // VFRC:sub_64
6692 0, // VFRC:sub_64_hi_phony
6693 0, // VFRC:sub_dmr0
6694 0, // VFRC:sub_dmr1
6695 0, // VFRC:sub_dmrrow0
6696 0, // VFRC:sub_dmrrow1
6697 0, // VFRC:sub_dmrrowp0
6698 0, // VFRC:sub_dmrrowp1
6699 0, // VFRC:sub_eq
6700 0, // VFRC:sub_fp0
6701 0, // VFRC:sub_fp1
6702 0, // VFRC:sub_gp8_x0
6703 0, // VFRC:sub_gp8_x1
6704 0, // VFRC:sub_gt
6705 0, // VFRC:sub_lt
6706 0, // VFRC:sub_pair0
6707 0, // VFRC:sub_pair1
6708 0, // VFRC:sub_un
6709 0, // VFRC:sub_vsx0
6710 0, // VFRC:sub_vsx1
6711 0, // VFRC:sub_wacc_hi
6712 0, // VFRC:sub_wacc_lo
6713 0, // VFRC:sub_vsx1_then_sub_64
6714 0, // VFRC:sub_vsx1_then_sub_64_hi_phony
6715 0, // VFRC:sub_pair1_then_sub_64
6716 0, // VFRC:sub_pair1_then_sub_64_hi_phony
6717 0, // VFRC:sub_pair1_then_sub_vsx0
6718 0, // VFRC:sub_pair1_then_sub_vsx1
6719 0, // VFRC:sub_pair1_then_sub_vsx1_then_sub_64
6720 0, // VFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6721 0, // VFRC:sub_dmrrowp1_then_sub_dmrrow0
6722 0, // VFRC:sub_dmrrowp1_then_sub_dmrrow1
6723 0, // VFRC:sub_wacc_hi_then_sub_dmrrow0
6724 0, // VFRC:sub_wacc_hi_then_sub_dmrrow1
6725 0, // VFRC:sub_wacc_hi_then_sub_dmrrowp0
6726 0, // VFRC:sub_wacc_hi_then_sub_dmrrowp1
6727 0, // VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6728 0, // VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6729 0, // VFRC:sub_dmr1_then_sub_dmrrow0
6730 0, // VFRC:sub_dmr1_then_sub_dmrrow1
6731 0, // VFRC:sub_dmr1_then_sub_dmrrowp0
6732 0, // VFRC:sub_dmr1_then_sub_dmrrowp1
6733 0, // VFRC:sub_dmr1_then_sub_wacc_hi
6734 0, // VFRC:sub_dmr1_then_sub_wacc_lo
6735 0, // VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6736 0, // VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6737 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6738 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6739 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6740 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6741 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6742 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6743 0, // VFRC:sub_gp8_x1_then_sub_32
6744 },
6745 { // SPERC_with_sub_32_in_GPRC_NOR0
6746 4, // SPERC_with_sub_32_in_GPRC_NOR0:sub_32 -> GPRC_and_GPRC_NOR0
6747 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_32_hi_phony
6748 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_64
6749 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_64_hi_phony
6750 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr0
6751 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1
6752 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrow0
6753 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrow1
6754 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp0
6755 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1
6756 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_eq
6757 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_fp0
6758 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_fp1
6759 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_gp8_x0
6760 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_gp8_x1
6761 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_gt
6762 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_lt
6763 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair0
6764 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1
6765 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_un
6766 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_vsx0
6767 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_vsx1
6768 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi
6769 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_lo
6770 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_vsx1_then_sub_64
6771 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_vsx1_then_sub_64_hi_phony
6772 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_64
6773 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_64_hi_phony
6774 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx0
6775 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1
6776 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64
6777 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6778 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow0
6779 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow1
6780 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow0
6781 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow1
6782 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp0
6783 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1
6784 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6785 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6786 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrow0
6787 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrow1
6788 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp0
6789 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1
6790 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi
6791 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_lo
6792 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6793 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6794 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6795 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6796 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6797 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6798 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6799 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6800 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_gp8_x1_then_sub_32
6801 },
6802 { // SPILLTOVSRRC_and_VFRC
6803 0, // SPILLTOVSRRC_and_VFRC:sub_32
6804 0, // SPILLTOVSRRC_and_VFRC:sub_32_hi_phony
6805 0, // SPILLTOVSRRC_and_VFRC:sub_64
6806 0, // SPILLTOVSRRC_and_VFRC:sub_64_hi_phony
6807 0, // SPILLTOVSRRC_and_VFRC:sub_dmr0
6808 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1
6809 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrow0
6810 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrow1
6811 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrowp0
6812 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrowp1
6813 0, // SPILLTOVSRRC_and_VFRC:sub_eq
6814 0, // SPILLTOVSRRC_and_VFRC:sub_fp0
6815 0, // SPILLTOVSRRC_and_VFRC:sub_fp1
6816 0, // SPILLTOVSRRC_and_VFRC:sub_gp8_x0
6817 0, // SPILLTOVSRRC_and_VFRC:sub_gp8_x1
6818 0, // SPILLTOVSRRC_and_VFRC:sub_gt
6819 0, // SPILLTOVSRRC_and_VFRC:sub_lt
6820 0, // SPILLTOVSRRC_and_VFRC:sub_pair0
6821 0, // SPILLTOVSRRC_and_VFRC:sub_pair1
6822 0, // SPILLTOVSRRC_and_VFRC:sub_un
6823 0, // SPILLTOVSRRC_and_VFRC:sub_vsx0
6824 0, // SPILLTOVSRRC_and_VFRC:sub_vsx1
6825 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi
6826 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_lo
6827 0, // SPILLTOVSRRC_and_VFRC:sub_vsx1_then_sub_64
6828 0, // SPILLTOVSRRC_and_VFRC:sub_vsx1_then_sub_64_hi_phony
6829 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_64
6830 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_64_hi_phony
6831 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx0
6832 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1
6833 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1_then_sub_64
6834 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6835 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrowp1_then_sub_dmrrow0
6836 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrowp1_then_sub_dmrrow1
6837 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrow0
6838 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrow1
6839 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp0
6840 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1
6841 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6842 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6843 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrow0
6844 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrow1
6845 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp0
6846 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1
6847 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi
6848 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_lo
6849 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6850 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6851 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6852 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6853 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6854 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6855 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6856 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6857 0, // SPILLTOVSRRC_and_VFRC:sub_gp8_x1_then_sub_32
6858 },
6859 { // SPILLTOVSRRC_and_F4RC
6860 0, // SPILLTOVSRRC_and_F4RC:sub_32
6861 0, // SPILLTOVSRRC_and_F4RC:sub_32_hi_phony
6862 0, // SPILLTOVSRRC_and_F4RC:sub_64
6863 0, // SPILLTOVSRRC_and_F4RC:sub_64_hi_phony
6864 0, // SPILLTOVSRRC_and_F4RC:sub_dmr0
6865 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1
6866 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrow0
6867 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrow1
6868 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrowp0
6869 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrowp1
6870 0, // SPILLTOVSRRC_and_F4RC:sub_eq
6871 0, // SPILLTOVSRRC_and_F4RC:sub_fp0
6872 0, // SPILLTOVSRRC_and_F4RC:sub_fp1
6873 0, // SPILLTOVSRRC_and_F4RC:sub_gp8_x0
6874 0, // SPILLTOVSRRC_and_F4RC:sub_gp8_x1
6875 0, // SPILLTOVSRRC_and_F4RC:sub_gt
6876 0, // SPILLTOVSRRC_and_F4RC:sub_lt
6877 0, // SPILLTOVSRRC_and_F4RC:sub_pair0
6878 0, // SPILLTOVSRRC_and_F4RC:sub_pair1
6879 0, // SPILLTOVSRRC_and_F4RC:sub_un
6880 0, // SPILLTOVSRRC_and_F4RC:sub_vsx0
6881 0, // SPILLTOVSRRC_and_F4RC:sub_vsx1
6882 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi
6883 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_lo
6884 0, // SPILLTOVSRRC_and_F4RC:sub_vsx1_then_sub_64
6885 0, // SPILLTOVSRRC_and_F4RC:sub_vsx1_then_sub_64_hi_phony
6886 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_64
6887 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_64_hi_phony
6888 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx0
6889 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1
6890 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1_then_sub_64
6891 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6892 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrowp1_then_sub_dmrrow0
6893 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrowp1_then_sub_dmrrow1
6894 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrow0
6895 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrow1
6896 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp0
6897 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1
6898 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6899 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6900 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrow0
6901 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrow1
6902 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp0
6903 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1
6904 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi
6905 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_lo
6906 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6907 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6908 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6909 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6910 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6911 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6912 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6913 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6914 0, // SPILLTOVSRRC_and_F4RC:sub_gp8_x1_then_sub_32
6915 },
6916 { // CTRRC8
6917 0, // CTRRC8:sub_32
6918 0, // CTRRC8:sub_32_hi_phony
6919 0, // CTRRC8:sub_64
6920 0, // CTRRC8:sub_64_hi_phony
6921 0, // CTRRC8:sub_dmr0
6922 0, // CTRRC8:sub_dmr1
6923 0, // CTRRC8:sub_dmrrow0
6924 0, // CTRRC8:sub_dmrrow1
6925 0, // CTRRC8:sub_dmrrowp0
6926 0, // CTRRC8:sub_dmrrowp1
6927 0, // CTRRC8:sub_eq
6928 0, // CTRRC8:sub_fp0
6929 0, // CTRRC8:sub_fp1
6930 0, // CTRRC8:sub_gp8_x0
6931 0, // CTRRC8:sub_gp8_x1
6932 0, // CTRRC8:sub_gt
6933 0, // CTRRC8:sub_lt
6934 0, // CTRRC8:sub_pair0
6935 0, // CTRRC8:sub_pair1
6936 0, // CTRRC8:sub_un
6937 0, // CTRRC8:sub_vsx0
6938 0, // CTRRC8:sub_vsx1
6939 0, // CTRRC8:sub_wacc_hi
6940 0, // CTRRC8:sub_wacc_lo
6941 0, // CTRRC8:sub_vsx1_then_sub_64
6942 0, // CTRRC8:sub_vsx1_then_sub_64_hi_phony
6943 0, // CTRRC8:sub_pair1_then_sub_64
6944 0, // CTRRC8:sub_pair1_then_sub_64_hi_phony
6945 0, // CTRRC8:sub_pair1_then_sub_vsx0
6946 0, // CTRRC8:sub_pair1_then_sub_vsx1
6947 0, // CTRRC8:sub_pair1_then_sub_vsx1_then_sub_64
6948 0, // CTRRC8:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6949 0, // CTRRC8:sub_dmrrowp1_then_sub_dmrrow0
6950 0, // CTRRC8:sub_dmrrowp1_then_sub_dmrrow1
6951 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrow0
6952 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrow1
6953 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrowp0
6954 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrowp1
6955 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6956 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6957 0, // CTRRC8:sub_dmr1_then_sub_dmrrow0
6958 0, // CTRRC8:sub_dmr1_then_sub_dmrrow1
6959 0, // CTRRC8:sub_dmr1_then_sub_dmrrowp0
6960 0, // CTRRC8:sub_dmr1_then_sub_dmrrowp1
6961 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi
6962 0, // CTRRC8:sub_dmr1_then_sub_wacc_lo
6963 0, // CTRRC8:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6964 0, // CTRRC8:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6965 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6966 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6967 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6968 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6969 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6970 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6971 0, // CTRRC8:sub_gp8_x1_then_sub_32
6972 },
6973 { // LR8RC
6974 0, // LR8RC:sub_32
6975 0, // LR8RC:sub_32_hi_phony
6976 0, // LR8RC:sub_64
6977 0, // LR8RC:sub_64_hi_phony
6978 0, // LR8RC:sub_dmr0
6979 0, // LR8RC:sub_dmr1
6980 0, // LR8RC:sub_dmrrow0
6981 0, // LR8RC:sub_dmrrow1
6982 0, // LR8RC:sub_dmrrowp0
6983 0, // LR8RC:sub_dmrrowp1
6984 0, // LR8RC:sub_eq
6985 0, // LR8RC:sub_fp0
6986 0, // LR8RC:sub_fp1
6987 0, // LR8RC:sub_gp8_x0
6988 0, // LR8RC:sub_gp8_x1
6989 0, // LR8RC:sub_gt
6990 0, // LR8RC:sub_lt
6991 0, // LR8RC:sub_pair0
6992 0, // LR8RC:sub_pair1
6993 0, // LR8RC:sub_un
6994 0, // LR8RC:sub_vsx0
6995 0, // LR8RC:sub_vsx1
6996 0, // LR8RC:sub_wacc_hi
6997 0, // LR8RC:sub_wacc_lo
6998 0, // LR8RC:sub_vsx1_then_sub_64
6999 0, // LR8RC:sub_vsx1_then_sub_64_hi_phony
7000 0, // LR8RC:sub_pair1_then_sub_64
7001 0, // LR8RC:sub_pair1_then_sub_64_hi_phony
7002 0, // LR8RC:sub_pair1_then_sub_vsx0
7003 0, // LR8RC:sub_pair1_then_sub_vsx1
7004 0, // LR8RC:sub_pair1_then_sub_vsx1_then_sub_64
7005 0, // LR8RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7006 0, // LR8RC:sub_dmrrowp1_then_sub_dmrrow0
7007 0, // LR8RC:sub_dmrrowp1_then_sub_dmrrow1
7008 0, // LR8RC:sub_wacc_hi_then_sub_dmrrow0
7009 0, // LR8RC:sub_wacc_hi_then_sub_dmrrow1
7010 0, // LR8RC:sub_wacc_hi_then_sub_dmrrowp0
7011 0, // LR8RC:sub_wacc_hi_then_sub_dmrrowp1
7012 0, // LR8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7013 0, // LR8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7014 0, // LR8RC:sub_dmr1_then_sub_dmrrow0
7015 0, // LR8RC:sub_dmr1_then_sub_dmrrow1
7016 0, // LR8RC:sub_dmr1_then_sub_dmrrowp0
7017 0, // LR8RC:sub_dmr1_then_sub_dmrrowp1
7018 0, // LR8RC:sub_dmr1_then_sub_wacc_hi
7019 0, // LR8RC:sub_dmr1_then_sub_wacc_lo
7020 0, // LR8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7021 0, // LR8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7022 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7023 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7024 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7025 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7026 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7027 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7028 0, // LR8RC:sub_gp8_x1_then_sub_32
7029 },
7030 { // DMRROWRC
7031 0, // DMRROWRC:sub_32
7032 0, // DMRROWRC:sub_32_hi_phony
7033 0, // DMRROWRC:sub_64
7034 0, // DMRROWRC:sub_64_hi_phony
7035 0, // DMRROWRC:sub_dmr0
7036 0, // DMRROWRC:sub_dmr1
7037 0, // DMRROWRC:sub_dmrrow0
7038 0, // DMRROWRC:sub_dmrrow1
7039 0, // DMRROWRC:sub_dmrrowp0
7040 0, // DMRROWRC:sub_dmrrowp1
7041 0, // DMRROWRC:sub_eq
7042 0, // DMRROWRC:sub_fp0
7043 0, // DMRROWRC:sub_fp1
7044 0, // DMRROWRC:sub_gp8_x0
7045 0, // DMRROWRC:sub_gp8_x1
7046 0, // DMRROWRC:sub_gt
7047 0, // DMRROWRC:sub_lt
7048 0, // DMRROWRC:sub_pair0
7049 0, // DMRROWRC:sub_pair1
7050 0, // DMRROWRC:sub_un
7051 0, // DMRROWRC:sub_vsx0
7052 0, // DMRROWRC:sub_vsx1
7053 0, // DMRROWRC:sub_wacc_hi
7054 0, // DMRROWRC:sub_wacc_lo
7055 0, // DMRROWRC:sub_vsx1_then_sub_64
7056 0, // DMRROWRC:sub_vsx1_then_sub_64_hi_phony
7057 0, // DMRROWRC:sub_pair1_then_sub_64
7058 0, // DMRROWRC:sub_pair1_then_sub_64_hi_phony
7059 0, // DMRROWRC:sub_pair1_then_sub_vsx0
7060 0, // DMRROWRC:sub_pair1_then_sub_vsx1
7061 0, // DMRROWRC:sub_pair1_then_sub_vsx1_then_sub_64
7062 0, // DMRROWRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7063 0, // DMRROWRC:sub_dmrrowp1_then_sub_dmrrow0
7064 0, // DMRROWRC:sub_dmrrowp1_then_sub_dmrrow1
7065 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrow0
7066 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrow1
7067 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrowp0
7068 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrowp1
7069 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7070 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7071 0, // DMRROWRC:sub_dmr1_then_sub_dmrrow0
7072 0, // DMRROWRC:sub_dmr1_then_sub_dmrrow1
7073 0, // DMRROWRC:sub_dmr1_then_sub_dmrrowp0
7074 0, // DMRROWRC:sub_dmr1_then_sub_dmrrowp1
7075 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi
7076 0, // DMRROWRC:sub_dmr1_then_sub_wacc_lo
7077 0, // DMRROWRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7078 0, // DMRROWRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7079 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7080 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7081 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7082 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7083 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7084 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7085 0, // DMRROWRC:sub_gp8_x1_then_sub_32
7086 },
7087 { // VSRC
7088 0, // VSRC:sub_32
7089 0, // VSRC:sub_32_hi_phony
7090 1, // VSRC:sub_64 -> VSSRC
7091 0, // VSRC:sub_64_hi_phony
7092 0, // VSRC:sub_dmr0
7093 0, // VSRC:sub_dmr1
7094 0, // VSRC:sub_dmrrow0
7095 0, // VSRC:sub_dmrrow1
7096 0, // VSRC:sub_dmrrowp0
7097 0, // VSRC:sub_dmrrowp1
7098 0, // VSRC:sub_eq
7099 0, // VSRC:sub_fp0
7100 0, // VSRC:sub_fp1
7101 0, // VSRC:sub_gp8_x0
7102 0, // VSRC:sub_gp8_x1
7103 0, // VSRC:sub_gt
7104 0, // VSRC:sub_lt
7105 0, // VSRC:sub_pair0
7106 0, // VSRC:sub_pair1
7107 0, // VSRC:sub_un
7108 0, // VSRC:sub_vsx0
7109 0, // VSRC:sub_vsx1
7110 0, // VSRC:sub_wacc_hi
7111 0, // VSRC:sub_wacc_lo
7112 0, // VSRC:sub_vsx1_then_sub_64
7113 0, // VSRC:sub_vsx1_then_sub_64_hi_phony
7114 0, // VSRC:sub_pair1_then_sub_64
7115 0, // VSRC:sub_pair1_then_sub_64_hi_phony
7116 0, // VSRC:sub_pair1_then_sub_vsx0
7117 0, // VSRC:sub_pair1_then_sub_vsx1
7118 0, // VSRC:sub_pair1_then_sub_vsx1_then_sub_64
7119 0, // VSRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7120 0, // VSRC:sub_dmrrowp1_then_sub_dmrrow0
7121 0, // VSRC:sub_dmrrowp1_then_sub_dmrrow1
7122 0, // VSRC:sub_wacc_hi_then_sub_dmrrow0
7123 0, // VSRC:sub_wacc_hi_then_sub_dmrrow1
7124 0, // VSRC:sub_wacc_hi_then_sub_dmrrowp0
7125 0, // VSRC:sub_wacc_hi_then_sub_dmrrowp1
7126 0, // VSRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7127 0, // VSRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7128 0, // VSRC:sub_dmr1_then_sub_dmrrow0
7129 0, // VSRC:sub_dmr1_then_sub_dmrrow1
7130 0, // VSRC:sub_dmr1_then_sub_dmrrowp0
7131 0, // VSRC:sub_dmr1_then_sub_dmrrowp1
7132 0, // VSRC:sub_dmr1_then_sub_wacc_hi
7133 0, // VSRC:sub_dmr1_then_sub_wacc_lo
7134 0, // VSRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7135 0, // VSRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7136 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7137 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7138 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7139 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7140 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7141 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7142 0, // VSRC:sub_gp8_x1_then_sub_32
7143 },
7144 { // VSRC_with_sub_64_in_SPILLTOVSRRC
7145 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_32
7146 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
7147 17, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_VSFRC
7148 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
7149 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
7150 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
7151 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
7152 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
7153 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
7154 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
7155 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
7156 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
7157 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
7158 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
7159 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
7160 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
7161 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
7162 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0
7163 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1
7164 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_un
7165 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0
7166 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1
7167 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
7168 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
7169 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64
7170 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
7171 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64
7172 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
7173 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0
7174 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1
7175 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
7176 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7177 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
7178 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
7179 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
7180 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
7181 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
7182 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
7183 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7184 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7185 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
7186 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
7187 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
7188 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
7189 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
7190 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
7191 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7192 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7193 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7194 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7195 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7196 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7197 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7198 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7199 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
7200 },
7201 { // VRRC
7202 0, // VRRC:sub_32
7203 0, // VRRC:sub_32_hi_phony
7204 23, // VRRC:sub_64 -> VFRC
7205 0, // VRRC:sub_64_hi_phony
7206 0, // VRRC:sub_dmr0
7207 0, // VRRC:sub_dmr1
7208 0, // VRRC:sub_dmrrow0
7209 0, // VRRC:sub_dmrrow1
7210 0, // VRRC:sub_dmrrowp0
7211 0, // VRRC:sub_dmrrowp1
7212 0, // VRRC:sub_eq
7213 0, // VRRC:sub_fp0
7214 0, // VRRC:sub_fp1
7215 0, // VRRC:sub_gp8_x0
7216 0, // VRRC:sub_gp8_x1
7217 0, // VRRC:sub_gt
7218 0, // VRRC:sub_lt
7219 0, // VRRC:sub_pair0
7220 0, // VRRC:sub_pair1
7221 0, // VRRC:sub_un
7222 0, // VRRC:sub_vsx0
7223 0, // VRRC:sub_vsx1
7224 0, // VRRC:sub_wacc_hi
7225 0, // VRRC:sub_wacc_lo
7226 0, // VRRC:sub_vsx1_then_sub_64
7227 0, // VRRC:sub_vsx1_then_sub_64_hi_phony
7228 0, // VRRC:sub_pair1_then_sub_64
7229 0, // VRRC:sub_pair1_then_sub_64_hi_phony
7230 0, // VRRC:sub_pair1_then_sub_vsx0
7231 0, // VRRC:sub_pair1_then_sub_vsx1
7232 0, // VRRC:sub_pair1_then_sub_vsx1_then_sub_64
7233 0, // VRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7234 0, // VRRC:sub_dmrrowp1_then_sub_dmrrow0
7235 0, // VRRC:sub_dmrrowp1_then_sub_dmrrow1
7236 0, // VRRC:sub_wacc_hi_then_sub_dmrrow0
7237 0, // VRRC:sub_wacc_hi_then_sub_dmrrow1
7238 0, // VRRC:sub_wacc_hi_then_sub_dmrrowp0
7239 0, // VRRC:sub_wacc_hi_then_sub_dmrrowp1
7240 0, // VRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7241 0, // VRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7242 0, // VRRC:sub_dmr1_then_sub_dmrrow0
7243 0, // VRRC:sub_dmr1_then_sub_dmrrow1
7244 0, // VRRC:sub_dmr1_then_sub_dmrrowp0
7245 0, // VRRC:sub_dmr1_then_sub_dmrrowp1
7246 0, // VRRC:sub_dmr1_then_sub_wacc_hi
7247 0, // VRRC:sub_dmr1_then_sub_wacc_lo
7248 0, // VRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7249 0, // VRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7250 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7251 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7252 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7253 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7254 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7255 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7256 0, // VRRC:sub_gp8_x1_then_sub_32
7257 },
7258 { // VSLRC
7259 0, // VSLRC:sub_32
7260 0, // VSLRC:sub_32_hi_phony
7261 6, // VSLRC:sub_64 -> F4RC
7262 0, // VSLRC:sub_64_hi_phony
7263 0, // VSLRC:sub_dmr0
7264 0, // VSLRC:sub_dmr1
7265 0, // VSLRC:sub_dmrrow0
7266 0, // VSLRC:sub_dmrrow1
7267 0, // VSLRC:sub_dmrrowp0
7268 0, // VSLRC:sub_dmrrowp1
7269 0, // VSLRC:sub_eq
7270 0, // VSLRC:sub_fp0
7271 0, // VSLRC:sub_fp1
7272 0, // VSLRC:sub_gp8_x0
7273 0, // VSLRC:sub_gp8_x1
7274 0, // VSLRC:sub_gt
7275 0, // VSLRC:sub_lt
7276 0, // VSLRC:sub_pair0
7277 0, // VSLRC:sub_pair1
7278 0, // VSLRC:sub_un
7279 0, // VSLRC:sub_vsx0
7280 0, // VSLRC:sub_vsx1
7281 0, // VSLRC:sub_wacc_hi
7282 0, // VSLRC:sub_wacc_lo
7283 0, // VSLRC:sub_vsx1_then_sub_64
7284 0, // VSLRC:sub_vsx1_then_sub_64_hi_phony
7285 0, // VSLRC:sub_pair1_then_sub_64
7286 0, // VSLRC:sub_pair1_then_sub_64_hi_phony
7287 0, // VSLRC:sub_pair1_then_sub_vsx0
7288 0, // VSLRC:sub_pair1_then_sub_vsx1
7289 0, // VSLRC:sub_pair1_then_sub_vsx1_then_sub_64
7290 0, // VSLRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7291 0, // VSLRC:sub_dmrrowp1_then_sub_dmrrow0
7292 0, // VSLRC:sub_dmrrowp1_then_sub_dmrrow1
7293 0, // VSLRC:sub_wacc_hi_then_sub_dmrrow0
7294 0, // VSLRC:sub_wacc_hi_then_sub_dmrrow1
7295 0, // VSLRC:sub_wacc_hi_then_sub_dmrrowp0
7296 0, // VSLRC:sub_wacc_hi_then_sub_dmrrowp1
7297 0, // VSLRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7298 0, // VSLRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7299 0, // VSLRC:sub_dmr1_then_sub_dmrrow0
7300 0, // VSLRC:sub_dmr1_then_sub_dmrrow1
7301 0, // VSLRC:sub_dmr1_then_sub_dmrrowp0
7302 0, // VSLRC:sub_dmr1_then_sub_dmrrowp1
7303 0, // VSLRC:sub_dmr1_then_sub_wacc_hi
7304 0, // VSLRC:sub_dmr1_then_sub_wacc_lo
7305 0, // VSLRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7306 0, // VSLRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7307 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7308 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7309 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7310 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7311 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7312 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7313 0, // VSLRC:sub_gp8_x1_then_sub_32
7314 },
7315 { // VRRC_with_sub_64_in_SPILLTOVSRRC
7316 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_32
7317 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
7318 25, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_VFRC
7319 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
7320 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
7321 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
7322 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
7323 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
7324 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
7325 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
7326 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
7327 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
7328 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
7329 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
7330 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
7331 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
7332 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
7333 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0
7334 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1
7335 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_un
7336 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0
7337 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1
7338 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
7339 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
7340 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64
7341 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
7342 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64
7343 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
7344 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0
7345 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1
7346 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
7347 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7348 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
7349 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
7350 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
7351 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
7352 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
7353 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
7354 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7355 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7356 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
7357 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
7358 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
7359 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
7360 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
7361 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
7362 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7363 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7364 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7365 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7366 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7367 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7368 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7369 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7370 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
7371 },
7372 { // FpRC
7373 0, // FpRC:sub_32
7374 0, // FpRC:sub_32_hi_phony
7375 0, // FpRC:sub_64
7376 0, // FpRC:sub_64_hi_phony
7377 0, // FpRC:sub_dmr0
7378 0, // FpRC:sub_dmr1
7379 0, // FpRC:sub_dmrrow0
7380 0, // FpRC:sub_dmrrow1
7381 0, // FpRC:sub_dmrrowp0
7382 0, // FpRC:sub_dmrrowp1
7383 0, // FpRC:sub_eq
7384 19, // FpRC:sub_fp0 -> F8RC
7385 19, // FpRC:sub_fp1 -> F8RC
7386 0, // FpRC:sub_gp8_x0
7387 0, // FpRC:sub_gp8_x1
7388 0, // FpRC:sub_gt
7389 0, // FpRC:sub_lt
7390 0, // FpRC:sub_pair0
7391 0, // FpRC:sub_pair1
7392 0, // FpRC:sub_un
7393 0, // FpRC:sub_vsx0
7394 0, // FpRC:sub_vsx1
7395 0, // FpRC:sub_wacc_hi
7396 0, // FpRC:sub_wacc_lo
7397 0, // FpRC:sub_vsx1_then_sub_64
7398 0, // FpRC:sub_vsx1_then_sub_64_hi_phony
7399 0, // FpRC:sub_pair1_then_sub_64
7400 0, // FpRC:sub_pair1_then_sub_64_hi_phony
7401 0, // FpRC:sub_pair1_then_sub_vsx0
7402 0, // FpRC:sub_pair1_then_sub_vsx1
7403 0, // FpRC:sub_pair1_then_sub_vsx1_then_sub_64
7404 0, // FpRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7405 0, // FpRC:sub_dmrrowp1_then_sub_dmrrow0
7406 0, // FpRC:sub_dmrrowp1_then_sub_dmrrow1
7407 0, // FpRC:sub_wacc_hi_then_sub_dmrrow0
7408 0, // FpRC:sub_wacc_hi_then_sub_dmrrow1
7409 0, // FpRC:sub_wacc_hi_then_sub_dmrrowp0
7410 0, // FpRC:sub_wacc_hi_then_sub_dmrrowp1
7411 0, // FpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7412 0, // FpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7413 0, // FpRC:sub_dmr1_then_sub_dmrrow0
7414 0, // FpRC:sub_dmr1_then_sub_dmrrow1
7415 0, // FpRC:sub_dmr1_then_sub_dmrrowp0
7416 0, // FpRC:sub_dmr1_then_sub_dmrrowp1
7417 0, // FpRC:sub_dmr1_then_sub_wacc_hi
7418 0, // FpRC:sub_dmr1_then_sub_wacc_lo
7419 0, // FpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7420 0, // FpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7421 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7422 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7423 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7424 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7425 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7426 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7427 0, // FpRC:sub_gp8_x1_then_sub_32
7428 },
7429 { // G8pRC
7430 2, // G8pRC:sub_32 -> GPRC
7431 0, // G8pRC:sub_32_hi_phony
7432 0, // G8pRC:sub_64
7433 0, // G8pRC:sub_64_hi_phony
7434 0, // G8pRC:sub_dmr0
7435 0, // G8pRC:sub_dmr1
7436 0, // G8pRC:sub_dmrrow0
7437 0, // G8pRC:sub_dmrrow1
7438 0, // G8pRC:sub_dmrrowp0
7439 0, // G8pRC:sub_dmrrowp1
7440 0, // G8pRC:sub_eq
7441 0, // G8pRC:sub_fp0
7442 0, // G8pRC:sub_fp1
7443 15, // G8pRC:sub_gp8_x0 -> G8RC
7444 18, // G8pRC:sub_gp8_x1 -> G8RC_and_G8RC_NOX0
7445 0, // G8pRC:sub_gt
7446 0, // G8pRC:sub_lt
7447 0, // G8pRC:sub_pair0
7448 0, // G8pRC:sub_pair1
7449 0, // G8pRC:sub_un
7450 0, // G8pRC:sub_vsx0
7451 0, // G8pRC:sub_vsx1
7452 0, // G8pRC:sub_wacc_hi
7453 0, // G8pRC:sub_wacc_lo
7454 0, // G8pRC:sub_vsx1_then_sub_64
7455 0, // G8pRC:sub_vsx1_then_sub_64_hi_phony
7456 0, // G8pRC:sub_pair1_then_sub_64
7457 0, // G8pRC:sub_pair1_then_sub_64_hi_phony
7458 0, // G8pRC:sub_pair1_then_sub_vsx0
7459 0, // G8pRC:sub_pair1_then_sub_vsx1
7460 0, // G8pRC:sub_pair1_then_sub_vsx1_then_sub_64
7461 0, // G8pRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7462 0, // G8pRC:sub_dmrrowp1_then_sub_dmrrow0
7463 0, // G8pRC:sub_dmrrowp1_then_sub_dmrrow1
7464 0, // G8pRC:sub_wacc_hi_then_sub_dmrrow0
7465 0, // G8pRC:sub_wacc_hi_then_sub_dmrrow1
7466 0, // G8pRC:sub_wacc_hi_then_sub_dmrrowp0
7467 0, // G8pRC:sub_wacc_hi_then_sub_dmrrowp1
7468 0, // G8pRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7469 0, // G8pRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7470 0, // G8pRC:sub_dmr1_then_sub_dmrrow0
7471 0, // G8pRC:sub_dmr1_then_sub_dmrrow1
7472 0, // G8pRC:sub_dmr1_then_sub_dmrrowp0
7473 0, // G8pRC:sub_dmr1_then_sub_dmrrowp1
7474 0, // G8pRC:sub_dmr1_then_sub_wacc_hi
7475 0, // G8pRC:sub_dmr1_then_sub_wacc_lo
7476 0, // G8pRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7477 0, // G8pRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7478 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7479 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7480 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7481 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7482 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7483 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7484 4, // G8pRC:sub_gp8_x1_then_sub_32 -> GPRC_and_GPRC_NOR0
7485 },
7486 { // G8pRC_with_sub_32_in_GPRC_NOR0
7487 4, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_32 -> GPRC_and_GPRC_NOR0
7488 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_32_hi_phony
7489 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_64
7490 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_64_hi_phony
7491 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr0
7492 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1
7493 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrow0
7494 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrow1
7495 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp0
7496 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1
7497 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_eq
7498 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_fp0
7499 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_fp1
7500 18, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_gp8_x0 -> G8RC_and_G8RC_NOX0
7501 18, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_gp8_x1 -> G8RC_and_G8RC_NOX0
7502 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_gt
7503 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_lt
7504 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair0
7505 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1
7506 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_un
7507 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_vsx0
7508 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_vsx1
7509 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi
7510 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_lo
7511 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_vsx1_then_sub_64
7512 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_vsx1_then_sub_64_hi_phony
7513 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_64
7514 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_64_hi_phony
7515 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx0
7516 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1
7517 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64
7518 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7519 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow0
7520 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow1
7521 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow0
7522 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow1
7523 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp0
7524 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1
7525 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7526 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7527 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrow0
7528 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrow1
7529 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp0
7530 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1
7531 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi
7532 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_lo
7533 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7534 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7535 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7536 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7537 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7538 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7539 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7540 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7541 4, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_gp8_x1_then_sub_32 -> GPRC_and_GPRC_NOR0
7542 },
7543 { // VSLRC_with_sub_64_in_SPILLTOVSRRC
7544 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_32
7545 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
7546 26, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_F4RC
7547 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
7548 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
7549 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
7550 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
7551 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
7552 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
7553 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
7554 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
7555 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
7556 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
7557 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
7558 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
7559 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
7560 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
7561 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0
7562 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1
7563 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_un
7564 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0
7565 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1
7566 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
7567 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
7568 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64
7569 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
7570 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64
7571 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
7572 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0
7573 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1
7574 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
7575 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7576 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
7577 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
7578 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
7579 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
7580 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
7581 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
7582 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7583 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7584 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
7585 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
7586 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
7587 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
7588 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
7589 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
7590 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7591 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7592 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7593 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7594 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7595 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7596 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7597 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7598 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
7599 },
7600 { // FpRC_with_sub_fp0_in_SPILLTOVSRRC
7601 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_32
7602 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_32_hi_phony
7603 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_64
7604 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_64_hi_phony
7605 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr0
7606 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1
7607 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrow0
7608 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrow1
7609 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrowp0
7610 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrowp1
7611 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_eq
7612 26, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_fp0 -> SPILLTOVSRRC_and_F4RC
7613 26, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_fp1 -> SPILLTOVSRRC_and_F4RC
7614 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_gp8_x0
7615 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_gp8_x1
7616 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_gt
7617 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_lt
7618 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair0
7619 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1
7620 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_un
7621 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_vsx0
7622 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_vsx1
7623 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi
7624 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_lo
7625 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_vsx1_then_sub_64
7626 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
7627 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_64
7628 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
7629 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0
7630 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1
7631 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
7632 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7633 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
7634 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
7635 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
7636 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
7637 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
7638 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
7639 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7640 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7641 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
7642 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
7643 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
7644 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
7645 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
7646 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
7647 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7648 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7649 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7650 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7651 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7652 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7653 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7654 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7655 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
7656 },
7657 { // DMRROWpRC
7658 0, // DMRROWpRC:sub_32
7659 0, // DMRROWpRC:sub_32_hi_phony
7660 0, // DMRROWpRC:sub_64
7661 0, // DMRROWpRC:sub_64_hi_phony
7662 0, // DMRROWpRC:sub_dmr0
7663 0, // DMRROWpRC:sub_dmr1
7664 29, // DMRROWpRC:sub_dmrrow0 -> DMRROWRC
7665 29, // DMRROWpRC:sub_dmrrow1 -> DMRROWRC
7666 0, // DMRROWpRC:sub_dmrrowp0
7667 0, // DMRROWpRC:sub_dmrrowp1
7668 0, // DMRROWpRC:sub_eq
7669 0, // DMRROWpRC:sub_fp0
7670 0, // DMRROWpRC:sub_fp1
7671 0, // DMRROWpRC:sub_gp8_x0
7672 0, // DMRROWpRC:sub_gp8_x1
7673 0, // DMRROWpRC:sub_gt
7674 0, // DMRROWpRC:sub_lt
7675 0, // DMRROWpRC:sub_pair0
7676 0, // DMRROWpRC:sub_pair1
7677 0, // DMRROWpRC:sub_un
7678 0, // DMRROWpRC:sub_vsx0
7679 0, // DMRROWpRC:sub_vsx1
7680 0, // DMRROWpRC:sub_wacc_hi
7681 0, // DMRROWpRC:sub_wacc_lo
7682 0, // DMRROWpRC:sub_vsx1_then_sub_64
7683 0, // DMRROWpRC:sub_vsx1_then_sub_64_hi_phony
7684 0, // DMRROWpRC:sub_pair1_then_sub_64
7685 0, // DMRROWpRC:sub_pair1_then_sub_64_hi_phony
7686 0, // DMRROWpRC:sub_pair1_then_sub_vsx0
7687 0, // DMRROWpRC:sub_pair1_then_sub_vsx1
7688 0, // DMRROWpRC:sub_pair1_then_sub_vsx1_then_sub_64
7689 0, // DMRROWpRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7690 0, // DMRROWpRC:sub_dmrrowp1_then_sub_dmrrow0
7691 0, // DMRROWpRC:sub_dmrrowp1_then_sub_dmrrow1
7692 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrow0
7693 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrow1
7694 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrowp0
7695 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrowp1
7696 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7697 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7698 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrow0
7699 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrow1
7700 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrowp0
7701 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrowp1
7702 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi
7703 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_lo
7704 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7705 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7706 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7707 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7708 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7709 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7710 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7711 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7712 0, // DMRROWpRC:sub_gp8_x1_then_sub_32
7713 },
7714 { // VSRpRC
7715 0, // VSRpRC:sub_32
7716 0, // VSRpRC:sub_32_hi_phony
7717 14, // VSRpRC:sub_64 -> VSFRC
7718 0, // VSRpRC:sub_64_hi_phony
7719 0, // VSRpRC:sub_dmr0
7720 0, // VSRpRC:sub_dmr1
7721 0, // VSRpRC:sub_dmrrow0
7722 0, // VSRpRC:sub_dmrrow1
7723 0, // VSRpRC:sub_dmrrowp0
7724 0, // VSRpRC:sub_dmrrowp1
7725 0, // VSRpRC:sub_eq
7726 0, // VSRpRC:sub_fp0
7727 0, // VSRpRC:sub_fp1
7728 0, // VSRpRC:sub_gp8_x0
7729 0, // VSRpRC:sub_gp8_x1
7730 0, // VSRpRC:sub_gt
7731 0, // VSRpRC:sub_lt
7732 0, // VSRpRC:sub_pair0
7733 0, // VSRpRC:sub_pair1
7734 0, // VSRpRC:sub_un
7735 30, // VSRpRC:sub_vsx0 -> VSRC
7736 30, // VSRpRC:sub_vsx1 -> VSRC
7737 0, // VSRpRC:sub_wacc_hi
7738 0, // VSRpRC:sub_wacc_lo
7739 14, // VSRpRC:sub_vsx1_then_sub_64 -> VSFRC
7740 0, // VSRpRC:sub_vsx1_then_sub_64_hi_phony
7741 0, // VSRpRC:sub_pair1_then_sub_64
7742 0, // VSRpRC:sub_pair1_then_sub_64_hi_phony
7743 0, // VSRpRC:sub_pair1_then_sub_vsx0
7744 0, // VSRpRC:sub_pair1_then_sub_vsx1
7745 0, // VSRpRC:sub_pair1_then_sub_vsx1_then_sub_64
7746 0, // VSRpRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7747 0, // VSRpRC:sub_dmrrowp1_then_sub_dmrrow0
7748 0, // VSRpRC:sub_dmrrowp1_then_sub_dmrrow1
7749 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrow0
7750 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrow1
7751 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrowp0
7752 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrowp1
7753 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7754 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7755 0, // VSRpRC:sub_dmr1_then_sub_dmrrow0
7756 0, // VSRpRC:sub_dmr1_then_sub_dmrrow1
7757 0, // VSRpRC:sub_dmr1_then_sub_dmrrowp0
7758 0, // VSRpRC:sub_dmr1_then_sub_dmrrowp1
7759 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi
7760 0, // VSRpRC:sub_dmr1_then_sub_wacc_lo
7761 0, // VSRpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7762 0, // VSRpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7763 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7764 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7765 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7766 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7767 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7768 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7769 0, // VSRpRC:sub_gp8_x1_then_sub_32
7770 },
7771 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC
7772 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_32
7773 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
7774 17, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_VSFRC
7775 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
7776 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
7777 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
7778 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
7779 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
7780 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
7781 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
7782 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
7783 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
7784 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
7785 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
7786 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
7787 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
7788 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
7789 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0
7790 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1
7791 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_un
7792 31, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0 -> VSRC_with_sub_64_in_SPILLTOVSRRC
7793 31, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1 -> VSRC_with_sub_64_in_SPILLTOVSRRC
7794 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
7795 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
7796 17, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_VSFRC
7797 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
7798 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64
7799 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
7800 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0
7801 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1
7802 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
7803 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7804 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
7805 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
7806 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
7807 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
7808 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
7809 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
7810 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7811 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7812 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
7813 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
7814 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
7815 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
7816 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
7817 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
7818 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7819 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7820 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7821 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7822 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7823 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7824 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7825 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7826 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
7827 },
7828 { // VSRpRC_with_sub_64_in_F4RC
7829 0, // VSRpRC_with_sub_64_in_F4RC:sub_32
7830 0, // VSRpRC_with_sub_64_in_F4RC:sub_32_hi_phony
7831 19, // VSRpRC_with_sub_64_in_F4RC:sub_64 -> F8RC
7832 0, // VSRpRC_with_sub_64_in_F4RC:sub_64_hi_phony
7833 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr0
7834 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1
7835 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrow0
7836 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrow1
7837 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrowp0
7838 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrowp1
7839 0, // VSRpRC_with_sub_64_in_F4RC:sub_eq
7840 0, // VSRpRC_with_sub_64_in_F4RC:sub_fp0
7841 0, // VSRpRC_with_sub_64_in_F4RC:sub_fp1
7842 0, // VSRpRC_with_sub_64_in_F4RC:sub_gp8_x0
7843 0, // VSRpRC_with_sub_64_in_F4RC:sub_gp8_x1
7844 0, // VSRpRC_with_sub_64_in_F4RC:sub_gt
7845 0, // VSRpRC_with_sub_64_in_F4RC:sub_lt
7846 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair0
7847 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1
7848 0, // VSRpRC_with_sub_64_in_F4RC:sub_un
7849 33, // VSRpRC_with_sub_64_in_F4RC:sub_vsx0 -> VSLRC
7850 33, // VSRpRC_with_sub_64_in_F4RC:sub_vsx1 -> VSLRC
7851 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi
7852 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_lo
7853 19, // VSRpRC_with_sub_64_in_F4RC:sub_vsx1_then_sub_64 -> F8RC
7854 0, // VSRpRC_with_sub_64_in_F4RC:sub_vsx1_then_sub_64_hi_phony
7855 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_64
7856 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_64_hi_phony
7857 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_vsx0
7858 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_vsx1
7859 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_vsx1_then_sub_64
7860 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7861 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrowp1_then_sub_dmrrow0
7862 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrowp1_then_sub_dmrrow1
7863 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrow0
7864 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrow1
7865 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrowp0
7866 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrowp1
7867 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7868 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7869 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrow0
7870 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrow1
7871 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrowp0
7872 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrowp1
7873 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi
7874 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_lo
7875 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7876 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7877 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7878 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7879 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7880 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7881 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7882 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7883 0, // VSRpRC_with_sub_64_in_F4RC:sub_gp8_x1_then_sub_32
7884 },
7885 { // VSRpRC_with_sub_64_in_VFRC
7886 0, // VSRpRC_with_sub_64_in_VFRC:sub_32
7887 0, // VSRpRC_with_sub_64_in_VFRC:sub_32_hi_phony
7888 23, // VSRpRC_with_sub_64_in_VFRC:sub_64 -> VFRC
7889 0, // VSRpRC_with_sub_64_in_VFRC:sub_64_hi_phony
7890 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr0
7891 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1
7892 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrow0
7893 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrow1
7894 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrowp0
7895 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrowp1
7896 0, // VSRpRC_with_sub_64_in_VFRC:sub_eq
7897 0, // VSRpRC_with_sub_64_in_VFRC:sub_fp0
7898 0, // VSRpRC_with_sub_64_in_VFRC:sub_fp1
7899 0, // VSRpRC_with_sub_64_in_VFRC:sub_gp8_x0
7900 0, // VSRpRC_with_sub_64_in_VFRC:sub_gp8_x1
7901 0, // VSRpRC_with_sub_64_in_VFRC:sub_gt
7902 0, // VSRpRC_with_sub_64_in_VFRC:sub_lt
7903 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair0
7904 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1
7905 0, // VSRpRC_with_sub_64_in_VFRC:sub_un
7906 32, // VSRpRC_with_sub_64_in_VFRC:sub_vsx0 -> VRRC
7907 32, // VSRpRC_with_sub_64_in_VFRC:sub_vsx1 -> VRRC
7908 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi
7909 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_lo
7910 23, // VSRpRC_with_sub_64_in_VFRC:sub_vsx1_then_sub_64 -> VFRC
7911 0, // VSRpRC_with_sub_64_in_VFRC:sub_vsx1_then_sub_64_hi_phony
7912 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_64
7913 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_64_hi_phony
7914 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_vsx0
7915 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_vsx1
7916 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_vsx1_then_sub_64
7917 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7918 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrowp1_then_sub_dmrrow0
7919 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrowp1_then_sub_dmrrow1
7920 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrow0
7921 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrow1
7922 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrowp0
7923 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrowp1
7924 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7925 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7926 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrow0
7927 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrow1
7928 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrowp0
7929 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrowp1
7930 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi
7931 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_lo
7932 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7933 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7934 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7935 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7936 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7937 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7938 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7939 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7940 0, // VSRpRC_with_sub_64_in_VFRC:sub_gp8_x1_then_sub_32
7941 },
7942 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
7943 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_32
7944 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_32_hi_phony
7945 25, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_64 -> SPILLTOVSRRC_and_VFRC
7946 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_64_hi_phony
7947 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr0
7948 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1
7949 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrow0
7950 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrow1
7951 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrowp0
7952 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrowp1
7953 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_eq
7954 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_fp0
7955 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_fp1
7956 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_gp8_x0
7957 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_gp8_x1
7958 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_gt
7959 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_lt
7960 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair0
7961 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1
7962 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_un
7963 34, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_vsx0 -> VRRC_with_sub_64_in_SPILLTOVSRRC
7964 34, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_vsx1 -> VRRC_with_sub_64_in_SPILLTOVSRRC
7965 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi
7966 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_lo
7967 25, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_VFRC
7968 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_vsx1_then_sub_64_hi_phony
7969 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_64
7970 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_64_hi_phony
7971 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx0
7972 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1
7973 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1_then_sub_64
7974 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7975 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrowp1_then_sub_dmrrow0
7976 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrowp1_then_sub_dmrrow1
7977 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrow0
7978 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrow1
7979 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp0
7980 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1
7981 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7982 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7983 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrow0
7984 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrow1
7985 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp0
7986 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1
7987 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi
7988 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_lo
7989 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7990 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7991 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7992 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7993 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7994 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7995 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7996 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7997 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_gp8_x1_then_sub_32
7998 },
7999 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8000 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_32
8001 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_32_hi_phony
8002 26, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_64 -> SPILLTOVSRRC_and_F4RC
8003 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_64_hi_phony
8004 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr0
8005 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1
8006 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrow0
8007 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrow1
8008 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrowp0
8009 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrowp1
8010 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_eq
8011 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_fp0
8012 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_fp1
8013 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_gp8_x0
8014 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_gp8_x1
8015 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_gt
8016 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_lt
8017 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair0
8018 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1
8019 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_un
8020 38, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8021 38, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8022 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi
8023 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_lo
8024 26, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8025 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_vsx1_then_sub_64_hi_phony
8026 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_64
8027 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_64_hi_phony
8028 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx0
8029 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1
8030 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1_then_sub_64
8031 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8032 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrowp1_then_sub_dmrrow0
8033 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrowp1_then_sub_dmrrow1
8034 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrow0
8035 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrow1
8036 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp0
8037 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1
8038 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8039 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8040 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrow0
8041 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrow1
8042 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp0
8043 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1
8044 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi
8045 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_lo
8046 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8047 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8048 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8049 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8050 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8051 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8052 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8053 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8054 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_gp8_x1_then_sub_32
8055 },
8056 { // ACCRC
8057 0, // ACCRC:sub_32
8058 0, // ACCRC:sub_32_hi_phony
8059 19, // ACCRC:sub_64 -> F8RC
8060 0, // ACCRC:sub_64_hi_phony
8061 0, // ACCRC:sub_dmr0
8062 0, // ACCRC:sub_dmr1
8063 0, // ACCRC:sub_dmrrow0
8064 0, // ACCRC:sub_dmrrow1
8065 0, // ACCRC:sub_dmrrowp0
8066 0, // ACCRC:sub_dmrrowp1
8067 0, // ACCRC:sub_eq
8068 0, // ACCRC:sub_fp0
8069 0, // ACCRC:sub_fp1
8070 0, // ACCRC:sub_gp8_x0
8071 0, // ACCRC:sub_gp8_x1
8072 0, // ACCRC:sub_gt
8073 0, // ACCRC:sub_lt
8074 43, // ACCRC:sub_pair0 -> VSRpRC_with_sub_64_in_F4RC
8075 43, // ACCRC:sub_pair1 -> VSRpRC_with_sub_64_in_F4RC
8076 0, // ACCRC:sub_un
8077 33, // ACCRC:sub_vsx0 -> VSLRC
8078 33, // ACCRC:sub_vsx1 -> VSLRC
8079 0, // ACCRC:sub_wacc_hi
8080 0, // ACCRC:sub_wacc_lo
8081 19, // ACCRC:sub_vsx1_then_sub_64 -> F8RC
8082 0, // ACCRC:sub_vsx1_then_sub_64_hi_phony
8083 19, // ACCRC:sub_pair1_then_sub_64 -> F8RC
8084 0, // ACCRC:sub_pair1_then_sub_64_hi_phony
8085 33, // ACCRC:sub_pair1_then_sub_vsx0 -> VSLRC
8086 33, // ACCRC:sub_pair1_then_sub_vsx1 -> VSLRC
8087 19, // ACCRC:sub_pair1_then_sub_vsx1_then_sub_64 -> F8RC
8088 0, // ACCRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8089 0, // ACCRC:sub_dmrrowp1_then_sub_dmrrow0
8090 0, // ACCRC:sub_dmrrowp1_then_sub_dmrrow1
8091 0, // ACCRC:sub_wacc_hi_then_sub_dmrrow0
8092 0, // ACCRC:sub_wacc_hi_then_sub_dmrrow1
8093 0, // ACCRC:sub_wacc_hi_then_sub_dmrrowp0
8094 0, // ACCRC:sub_wacc_hi_then_sub_dmrrowp1
8095 0, // ACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8096 0, // ACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8097 0, // ACCRC:sub_dmr1_then_sub_dmrrow0
8098 0, // ACCRC:sub_dmr1_then_sub_dmrrow1
8099 0, // ACCRC:sub_dmr1_then_sub_dmrrowp0
8100 0, // ACCRC:sub_dmr1_then_sub_dmrrowp1
8101 0, // ACCRC:sub_dmr1_then_sub_wacc_hi
8102 0, // ACCRC:sub_dmr1_then_sub_wacc_lo
8103 0, // ACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8104 0, // ACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8105 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8106 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8107 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8108 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8109 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8110 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8111 0, // ACCRC:sub_gp8_x1_then_sub_32
8112 },
8113 { // UACCRC
8114 0, // UACCRC:sub_32
8115 0, // UACCRC:sub_32_hi_phony
8116 19, // UACCRC:sub_64 -> F8RC
8117 0, // UACCRC:sub_64_hi_phony
8118 0, // UACCRC:sub_dmr0
8119 0, // UACCRC:sub_dmr1
8120 0, // UACCRC:sub_dmrrow0
8121 0, // UACCRC:sub_dmrrow1
8122 0, // UACCRC:sub_dmrrowp0
8123 0, // UACCRC:sub_dmrrowp1
8124 0, // UACCRC:sub_eq
8125 0, // UACCRC:sub_fp0
8126 0, // UACCRC:sub_fp1
8127 0, // UACCRC:sub_gp8_x0
8128 0, // UACCRC:sub_gp8_x1
8129 0, // UACCRC:sub_gt
8130 0, // UACCRC:sub_lt
8131 43, // UACCRC:sub_pair0 -> VSRpRC_with_sub_64_in_F4RC
8132 43, // UACCRC:sub_pair1 -> VSRpRC_with_sub_64_in_F4RC
8133 0, // UACCRC:sub_un
8134 33, // UACCRC:sub_vsx0 -> VSLRC
8135 33, // UACCRC:sub_vsx1 -> VSLRC
8136 0, // UACCRC:sub_wacc_hi
8137 0, // UACCRC:sub_wacc_lo
8138 19, // UACCRC:sub_vsx1_then_sub_64 -> F8RC
8139 0, // UACCRC:sub_vsx1_then_sub_64_hi_phony
8140 19, // UACCRC:sub_pair1_then_sub_64 -> F8RC
8141 0, // UACCRC:sub_pair1_then_sub_64_hi_phony
8142 33, // UACCRC:sub_pair1_then_sub_vsx0 -> VSLRC
8143 33, // UACCRC:sub_pair1_then_sub_vsx1 -> VSLRC
8144 19, // UACCRC:sub_pair1_then_sub_vsx1_then_sub_64 -> F8RC
8145 0, // UACCRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8146 0, // UACCRC:sub_dmrrowp1_then_sub_dmrrow0
8147 0, // UACCRC:sub_dmrrowp1_then_sub_dmrrow1
8148 0, // UACCRC:sub_wacc_hi_then_sub_dmrrow0
8149 0, // UACCRC:sub_wacc_hi_then_sub_dmrrow1
8150 0, // UACCRC:sub_wacc_hi_then_sub_dmrrowp0
8151 0, // UACCRC:sub_wacc_hi_then_sub_dmrrowp1
8152 0, // UACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8153 0, // UACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8154 0, // UACCRC:sub_dmr1_then_sub_dmrrow0
8155 0, // UACCRC:sub_dmr1_then_sub_dmrrow1
8156 0, // UACCRC:sub_dmr1_then_sub_dmrrowp0
8157 0, // UACCRC:sub_dmr1_then_sub_dmrrowp1
8158 0, // UACCRC:sub_dmr1_then_sub_wacc_hi
8159 0, // UACCRC:sub_dmr1_then_sub_wacc_lo
8160 0, // UACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8161 0, // UACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8162 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8163 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8164 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8165 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8166 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8167 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8168 0, // UACCRC:sub_gp8_x1_then_sub_32
8169 },
8170 { // WACCRC
8171 0, // WACCRC:sub_32
8172 0, // WACCRC:sub_32_hi_phony
8173 0, // WACCRC:sub_64
8174 0, // WACCRC:sub_64_hi_phony
8175 0, // WACCRC:sub_dmr0
8176 0, // WACCRC:sub_dmr1
8177 29, // WACCRC:sub_dmrrow0 -> DMRROWRC
8178 29, // WACCRC:sub_dmrrow1 -> DMRROWRC
8179 40, // WACCRC:sub_dmrrowp0 -> DMRROWpRC
8180 40, // WACCRC:sub_dmrrowp1 -> DMRROWpRC
8181 0, // WACCRC:sub_eq
8182 0, // WACCRC:sub_fp0
8183 0, // WACCRC:sub_fp1
8184 0, // WACCRC:sub_gp8_x0
8185 0, // WACCRC:sub_gp8_x1
8186 0, // WACCRC:sub_gt
8187 0, // WACCRC:sub_lt
8188 0, // WACCRC:sub_pair0
8189 0, // WACCRC:sub_pair1
8190 0, // WACCRC:sub_un
8191 0, // WACCRC:sub_vsx0
8192 0, // WACCRC:sub_vsx1
8193 0, // WACCRC:sub_wacc_hi
8194 0, // WACCRC:sub_wacc_lo
8195 0, // WACCRC:sub_vsx1_then_sub_64
8196 0, // WACCRC:sub_vsx1_then_sub_64_hi_phony
8197 0, // WACCRC:sub_pair1_then_sub_64
8198 0, // WACCRC:sub_pair1_then_sub_64_hi_phony
8199 0, // WACCRC:sub_pair1_then_sub_vsx0
8200 0, // WACCRC:sub_pair1_then_sub_vsx1
8201 0, // WACCRC:sub_pair1_then_sub_vsx1_then_sub_64
8202 0, // WACCRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8203 29, // WACCRC:sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8204 29, // WACCRC:sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8205 0, // WACCRC:sub_wacc_hi_then_sub_dmrrow0
8206 0, // WACCRC:sub_wacc_hi_then_sub_dmrrow1
8207 0, // WACCRC:sub_wacc_hi_then_sub_dmrrowp0
8208 0, // WACCRC:sub_wacc_hi_then_sub_dmrrowp1
8209 0, // WACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8210 0, // WACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8211 0, // WACCRC:sub_dmr1_then_sub_dmrrow0
8212 0, // WACCRC:sub_dmr1_then_sub_dmrrow1
8213 0, // WACCRC:sub_dmr1_then_sub_dmrrowp0
8214 0, // WACCRC:sub_dmr1_then_sub_dmrrowp1
8215 0, // WACCRC:sub_dmr1_then_sub_wacc_hi
8216 0, // WACCRC:sub_dmr1_then_sub_wacc_lo
8217 0, // WACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8218 0, // WACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8219 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8220 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8221 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8222 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8223 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8224 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8225 0, // WACCRC:sub_gp8_x1_then_sub_32
8226 },
8227 { // WACC_HIRC
8228 0, // WACC_HIRC:sub_32
8229 0, // WACC_HIRC:sub_32_hi_phony
8230 0, // WACC_HIRC:sub_64
8231 0, // WACC_HIRC:sub_64_hi_phony
8232 0, // WACC_HIRC:sub_dmr0
8233 0, // WACC_HIRC:sub_dmr1
8234 29, // WACC_HIRC:sub_dmrrow0 -> DMRROWRC
8235 29, // WACC_HIRC:sub_dmrrow1 -> DMRROWRC
8236 40, // WACC_HIRC:sub_dmrrowp0 -> DMRROWpRC
8237 40, // WACC_HIRC:sub_dmrrowp1 -> DMRROWpRC
8238 0, // WACC_HIRC:sub_eq
8239 0, // WACC_HIRC:sub_fp0
8240 0, // WACC_HIRC:sub_fp1
8241 0, // WACC_HIRC:sub_gp8_x0
8242 0, // WACC_HIRC:sub_gp8_x1
8243 0, // WACC_HIRC:sub_gt
8244 0, // WACC_HIRC:sub_lt
8245 0, // WACC_HIRC:sub_pair0
8246 0, // WACC_HIRC:sub_pair1
8247 0, // WACC_HIRC:sub_un
8248 0, // WACC_HIRC:sub_vsx0
8249 0, // WACC_HIRC:sub_vsx1
8250 0, // WACC_HIRC:sub_wacc_hi
8251 0, // WACC_HIRC:sub_wacc_lo
8252 0, // WACC_HIRC:sub_vsx1_then_sub_64
8253 0, // WACC_HIRC:sub_vsx1_then_sub_64_hi_phony
8254 0, // WACC_HIRC:sub_pair1_then_sub_64
8255 0, // WACC_HIRC:sub_pair1_then_sub_64_hi_phony
8256 0, // WACC_HIRC:sub_pair1_then_sub_vsx0
8257 0, // WACC_HIRC:sub_pair1_then_sub_vsx1
8258 0, // WACC_HIRC:sub_pair1_then_sub_vsx1_then_sub_64
8259 0, // WACC_HIRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8260 29, // WACC_HIRC:sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8261 29, // WACC_HIRC:sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8262 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrow0
8263 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrow1
8264 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrowp0
8265 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrowp1
8266 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8267 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8268 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrow0
8269 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrow1
8270 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrowp0
8271 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrowp1
8272 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi
8273 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_lo
8274 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8275 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8276 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8277 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8278 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8279 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8280 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8281 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8282 0, // WACC_HIRC:sub_gp8_x1_then_sub_32
8283 },
8284 { // ACCRC_with_sub_64_in_SPILLTOVSRRC
8285 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_32
8286 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
8287 26, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_F4RC
8288 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
8289 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
8290 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
8291 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
8292 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
8293 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
8294 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
8295 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
8296 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
8297 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
8298 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
8299 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
8300 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
8301 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
8302 46, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8303 43, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1 -> VSRpRC_with_sub_64_in_F4RC
8304 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_un
8305 38, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8306 38, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8307 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
8308 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
8309 26, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8310 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
8311 19, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64 -> F8RC
8312 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
8313 33, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0 -> VSLRC
8314 33, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1 -> VSLRC
8315 19, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64 -> F8RC
8316 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8317 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
8318 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
8319 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
8320 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
8321 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
8322 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
8323 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8324 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8325 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
8326 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
8327 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
8328 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
8329 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
8330 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
8331 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8332 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8333 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8334 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8335 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8336 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8337 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8338 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8339 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
8340 },
8341 { // UACCRC_with_sub_64_in_SPILLTOVSRRC
8342 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_32
8343 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
8344 26, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_F4RC
8345 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
8346 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
8347 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
8348 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
8349 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
8350 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
8351 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
8352 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
8353 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
8354 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
8355 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
8356 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
8357 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
8358 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
8359 46, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8360 43, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1 -> VSRpRC_with_sub_64_in_F4RC
8361 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_un
8362 38, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8363 38, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8364 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
8365 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
8366 26, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8367 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
8368 19, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64 -> F8RC
8369 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
8370 33, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0 -> VSLRC
8371 33, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1 -> VSLRC
8372 19, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64 -> F8RC
8373 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8374 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
8375 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
8376 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
8377 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
8378 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
8379 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
8380 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8381 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8382 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
8383 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
8384 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
8385 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
8386 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
8387 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
8388 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8389 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8390 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8391 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8392 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8393 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8394 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8395 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8396 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
8397 },
8398 { // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
8399 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_32
8400 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
8401 26, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_F4RC
8402 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
8403 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr0
8404 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1
8405 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
8406 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
8407 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
8408 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
8409 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_eq
8410 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_fp0
8411 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_fp1
8412 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
8413 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
8414 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gt
8415 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_lt
8416 46, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8417 46, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8418 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_un
8419 38, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8420 38, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8421 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
8422 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
8423 26, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8424 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
8425 26, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8426 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
8427 38, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8428 38, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8429 26, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8430 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8431 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
8432 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
8433 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
8434 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
8435 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
8436 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
8437 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8438 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8439 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
8440 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
8441 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
8442 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
8443 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
8444 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
8445 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8446 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8447 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8448 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8449 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8450 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8451 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8452 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8453 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
8454 },
8455 { // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
8456 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_32
8457 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
8458 26, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_F4RC
8459 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
8460 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr0
8461 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1
8462 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
8463 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
8464 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
8465 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
8466 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_eq
8467 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_fp0
8468 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_fp1
8469 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
8470 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
8471 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gt
8472 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_lt
8473 46, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8474 46, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8475 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_un
8476 38, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8477 38, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8478 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
8479 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
8480 26, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8481 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
8482 26, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8483 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
8484 38, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8485 38, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8486 26, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8487 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8488 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
8489 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
8490 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
8491 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
8492 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
8493 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
8494 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8495 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8496 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
8497 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
8498 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
8499 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
8500 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
8501 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
8502 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8503 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8504 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8505 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8506 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8507 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8508 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8509 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8510 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
8511 },
8512 { // DMRRC
8513 0, // DMRRC:sub_32
8514 0, // DMRRC:sub_32_hi_phony
8515 0, // DMRRC:sub_64
8516 0, // DMRRC:sub_64_hi_phony
8517 0, // DMRRC:sub_dmr0
8518 0, // DMRRC:sub_dmr1
8519 29, // DMRRC:sub_dmrrow0 -> DMRROWRC
8520 29, // DMRRC:sub_dmrrow1 -> DMRROWRC
8521 40, // DMRRC:sub_dmrrowp0 -> DMRROWpRC
8522 40, // DMRRC:sub_dmrrowp1 -> DMRROWpRC
8523 0, // DMRRC:sub_eq
8524 0, // DMRRC:sub_fp0
8525 0, // DMRRC:sub_fp1
8526 0, // DMRRC:sub_gp8_x0
8527 0, // DMRRC:sub_gp8_x1
8528 0, // DMRRC:sub_gt
8529 0, // DMRRC:sub_lt
8530 0, // DMRRC:sub_pair0
8531 0, // DMRRC:sub_pair1
8532 0, // DMRRC:sub_un
8533 0, // DMRRC:sub_vsx0
8534 0, // DMRRC:sub_vsx1
8535 50, // DMRRC:sub_wacc_hi -> WACC_HIRC
8536 49, // DMRRC:sub_wacc_lo -> WACCRC
8537 0, // DMRRC:sub_vsx1_then_sub_64
8538 0, // DMRRC:sub_vsx1_then_sub_64_hi_phony
8539 0, // DMRRC:sub_pair1_then_sub_64
8540 0, // DMRRC:sub_pair1_then_sub_64_hi_phony
8541 0, // DMRRC:sub_pair1_then_sub_vsx0
8542 0, // DMRRC:sub_pair1_then_sub_vsx1
8543 0, // DMRRC:sub_pair1_then_sub_vsx1_then_sub_64
8544 0, // DMRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8545 29, // DMRRC:sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8546 29, // DMRRC:sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8547 29, // DMRRC:sub_wacc_hi_then_sub_dmrrow0 -> DMRROWRC
8548 29, // DMRRC:sub_wacc_hi_then_sub_dmrrow1 -> DMRROWRC
8549 40, // DMRRC:sub_wacc_hi_then_sub_dmrrowp0 -> DMRROWpRC
8550 40, // DMRRC:sub_wacc_hi_then_sub_dmrrowp1 -> DMRROWpRC
8551 29, // DMRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8552 29, // DMRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8553 0, // DMRRC:sub_dmr1_then_sub_dmrrow0
8554 0, // DMRRC:sub_dmr1_then_sub_dmrrow1
8555 0, // DMRRC:sub_dmr1_then_sub_dmrrowp0
8556 0, // DMRRC:sub_dmr1_then_sub_dmrrowp1
8557 0, // DMRRC:sub_dmr1_then_sub_wacc_hi
8558 0, // DMRRC:sub_dmr1_then_sub_wacc_lo
8559 0, // DMRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8560 0, // DMRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8561 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8562 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8563 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8564 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8565 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8566 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8567 0, // DMRRC:sub_gp8_x1_then_sub_32
8568 },
8569 { // DMRpRC
8570 0, // DMRpRC:sub_32
8571 0, // DMRpRC:sub_32_hi_phony
8572 0, // DMRpRC:sub_64
8573 0, // DMRpRC:sub_64_hi_phony
8574 55, // DMRpRC:sub_dmr0 -> DMRRC
8575 55, // DMRpRC:sub_dmr1 -> DMRRC
8576 29, // DMRpRC:sub_dmrrow0 -> DMRROWRC
8577 29, // DMRpRC:sub_dmrrow1 -> DMRROWRC
8578 40, // DMRpRC:sub_dmrrowp0 -> DMRROWpRC
8579 40, // DMRpRC:sub_dmrrowp1 -> DMRROWpRC
8580 0, // DMRpRC:sub_eq
8581 0, // DMRpRC:sub_fp0
8582 0, // DMRpRC:sub_fp1
8583 0, // DMRpRC:sub_gp8_x0
8584 0, // DMRpRC:sub_gp8_x1
8585 0, // DMRpRC:sub_gt
8586 0, // DMRpRC:sub_lt
8587 0, // DMRpRC:sub_pair0
8588 0, // DMRpRC:sub_pair1
8589 0, // DMRpRC:sub_un
8590 0, // DMRpRC:sub_vsx0
8591 0, // DMRpRC:sub_vsx1
8592 50, // DMRpRC:sub_wacc_hi -> WACC_HIRC
8593 49, // DMRpRC:sub_wacc_lo -> WACCRC
8594 0, // DMRpRC:sub_vsx1_then_sub_64
8595 0, // DMRpRC:sub_vsx1_then_sub_64_hi_phony
8596 0, // DMRpRC:sub_pair1_then_sub_64
8597 0, // DMRpRC:sub_pair1_then_sub_64_hi_phony
8598 0, // DMRpRC:sub_pair1_then_sub_vsx0
8599 0, // DMRpRC:sub_pair1_then_sub_vsx1
8600 0, // DMRpRC:sub_pair1_then_sub_vsx1_then_sub_64
8601 0, // DMRpRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8602 29, // DMRpRC:sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8603 29, // DMRpRC:sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8604 29, // DMRpRC:sub_wacc_hi_then_sub_dmrrow0 -> DMRROWRC
8605 29, // DMRpRC:sub_wacc_hi_then_sub_dmrrow1 -> DMRROWRC
8606 40, // DMRpRC:sub_wacc_hi_then_sub_dmrrowp0 -> DMRROWpRC
8607 40, // DMRpRC:sub_wacc_hi_then_sub_dmrrowp1 -> DMRROWpRC
8608 29, // DMRpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8609 29, // DMRpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8610 29, // DMRpRC:sub_dmr1_then_sub_dmrrow0 -> DMRROWRC
8611 29, // DMRpRC:sub_dmr1_then_sub_dmrrow1 -> DMRROWRC
8612 40, // DMRpRC:sub_dmr1_then_sub_dmrrowp0 -> DMRROWpRC
8613 40, // DMRpRC:sub_dmr1_then_sub_dmrrowp1 -> DMRROWpRC
8614 50, // DMRpRC:sub_dmr1_then_sub_wacc_hi -> WACC_HIRC
8615 49, // DMRpRC:sub_dmr1_then_sub_wacc_lo -> WACCRC
8616 29, // DMRpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8617 29, // DMRpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8618 29, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0 -> DMRROWRC
8619 29, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1 -> DMRROWRC
8620 40, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0 -> DMRROWpRC
8621 40, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1 -> DMRROWpRC
8622 29, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8623 29, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8624 0, // DMRpRC:sub_gp8_x1_then_sub_32
8625 },
8626
8627 };
8628 assert(RC && "Missing regclass");
8629 if (!Idx) return RC;
8630 --Idx;
8631 assert(Idx < 55 && "Bad subreg");
8632 unsigned TV = Table[RC->getID()][Idx];
8633 return TV ? getRegClass(i: TV - 1) : nullptr;
8634}/// Get the weight in units of pressure for this register class.
8635const RegClassWeight &PPCGenRegisterInfo::
8636getRegClassWeight(const TargetRegisterClass *RC) const {
8637 static const RegClassWeight RCWeightTable[] = {
8638 {.RegWeight: 1, .WeightLimit: 64}, // VSSRC
8639 {.RegWeight: 1, .WeightLimit: 34}, // GPRC
8640 {.RegWeight: 1, .WeightLimit: 34}, // GPRC_NOR0
8641 {.RegWeight: 1, .WeightLimit: 33}, // GPRC_and_GPRC_NOR0
8642 {.RegWeight: 1, .WeightLimit: 32}, // CRBITRC
8643 {.RegWeight: 1, .WeightLimit: 32}, // F4RC
8644 {.RegWeight: 0, .WeightLimit: 0}, // GPRC32
8645 {.RegWeight: 4, .WeightLimit: 32}, // CRRC
8646 {.RegWeight: 0, .WeightLimit: 0}, // CARRYRC
8647 {.RegWeight: 0, .WeightLimit: 0}, // CTRRC
8648 {.RegWeight: 0, .WeightLimit: 0}, // LRRC
8649 {.RegWeight: 1, .WeightLimit: 1}, // VRSAVERC
8650 {.RegWeight: 1, .WeightLimit: 68}, // SPILLTOVSRRC
8651 {.RegWeight: 1, .WeightLimit: 64}, // VSFRC
8652 {.RegWeight: 1, .WeightLimit: 34}, // G8RC
8653 {.RegWeight: 1, .WeightLimit: 34}, // G8RC_NOX0
8654 {.RegWeight: 1, .WeightLimit: 34}, // SPILLTOVSRRC_and_VSFRC
8655 {.RegWeight: 1, .WeightLimit: 33}, // G8RC_and_G8RC_NOX0
8656 {.RegWeight: 1, .WeightLimit: 32}, // F8RC
8657 {.RegWeight: 0, .WeightLimit: 0}, // FHRC
8658 {.RegWeight: 1, .WeightLimit: 32}, // SPERC
8659 {.RegWeight: 0, .WeightLimit: 0}, // VFHRC
8660 {.RegWeight: 1, .WeightLimit: 32}, // VFRC
8661 {.RegWeight: 1, .WeightLimit: 31}, // SPERC_with_sub_32_in_GPRC_NOR0
8662 {.RegWeight: 1, .WeightLimit: 20}, // SPILLTOVSRRC_and_VFRC
8663 {.RegWeight: 1, .WeightLimit: 14}, // SPILLTOVSRRC_and_F4RC
8664 {.RegWeight: 0, .WeightLimit: 0}, // CTRRC8
8665 {.RegWeight: 0, .WeightLimit: 0}, // LR8RC
8666 {.RegWeight: 1, .WeightLimit: 64}, // DMRROWRC
8667 {.RegWeight: 1, .WeightLimit: 64}, // VSRC
8668 {.RegWeight: 1, .WeightLimit: 34}, // VSRC_with_sub_64_in_SPILLTOVSRRC
8669 {.RegWeight: 1, .WeightLimit: 32}, // VRRC
8670 {.RegWeight: 1, .WeightLimit: 32}, // VSLRC
8671 {.RegWeight: 1, .WeightLimit: 20}, // VRRC_with_sub_64_in_SPILLTOVSRRC
8672 {.RegWeight: 2, .WeightLimit: 32}, // FpRC
8673 {.RegWeight: 2, .WeightLimit: 32}, // G8pRC
8674 {.RegWeight: 2, .WeightLimit: 30}, // G8pRC_with_sub_32_in_GPRC_NOR0
8675 {.RegWeight: 1, .WeightLimit: 14}, // VSLRC_with_sub_64_in_SPILLTOVSRRC
8676 {.RegWeight: 2, .WeightLimit: 14}, // FpRC_with_sub_fp0_in_SPILLTOVSRRC
8677 {.RegWeight: 2, .WeightLimit: 64}, // DMRROWpRC
8678 {.RegWeight: 2, .WeightLimit: 64}, // VSRpRC
8679 {.RegWeight: 2, .WeightLimit: 34}, // VSRpRC_with_sub_64_in_SPILLTOVSRRC
8680 {.RegWeight: 2, .WeightLimit: 32}, // VSRpRC_with_sub_64_in_F4RC
8681 {.RegWeight: 2, .WeightLimit: 32}, // VSRpRC_with_sub_64_in_VFRC
8682 {.RegWeight: 2, .WeightLimit: 20}, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
8683 {.RegWeight: 2, .WeightLimit: 14}, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8684 {.RegWeight: 4, .WeightLimit: 32}, // ACCRC
8685 {.RegWeight: 4, .WeightLimit: 32}, // UACCRC
8686 {.RegWeight: 4, .WeightLimit: 32}, // WACCRC
8687 {.RegWeight: 4, .WeightLimit: 32}, // WACC_HIRC
8688 {.RegWeight: 4, .WeightLimit: 16}, // ACCRC_with_sub_64_in_SPILLTOVSRRC
8689 {.RegWeight: 4, .WeightLimit: 16}, // UACCRC_with_sub_64_in_SPILLTOVSRRC
8690 {.RegWeight: 4, .WeightLimit: 12}, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
8691 {.RegWeight: 4, .WeightLimit: 12}, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
8692 {.RegWeight: 8, .WeightLimit: 64}, // DMRRC
8693 {.RegWeight: 16, .WeightLimit: 64}, // DMRpRC
8694 };
8695 return RCWeightTable[RC->getID()];
8696}
8697
8698/// Get the weight in units of pressure for this register unit.
8699unsigned PPCGenRegisterInfo::
8700getRegUnitWeight(MCRegUnit RegUnit) const {
8701 assert(static_cast<unsigned>(RegUnit) < 335 && "invalid register unit");
8702 // All register units have unit weight.
8703 return 1;
8704}
8705
8706
8707// Get the number of dimensions of register pressure.
8708unsigned PPCGenRegisterInfo::getNumRegPressureSets() const {
8709 return 19;
8710}
8711
8712// Get the name of this register unit pressure set.
8713const char *PPCGenRegisterInfo::
8714getRegPressureSetName(unsigned Idx) const {
8715 static const char *PressureNameTable[] = {
8716 "VRSAVERC",
8717 "SPILLTOVSRRC_and_F4RC",
8718 "SPILLTOVSRRC_and_VFRC",
8719 "CRBITRC",
8720 "F4RC",
8721 "VFRC",
8722 "WACCRC",
8723 "WACC_HIRC",
8724 "GPRC",
8725 "SPILLTOVSRRC_and_VSFRC",
8726 "SPILLTOVSRRC_and_VSFRC_with_VFRC",
8727 "F4RC_with_SPILLTOVSRRC_and_VSFRC",
8728 "VSSRC",
8729 "DMRROWRC",
8730 "SPILLTOVSRRC",
8731 "SPILLTOVSRRC_with_SPILLTOVSRRC_and_F4RC",
8732 "SPILLTOVSRRC_with_VFRC",
8733 "F4RC_with_SPILLTOVSRRC",
8734 "VSSRC_with_SPILLTOVSRRC",
8735 };
8736 return PressureNameTable[Idx];
8737}
8738
8739// Get the register unit pressure limit for this dimension.
8740// This limit must be adjusted dynamically for reserved registers.
8741unsigned PPCGenRegisterInfo::
8742getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const {
8743 static const uint8_t PressureLimitTable[] = {
8744 1, // 0: VRSAVERC
8745 16, // 1: SPILLTOVSRRC_and_F4RC
8746 20, // 2: SPILLTOVSRRC_and_VFRC
8747 32, // 3: CRBITRC
8748 32, // 4: F4RC
8749 32, // 5: VFRC
8750 32, // 6: WACCRC
8751 32, // 7: WACC_HIRC
8752 35, // 8: GPRC
8753 36, // 9: SPILLTOVSRRC_and_VSFRC
8754 46, // 10: SPILLTOVSRRC_and_VSFRC_with_VFRC
8755 52, // 11: F4RC_with_SPILLTOVSRRC_and_VSFRC
8756 64, // 12: VSSRC
8757 64, // 13: DMRROWRC
8758 69, // 14: SPILLTOVSRRC
8759 70, // 15: SPILLTOVSRRC_with_SPILLTOVSRRC_and_F4RC
8760 80, // 16: SPILLTOVSRRC_with_VFRC
8761 86, // 17: F4RC_with_SPILLTOVSRRC
8762 98, // 18: VSSRC_with_SPILLTOVSRRC
8763 };
8764 return PressureLimitTable[Idx];
8765}
8766
8767/// Table of pressure sets per register class or unit.
8768static const int RCSetsTable[] = {
8769 /* 0 */ 0, -1,
8770 /* 2 */ 3, -1,
8771 /* 4 */ 6, 13, -1,
8772 /* 7 */ 7, 13, -1,
8773 /* 10 */ 8, 14, -1,
8774 /* 13 */ 12, 18, -1,
8775 /* 16 */ 5, 10, 12, 16, 18, -1,
8776 /* 22 */ 4, 11, 12, 17, 18, -1,
8777 /* 28 */ 1, 4, 9, 11, 12, 15, 17, 18, -1,
8778 /* 37 */ 8, 14, 15, 16, 17, 18, -1,
8779 /* 44 */ 1, 4, 9, 10, 11, 12, 14, 15, 16, 17, 18, -1,
8780 /* 56 */ 2, 5, 9, 10, 11, 12, 14, 15, 16, 17, 18, -1,
8781};
8782
8783/// Get the dimensions of register pressure impacted by this register class.
8784/// Returns a -1 terminated array of pressure set IDs
8785const int *PPCGenRegisterInfo::
8786getRegClassPressureSets(const TargetRegisterClass *RC) const {
8787 static const uint8_t RCSetStartTable[] = {
8788 13,37,10,37,2,22,1,2,1,1,1,0,38,13,37,10,46,37,22,1,37,1,16,37,56,44,1,1,5,13,46,16,22,56,22,37,37,44,44,5,13,46,22,16,56,44,22,22,4,7,28,28,44,44,5,5,};
8789 return &RCSetsTable[RCSetStartTable[RC->getID()]];
8790}
8791
8792/// Get the dimensions of register pressure impacted by this register unit.
8793/// Returns a -1 terminated array of pressure set IDs
8794const int *PPCGenRegisterInfo::
8795getRegUnitPressureSets(MCRegUnit RegUnit) const {
8796 assert(static_cast<unsigned>(RegUnit) < 335 && "invalid register unit");
8797 static const uint8_t RUSetStartTable[] = {
8798 37,1,1,1,1,37,1,1,1,1,0,1,10,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,28,1,28,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,1,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,};
8799 return &RCSetsTable[RUSetStartTable[static_cast<unsigned>(RegUnit)]];
8800}
8801
8802
8803// Register to minimal register class mapping
8804
8805const TargetRegisterClass *PPCGenRegisterInfo::getMinimalPhysRegClass(MCRegister Reg) const {
8806 static const uint16_t InvalidRegClassID = UINT16_MAX;
8807
8808 static const uint16_t Mapping[612] = {
8809 InvalidRegClassID, // NoRegister
8810 PPC::GPRC_and_GPRC_NOR0RegClassID, // BP
8811 PPC::CARRYRCRegClassID, // CARRY
8812 PPC::CTRRCRegClassID, // CTR
8813 PPC::GPRC_and_GPRC_NOR0RegClassID, // FP
8814 PPC::LRRCRegClassID, // LR
8815 InvalidRegClassID, // RM
8816 InvalidRegClassID, // SPEFSCR
8817 PPC::VRSAVERCRegClassID, // VRSAVE
8818 PPC::CARRYRCRegClassID, // XER
8819 PPC::GPRC_NOR0RegClassID, // ZERO
8820 PPC::ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClassID, // ACC0
8821 PPC::ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClassID, // ACC1
8822 PPC::ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClassID, // ACC2
8823 PPC::ACCRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // ACC3
8824 PPC::ACCRCRegClassID, // ACC4
8825 PPC::ACCRCRegClassID, // ACC5
8826 PPC::ACCRCRegClassID, // ACC6
8827 PPC::ACCRCRegClassID, // ACC7
8828 PPC::G8RC_and_G8RC_NOX0RegClassID, // BP8
8829 PPC::CRRCRegClassID, // CR0
8830 PPC::CRRCRegClassID, // CR1
8831 PPC::CRRCRegClassID, // CR2
8832 PPC::CRRCRegClassID, // CR3
8833 PPC::CRRCRegClassID, // CR4
8834 PPC::CRRCRegClassID, // CR5
8835 PPC::CRRCRegClassID, // CR6
8836 PPC::CRRCRegClassID, // CR7
8837 PPC::CTRRC8RegClassID, // CTR8
8838 PPC::DMRRCRegClassID, // DMR0
8839 PPC::DMRRCRegClassID, // DMR1
8840 PPC::DMRRCRegClassID, // DMR2
8841 PPC::DMRRCRegClassID, // DMR3
8842 PPC::DMRRCRegClassID, // DMR4
8843 PPC::DMRRCRegClassID, // DMR5
8844 PPC::DMRRCRegClassID, // DMR6
8845 PPC::DMRRCRegClassID, // DMR7
8846 PPC::DMRROWRCRegClassID, // DMRROW0
8847 PPC::DMRROWRCRegClassID, // DMRROW1
8848 PPC::DMRROWRCRegClassID, // DMRROW2
8849 PPC::DMRROWRCRegClassID, // DMRROW3
8850 PPC::DMRROWRCRegClassID, // DMRROW4
8851 PPC::DMRROWRCRegClassID, // DMRROW5
8852 PPC::DMRROWRCRegClassID, // DMRROW6
8853 PPC::DMRROWRCRegClassID, // DMRROW7
8854 PPC::DMRROWRCRegClassID, // DMRROW8
8855 PPC::DMRROWRCRegClassID, // DMRROW9
8856 PPC::DMRROWRCRegClassID, // DMRROW10
8857 PPC::DMRROWRCRegClassID, // DMRROW11
8858 PPC::DMRROWRCRegClassID, // DMRROW12
8859 PPC::DMRROWRCRegClassID, // DMRROW13
8860 PPC::DMRROWRCRegClassID, // DMRROW14
8861 PPC::DMRROWRCRegClassID, // DMRROW15
8862 PPC::DMRROWRCRegClassID, // DMRROW16
8863 PPC::DMRROWRCRegClassID, // DMRROW17
8864 PPC::DMRROWRCRegClassID, // DMRROW18
8865 PPC::DMRROWRCRegClassID, // DMRROW19
8866 PPC::DMRROWRCRegClassID, // DMRROW20
8867 PPC::DMRROWRCRegClassID, // DMRROW21
8868 PPC::DMRROWRCRegClassID, // DMRROW22
8869 PPC::DMRROWRCRegClassID, // DMRROW23
8870 PPC::DMRROWRCRegClassID, // DMRROW24
8871 PPC::DMRROWRCRegClassID, // DMRROW25
8872 PPC::DMRROWRCRegClassID, // DMRROW26
8873 PPC::DMRROWRCRegClassID, // DMRROW27
8874 PPC::DMRROWRCRegClassID, // DMRROW28
8875 PPC::DMRROWRCRegClassID, // DMRROW29
8876 PPC::DMRROWRCRegClassID, // DMRROW30
8877 PPC::DMRROWRCRegClassID, // DMRROW31
8878 PPC::DMRROWRCRegClassID, // DMRROW32
8879 PPC::DMRROWRCRegClassID, // DMRROW33
8880 PPC::DMRROWRCRegClassID, // DMRROW34
8881 PPC::DMRROWRCRegClassID, // DMRROW35
8882 PPC::DMRROWRCRegClassID, // DMRROW36
8883 PPC::DMRROWRCRegClassID, // DMRROW37
8884 PPC::DMRROWRCRegClassID, // DMRROW38
8885 PPC::DMRROWRCRegClassID, // DMRROW39
8886 PPC::DMRROWRCRegClassID, // DMRROW40
8887 PPC::DMRROWRCRegClassID, // DMRROW41
8888 PPC::DMRROWRCRegClassID, // DMRROW42
8889 PPC::DMRROWRCRegClassID, // DMRROW43
8890 PPC::DMRROWRCRegClassID, // DMRROW44
8891 PPC::DMRROWRCRegClassID, // DMRROW45
8892 PPC::DMRROWRCRegClassID, // DMRROW46
8893 PPC::DMRROWRCRegClassID, // DMRROW47
8894 PPC::DMRROWRCRegClassID, // DMRROW48
8895 PPC::DMRROWRCRegClassID, // DMRROW49
8896 PPC::DMRROWRCRegClassID, // DMRROW50
8897 PPC::DMRROWRCRegClassID, // DMRROW51
8898 PPC::DMRROWRCRegClassID, // DMRROW52
8899 PPC::DMRROWRCRegClassID, // DMRROW53
8900 PPC::DMRROWRCRegClassID, // DMRROW54
8901 PPC::DMRROWRCRegClassID, // DMRROW55
8902 PPC::DMRROWRCRegClassID, // DMRROW56
8903 PPC::DMRROWRCRegClassID, // DMRROW57
8904 PPC::DMRROWRCRegClassID, // DMRROW58
8905 PPC::DMRROWRCRegClassID, // DMRROW59
8906 PPC::DMRROWRCRegClassID, // DMRROW60
8907 PPC::DMRROWRCRegClassID, // DMRROW61
8908 PPC::DMRROWRCRegClassID, // DMRROW62
8909 PPC::DMRROWRCRegClassID, // DMRROW63
8910 PPC::DMRROWpRCRegClassID, // DMRROWp0
8911 PPC::DMRROWpRCRegClassID, // DMRROWp1
8912 PPC::DMRROWpRCRegClassID, // DMRROWp2
8913 PPC::DMRROWpRCRegClassID, // DMRROWp3
8914 PPC::DMRROWpRCRegClassID, // DMRROWp4
8915 PPC::DMRROWpRCRegClassID, // DMRROWp5
8916 PPC::DMRROWpRCRegClassID, // DMRROWp6
8917 PPC::DMRROWpRCRegClassID, // DMRROWp7
8918 PPC::DMRROWpRCRegClassID, // DMRROWp8
8919 PPC::DMRROWpRCRegClassID, // DMRROWp9
8920 PPC::DMRROWpRCRegClassID, // DMRROWp10
8921 PPC::DMRROWpRCRegClassID, // DMRROWp11
8922 PPC::DMRROWpRCRegClassID, // DMRROWp12
8923 PPC::DMRROWpRCRegClassID, // DMRROWp13
8924 PPC::DMRROWpRCRegClassID, // DMRROWp14
8925 PPC::DMRROWpRCRegClassID, // DMRROWp15
8926 PPC::DMRROWpRCRegClassID, // DMRROWp16
8927 PPC::DMRROWpRCRegClassID, // DMRROWp17
8928 PPC::DMRROWpRCRegClassID, // DMRROWp18
8929 PPC::DMRROWpRCRegClassID, // DMRROWp19
8930 PPC::DMRROWpRCRegClassID, // DMRROWp20
8931 PPC::DMRROWpRCRegClassID, // DMRROWp21
8932 PPC::DMRROWpRCRegClassID, // DMRROWp22
8933 PPC::DMRROWpRCRegClassID, // DMRROWp23
8934 PPC::DMRROWpRCRegClassID, // DMRROWp24
8935 PPC::DMRROWpRCRegClassID, // DMRROWp25
8936 PPC::DMRROWpRCRegClassID, // DMRROWp26
8937 PPC::DMRROWpRCRegClassID, // DMRROWp27
8938 PPC::DMRROWpRCRegClassID, // DMRROWp28
8939 PPC::DMRROWpRCRegClassID, // DMRROWp29
8940 PPC::DMRROWpRCRegClassID, // DMRROWp30
8941 PPC::DMRROWpRCRegClassID, // DMRROWp31
8942 PPC::DMRpRCRegClassID, // DMRp0
8943 PPC::DMRpRCRegClassID, // DMRp1
8944 PPC::DMRpRCRegClassID, // DMRp2
8945 PPC::DMRpRCRegClassID, // DMRp3
8946 PPC::SPILLTOVSRRC_and_F4RCRegClassID, // F0
8947 PPC::SPILLTOVSRRC_and_F4RCRegClassID, // F1
8948 PPC::SPILLTOVSRRC_and_F4RCRegClassID, // F2
8949 PPC::SPILLTOVSRRC_and_F4RCRegClassID, // F3
8950 PPC::SPILLTOVSRRC_and_F4RCRegClassID, // F4
8951 PPC::SPILLTOVSRRC_and_F4RCRegClassID, // F5
8952 PPC::SPILLTOVSRRC_and_F4RCRegClassID, // F6
8953 PPC::SPILLTOVSRRC_and_F4RCRegClassID, // F7
8954 PPC::SPILLTOVSRRC_and_F4RCRegClassID, // F8
8955 PPC::SPILLTOVSRRC_and_F4RCRegClassID, // F9
8956 PPC::SPILLTOVSRRC_and_F4RCRegClassID, // F10
8957 PPC::SPILLTOVSRRC_and_F4RCRegClassID, // F11
8958 PPC::SPILLTOVSRRC_and_F4RCRegClassID, // F12
8959 PPC::SPILLTOVSRRC_and_F4RCRegClassID, // F13
8960 PPC::F8RCRegClassID, // F14
8961 PPC::F8RCRegClassID, // F15
8962 PPC::F8RCRegClassID, // F16
8963 PPC::F8RCRegClassID, // F17
8964 PPC::F8RCRegClassID, // F18
8965 PPC::F8RCRegClassID, // F19
8966 PPC::F8RCRegClassID, // F20
8967 PPC::F8RCRegClassID, // F21
8968 PPC::F8RCRegClassID, // F22
8969 PPC::F8RCRegClassID, // F23
8970 PPC::F8RCRegClassID, // F24
8971 PPC::F8RCRegClassID, // F25
8972 PPC::F8RCRegClassID, // F26
8973 PPC::F8RCRegClassID, // F27
8974 PPC::F8RCRegClassID, // F28
8975 PPC::F8RCRegClassID, // F29
8976 PPC::F8RCRegClassID, // F30
8977 PPC::F8RCRegClassID, // F31
8978 PPC::FHRCRegClassID, // FH0
8979 PPC::FHRCRegClassID, // FH1
8980 PPC::FHRCRegClassID, // FH2
8981 PPC::FHRCRegClassID, // FH3
8982 PPC::FHRCRegClassID, // FH4
8983 PPC::FHRCRegClassID, // FH5
8984 PPC::FHRCRegClassID, // FH6
8985 PPC::FHRCRegClassID, // FH7
8986 PPC::FHRCRegClassID, // FH8
8987 PPC::FHRCRegClassID, // FH9
8988 PPC::FHRCRegClassID, // FH10
8989 PPC::FHRCRegClassID, // FH11
8990 PPC::FHRCRegClassID, // FH12
8991 PPC::FHRCRegClassID, // FH13
8992 PPC::FHRCRegClassID, // FH14
8993 PPC::FHRCRegClassID, // FH15
8994 PPC::FHRCRegClassID, // FH16
8995 PPC::FHRCRegClassID, // FH17
8996 PPC::FHRCRegClassID, // FH18
8997 PPC::FHRCRegClassID, // FH19
8998 PPC::FHRCRegClassID, // FH20
8999 PPC::FHRCRegClassID, // FH21
9000 PPC::FHRCRegClassID, // FH22
9001 PPC::FHRCRegClassID, // FH23
9002 PPC::FHRCRegClassID, // FH24
9003 PPC::FHRCRegClassID, // FH25
9004 PPC::FHRCRegClassID, // FH26
9005 PPC::FHRCRegClassID, // FH27
9006 PPC::FHRCRegClassID, // FH28
9007 PPC::FHRCRegClassID, // FH29
9008 PPC::FHRCRegClassID, // FH30
9009 PPC::FHRCRegClassID, // FH31
9010 PPC::G8RC_and_G8RC_NOX0RegClassID, // FP8
9011 PPC::FpRC_with_sub_fp0_in_SPILLTOVSRRCRegClassID, // Fpair0
9012 PPC::FpRC_with_sub_fp0_in_SPILLTOVSRRCRegClassID, // Fpair2
9013 PPC::FpRC_with_sub_fp0_in_SPILLTOVSRRCRegClassID, // Fpair4
9014 PPC::FpRC_with_sub_fp0_in_SPILLTOVSRRCRegClassID, // Fpair6
9015 PPC::FpRC_with_sub_fp0_in_SPILLTOVSRRCRegClassID, // Fpair8
9016 PPC::FpRC_with_sub_fp0_in_SPILLTOVSRRCRegClassID, // Fpair10
9017 PPC::FpRC_with_sub_fp0_in_SPILLTOVSRRCRegClassID, // Fpair12
9018 PPC::FpRCRegClassID, // Fpair14
9019 PPC::FpRCRegClassID, // Fpair16
9020 PPC::FpRCRegClassID, // Fpair18
9021 PPC::FpRCRegClassID, // Fpair20
9022 PPC::FpRCRegClassID, // Fpair22
9023 PPC::FpRCRegClassID, // Fpair24
9024 PPC::FpRCRegClassID, // Fpair26
9025 PPC::FpRCRegClassID, // Fpair28
9026 PPC::FpRCRegClassID, // Fpair30
9027 PPC::GPRC32RegClassID, // H0
9028 PPC::GPRC32RegClassID, // H1
9029 PPC::GPRC32RegClassID, // H2
9030 PPC::GPRC32RegClassID, // H3
9031 PPC::GPRC32RegClassID, // H4
9032 PPC::GPRC32RegClassID, // H5
9033 PPC::GPRC32RegClassID, // H6
9034 PPC::GPRC32RegClassID, // H7
9035 PPC::GPRC32RegClassID, // H8
9036 PPC::GPRC32RegClassID, // H9
9037 PPC::GPRC32RegClassID, // H10
9038 PPC::GPRC32RegClassID, // H11
9039 PPC::GPRC32RegClassID, // H12
9040 PPC::GPRC32RegClassID, // H13
9041 PPC::GPRC32RegClassID, // H14
9042 PPC::GPRC32RegClassID, // H15
9043 PPC::GPRC32RegClassID, // H16
9044 PPC::GPRC32RegClassID, // H17
9045 PPC::GPRC32RegClassID, // H18
9046 PPC::GPRC32RegClassID, // H19
9047 PPC::GPRC32RegClassID, // H20
9048 PPC::GPRC32RegClassID, // H21
9049 PPC::GPRC32RegClassID, // H22
9050 PPC::GPRC32RegClassID, // H23
9051 PPC::GPRC32RegClassID, // H24
9052 PPC::GPRC32RegClassID, // H25
9053 PPC::GPRC32RegClassID, // H26
9054 PPC::GPRC32RegClassID, // H27
9055 PPC::GPRC32RegClassID, // H28
9056 PPC::GPRC32RegClassID, // H29
9057 PPC::GPRC32RegClassID, // H30
9058 PPC::GPRC32RegClassID, // H31
9059 PPC::LR8RCRegClassID, // LR8
9060 PPC::GPRCRegClassID, // R0
9061 PPC::GPRC_and_GPRC_NOR0RegClassID, // R1
9062 PPC::GPRC_and_GPRC_NOR0RegClassID, // R2
9063 PPC::GPRC_and_GPRC_NOR0RegClassID, // R3
9064 PPC::GPRC_and_GPRC_NOR0RegClassID, // R4
9065 PPC::GPRC_and_GPRC_NOR0RegClassID, // R5
9066 PPC::GPRC_and_GPRC_NOR0RegClassID, // R6
9067 PPC::GPRC_and_GPRC_NOR0RegClassID, // R7
9068 PPC::GPRC_and_GPRC_NOR0RegClassID, // R8
9069 PPC::GPRC_and_GPRC_NOR0RegClassID, // R9
9070 PPC::GPRC_and_GPRC_NOR0RegClassID, // R10
9071 PPC::GPRC_and_GPRC_NOR0RegClassID, // R11
9072 PPC::GPRC_and_GPRC_NOR0RegClassID, // R12
9073 PPC::GPRC_and_GPRC_NOR0RegClassID, // R13
9074 PPC::GPRC_and_GPRC_NOR0RegClassID, // R14
9075 PPC::GPRC_and_GPRC_NOR0RegClassID, // R15
9076 PPC::GPRC_and_GPRC_NOR0RegClassID, // R16
9077 PPC::GPRC_and_GPRC_NOR0RegClassID, // R17
9078 PPC::GPRC_and_GPRC_NOR0RegClassID, // R18
9079 PPC::GPRC_and_GPRC_NOR0RegClassID, // R19
9080 PPC::GPRC_and_GPRC_NOR0RegClassID, // R20
9081 PPC::GPRC_and_GPRC_NOR0RegClassID, // R21
9082 PPC::GPRC_and_GPRC_NOR0RegClassID, // R22
9083 PPC::GPRC_and_GPRC_NOR0RegClassID, // R23
9084 PPC::GPRC_and_GPRC_NOR0RegClassID, // R24
9085 PPC::GPRC_and_GPRC_NOR0RegClassID, // R25
9086 PPC::GPRC_and_GPRC_NOR0RegClassID, // R26
9087 PPC::GPRC_and_GPRC_NOR0RegClassID, // R27
9088 PPC::GPRC_and_GPRC_NOR0RegClassID, // R28
9089 PPC::GPRC_and_GPRC_NOR0RegClassID, // R29
9090 PPC::GPRC_and_GPRC_NOR0RegClassID, // R30
9091 PPC::GPRC_and_GPRC_NOR0RegClassID, // R31
9092 PPC::SPERCRegClassID, // S0
9093 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S1
9094 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S2
9095 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S3
9096 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S4
9097 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S5
9098 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S6
9099 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S7
9100 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S8
9101 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S9
9102 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S10
9103 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S11
9104 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S12
9105 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S13
9106 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S14
9107 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S15
9108 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S16
9109 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S17
9110 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S18
9111 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S19
9112 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S20
9113 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S21
9114 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S22
9115 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S23
9116 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S24
9117 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S25
9118 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S26
9119 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S27
9120 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S28
9121 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S29
9122 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S30
9123 PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClassID, // S31
9124 PPC::UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClassID, // UACC0
9125 PPC::UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClassID, // UACC1
9126 PPC::UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClassID, // UACC2
9127 PPC::UACCRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // UACC3
9128 PPC::UACCRCRegClassID, // UACC4
9129 PPC::UACCRCRegClassID, // UACC5
9130 PPC::UACCRCRegClassID, // UACC6
9131 PPC::UACCRCRegClassID, // UACC7
9132 PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // V0
9133 PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // V1
9134 PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // V2
9135 PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // V3
9136 PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // V4
9137 PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // V5
9138 PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // V6
9139 PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // V7
9140 PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // V8
9141 PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // V9
9142 PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // V10
9143 PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // V11
9144 PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // V12
9145 PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // V13
9146 PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // V14
9147 PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // V15
9148 PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // V16
9149 PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // V17
9150 PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // V18
9151 PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // V19
9152 PPC::VRRCRegClassID, // V20
9153 PPC::VRRCRegClassID, // V21
9154 PPC::VRRCRegClassID, // V22
9155 PPC::VRRCRegClassID, // V23
9156 PPC::VRRCRegClassID, // V24
9157 PPC::VRRCRegClassID, // V25
9158 PPC::VRRCRegClassID, // V26
9159 PPC::VRRCRegClassID, // V27
9160 PPC::VRRCRegClassID, // V28
9161 PPC::VRRCRegClassID, // V29
9162 PPC::VRRCRegClassID, // V30
9163 PPC::VRRCRegClassID, // V31
9164 PPC::SPILLTOVSRRC_and_VFRCRegClassID, // VF0
9165 PPC::SPILLTOVSRRC_and_VFRCRegClassID, // VF1
9166 PPC::SPILLTOVSRRC_and_VFRCRegClassID, // VF2
9167 PPC::SPILLTOVSRRC_and_VFRCRegClassID, // VF3
9168 PPC::SPILLTOVSRRC_and_VFRCRegClassID, // VF4
9169 PPC::SPILLTOVSRRC_and_VFRCRegClassID, // VF5
9170 PPC::SPILLTOVSRRC_and_VFRCRegClassID, // VF6
9171 PPC::SPILLTOVSRRC_and_VFRCRegClassID, // VF7
9172 PPC::SPILLTOVSRRC_and_VFRCRegClassID, // VF8
9173 PPC::SPILLTOVSRRC_and_VFRCRegClassID, // VF9
9174 PPC::SPILLTOVSRRC_and_VFRCRegClassID, // VF10
9175 PPC::SPILLTOVSRRC_and_VFRCRegClassID, // VF11
9176 PPC::SPILLTOVSRRC_and_VFRCRegClassID, // VF12
9177 PPC::SPILLTOVSRRC_and_VFRCRegClassID, // VF13
9178 PPC::SPILLTOVSRRC_and_VFRCRegClassID, // VF14
9179 PPC::SPILLTOVSRRC_and_VFRCRegClassID, // VF15
9180 PPC::SPILLTOVSRRC_and_VFRCRegClassID, // VF16
9181 PPC::SPILLTOVSRRC_and_VFRCRegClassID, // VF17
9182 PPC::SPILLTOVSRRC_and_VFRCRegClassID, // VF18
9183 PPC::SPILLTOVSRRC_and_VFRCRegClassID, // VF19
9184 PPC::VFRCRegClassID, // VF20
9185 PPC::VFRCRegClassID, // VF21
9186 PPC::VFRCRegClassID, // VF22
9187 PPC::VFRCRegClassID, // VF23
9188 PPC::VFRCRegClassID, // VF24
9189 PPC::VFRCRegClassID, // VF25
9190 PPC::VFRCRegClassID, // VF26
9191 PPC::VFRCRegClassID, // VF27
9192 PPC::VFRCRegClassID, // VF28
9193 PPC::VFRCRegClassID, // VF29
9194 PPC::VFRCRegClassID, // VF30
9195 PPC::VFRCRegClassID, // VF31
9196 PPC::VFHRCRegClassID, // VFH0
9197 PPC::VFHRCRegClassID, // VFH1
9198 PPC::VFHRCRegClassID, // VFH2
9199 PPC::VFHRCRegClassID, // VFH3
9200 PPC::VFHRCRegClassID, // VFH4
9201 PPC::VFHRCRegClassID, // VFH5
9202 PPC::VFHRCRegClassID, // VFH6
9203 PPC::VFHRCRegClassID, // VFH7
9204 PPC::VFHRCRegClassID, // VFH8
9205 PPC::VFHRCRegClassID, // VFH9
9206 PPC::VFHRCRegClassID, // VFH10
9207 PPC::VFHRCRegClassID, // VFH11
9208 PPC::VFHRCRegClassID, // VFH12
9209 PPC::VFHRCRegClassID, // VFH13
9210 PPC::VFHRCRegClassID, // VFH14
9211 PPC::VFHRCRegClassID, // VFH15
9212 PPC::VFHRCRegClassID, // VFH16
9213 PPC::VFHRCRegClassID, // VFH17
9214 PPC::VFHRCRegClassID, // VFH18
9215 PPC::VFHRCRegClassID, // VFH19
9216 PPC::VFHRCRegClassID, // VFH20
9217 PPC::VFHRCRegClassID, // VFH21
9218 PPC::VFHRCRegClassID, // VFH22
9219 PPC::VFHRCRegClassID, // VFH23
9220 PPC::VFHRCRegClassID, // VFH24
9221 PPC::VFHRCRegClassID, // VFH25
9222 PPC::VFHRCRegClassID, // VFH26
9223 PPC::VFHRCRegClassID, // VFH27
9224 PPC::VFHRCRegClassID, // VFH28
9225 PPC::VFHRCRegClassID, // VFH29
9226 PPC::VFHRCRegClassID, // VFH30
9227 PPC::VFHRCRegClassID, // VFH31
9228 PPC::VSLRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // VSL0
9229 PPC::VSLRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // VSL1
9230 PPC::VSLRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // VSL2
9231 PPC::VSLRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // VSL3
9232 PPC::VSLRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // VSL4
9233 PPC::VSLRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // VSL5
9234 PPC::VSLRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // VSL6
9235 PPC::VSLRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // VSL7
9236 PPC::VSLRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // VSL8
9237 PPC::VSLRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // VSL9
9238 PPC::VSLRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // VSL10
9239 PPC::VSLRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // VSL11
9240 PPC::VSLRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // VSL12
9241 PPC::VSLRC_with_sub_64_in_SPILLTOVSRRCRegClassID, // VSL13
9242 PPC::VSLRCRegClassID, // VSL14
9243 PPC::VSLRCRegClassID, // VSL15
9244 PPC::VSLRCRegClassID, // VSL16
9245 PPC::VSLRCRegClassID, // VSL17
9246 PPC::VSLRCRegClassID, // VSL18
9247 PPC::VSLRCRegClassID, // VSL19
9248 PPC::VSLRCRegClassID, // VSL20
9249 PPC::VSLRCRegClassID, // VSL21
9250 PPC::VSLRCRegClassID, // VSL22
9251 PPC::VSLRCRegClassID, // VSL23
9252 PPC::VSLRCRegClassID, // VSL24
9253 PPC::VSLRCRegClassID, // VSL25
9254 PPC::VSLRCRegClassID, // VSL26
9255 PPC::VSLRCRegClassID, // VSL27
9256 PPC::VSLRCRegClassID, // VSL28
9257 PPC::VSLRCRegClassID, // VSL29
9258 PPC::VSLRCRegClassID, // VSL30
9259 PPC::VSLRCRegClassID, // VSL31
9260 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCRegClassID, // VSRp0
9261 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCRegClassID, // VSRp1
9262 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCRegClassID, // VSRp2
9263 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCRegClassID, // VSRp3
9264 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCRegClassID, // VSRp4
9265 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCRegClassID, // VSRp5
9266 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCRegClassID, // VSRp6
9267 PPC::VSRpRC_with_sub_64_in_F4RCRegClassID, // VSRp7
9268 PPC::VSRpRC_with_sub_64_in_F4RCRegClassID, // VSRp8
9269 PPC::VSRpRC_with_sub_64_in_F4RCRegClassID, // VSRp9
9270 PPC::VSRpRC_with_sub_64_in_F4RCRegClassID, // VSRp10
9271 PPC::VSRpRC_with_sub_64_in_F4RCRegClassID, // VSRp11
9272 PPC::VSRpRC_with_sub_64_in_F4RCRegClassID, // VSRp12
9273 PPC::VSRpRC_with_sub_64_in_F4RCRegClassID, // VSRp13
9274 PPC::VSRpRC_with_sub_64_in_F4RCRegClassID, // VSRp14
9275 PPC::VSRpRC_with_sub_64_in_F4RCRegClassID, // VSRp15
9276 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClassID, // VSRp16
9277 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClassID, // VSRp17
9278 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClassID, // VSRp18
9279 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClassID, // VSRp19
9280 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClassID, // VSRp20
9281 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClassID, // VSRp21
9282 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClassID, // VSRp22
9283 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClassID, // VSRp23
9284 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClassID, // VSRp24
9285 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClassID, // VSRp25
9286 PPC::VSRpRC_with_sub_64_in_VFRCRegClassID, // VSRp26
9287 PPC::VSRpRC_with_sub_64_in_VFRCRegClassID, // VSRp27
9288 PPC::VSRpRC_with_sub_64_in_VFRCRegClassID, // VSRp28
9289 PPC::VSRpRC_with_sub_64_in_VFRCRegClassID, // VSRp29
9290 PPC::VSRpRC_with_sub_64_in_VFRCRegClassID, // VSRp30
9291 PPC::VSRpRC_with_sub_64_in_VFRCRegClassID, // VSRp31
9292 InvalidRegClassID, // VSX32
9293 InvalidRegClassID, // VSX33
9294 InvalidRegClassID, // VSX34
9295 InvalidRegClassID, // VSX35
9296 InvalidRegClassID, // VSX36
9297 InvalidRegClassID, // VSX37
9298 InvalidRegClassID, // VSX38
9299 InvalidRegClassID, // VSX39
9300 InvalidRegClassID, // VSX40
9301 InvalidRegClassID, // VSX41
9302 InvalidRegClassID, // VSX42
9303 InvalidRegClassID, // VSX43
9304 InvalidRegClassID, // VSX44
9305 InvalidRegClassID, // VSX45
9306 InvalidRegClassID, // VSX46
9307 InvalidRegClassID, // VSX47
9308 InvalidRegClassID, // VSX48
9309 InvalidRegClassID, // VSX49
9310 InvalidRegClassID, // VSX50
9311 InvalidRegClassID, // VSX51
9312 InvalidRegClassID, // VSX52
9313 InvalidRegClassID, // VSX53
9314 InvalidRegClassID, // VSX54
9315 InvalidRegClassID, // VSX55
9316 InvalidRegClassID, // VSX56
9317 InvalidRegClassID, // VSX57
9318 InvalidRegClassID, // VSX58
9319 InvalidRegClassID, // VSX59
9320 InvalidRegClassID, // VSX60
9321 InvalidRegClassID, // VSX61
9322 InvalidRegClassID, // VSX62
9323 InvalidRegClassID, // VSX63
9324 PPC::WACCRCRegClassID, // WACC0
9325 PPC::WACCRCRegClassID, // WACC1
9326 PPC::WACCRCRegClassID, // WACC2
9327 PPC::WACCRCRegClassID, // WACC3
9328 PPC::WACCRCRegClassID, // WACC4
9329 PPC::WACCRCRegClassID, // WACC5
9330 PPC::WACCRCRegClassID, // WACC6
9331 PPC::WACCRCRegClassID, // WACC7
9332 PPC::WACC_HIRCRegClassID, // WACC_HI0
9333 PPC::WACC_HIRCRegClassID, // WACC_HI1
9334 PPC::WACC_HIRCRegClassID, // WACC_HI2
9335 PPC::WACC_HIRCRegClassID, // WACC_HI3
9336 PPC::WACC_HIRCRegClassID, // WACC_HI4
9337 PPC::WACC_HIRCRegClassID, // WACC_HI5
9338 PPC::WACC_HIRCRegClassID, // WACC_HI6
9339 PPC::WACC_HIRCRegClassID, // WACC_HI7
9340 PPC::G8RCRegClassID, // X0
9341 PPC::G8RC_and_G8RC_NOX0RegClassID, // X1
9342 PPC::G8RC_and_G8RC_NOX0RegClassID, // X2
9343 PPC::G8RC_and_G8RC_NOX0RegClassID, // X3
9344 PPC::G8RC_and_G8RC_NOX0RegClassID, // X4
9345 PPC::G8RC_and_G8RC_NOX0RegClassID, // X5
9346 PPC::G8RC_and_G8RC_NOX0RegClassID, // X6
9347 PPC::G8RC_and_G8RC_NOX0RegClassID, // X7
9348 PPC::G8RC_and_G8RC_NOX0RegClassID, // X8
9349 PPC::G8RC_and_G8RC_NOX0RegClassID, // X9
9350 PPC::G8RC_and_G8RC_NOX0RegClassID, // X10
9351 PPC::G8RC_and_G8RC_NOX0RegClassID, // X11
9352 PPC::G8RC_and_G8RC_NOX0RegClassID, // X12
9353 PPC::G8RC_and_G8RC_NOX0RegClassID, // X13
9354 PPC::G8RC_and_G8RC_NOX0RegClassID, // X14
9355 PPC::G8RC_and_G8RC_NOX0RegClassID, // X15
9356 PPC::G8RC_and_G8RC_NOX0RegClassID, // X16
9357 PPC::G8RC_and_G8RC_NOX0RegClassID, // X17
9358 PPC::G8RC_and_G8RC_NOX0RegClassID, // X18
9359 PPC::G8RC_and_G8RC_NOX0RegClassID, // X19
9360 PPC::G8RC_and_G8RC_NOX0RegClassID, // X20
9361 PPC::G8RC_and_G8RC_NOX0RegClassID, // X21
9362 PPC::G8RC_and_G8RC_NOX0RegClassID, // X22
9363 PPC::G8RC_and_G8RC_NOX0RegClassID, // X23
9364 PPC::G8RC_and_G8RC_NOX0RegClassID, // X24
9365 PPC::G8RC_and_G8RC_NOX0RegClassID, // X25
9366 PPC::G8RC_and_G8RC_NOX0RegClassID, // X26
9367 PPC::G8RC_and_G8RC_NOX0RegClassID, // X27
9368 PPC::G8RC_and_G8RC_NOX0RegClassID, // X28
9369 PPC::G8RC_and_G8RC_NOX0RegClassID, // X29
9370 PPC::G8RC_and_G8RC_NOX0RegClassID, // X30
9371 PPC::G8RC_and_G8RC_NOX0RegClassID, // X31
9372 PPC::G8RC_NOX0RegClassID, // ZERO8
9373 PPC::CRBITRCRegClassID, // CR0EQ
9374 PPC::CRBITRCRegClassID, // CR1EQ
9375 PPC::CRBITRCRegClassID, // CR2EQ
9376 PPC::CRBITRCRegClassID, // CR3EQ
9377 PPC::CRBITRCRegClassID, // CR4EQ
9378 PPC::CRBITRCRegClassID, // CR5EQ
9379 PPC::CRBITRCRegClassID, // CR6EQ
9380 PPC::CRBITRCRegClassID, // CR7EQ
9381 PPC::CRBITRCRegClassID, // CR0GT
9382 PPC::CRBITRCRegClassID, // CR1GT
9383 PPC::CRBITRCRegClassID, // CR2GT
9384 PPC::CRBITRCRegClassID, // CR3GT
9385 PPC::CRBITRCRegClassID, // CR4GT
9386 PPC::CRBITRCRegClassID, // CR5GT
9387 PPC::CRBITRCRegClassID, // CR6GT
9388 PPC::CRBITRCRegClassID, // CR7GT
9389 PPC::CRBITRCRegClassID, // CR0LT
9390 PPC::CRBITRCRegClassID, // CR1LT
9391 PPC::CRBITRCRegClassID, // CR2LT
9392 PPC::CRBITRCRegClassID, // CR3LT
9393 PPC::CRBITRCRegClassID, // CR4LT
9394 PPC::CRBITRCRegClassID, // CR5LT
9395 PPC::CRBITRCRegClassID, // CR6LT
9396 PPC::CRBITRCRegClassID, // CR7LT
9397 PPC::CRBITRCRegClassID, // CR0UN
9398 PPC::CRBITRCRegClassID, // CR1UN
9399 PPC::CRBITRCRegClassID, // CR2UN
9400 PPC::CRBITRCRegClassID, // CR3UN
9401 PPC::CRBITRCRegClassID, // CR4UN
9402 PPC::CRBITRCRegClassID, // CR5UN
9403 PPC::CRBITRCRegClassID, // CR6UN
9404 PPC::CRBITRCRegClassID, // CR7UN
9405 PPC::G8pRCRegClassID, // G8p0
9406 PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClassID, // G8p1
9407 PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClassID, // G8p2
9408 PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClassID, // G8p3
9409 PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClassID, // G8p4
9410 PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClassID, // G8p5
9411 PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClassID, // G8p6
9412 PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClassID, // G8p7
9413 PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClassID, // G8p8
9414 PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClassID, // G8p9
9415 PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClassID, // G8p10
9416 PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClassID, // G8p11
9417 PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClassID, // G8p12
9418 PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClassID, // G8p13
9419 PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClassID, // G8p14
9420 PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClassID, // G8p15
9421 };
9422
9423 assert(Reg < ArrayRef(Mapping).size());
9424 unsigned RCID = Mapping[Reg.id()];
9425 if (RCID == InvalidRegClassID)
9426 return nullptr;
9427 return PPCRegisterClasses[RCID];
9428}
9429extern const MCRegisterDesc PPCRegDesc[];
9430extern const int16_t PPCRegDiffLists[];
9431extern const LaneBitmask PPCLaneMaskLists[];
9432extern const char PPCRegStrings[];
9433extern const char PPCRegClassStrings[];
9434extern const MCPhysReg PPCRegUnitRoots[][2];
9435extern const uint16_t PPCSubRegIdxLists[];
9436extern const uint16_t PPCRegEncodingTable[];
9437// PPC Dwarf<->LLVM register mappings.
9438extern const MCRegisterInfo::DwarfLLVMRegPair PPCDwarfFlavour0Dwarf2L[];
9439extern const unsigned PPCDwarfFlavour0Dwarf2LSize;
9440
9441extern const MCRegisterInfo::DwarfLLVMRegPair PPCDwarfFlavour1Dwarf2L[];
9442extern const unsigned PPCDwarfFlavour1Dwarf2LSize;
9443
9444extern const MCRegisterInfo::DwarfLLVMRegPair PPCEHFlavour0Dwarf2L[];
9445extern const unsigned PPCEHFlavour0Dwarf2LSize;
9446
9447extern const MCRegisterInfo::DwarfLLVMRegPair PPCEHFlavour1Dwarf2L[];
9448extern const unsigned PPCEHFlavour1Dwarf2LSize;
9449
9450extern const MCRegisterInfo::DwarfLLVMRegPair PPCDwarfFlavour0L2Dwarf[];
9451extern const unsigned PPCDwarfFlavour0L2DwarfSize;
9452
9453extern const MCRegisterInfo::DwarfLLVMRegPair PPCDwarfFlavour1L2Dwarf[];
9454extern const unsigned PPCDwarfFlavour1L2DwarfSize;
9455
9456extern const MCRegisterInfo::DwarfLLVMRegPair PPCEHFlavour0L2Dwarf[];
9457extern const unsigned PPCEHFlavour0L2DwarfSize;
9458
9459extern const MCRegisterInfo::DwarfLLVMRegPair PPCEHFlavour1L2Dwarf[];
9460extern const unsigned PPCEHFlavour1L2DwarfSize;
9461
9462
9463PPCGenRegisterInfo::
9464PPCGenRegisterInfo(unsigned RA, unsigned DwarfFlavour, unsigned EHFlavour,
9465 unsigned PC, unsigned HwMode)
9466 : TargetRegisterInfo(&PPCRegInfoDesc, PPCRegisterClasses,
9467 PPCSubRegIndexStrings, PPCSubRegIndexNameOffsets,
9468 PPCSubRegIdxRangeTable, PPCSubRegIndexLaneMaskTable,
9469
9470 LaneBitmask(0xFFFFFFFE00000002), PPCRegClassInfos, PPCVTLists, HwMode) {
9471 InitMCRegisterInfo(D: PPCRegDesc, NR: 612, RA, PC,
9472 C: PPCMCRegisterClasses, NC: 56, RURoots: PPCRegUnitRoots, NRU: 335, DL: PPCRegDiffLists,
9473 RUMS: PPCLaneMaskLists, Strings: PPCRegStrings, ClassStrings: PPCRegClassStrings, SubIndices: PPCSubRegIdxLists, NumIndices: 56,
9474 RET: PPCRegEncodingTable, RUI: nullptr);
9475
9476 switch (DwarfFlavour) {
9477 default:
9478 llvm_unreachable("Unknown DWARF flavour");
9479 case 0:
9480 mapDwarfRegsToLLVMRegs(Map: PPCDwarfFlavour0Dwarf2L, Size: PPCDwarfFlavour0Dwarf2LSize, isEH: false);
9481 break;
9482 case 1:
9483 mapDwarfRegsToLLVMRegs(Map: PPCDwarfFlavour1Dwarf2L, Size: PPCDwarfFlavour1Dwarf2LSize, isEH: false);
9484 break;
9485 }
9486 switch (EHFlavour) {
9487 default:
9488 llvm_unreachable("Unknown DWARF flavour");
9489 case 0:
9490 mapDwarfRegsToLLVMRegs(Map: PPCEHFlavour0Dwarf2L, Size: PPCEHFlavour0Dwarf2LSize, isEH: true);
9491 break;
9492 case 1:
9493 mapDwarfRegsToLLVMRegs(Map: PPCEHFlavour1Dwarf2L, Size: PPCEHFlavour1Dwarf2LSize, isEH: true);
9494 break;
9495 }
9496 switch (DwarfFlavour) {
9497 default:
9498 llvm_unreachable("Unknown DWARF flavour");
9499 case 0:
9500 mapLLVMRegsToDwarfRegs(Map: PPCDwarfFlavour0L2Dwarf, Size: PPCDwarfFlavour0L2DwarfSize, isEH: false);
9501 break;
9502 case 1:
9503 mapLLVMRegsToDwarfRegs(Map: PPCDwarfFlavour1L2Dwarf, Size: PPCDwarfFlavour1L2DwarfSize, isEH: false);
9504 break;
9505 }
9506 switch (EHFlavour) {
9507 default:
9508 llvm_unreachable("Unknown DWARF flavour");
9509 case 0:
9510 mapLLVMRegsToDwarfRegs(Map: PPCEHFlavour0L2Dwarf, Size: PPCEHFlavour0L2DwarfSize, isEH: true);
9511 break;
9512 case 1:
9513 mapLLVMRegsToDwarfRegs(Map: PPCEHFlavour1L2Dwarf, Size: PPCEHFlavour1L2DwarfSize, isEH: true);
9514 break;
9515 }
9516}
9517
9518static const MCPhysReg CSR_64_AllRegs_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, 0 };
9519static const uint32_t CSR_64_AllRegs_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0x000001ff, 0x00000000, 0xc8000000, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
9520static const MCPhysReg CSR_64_AllRegs_AIX_Dflt_Altivec_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, 0 };
9521static const uint32_t CSR_64_AllRegs_AIX_Dflt_Altivec_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0x000001ff, 0x00000000, 0xc8000000, 0x07fffe3f, 0x00000000, 0x007ffff8, 0x007ffff8, 0x007ffff8, 0x00000000, 0x00000000, 0x00000000, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
9522static const MCPhysReg CSR_64_AllRegs_AIX_Dflt_VSX_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSL0, PPC::VSL1, PPC::VSL2, PPC::VSL3, PPC::VSL4, PPC::VSL5, PPC::VSL6, PPC::VSL7, PPC::VSL8, PPC::VSL9, PPC::VSL10, PPC::VSL11, PPC::VSL12, PPC::VSL13, PPC::VSL14, PPC::VSL15, PPC::VSL16, PPC::VSL17, PPC::VSL18, PPC::VSL19, 0 };
9523static const uint32_t CSR_64_AllRegs_AIX_Dflt_VSX_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0x1fffffff, 0x00000000, 0xc8000000, 0x07fffe3f, 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0x007fffff, 0x00000000, 0x00000000, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
9524static const MCPhysReg CSR_64_AllRegs_Altivec_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
9525static const uint32_t CSR_64_AllRegs_Altivec_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0x000001ff, 0x00000000, 0xc8000000, 0x07fffe3f, 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0x00000007, 0x00000000, 0x00000000, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
9526static const MCPhysReg CSR_64_AllRegs_VSRP_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSL0, PPC::VSL1, PPC::VSL2, PPC::VSL3, PPC::VSL4, PPC::VSL5, PPC::VSL6, PPC::VSL7, PPC::VSL8, PPC::VSL9, PPC::VSL10, PPC::VSL11, PPC::VSL12, PPC::VSL13, PPC::VSL14, PPC::VSL15, PPC::VSL16, PPC::VSL17, PPC::VSL18, PPC::VSL19, PPC::VSL20, PPC::VSL21, PPC::VSL22, PPC::VSL23, PPC::VSL24, PPC::VSL25, PPC::VSL26, PPC::VSL27, PPC::VSL28, PPC::VSL29, PPC::VSL30, PPC::VSL31, PPC::VSRp0, PPC::VSRp1, PPC::VSRp2, PPC::VSRp3, PPC::VSRp4, PPC::VSRp5, PPC::VSRp6, PPC::VSRp7, PPC::VSRp8, PPC::VSRp9, PPC::VSRp10, PPC::VSRp11, PPC::VSRp12, PPC::VSRp13, PPC::VSRp14, PPC::VSRp15, PPC::VSRp16, PPC::VSRp17, PPC::VSRp18, PPC::VSRp19, PPC::VSRp20, PPC::VSRp21, PPC::VSRp22, PPC::VSRp23, PPC::VSRp24, PPC::VSRp25, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
9527static const uint32_t CSR_64_AllRegs_VSRP_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0xc8000000, 0x07fffe3f, 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000007, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
9528static const MCPhysReg CSR_64_AllRegs_VSX_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSL0, PPC::VSL1, PPC::VSL2, PPC::VSL3, PPC::VSL4, PPC::VSL5, PPC::VSL6, PPC::VSL7, PPC::VSL8, PPC::VSL9, PPC::VSL10, PPC::VSL11, PPC::VSL12, PPC::VSL13, PPC::VSL14, PPC::VSL15, PPC::VSL16, PPC::VSL17, PPC::VSL18, PPC::VSL19, PPC::VSL20, PPC::VSL21, PPC::VSL22, PPC::VSL23, PPC::VSL24, PPC::VSL25, PPC::VSL26, PPC::VSL27, PPC::VSL28, PPC::VSL29, PPC::VSL30, PPC::VSL31, 0 };
9529static const uint32_t CSR_64_AllRegs_VSX_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0xc8000000, 0x07fffe3f, 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000007, 0x00000000, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
9530static const MCPhysReg CSR_AIX32_SaveList[] = { PPC::R13, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, 0 };
9531static const uint32_t CSR_AIX32_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07ffff00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
9532static const MCPhysReg CSR_AIX32_Altivec_SaveList[] = { PPC::R13, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
9533static const uint32_t CSR_AIX32_Altivec_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07ffff00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
9534static const MCPhysReg CSR_AIX32_VSRP_SaveList[] = { PPC::R13, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
9535static const uint32_t CSR_AIX32_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07ffff00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
9536static const MCPhysReg CSR_AIX64_R2_VSRP_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, PPC::X2, 0 };
9537static const uint32_t CSR_AIX64_R2_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x20000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00200000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
9538static const MCPhysReg CSR_AIX64_VSRP_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
9539static const uint32_t CSR_AIX64_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00000000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
9540static const MCPhysReg CSR_ALL_VSRP_SaveList[] = { PPC::VSRp0, PPC::VSRp1, PPC::VSRp2, PPC::VSRp3, PPC::VSRp4, PPC::VSRp5, PPC::VSRp6, PPC::VSRp7, PPC::VSRp8, PPC::VSRp9, PPC::VSRp10, PPC::VSRp11, PPC::VSRp12, PPC::VSRp13, PPC::VSRp14, PPC::VSRp15, PPC::VSRp16, PPC::VSRp17, PPC::VSRp18, PPC::VSRp19, PPC::VSRp20, PPC::VSRp21, PPC::VSRp22, PPC::VSRp23, PPC::VSRp24, PPC::VSRp25, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
9541static const uint32_t CSR_ALL_VSRP_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0x00000000, 0x00000000, 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000007, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
9542static const MCPhysReg CSR_Altivec_SaveList[] = { PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
9543static const uint32_t CSR_Altivec_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
9544static const MCPhysReg CSR_NoRegs_SaveList[] = { 0 };
9545static const uint32_t CSR_NoRegs_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
9546static const MCPhysReg CSR_PPC64_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, 0 };
9547static const uint32_t CSR_PPC64_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
9548static const MCPhysReg CSR_PPC64_Altivec_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
9549static const uint32_t CSR_PPC64_Altivec_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
9550static const MCPhysReg CSR_PPC64_R2_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::X2, 0 };
9551static const uint32_t CSR_PPC64_R2_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x20000000, 0x07fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
9552static const MCPhysReg CSR_PPC64_R2_Altivec_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::X2, 0 };
9553static const uint32_t CSR_PPC64_R2_Altivec_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x20000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0x00000000, 0x00000000, 0x00200000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
9554static const MCPhysReg CSR_SPE_SaveList[] = { PPC::S14, PPC::S15, PPC::S16, PPC::S17, PPC::S18, PPC::S19, PPC::S20, PPC::S21, PPC::S22, PPC::S23, PPC::S24, PPC::S25, PPC::S26, PPC::S27, PPC::S28, PPC::S29, PPC::S30, 0 };
9555static const uint32_t CSR_SPE_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01ffff00, 0x03fffe00, 0x03fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
9556static const MCPhysReg CSR_SPE_NO_S30_31_SaveList[] = { PPC::S14, PPC::S15, PPC::S16, PPC::S17, PPC::S18, PPC::S19, PPC::S20, PPC::S21, PPC::S22, PPC::S23, PPC::S24, PPC::S25, PPC::S26, PPC::S27, PPC::S28, PPC::S29, 0 };
9557static const uint32_t CSR_SPE_NO_S30_31_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00ffff00, 0x01fffe00, 0x01fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
9558static const MCPhysReg CSR_SVR32_ColdCC_SaveList[] = { PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, 0 };
9559static const uint32_t CSR_SVR32_ColdCC_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0x80000000, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff80000, 0x000fffff, 0x00000000, };
9560static const MCPhysReg CSR_SVR32_ColdCC_Altivec_SaveList[] = { PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::V0, PPC::V1, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
9561static const uint32_t CSR_SVR32_ColdCC_Altivec_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0x80000000, 0x07fffe3f, 0x00000000, 0xffffffd8, 0xffffffdf, 0xffffffdf, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0xfff80000, 0x000fffff, 0x00000000, };
9562static const MCPhysReg CSR_SVR32_ColdCC_Common_SaveList[] = { PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, 0 };
9563static const uint32_t CSR_SVR32_ColdCC_Common_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff80000, 0x000fffff, 0x00000000, };
9564static const MCPhysReg CSR_SVR32_ColdCC_SPE_SaveList[] = { PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::S4, PPC::S5, PPC::S6, PPC::S7, PPC::S8, PPC::S9, PPC::S10, PPC::S14, PPC::S15, PPC::S16, PPC::S17, PPC::S18, PPC::S19, PPC::S20, PPC::S21, PPC::S22, PPC::S23, PPC::S24, PPC::S25, PPC::S26, PPC::S27, PPC::S28, PPC::S29, PPC::S30, PPC::S31, 0 };
9565static const uint32_t CSR_SVR32_ColdCC_SPE_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc0000000, 0x83ffff1f, 0x87fffe3f, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff80000, 0x000fffff, 0x00000000, };
9566static const MCPhysReg CSR_SVR32_ColdCC_VSRP_SaveList[] = { PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::V0, PPC::V1, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp0, PPC::VSRp1, PPC::VSRp2, PPC::VSRp3, PPC::VSRp4, PPC::VSRp5, PPC::VSRp6, PPC::VSRp7, PPC::VSRp8, PPC::VSRp9, PPC::VSRp10, PPC::VSRp11, PPC::VSRp12, PPC::VSRp13, PPC::VSRp14, PPC::VSRp15, PPC::VSRp16, PPC::VSRp18, PPC::VSRp19, PPC::VSRp20, PPC::VSRp21, PPC::VSRp22, PPC::VSRp23, PPC::VSRp24, PPC::VSRp25, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
9567static const uint32_t CSR_SVR32_ColdCC_VSRP_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0x80000000, 0x07fffe3f, 0x00000000, 0xffffffd8, 0xffffffdf, 0xffffffdf, 0xffffffff, 0xffefffff, 0x00000007, 0x00000000, 0xfff80000, 0x000fffff, 0x00000000, };
9568static const MCPhysReg CSR_SVR64_ColdCC_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, 0 };
9569static const uint32_t CSR_SVR64_ColdCC_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0x80000000, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3f800000, 0xfffffffe, 0x000fffff, 0x00000000, };
9570static const MCPhysReg CSR_SVR64_ColdCC_Altivec_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
9571static const uint32_t CSR_SVR64_ColdCC_Altivec_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0x80000000, 0x07fffe3f, 0x00000000, 0xffffffd8, 0xffffffdf, 0xffffffdf, 0x00000007, 0x00000000, 0x00000000, 0x3f800000, 0xfffffffe, 0x000fffff, 0x00000000, };
9572static const MCPhysReg CSR_SVR64_ColdCC_R2_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::X2, 0 };
9573static const uint32_t CSR_SVR64_ColdCC_R2_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0xa0000000, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3fa00000, 0xfffffffe, 0x000fffff, 0x00000000, };
9574static const MCPhysReg CSR_SVR64_ColdCC_R2_Altivec_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::X2, 0 };
9575static const uint32_t CSR_SVR64_ColdCC_R2_Altivec_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0xa0000000, 0x07fffe3f, 0x00000000, 0xffffffd8, 0xffffffdf, 0xffffffdf, 0x00000007, 0x00000000, 0x00000000, 0x3fa00000, 0xfffffffe, 0x000fffff, 0x00000000, };
9576static const MCPhysReg CSR_SVR64_ColdCC_R2_VSRP_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::VSRp0, PPC::VSRp1, PPC::VSRp2, PPC::VSRp3, PPC::VSRp4, PPC::VSRp5, PPC::VSRp6, PPC::VSRp7, PPC::VSRp8, PPC::VSRp9, PPC::VSRp10, PPC::VSRp11, PPC::VSRp12, PPC::VSRp13, PPC::VSRp14, PPC::VSRp15, PPC::VSRp16, PPC::VSRp18, PPC::VSRp19, PPC::VSRp20, PPC::VSRp21, PPC::VSRp22, PPC::VSRp23, PPC::VSRp24, PPC::VSRp25, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, PPC::X2, 0 };
9577static const uint32_t CSR_SVR64_ColdCC_R2_VSRP_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0xa0000000, 0x07fffe3f, 0x00000000, 0xffffff98, 0xffffff9f, 0xffffff9f, 0xffffffff, 0xffefffff, 0x00000007, 0x3fa00000, 0xfffffffe, 0x000fffff, 0x00000000, };
9578static const MCPhysReg CSR_SVR64_ColdCC_VSRP_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::VSRp0, PPC::VSRp1, PPC::VSRp2, PPC::VSRp3, PPC::VSRp4, PPC::VSRp5, PPC::VSRp6, PPC::VSRp7, PPC::VSRp8, PPC::VSRp9, PPC::VSRp10, PPC::VSRp11, PPC::VSRp12, PPC::VSRp13, PPC::VSRp14, PPC::VSRp15, PPC::VSRp16, PPC::VSRp18, PPC::VSRp19, PPC::VSRp20, PPC::VSRp21, PPC::VSRp22, PPC::VSRp23, PPC::VSRp24, PPC::VSRp25, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
9579static const uint32_t CSR_SVR64_ColdCC_VSRP_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0x80000000, 0x07fffe3f, 0x00000000, 0xffffff98, 0xffffff9f, 0xffffff9f, 0xffffffff, 0xffefffff, 0x00000007, 0x3f800000, 0xfffffffe, 0x000fffff, 0x00000000, };
9580static const MCPhysReg CSR_SVR432_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, 0 };
9581static const uint32_t CSR_SVR432_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
9582static const MCPhysReg CSR_SVR432_Altivec_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
9583static const uint32_t CSR_SVR432_Altivec_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
9584static const MCPhysReg CSR_SVR432_COMM_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, 0 };
9585static const uint32_t CSR_SVR432_COMM_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
9586static const MCPhysReg CSR_SVR432_SPE_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::S14, PPC::S15, PPC::S16, PPC::S17, PPC::S18, PPC::S19, PPC::S20, PPC::S21, PPC::S22, PPC::S23, PPC::S24, PPC::S25, PPC::S26, PPC::S27, PPC::S28, PPC::S29, PPC::S30, 0 };
9587static const uint32_t CSR_SVR432_SPE_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01ffff00, 0x07fffe00, 0x03fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
9588static const MCPhysReg CSR_SVR432_SPE_NO_S30_31_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::S14, PPC::S15, PPC::S16, PPC::S17, PPC::S18, PPC::S19, PPC::S20, PPC::S21, PPC::S22, PPC::S23, PPC::S24, PPC::S25, PPC::S26, PPC::S27, PPC::S28, PPC::S29, 0 };
9589static const uint32_t CSR_SVR432_SPE_NO_S30_31_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00ffff00, 0x07fffe00, 0x01fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
9590static const MCPhysReg CSR_SVR432_VSRP_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
9591static const uint32_t CSR_SVR432_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
9592static const MCPhysReg CSR_SVR464_R2_VSRP_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, PPC::X2, 0 };
9593static const uint32_t CSR_SVR464_R2_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x20000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00200000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
9594static const MCPhysReg CSR_SVR464_VSRP_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
9595static const uint32_t CSR_SVR464_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00000000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
9596static const MCPhysReg CSR_VSRP_SaveList[] = { PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
9597static const uint32_t CSR_VSRP_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
9598
9599
9600ArrayRef<const uint32_t *> PPCGenRegisterInfo::getRegMasks() const {
9601 static const uint32_t *const Masks[] = {
9602 CSR_64_AllRegs_RegMask,
9603 CSR_64_AllRegs_AIX_Dflt_Altivec_RegMask,
9604 CSR_64_AllRegs_AIX_Dflt_VSX_RegMask,
9605 CSR_64_AllRegs_Altivec_RegMask,
9606 CSR_64_AllRegs_VSRP_RegMask,
9607 CSR_64_AllRegs_VSX_RegMask,
9608 CSR_AIX32_RegMask,
9609 CSR_AIX32_Altivec_RegMask,
9610 CSR_AIX32_VSRP_RegMask,
9611 CSR_AIX64_R2_VSRP_RegMask,
9612 CSR_AIX64_VSRP_RegMask,
9613 CSR_ALL_VSRP_RegMask,
9614 CSR_Altivec_RegMask,
9615 CSR_NoRegs_RegMask,
9616 CSR_PPC64_RegMask,
9617 CSR_PPC64_Altivec_RegMask,
9618 CSR_PPC64_R2_RegMask,
9619 CSR_PPC64_R2_Altivec_RegMask,
9620 CSR_SPE_RegMask,
9621 CSR_SPE_NO_S30_31_RegMask,
9622 CSR_SVR32_ColdCC_RegMask,
9623 CSR_SVR32_ColdCC_Altivec_RegMask,
9624 CSR_SVR32_ColdCC_Common_RegMask,
9625 CSR_SVR32_ColdCC_SPE_RegMask,
9626 CSR_SVR32_ColdCC_VSRP_RegMask,
9627 CSR_SVR64_ColdCC_RegMask,
9628 CSR_SVR64_ColdCC_Altivec_RegMask,
9629 CSR_SVR64_ColdCC_R2_RegMask,
9630 CSR_SVR64_ColdCC_R2_Altivec_RegMask,
9631 CSR_SVR64_ColdCC_R2_VSRP_RegMask,
9632 CSR_SVR64_ColdCC_VSRP_RegMask,
9633 CSR_SVR432_RegMask,
9634 CSR_SVR432_Altivec_RegMask,
9635 CSR_SVR432_COMM_RegMask,
9636 CSR_SVR432_SPE_RegMask,
9637 CSR_SVR432_SPE_NO_S30_31_RegMask,
9638 CSR_SVR432_VSRP_RegMask,
9639 CSR_SVR464_R2_VSRP_RegMask,
9640 CSR_SVR464_VSRP_RegMask,
9641 CSR_VSRP_RegMask,
9642 };
9643 return ArrayRef(Masks);
9644}
9645
9646bool PPCGenRegisterInfo::
9647isGeneralPurposeRegister(const MachineFunction &MF, MCRegister PhysReg) const {
9648 return
9649 false;
9650}
9651
9652bool PPCGenRegisterInfo::
9653isGeneralPurposeRegisterClass(const TargetRegisterClass *RC) const {
9654 return
9655 false;
9656}
9657
9658bool PPCGenRegisterInfo::
9659isFixedRegister(const MachineFunction &MF, MCRegister PhysReg) const {
9660 return
9661 false;
9662}
9663
9664bool PPCGenRegisterInfo::
9665isArgumentRegister(const MachineFunction &MF, MCRegister PhysReg) const {
9666 return
9667 false;
9668}
9669
9670bool PPCGenRegisterInfo::
9671isConstantPhysReg(MCRegister PhysReg) const {
9672 return
9673 PhysReg == PPC::ZERO ||
9674 PhysReg == PPC::ZERO8 ||
9675 false;
9676}
9677
9678ArrayRef<const char *> PPCGenRegisterInfo::getRegMaskNames() const {
9679 static const char *Names[] = {
9680 "CSR_64_AllRegs",
9681 "CSR_64_AllRegs_AIX_Dflt_Altivec",
9682 "CSR_64_AllRegs_AIX_Dflt_VSX",
9683 "CSR_64_AllRegs_Altivec",
9684 "CSR_64_AllRegs_VSRP",
9685 "CSR_64_AllRegs_VSX",
9686 "CSR_AIX32",
9687 "CSR_AIX32_Altivec",
9688 "CSR_AIX32_VSRP",
9689 "CSR_AIX64_R2_VSRP",
9690 "CSR_AIX64_VSRP",
9691 "CSR_ALL_VSRP",
9692 "CSR_Altivec",
9693 "CSR_NoRegs",
9694 "CSR_PPC64",
9695 "CSR_PPC64_Altivec",
9696 "CSR_PPC64_R2",
9697 "CSR_PPC64_R2_Altivec",
9698 "CSR_SPE",
9699 "CSR_SPE_NO_S30_31",
9700 "CSR_SVR32_ColdCC",
9701 "CSR_SVR32_ColdCC_Altivec",
9702 "CSR_SVR32_ColdCC_Common",
9703 "CSR_SVR32_ColdCC_SPE",
9704 "CSR_SVR32_ColdCC_VSRP",
9705 "CSR_SVR64_ColdCC",
9706 "CSR_SVR64_ColdCC_Altivec",
9707 "CSR_SVR64_ColdCC_R2",
9708 "CSR_SVR64_ColdCC_R2_Altivec",
9709 "CSR_SVR64_ColdCC_R2_VSRP",
9710 "CSR_SVR64_ColdCC_VSRP",
9711 "CSR_SVR432",
9712 "CSR_SVR432_Altivec",
9713 "CSR_SVR432_COMM",
9714 "CSR_SVR432_SPE",
9715 "CSR_SVR432_SPE_NO_S30_31",
9716 "CSR_SVR432_VSRP",
9717 "CSR_SVR464_R2_VSRP",
9718 "CSR_SVR464_VSRP",
9719 "CSR_VSRP",
9720 };
9721 return ArrayRef(Names);
9722}
9723
9724const PPCFrameLowering *
9725PPCGenRegisterInfo::getFrameLowering(const MachineFunction &MF) {
9726 return static_cast<const PPCFrameLowering *>(
9727 MF.getSubtarget().getFrameLowering());
9728}
9729
9730
9731} // namespace llvm
9732