1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Target Register and Register Classes Information *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9namespace llvm {
10
11extern const MCRegisterClass PPCMCRegisterClasses[];
12
13static const MVT::SimpleValueType PPCVTLists[] = {
14 /* 0 */ MVT::i1, MVT::Other,
15 /* 2 */ MVT::i32, MVT::Other,
16 /* 4 */ MVT::i64, MVT::Other,
17 /* 6 */ MVT::i32, MVT::f32, MVT::Other,
18 /* 9 */ MVT::i64, MVT::f64, MVT::Other,
19 /* 12 */ MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v1i128, MVT::v4f32, MVT::v2f64, MVT::f128, MVT::Other,
20 /* 21 */ MVT::ppcf128, MVT::Other,
21 /* 23 */ MVT::v128i1, MVT::Other,
22 /* 25 */ MVT::v256i1, MVT::Other,
23 /* 27 */ MVT::v512i1, MVT::Other,
24 /* 29 */ MVT::v1024i1, MVT::Other,
25 /* 31 */ MVT::v2048i1, MVT::Other,
26 /* 33 */ MVT::v4i32, MVT::v4f32, MVT::v2f64, MVT::v2i64, MVT::Other,
27 /* 38 */ MVT::Untyped, MVT::Other,
28};
29
30#ifdef __GNUC__
31#pragma GCC diagnostic push
32#pragma GCC diagnostic ignored "-Woverlength-strings"
33#endif
34static constexpr char PPCSubRegIndexStrings[] = {
35 /* 0 */ "sub_fp0\000"
36 /* 8 */ "sub_dmr1_then_sub_dmrrowp0\000"
37 /* 35 */ "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0\000"
38 /* 79 */ "sub_pair0\000"
39 /* 89 */ "sub_dmr0\000"
40 /* 98 */ "sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0\000"
41 /* 142 */ "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0\000"
42 /* 203 */ "sub_dmr1_then_sub_dmrrow0\000"
43 /* 229 */ "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0\000"
44 /* 272 */ "sub_gp8_x0\000"
45 /* 283 */ "sub_pair1_then_sub_vsx0\000"
46 /* 307 */ "sub_fp1\000"
47 /* 315 */ "sub_dmr1_then_sub_dmrrowp1\000"
48 /* 342 */ "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1\000"
49 /* 386 */ "sub_pair1\000"
50 /* 396 */ "sub_dmr1\000"
51 /* 405 */ "sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1\000"
52 /* 449 */ "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1\000"
53 /* 510 */ "sub_dmr1_then_sub_dmrrow1\000"
54 /* 536 */ "sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1\000"
55 /* 579 */ "sub_gp8_x1\000"
56 /* 590 */ "sub_pair1_then_sub_vsx1\000"
57 /* 614 */ "sub_gp8_x1_then_sub_32\000"
58 /* 637 */ "sub_pair1_then_sub_64\000"
59 /* 659 */ "sub_pair1_then_sub_vsx1_then_sub_64\000"
60 /* 695 */ "sub_dmr1_then_sub_wacc_hi\000"
61 /* 721 */ "sub_un\000"
62 /* 728 */ "sub_dmr1_then_sub_wacc_lo\000"
63 /* 754 */ "sub_eq\000"
64 /* 761 */ "sub_gt\000"
65 /* 768 */ "sub_lt\000"
66 /* 775 */ "sub_32_hi_phony\000"
67 /* 791 */ "sub_pair1_then_sub_64_hi_phony\000"
68 /* 822 */ "sub_pair1_then_sub_vsx1_then_sub_64_hi_phony\000"
69};
70#ifdef __GNUC__
71#pragma GCC diagnostic pop
72#endif
73
74
75static constexpr uint32_t PPCSubRegIndexNameOffsets[] = {
76 630,
77 775,
78 652,
79 806,
80 89,
81 396,
82 130,
83 437,
84 22,
85 329,
86 754,
87 0,
88 307,
89 272,
90 579,
91 761,
92 768,
93 79,
94 386,
95 721,
96 298,
97 605,
98 709,
99 742,
100 674,
101 837,
102 637,
103 791,
104 283,
105 590,
106 659,
107 822,
108 112,
109 419,
110 243,
111 550,
112 49,
113 356,
114 156,
115 463,
116 203,
117 510,
118 8,
119 315,
120 695,
121 728,
122 98,
123 405,
124 229,
125 536,
126 35,
127 342,
128 142,
129 449,
130 614,
131};
132
133static const TargetRegisterInfo::SubRegCoveredBits PPCSubRegIdxRangeTable[] = {
134 { .Offset: 65535, .Size: 65535 },
135 { .Offset: 0, .Size: 32 }, // sub_32
136 { .Offset: 32, .Size: 32 }, // sub_32_hi_phony
137 { .Offset: 0, .Size: 64 }, // sub_64
138 { .Offset: 64, .Size: 64 }, // sub_64_hi_phony
139 { .Offset: 0, .Size: 1024 }, // sub_dmr0
140 { .Offset: 1024, .Size: 1024 }, // sub_dmr1
141 { .Offset: 0, .Size: 128 }, // sub_dmrrow0
142 { .Offset: 128, .Size: 128 }, // sub_dmrrow1
143 { .Offset: 0, .Size: 256 }, // sub_dmrrowp0
144 { .Offset: 256, .Size: 256 }, // sub_dmrrowp1
145 { .Offset: 2, .Size: 1 }, // sub_eq
146 { .Offset: 0, .Size: 64 }, // sub_fp0
147 { .Offset: 64, .Size: 64 }, // sub_fp1
148 { .Offset: 0, .Size: 64 }, // sub_gp8_x0
149 { .Offset: 64, .Size: 64 }, // sub_gp8_x1
150 { .Offset: 1, .Size: 1 }, // sub_gt
151 { .Offset: 0, .Size: 1 }, // sub_lt
152 { .Offset: 0, .Size: 256 }, // sub_pair0
153 { .Offset: 256, .Size: 256 }, // sub_pair1
154 { .Offset: 3, .Size: 1 }, // sub_un
155 { .Offset: 0, .Size: 128 }, // sub_vsx0
156 { .Offset: 128, .Size: 128 }, // sub_vsx1
157 { .Offset: 512, .Size: 512 }, // sub_wacc_hi
158 { .Offset: 0, .Size: 512 }, // sub_wacc_lo
159 { .Offset: 128, .Size: 64 }, // sub_vsx1_then_sub_64
160 { .Offset: 192, .Size: 64 }, // sub_vsx1_then_sub_64_hi_phony
161 { .Offset: 256, .Size: 64 }, // sub_pair1_then_sub_64
162 { .Offset: 320, .Size: 64 }, // sub_pair1_then_sub_64_hi_phony
163 { .Offset: 256, .Size: 128 }, // sub_pair1_then_sub_vsx0
164 { .Offset: 384, .Size: 128 }, // sub_pair1_then_sub_vsx1
165 { .Offset: 384, .Size: 64 }, // sub_pair1_then_sub_vsx1_then_sub_64
166 { .Offset: 448, .Size: 64 }, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
167 { .Offset: 256, .Size: 128 }, // sub_dmrrowp1_then_sub_dmrrow0
168 { .Offset: 384, .Size: 128 }, // sub_dmrrowp1_then_sub_dmrrow1
169 { .Offset: 512, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrow0
170 { .Offset: 640, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrow1
171 { .Offset: 512, .Size: 256 }, // sub_wacc_hi_then_sub_dmrrowp0
172 { .Offset: 768, .Size: 256 }, // sub_wacc_hi_then_sub_dmrrowp1
173 { .Offset: 768, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
174 { .Offset: 896, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
175 { .Offset: 1024, .Size: 128 }, // sub_dmr1_then_sub_dmrrow0
176 { .Offset: 1152, .Size: 128 }, // sub_dmr1_then_sub_dmrrow1
177 { .Offset: 1024, .Size: 256 }, // sub_dmr1_then_sub_dmrrowp0
178 { .Offset: 1280, .Size: 256 }, // sub_dmr1_then_sub_dmrrowp1
179 { .Offset: 1536, .Size: 512 }, // sub_dmr1_then_sub_wacc_hi
180 { .Offset: 1024, .Size: 512 }, // sub_dmr1_then_sub_wacc_lo
181 { .Offset: 1280, .Size: 128 }, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
182 { .Offset: 1408, .Size: 128 }, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
183 { .Offset: 1536, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
184 { .Offset: 1664, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
185 { .Offset: 1536, .Size: 256 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
186 { .Offset: 1792, .Size: 256 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
187 { .Offset: 1792, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
188 { .Offset: 1920, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
189 { .Offset: 64, .Size: 32 }, // sub_gp8_x1_then_sub_32
190 { .Offset: 65535, .Size: 65535 },
191 { .Offset: 0, .Size: 32 }, // sub_32
192 { .Offset: 32, .Size: 32 }, // sub_32_hi_phony
193 { .Offset: 0, .Size: 64 }, // sub_64
194 { .Offset: 64, .Size: 64 }, // sub_64_hi_phony
195 { .Offset: 0, .Size: 1024 }, // sub_dmr0
196 { .Offset: 1024, .Size: 1024 }, // sub_dmr1
197 { .Offset: 0, .Size: 128 }, // sub_dmrrow0
198 { .Offset: 128, .Size: 128 }, // sub_dmrrow1
199 { .Offset: 0, .Size: 256 }, // sub_dmrrowp0
200 { .Offset: 256, .Size: 256 }, // sub_dmrrowp1
201 { .Offset: 2, .Size: 1 }, // sub_eq
202 { .Offset: 0, .Size: 64 }, // sub_fp0
203 { .Offset: 64, .Size: 64 }, // sub_fp1
204 { .Offset: 0, .Size: 64 }, // sub_gp8_x0
205 { .Offset: 64, .Size: 64 }, // sub_gp8_x1
206 { .Offset: 1, .Size: 1 }, // sub_gt
207 { .Offset: 0, .Size: 1 }, // sub_lt
208 { .Offset: 0, .Size: 256 }, // sub_pair0
209 { .Offset: 256, .Size: 256 }, // sub_pair1
210 { .Offset: 3, .Size: 1 }, // sub_un
211 { .Offset: 0, .Size: 128 }, // sub_vsx0
212 { .Offset: 128, .Size: 128 }, // sub_vsx1
213 { .Offset: 512, .Size: 512 }, // sub_wacc_hi
214 { .Offset: 0, .Size: 512 }, // sub_wacc_lo
215 { .Offset: 128, .Size: 64 }, // sub_vsx1_then_sub_64
216 { .Offset: 192, .Size: 64 }, // sub_vsx1_then_sub_64_hi_phony
217 { .Offset: 256, .Size: 64 }, // sub_pair1_then_sub_64
218 { .Offset: 320, .Size: 64 }, // sub_pair1_then_sub_64_hi_phony
219 { .Offset: 256, .Size: 128 }, // sub_pair1_then_sub_vsx0
220 { .Offset: 384, .Size: 128 }, // sub_pair1_then_sub_vsx1
221 { .Offset: 384, .Size: 64 }, // sub_pair1_then_sub_vsx1_then_sub_64
222 { .Offset: 448, .Size: 64 }, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
223 { .Offset: 256, .Size: 128 }, // sub_dmrrowp1_then_sub_dmrrow0
224 { .Offset: 384, .Size: 128 }, // sub_dmrrowp1_then_sub_dmrrow1
225 { .Offset: 512, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrow0
226 { .Offset: 640, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrow1
227 { .Offset: 512, .Size: 256 }, // sub_wacc_hi_then_sub_dmrrowp0
228 { .Offset: 768, .Size: 256 }, // sub_wacc_hi_then_sub_dmrrowp1
229 { .Offset: 768, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
230 { .Offset: 896, .Size: 128 }, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
231 { .Offset: 1024, .Size: 128 }, // sub_dmr1_then_sub_dmrrow0
232 { .Offset: 1152, .Size: 128 }, // sub_dmr1_then_sub_dmrrow1
233 { .Offset: 1024, .Size: 256 }, // sub_dmr1_then_sub_dmrrowp0
234 { .Offset: 1280, .Size: 256 }, // sub_dmr1_then_sub_dmrrowp1
235 { .Offset: 1536, .Size: 512 }, // sub_dmr1_then_sub_wacc_hi
236 { .Offset: 1024, .Size: 512 }, // sub_dmr1_then_sub_wacc_lo
237 { .Offset: 1280, .Size: 128 }, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
238 { .Offset: 1408, .Size: 128 }, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
239 { .Offset: 1536, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
240 { .Offset: 1664, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
241 { .Offset: 1536, .Size: 256 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
242 { .Offset: 1792, .Size: 256 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
243 { .Offset: 1792, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
244 { .Offset: 1920, .Size: 128 }, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
245 { .Offset: 64, .Size: 32 }, // sub_gp8_x1_then_sub_32
246};
247
248
249static const LaneBitmask PPCSubRegIndexLaneMaskTable[] = {
250 LaneBitmask::getAll(),
251 LaneBitmask(0x0000000000000001), // sub_32
252 LaneBitmask(0x0000000000000002), // sub_32_hi_phony
253 LaneBitmask(0x0000000000000004), // sub_64
254 LaneBitmask(0x0000000000000008), // sub_64_hi_phony
255 LaneBitmask(0x0000000000FC0030), // sub_dmr0
256 LaneBitmask(0x00000000FF000000), // sub_dmr1
257 LaneBitmask(0x0000000000000010), // sub_dmrrow0
258 LaneBitmask(0x0000000000000020), // sub_dmrrow1
259 LaneBitmask(0x0000000000000030), // sub_dmrrowp0
260 LaneBitmask(0x00000000000C0000), // sub_dmrrowp1
261 LaneBitmask(0x0000000000000040), // sub_eq
262 LaneBitmask(0x0000000000000080), // sub_fp0
263 LaneBitmask(0x0000000000000100), // sub_fp1
264 LaneBitmask(0x0000000000000001), // sub_gp8_x0
265 LaneBitmask(0x0000000100000000), // sub_gp8_x1
266 LaneBitmask(0x0000000000000200), // sub_gt
267 LaneBitmask(0x0000000000000400), // sub_lt
268 LaneBitmask(0x000000000000300C), // sub_pair0
269 LaneBitmask(0x000000000003C000), // sub_pair1
270 LaneBitmask(0x0000000000000800), // sub_un
271 LaneBitmask(0x000000000000000C), // sub_vsx0
272 LaneBitmask(0x0000000000003000), // sub_vsx1
273 LaneBitmask(0x0000000000F00000), // sub_wacc_hi
274 LaneBitmask(0x00000000000C0030), // sub_wacc_lo
275 LaneBitmask(0x0000000000001000), // sub_vsx1_then_sub_64
276 LaneBitmask(0x0000000000002000), // sub_vsx1_then_sub_64_hi_phony
277 LaneBitmask(0x0000000000004000), // sub_pair1_then_sub_64
278 LaneBitmask(0x0000000000008000), // sub_pair1_then_sub_64_hi_phony
279 LaneBitmask(0x000000000000C000), // sub_pair1_then_sub_vsx0
280 LaneBitmask(0x0000000000030000), // sub_pair1_then_sub_vsx1
281 LaneBitmask(0x0000000000010000), // sub_pair1_then_sub_vsx1_then_sub_64
282 LaneBitmask(0x0000000000020000), // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
283 LaneBitmask(0x0000000000040000), // sub_dmrrowp1_then_sub_dmrrow0
284 LaneBitmask(0x0000000000080000), // sub_dmrrowp1_then_sub_dmrrow1
285 LaneBitmask(0x0000000000100000), // sub_wacc_hi_then_sub_dmrrow0
286 LaneBitmask(0x0000000000200000), // sub_wacc_hi_then_sub_dmrrow1
287 LaneBitmask(0x0000000000300000), // sub_wacc_hi_then_sub_dmrrowp0
288 LaneBitmask(0x0000000000C00000), // sub_wacc_hi_then_sub_dmrrowp1
289 LaneBitmask(0x0000000000400000), // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
290 LaneBitmask(0x0000000000800000), // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
291 LaneBitmask(0x0000000001000000), // sub_dmr1_then_sub_dmrrow0
292 LaneBitmask(0x0000000002000000), // sub_dmr1_then_sub_dmrrow1
293 LaneBitmask(0x0000000003000000), // sub_dmr1_then_sub_dmrrowp0
294 LaneBitmask(0x000000000C000000), // sub_dmr1_then_sub_dmrrowp1
295 LaneBitmask(0x00000000F0000000), // sub_dmr1_then_sub_wacc_hi
296 LaneBitmask(0x000000000F000000), // sub_dmr1_then_sub_wacc_lo
297 LaneBitmask(0x0000000004000000), // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
298 LaneBitmask(0x0000000008000000), // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
299 LaneBitmask(0x0000000010000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
300 LaneBitmask(0x0000000020000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
301 LaneBitmask(0x0000000030000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
302 LaneBitmask(0x00000000C0000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
303 LaneBitmask(0x0000000040000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
304 LaneBitmask(0x0000000080000000), // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
305 LaneBitmask(0x0000000100000000), // sub_gp8_x1_then_sub_32
306 };
307
308
309
310static const TargetRegisterInfo::RegClassInfo PPCRegClassInfos[] = {
311 // Mode = 0 (DefaultMode)
312 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 7 }, // VSSRC
313 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 6 }, // GPRC
314 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 6 }, // GPRC_NOR0
315 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 6 }, // GPRC_and_GPRC_NOR0
316 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 0 }, // CRBITRC
317 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 7 }, // F4RC
318 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 6 }, // GPRC32
319 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 2 }, // CRRC
320 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 2 }, // CARRYRC
321 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 2 }, // CTRRC
322 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 2 }, // LRRC
323 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 2 }, // VRSAVERC
324 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 9 }, // SPILLTOVSRRC
325 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // VSFRC
326 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 4 }, // G8RC
327 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 4 }, // G8RC_NOX0
328 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_VSFRC
329 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 4 }, // G8RC_and_G8RC_NOX0
330 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // F8RC
331 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // FHRC
332 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // SPERC
333 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // VFHRC
334 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // VFRC
335 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // SPERC_with_sub_32_in_GPRC_NOR0
336 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_VFRC
337 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_F4RC
338 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 4 }, // CTRRC8
339 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 4 }, // LR8RC
340 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 23 }, // DMRROWRC
341 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 33 }, // VSRC
342 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 33 }, // VSRC_with_sub_64_in_SPILLTOVSRRC
343 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 12 }, // VRRC
344 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 33 }, // VSLRC
345 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 12 }, // VRRC_with_sub_64_in_SPILLTOVSRRC
346 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 21 }, // FpRC
347 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 38 }, // G8pRC
348 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 38 }, // G8pRC_with_sub_32_in_GPRC_NOR0
349 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 33 }, // VSLRC_with_sub_64_in_SPILLTOVSRRC
350 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 21 }, // FpRC_with_sub_fp0_in_SPILLTOVSRRC
351 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // DMRROWpRC
352 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC
353 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC
354 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_F4RC
355 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_VFRC
356 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
357 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
358 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // ACCRC
359 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // UACCRC
360 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // WACCRC
361 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // WACC_HIRC
362 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // ACCRC_with_sub_64_in_SPILLTOVSRRC
363 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // UACCRC_with_sub_64_in_SPILLTOVSRRC
364 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
365 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
366 { .RegSize: 1024, .SpillSize: 1024, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 29 }, // DMRRC
367 { .RegSize: 2048, .SpillSize: 2048, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 31 }, // DMRpRC
368 // Mode = 1 (PPC64)
369 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 7 }, // VSSRC
370 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 6 }, // GPRC
371 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 6 }, // GPRC_NOR0
372 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 6 }, // GPRC_and_GPRC_NOR0
373 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 0 }, // CRBITRC
374 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 7 }, // F4RC
375 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 6 }, // GPRC32
376 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 2 }, // CRRC
377 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 2 }, // CARRYRC
378 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 2 }, // CTRRC
379 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 2 }, // LRRC
380 { .RegSize: 32, .SpillSize: 32, .SpillAlignment: 32, /*PPCVTLists+*/.VTListOffset: 2 }, // VRSAVERC
381 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 9 }, // SPILLTOVSRRC
382 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // VSFRC
383 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 4 }, // G8RC
384 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 4 }, // G8RC_NOX0
385 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_VSFRC
386 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 4 }, // G8RC_and_G8RC_NOX0
387 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // F8RC
388 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // FHRC
389 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // SPERC
390 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // VFHRC
391 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // VFRC
392 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // SPERC_with_sub_32_in_GPRC_NOR0
393 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_VFRC
394 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 10 }, // SPILLTOVSRRC_and_F4RC
395 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 4 }, // CTRRC8
396 { .RegSize: 64, .SpillSize: 64, .SpillAlignment: 64, /*PPCVTLists+*/.VTListOffset: 4 }, // LR8RC
397 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 23 }, // DMRROWRC
398 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 33 }, // VSRC
399 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 33 }, // VSRC_with_sub_64_in_SPILLTOVSRRC
400 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 12 }, // VRRC
401 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 33 }, // VSLRC
402 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 12 }, // VRRC_with_sub_64_in_SPILLTOVSRRC
403 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 21 }, // FpRC
404 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 38 }, // G8pRC
405 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 38 }, // G8pRC_with_sub_32_in_GPRC_NOR0
406 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 33 }, // VSLRC_with_sub_64_in_SPILLTOVSRRC
407 { .RegSize: 128, .SpillSize: 128, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 21 }, // FpRC_with_sub_fp0_in_SPILLTOVSRRC
408 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // DMRROWpRC
409 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC
410 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC
411 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_F4RC
412 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_VFRC
413 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
414 { .RegSize: 256, .SpillSize: 256, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 25 }, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
415 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // ACCRC
416 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // UACCRC
417 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // WACCRC
418 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // WACC_HIRC
419 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // ACCRC_with_sub_64_in_SPILLTOVSRRC
420 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // UACCRC_with_sub_64_in_SPILLTOVSRRC
421 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
422 { .RegSize: 512, .SpillSize: 512, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 27 }, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
423 { .RegSize: 1024, .SpillSize: 1024, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 29 }, // DMRRC
424 { .RegSize: 2048, .SpillSize: 2048, .SpillAlignment: 128, /*PPCVTLists+*/.VTListOffset: 31 }, // DMRpRC
425};
426static const uint32_t VSSRCSubClassMask[] = {
427 0x03452021, 0x00000000,
428 0xe0000000, 0x003cff23, // sub_64
429 0x00000000, 0x00000044, // sub_fp0
430 0x00000000, 0x00000044, // sub_fp1
431 0x00000000, 0x003cff00, // sub_vsx1_then_sub_64
432 0x00000000, 0x003cc000, // sub_pair1_then_sub_64
433 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1_then_sub_64
434};
435
436static const uint32_t GPRCSubClassMask[] = {
437 0x0000000a, 0x00000000,
438 0x00924000, 0x00000018, // sub_32
439 0x00000000, 0x00000018, // sub_gp8_x1_then_sub_32
440};
441
442static const uint32_t GPRC_NOR0SubClassMask[] = {
443 0x0000000c, 0x00000000,
444 0x00828000, 0x00000010, // sub_32
445 0x00000000, 0x00000018, // sub_gp8_x1_then_sub_32
446};
447
448static const uint32_t GPRC_and_GPRC_NOR0SubClassMask[] = {
449 0x00000008, 0x00000000,
450 0x00820000, 0x00000010, // sub_32
451 0x00000000, 0x00000018, // sub_gp8_x1_then_sub_32
452};
453
454static const uint32_t CRBITRCSubClassMask[] = {
455 0x00000010, 0x00000000,
456 0x00000080, 0x00000000, // sub_eq
457 0x00000080, 0x00000000, // sub_gt
458 0x00000080, 0x00000000, // sub_lt
459 0x00000080, 0x00000000, // sub_un
460};
461
462static const uint32_t F4RCSubClassMask[] = {
463 0x02040020, 0x00000000,
464 0x00000000, 0x003ce421, // sub_64
465 0x00000000, 0x00000044, // sub_fp0
466 0x00000000, 0x00000044, // sub_fp1
467 0x00000000, 0x003ce400, // sub_vsx1_then_sub_64
468 0x00000000, 0x003cc000, // sub_pair1_then_sub_64
469 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1_then_sub_64
470};
471
472static const uint32_t GPRC32SubClassMask[] = {
473 0x00000040, 0x00000000,
474};
475
476static const uint32_t CRRCSubClassMask[] = {
477 0x00000080, 0x00000000,
478};
479
480static const uint32_t CARRYRCSubClassMask[] = {
481 0x00000100, 0x00000000,
482};
483
484static const uint32_t CTRRCSubClassMask[] = {
485 0x00000200, 0x00000000,
486};
487
488static const uint32_t LRRCSubClassMask[] = {
489 0x00000400, 0x00000000,
490};
491
492static const uint32_t VRSAVERCSubClassMask[] = {
493 0x00000800, 0x00000000,
494};
495
496static const uint32_t SPILLTOVSRRCSubClassMask[] = {
497 0x03035000, 0x00000000,
498 0x40000000, 0x003c3222, // sub_64
499 0x00000000, 0x00000040, // sub_fp0
500 0x00000000, 0x00000040, // sub_fp1
501 0x00000000, 0x00000018, // sub_gp8_x0
502 0x00000000, 0x00000018, // sub_gp8_x1
503 0x00000000, 0x003c3200, // sub_vsx1_then_sub_64
504 0x00000000, 0x00300000, // sub_pair1_then_sub_64
505 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx1_then_sub_64
506};
507
508static const uint32_t VSFRCSubClassMask[] = {
509 0x03452000, 0x00000000,
510 0xe0000000, 0x003cff23, // sub_64
511 0x00000000, 0x00000044, // sub_fp0
512 0x00000000, 0x00000044, // sub_fp1
513 0x00000000, 0x003cff00, // sub_vsx1_then_sub_64
514 0x00000000, 0x003cc000, // sub_pair1_then_sub_64
515 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1_then_sub_64
516};
517
518static const uint32_t G8RCSubClassMask[] = {
519 0x00024000, 0x00000000,
520 0x00000000, 0x00000018, // sub_gp8_x0
521 0x00000000, 0x00000018, // sub_gp8_x1
522};
523
524static const uint32_t G8RC_NOX0SubClassMask[] = {
525 0x00028000, 0x00000000,
526 0x00000000, 0x00000010, // sub_gp8_x0
527 0x00000000, 0x00000018, // sub_gp8_x1
528};
529
530static const uint32_t SPILLTOVSRRC_and_VSFRCSubClassMask[] = {
531 0x03010000, 0x00000000,
532 0x40000000, 0x003c3222, // sub_64
533 0x00000000, 0x00000040, // sub_fp0
534 0x00000000, 0x00000040, // sub_fp1
535 0x00000000, 0x003c3200, // sub_vsx1_then_sub_64
536 0x00000000, 0x00300000, // sub_pair1_then_sub_64
537 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx1_then_sub_64
538};
539
540static const uint32_t G8RC_and_G8RC_NOX0SubClassMask[] = {
541 0x00020000, 0x00000000,
542 0x00000000, 0x00000010, // sub_gp8_x0
543 0x00000000, 0x00000018, // sub_gp8_x1
544};
545
546static const uint32_t F8RCSubClassMask[] = {
547 0x02040000, 0x00000000,
548 0x00000000, 0x003ce421, // sub_64
549 0x00000000, 0x00000044, // sub_fp0
550 0x00000000, 0x00000044, // sub_fp1
551 0x00000000, 0x003ce400, // sub_vsx1_then_sub_64
552 0x00000000, 0x003cc000, // sub_pair1_then_sub_64
553 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1_then_sub_64
554};
555
556static const uint32_t FHRCSubClassMask[] = {
557 0x00080000, 0x00000000,
558};
559
560static const uint32_t SPERCSubClassMask[] = {
561 0x00900000, 0x00000000,
562};
563
564static const uint32_t VFHRCSubClassMask[] = {
565 0x00200000, 0x00000000,
566};
567
568static const uint32_t VFRCSubClassMask[] = {
569 0x01400000, 0x00000000,
570 0x80000000, 0x00001802, // sub_64
571 0x00000000, 0x00001800, // sub_vsx1_then_sub_64
572};
573
574static const uint32_t SPERC_with_sub_32_in_GPRC_NOR0SubClassMask[] = {
575 0x00800000, 0x00000000,
576};
577
578static const uint32_t SPILLTOVSRRC_and_VFRCSubClassMask[] = {
579 0x01000000, 0x00000000,
580 0x00000000, 0x00001002, // sub_64
581 0x00000000, 0x00001000, // sub_vsx1_then_sub_64
582};
583
584static const uint32_t SPILLTOVSRRC_and_F4RCSubClassMask[] = {
585 0x02000000, 0x00000000,
586 0x00000000, 0x003c2020, // sub_64
587 0x00000000, 0x00000040, // sub_fp0
588 0x00000000, 0x00000040, // sub_fp1
589 0x00000000, 0x003c2000, // sub_vsx1_then_sub_64
590 0x00000000, 0x00300000, // sub_pair1_then_sub_64
591 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx1_then_sub_64
592};
593
594static const uint32_t CTRRC8SubClassMask[] = {
595 0x04000000, 0x00000000,
596};
597
598static const uint32_t LR8RCSubClassMask[] = {
599 0x08000000, 0x00000000,
600};
601
602static const uint32_t DMRROWRCSubClassMask[] = {
603 0x10000000, 0x00000000,
604 0x00000000, 0x00c30080, // sub_dmrrow0
605 0x00000000, 0x00c30080, // sub_dmrrow1
606 0x00000000, 0x00c30000, // sub_dmrrowp1_then_sub_dmrrow0
607 0x00000000, 0x00c30000, // sub_dmrrowp1_then_sub_dmrrow1
608 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrow0
609 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrow1
610 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
611 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
612 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrow0
613 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrow1
614 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
615 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
616 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
617 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
618 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
619 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
620};
621
622static const uint32_t VSRCSubClassMask[] = {
623 0xe0000000, 0x00000023,
624 0x00000000, 0x003cff00, // sub_vsx0
625 0x00000000, 0x003cff00, // sub_vsx1
626 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx0
627 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1
628};
629
630static const uint32_t VSRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
631 0x40000000, 0x00000022,
632 0x00000000, 0x003c3200, // sub_vsx0
633 0x00000000, 0x003c3200, // sub_vsx1
634 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx0
635 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx1
636};
637
638static const uint32_t VRRCSubClassMask[] = {
639 0x80000000, 0x00000002,
640 0x00000000, 0x00001800, // sub_vsx0
641 0x00000000, 0x00001800, // sub_vsx1
642};
643
644static const uint32_t VSLRCSubClassMask[] = {
645 0x00000000, 0x00000021,
646 0x00000000, 0x003ce400, // sub_vsx0
647 0x00000000, 0x003ce400, // sub_vsx1
648 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx0
649 0x00000000, 0x003cc000, // sub_pair1_then_sub_vsx1
650};
651
652static const uint32_t VRRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
653 0x00000000, 0x00000002,
654 0x00000000, 0x00001000, // sub_vsx0
655 0x00000000, 0x00001000, // sub_vsx1
656};
657
658static const uint32_t FpRCSubClassMask[] = {
659 0x00000000, 0x00000044,
660};
661
662static const uint32_t G8pRCSubClassMask[] = {
663 0x00000000, 0x00000018,
664};
665
666static const uint32_t G8pRC_with_sub_32_in_GPRC_NOR0SubClassMask[] = {
667 0x00000000, 0x00000010,
668};
669
670static const uint32_t VSLRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
671 0x00000000, 0x00000020,
672 0x00000000, 0x003c2000, // sub_vsx0
673 0x00000000, 0x003c2000, // sub_vsx1
674 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx0
675 0x00000000, 0x00300000, // sub_pair1_then_sub_vsx1
676};
677
678static const uint32_t FpRC_with_sub_fp0_in_SPILLTOVSRRCSubClassMask[] = {
679 0x00000000, 0x00000040,
680};
681
682static const uint32_t DMRROWpRCSubClassMask[] = {
683 0x00000000, 0x00000080,
684 0x00000000, 0x00c30000, // sub_dmrrowp0
685 0x00000000, 0x00c30000, // sub_dmrrowp1
686 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrowp0
687 0x00000000, 0x00c00000, // sub_wacc_hi_then_sub_dmrrowp1
688 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrowp0
689 0x00000000, 0x00800000, // sub_dmr1_then_sub_dmrrowp1
690 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
691 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
692};
693
694static const uint32_t VSRpRCSubClassMask[] = {
695 0x00000000, 0x00003f00,
696 0x00000000, 0x003cc000, // sub_pair0
697 0x00000000, 0x003cc000, // sub_pair1
698};
699
700static const uint32_t VSRpRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
701 0x00000000, 0x00003200,
702 0x00000000, 0x003c0000, // sub_pair0
703 0x00000000, 0x00300000, // sub_pair1
704};
705
706static const uint32_t VSRpRC_with_sub_64_in_F4RCSubClassMask[] = {
707 0x00000000, 0x00002400,
708 0x00000000, 0x003cc000, // sub_pair0
709 0x00000000, 0x003cc000, // sub_pair1
710};
711
712static const uint32_t VSRpRC_with_sub_64_in_VFRCSubClassMask[] = {
713 0x00000000, 0x00001800,
714};
715
716static const uint32_t VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCSubClassMask[] = {
717 0x00000000, 0x00001000,
718};
719
720static const uint32_t VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCSubClassMask[] = {
721 0x00000000, 0x00002000,
722 0x00000000, 0x003c0000, // sub_pair0
723 0x00000000, 0x00300000, // sub_pair1
724};
725
726static const uint32_t ACCRCSubClassMask[] = {
727 0x00000000, 0x00144000,
728};
729
730static const uint32_t UACCRCSubClassMask[] = {
731 0x00000000, 0x00288000,
732};
733
734static const uint32_t WACCRCSubClassMask[] = {
735 0x00000000, 0x00010000,
736 0x00000000, 0x00c00000, // sub_wacc_lo
737 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_lo
738};
739
740static const uint32_t WACC_HIRCSubClassMask[] = {
741 0x00000000, 0x00020000,
742 0x00000000, 0x00c00000, // sub_wacc_hi
743 0x00000000, 0x00800000, // sub_dmr1_then_sub_wacc_hi
744};
745
746static const uint32_t ACCRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
747 0x00000000, 0x00140000,
748};
749
750static const uint32_t UACCRC_with_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
751 0x00000000, 0x00280000,
752};
753
754static const uint32_t ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
755 0x00000000, 0x00100000,
756};
757
758static const uint32_t UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSubClassMask[] = {
759 0x00000000, 0x00200000,
760};
761
762static const uint32_t DMRRCSubClassMask[] = {
763 0x00000000, 0x00400000,
764 0x00000000, 0x00800000, // sub_dmr0
765 0x00000000, 0x00800000, // sub_dmr1
766};
767
768static const uint32_t DMRpRCSubClassMask[] = {
769 0x00000000, 0x00800000,
770};
771
772static const uint16_t SuperRegIdxSeqs[] = {
773 /* 0 */ 5, 6, 0,
774 /* 3 */ 14, 15, 0,
775 /* 6 */ 18, 19, 0,
776 /* 9 */ 11, 16, 17, 20, 0,
777 /* 14 */ 21, 22, 0,
778 /* 17 */ 3, 25, 0,
779 /* 20 */ 21, 22, 29, 30, 0,
780 /* 25 */ 3, 12, 13, 25, 27, 31, 0,
781 /* 32 */ 3, 12, 13, 14, 15, 25, 27, 31, 0,
782 /* 41 */ 23, 45, 0,
783 /* 44 */ 24, 46, 0,
784 /* 47 */ 9, 10, 37, 38, 43, 44, 51, 52, 0,
785 /* 56 */ 7, 8, 33, 34, 35, 36, 39, 40, 41, 42, 47, 48, 49, 50, 53, 54, 0,
786 /* 73 */ 1, 55, 0,
787};
788
789static unsigned const GPRC_and_GPRC_NOR0Superclasses[] = {
790 PPC::GPRCRegClassID,
791 PPC::GPRC_NOR0RegClassID,
792};
793
794static unsigned const F4RCSuperclasses[] = {
795 PPC::VSSRCRegClassID,
796};
797
798static unsigned const VSFRCSuperclasses[] = {
799 PPC::VSSRCRegClassID,
800};
801
802static unsigned const G8RCSuperclasses[] = {
803 PPC::SPILLTOVSRRCRegClassID,
804};
805
806static unsigned const SPILLTOVSRRC_and_VSFRCSuperclasses[] = {
807 PPC::VSSRCRegClassID,
808 PPC::SPILLTOVSRRCRegClassID,
809 PPC::VSFRCRegClassID,
810};
811
812static unsigned const G8RC_and_G8RC_NOX0Superclasses[] = {
813 PPC::SPILLTOVSRRCRegClassID,
814 PPC::G8RCRegClassID,
815 PPC::G8RC_NOX0RegClassID,
816};
817
818static unsigned const F8RCSuperclasses[] = {
819 PPC::VSSRCRegClassID,
820 PPC::F4RCRegClassID,
821 PPC::VSFRCRegClassID,
822};
823
824static unsigned const VFRCSuperclasses[] = {
825 PPC::VSSRCRegClassID,
826 PPC::VSFRCRegClassID,
827};
828
829static unsigned const SPERC_with_sub_32_in_GPRC_NOR0Superclasses[] = {
830 PPC::SPERCRegClassID,
831};
832
833static unsigned const SPILLTOVSRRC_and_VFRCSuperclasses[] = {
834 PPC::VSSRCRegClassID,
835 PPC::SPILLTOVSRRCRegClassID,
836 PPC::VSFRCRegClassID,
837 PPC::SPILLTOVSRRC_and_VSFRCRegClassID,
838 PPC::VFRCRegClassID,
839};
840
841static unsigned const SPILLTOVSRRC_and_F4RCSuperclasses[] = {
842 PPC::VSSRCRegClassID,
843 PPC::F4RCRegClassID,
844 PPC::SPILLTOVSRRCRegClassID,
845 PPC::VSFRCRegClassID,
846 PPC::SPILLTOVSRRC_and_VSFRCRegClassID,
847 PPC::F8RCRegClassID,
848};
849
850static unsigned const VSRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
851 PPC::VSRCRegClassID,
852};
853
854static unsigned const VRRCSuperclasses[] = {
855 PPC::VSRCRegClassID,
856};
857
858static unsigned const VSLRCSuperclasses[] = {
859 PPC::VSRCRegClassID,
860};
861
862static unsigned const VRRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
863 PPC::VSRCRegClassID,
864 PPC::VSRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
865 PPC::VRRCRegClassID,
866};
867
868static unsigned const G8pRC_with_sub_32_in_GPRC_NOR0Superclasses[] = {
869 PPC::G8pRCRegClassID,
870};
871
872static unsigned const VSLRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
873 PPC::VSRCRegClassID,
874 PPC::VSRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
875 PPC::VSLRCRegClassID,
876};
877
878static unsigned const FpRC_with_sub_fp0_in_SPILLTOVSRRCSuperclasses[] = {
879 PPC::FpRCRegClassID,
880};
881
882static unsigned const VSRpRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
883 PPC::VSRpRCRegClassID,
884};
885
886static unsigned const VSRpRC_with_sub_64_in_F4RCSuperclasses[] = {
887 PPC::VSRpRCRegClassID,
888};
889
890static unsigned const VSRpRC_with_sub_64_in_VFRCSuperclasses[] = {
891 PPC::VSRpRCRegClassID,
892};
893
894static unsigned const VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCSuperclasses[] = {
895 PPC::VSRpRCRegClassID,
896 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
897 PPC::VSRpRC_with_sub_64_in_VFRCRegClassID,
898};
899
900static unsigned const VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCSuperclasses[] = {
901 PPC::VSRpRCRegClassID,
902 PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
903 PPC::VSRpRC_with_sub_64_in_F4RCRegClassID,
904};
905
906static unsigned const ACCRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
907 PPC::ACCRCRegClassID,
908};
909
910static unsigned const UACCRC_with_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
911 PPC::UACCRCRegClassID,
912};
913
914static unsigned const ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
915 PPC::ACCRCRegClassID,
916 PPC::ACCRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
917};
918
919static unsigned const UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSuperclasses[] = {
920 PPC::UACCRCRegClassID,
921 PPC::UACCRC_with_sub_64_in_SPILLTOVSRRCRegClassID,
922};
923
924
925static inline unsigned GPRCAltOrderSelect(const MachineFunction &MF, bool Rev) {
926 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
927 }
928
929static ArrayRef<MCPhysReg> GPRCGetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
930 static const MCPhysReg AltOrder1[] = { PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R31, PPC::R0, PPC::R1, PPC::FP, PPC::BP, PPC::R2 };
931 static const MCPhysReg AltOrder2[] = { PPC::R2, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R31, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R0, PPC::R1, PPC::FP, PPC::BP };
932 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::GPRCRegClassID];
933 const ArrayRef<MCPhysReg> Order[] = {
934 ArrayRef(MCR.begin(), MCR.getNumRegs()),
935 ArrayRef(AltOrder1),
936 ArrayRef(AltOrder2)
937 };
938 const unsigned Select = GPRCAltOrderSelect(MF, Rev);
939 assert(Select < 3);
940 return Order[Select];
941}
942
943static inline unsigned GPRC_NOR0AltOrderSelect(const MachineFunction &MF, bool Rev) {
944 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
945 }
946
947static ArrayRef<MCPhysReg> GPRC_NOR0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
948 static const MCPhysReg AltOrder1[] = { PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R31, PPC::R1, PPC::FP, PPC::BP, PPC::ZERO, PPC::R2 };
949 static const MCPhysReg AltOrder2[] = { PPC::R2, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R31, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R1, PPC::FP, PPC::BP, PPC::ZERO };
950 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::GPRC_NOR0RegClassID];
951 const ArrayRef<MCPhysReg> Order[] = {
952 ArrayRef(MCR.begin(), MCR.getNumRegs()),
953 ArrayRef(AltOrder1),
954 ArrayRef(AltOrder2)
955 };
956 const unsigned Select = GPRC_NOR0AltOrderSelect(MF, Rev);
957 assert(Select < 3);
958 return Order[Select];
959}
960
961static inline unsigned GPRC_and_GPRC_NOR0AltOrderSelect(const MachineFunction &MF, bool Rev) {
962 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
963 }
964
965static ArrayRef<MCPhysReg> GPRC_and_GPRC_NOR0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
966 static const MCPhysReg AltOrder1[] = { PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R31, PPC::R1, PPC::FP, PPC::BP, PPC::R2 };
967 static const MCPhysReg AltOrder2[] = { PPC::R2, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R31, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R1, PPC::FP, PPC::BP };
968 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::GPRC_and_GPRC_NOR0RegClassID];
969 const ArrayRef<MCPhysReg> Order[] = {
970 ArrayRef(MCR.begin(), MCR.getNumRegs()),
971 ArrayRef(AltOrder1),
972 ArrayRef(AltOrder2)
973 };
974 const unsigned Select = GPRC_and_GPRC_NOR0AltOrderSelect(MF, Rev);
975 assert(Select < 3);
976 return Order[Select];
977}
978
979static inline unsigned CRBITRCAltOrderSelect(const MachineFunction &MF, bool Rev) {
980 return MF.getSubtarget<PPCSubtarget>().isELFv2ABI() &&
981 MF.getInfo<PPCFunctionInfo>()->isNonVolatileCRDisabled();
982 }
983
984static ArrayRef<MCPhysReg> CRBITRCGetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
985 static const MCPhysReg AltOrder1[] = { PPC::CR5LT, PPC::CR5GT, PPC::CR5EQ, PPC::CR5UN, PPC::CR6LT, PPC::CR6GT, PPC::CR6EQ, PPC::CR6UN, PPC::CR7LT, PPC::CR7GT, PPC::CR7EQ, PPC::CR7UN, PPC::CR1LT, PPC::CR1GT, PPC::CR1EQ, PPC::CR1UN, PPC::CR0LT, PPC::CR0GT, PPC::CR0EQ, PPC::CR0UN };
986 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::CRBITRCRegClassID];
987 const ArrayRef<MCPhysReg> Order[] = {
988 ArrayRef(MCR.begin(), MCR.getNumRegs()),
989 ArrayRef(AltOrder1)
990 };
991 const unsigned Select = CRBITRCAltOrderSelect(MF, Rev);
992 assert(Select < 2);
993 return Order[Select];
994}
995
996static inline unsigned CRRCAltOrderSelect(const MachineFunction &MF, bool Rev) {
997 return MF.getSubtarget<PPCSubtarget>().isELFv2ABI() &&
998 MF.getInfo<PPCFunctionInfo>()->isNonVolatileCRDisabled();
999 }
1000
1001static ArrayRef<MCPhysReg> CRRCGetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
1002 static const MCPhysReg AltOrder1[] = { PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7 };
1003 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::CRRCRegClassID];
1004 const ArrayRef<MCPhysReg> Order[] = {
1005 ArrayRef(MCR.begin(), MCR.getNumRegs()),
1006 ArrayRef(AltOrder1)
1007 };
1008 const unsigned Select = CRRCAltOrderSelect(MF, Rev);
1009 assert(Select < 2);
1010 return Order[Select];
1011}
1012
1013static inline unsigned G8RCAltOrderSelect(const MachineFunction &MF, bool Rev) {
1014 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
1015 }
1016
1017static ArrayRef<MCPhysReg> G8RCGetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
1018 static const MCPhysReg AltOrder1[] = { PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X31, PPC::X13, PPC::X0, PPC::X1, PPC::FP8, PPC::BP8, PPC::X2 };
1019 static const MCPhysReg AltOrder2[] = { PPC::X2, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X31, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X13, PPC::X0, PPC::X1, PPC::FP8, PPC::BP8 };
1020 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::G8RCRegClassID];
1021 const ArrayRef<MCPhysReg> Order[] = {
1022 ArrayRef(MCR.begin(), MCR.getNumRegs()),
1023 ArrayRef(AltOrder1),
1024 ArrayRef(AltOrder2)
1025 };
1026 const unsigned Select = G8RCAltOrderSelect(MF, Rev);
1027 assert(Select < 3);
1028 return Order[Select];
1029}
1030
1031static inline unsigned G8RC_NOX0AltOrderSelect(const MachineFunction &MF, bool Rev) {
1032 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
1033 }
1034
1035static ArrayRef<MCPhysReg> G8RC_NOX0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
1036 static const MCPhysReg AltOrder1[] = { PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X31, PPC::X13, PPC::X1, PPC::FP8, PPC::BP8, PPC::ZERO8, PPC::X2 };
1037 static const MCPhysReg AltOrder2[] = { PPC::X2, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X31, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X13, PPC::X1, PPC::FP8, PPC::BP8, PPC::ZERO8 };
1038 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::G8RC_NOX0RegClassID];
1039 const ArrayRef<MCPhysReg> Order[] = {
1040 ArrayRef(MCR.begin(), MCR.getNumRegs()),
1041 ArrayRef(AltOrder1),
1042 ArrayRef(AltOrder2)
1043 };
1044 const unsigned Select = G8RC_NOX0AltOrderSelect(MF, Rev);
1045 assert(Select < 3);
1046 return Order[Select];
1047}
1048
1049static inline unsigned G8RC_and_G8RC_NOX0AltOrderSelect(const MachineFunction &MF, bool Rev) {
1050 return MF.getSubtarget<PPCSubtarget>().getGPRAllocationOrderIdx();
1051 }
1052
1053static ArrayRef<MCPhysReg> G8RC_and_G8RC_NOX0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
1054 static const MCPhysReg AltOrder1[] = { PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X31, PPC::X13, PPC::X1, PPC::FP8, PPC::BP8, PPC::X2 };
1055 static const MCPhysReg AltOrder2[] = { PPC::X2, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X31, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X13, PPC::X1, PPC::FP8, PPC::BP8 };
1056 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::G8RC_and_G8RC_NOX0RegClassID];
1057 const ArrayRef<MCPhysReg> Order[] = {
1058 ArrayRef(MCR.begin(), MCR.getNumRegs()),
1059 ArrayRef(AltOrder1),
1060 ArrayRef(AltOrder2)
1061 };
1062 const unsigned Select = G8RC_and_G8RC_NOX0AltOrderSelect(MF, Rev);
1063 assert(Select < 3);
1064 return Order[Select];
1065}
1066
1067static inline unsigned G8pRCAltOrderSelect(const MachineFunction &MF, bool Rev) {
1068 return MF.getSubtarget<PPCSubtarget>().is64BitELFABI();
1069 }
1070
1071static ArrayRef<MCPhysReg> G8pRCGetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
1072 static const MCPhysReg AltOrder1[] = { PPC::G8p2, PPC::G8p3, PPC::G8p4, PPC::G8p5, PPC::G8p14, PPC::G8p13, PPC::G8p12, PPC::G8p11, PPC::G8p10, PPC::G8p9, PPC::G8p8, PPC::G8p7, PPC::G8p15, PPC::G8p6, PPC::G8p0, PPC::G8p1 };
1073 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::G8pRCRegClassID];
1074 const ArrayRef<MCPhysReg> Order[] = {
1075 ArrayRef(MCR.begin(), MCR.getNumRegs()),
1076 ArrayRef(AltOrder1)
1077 };
1078 const unsigned Select = G8pRCAltOrderSelect(MF, Rev);
1079 assert(Select < 2);
1080 return Order[Select];
1081}
1082
1083static inline unsigned G8pRC_with_sub_32_in_GPRC_NOR0AltOrderSelect(const MachineFunction &MF, bool Rev) {
1084 return MF.getSubtarget<PPCSubtarget>().is64BitELFABI();
1085 }
1086
1087static ArrayRef<MCPhysReg> G8pRC_with_sub_32_in_GPRC_NOR0GetRawAllocationOrder(const MachineFunction &MF, bool Rev) {
1088 static const MCPhysReg AltOrder1[] = { PPC::G8p2, PPC::G8p3, PPC::G8p4, PPC::G8p5, PPC::G8p14, PPC::G8p13, PPC::G8p12, PPC::G8p11, PPC::G8p10, PPC::G8p9, PPC::G8p8, PPC::G8p7, PPC::G8p15, PPC::G8p6, PPC::G8p1 };
1089 const MCRegisterClass &MCR = PPCMCRegisterClasses[PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClassID];
1090 const ArrayRef<MCPhysReg> Order[] = {
1091 ArrayRef(MCR.begin(), MCR.getNumRegs()),
1092 ArrayRef(AltOrder1)
1093 };
1094 const unsigned Select = G8pRC_with_sub_32_in_GPRC_NOR0AltOrderSelect(MF, Rev);
1095 assert(Select < 2);
1096 return Order[Select];
1097}
1098namespace PPC {
1099
1100// Register class instances.
1101 extern const TargetRegisterClass VSSRCRegClass = {
1102 .MC: &PPCMCRegisterClasses[VSSRCRegClassID],
1103 .SubClassMask: VSSRCSubClassMask,
1104 .SuperRegIndices: SuperRegIdxSeqs + 25,
1105 .LaneMask: LaneBitmask(0x0000000000000001),
1106 .AllocationPriority: 0,
1107 .GlobalPriority: false,
1108 .TSFlags: 0x00, /* TSFlags */
1109 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1110 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1111 .SuperClasses: nullptr, .SuperClassesSize: 0,
1112 .OrderFunc: nullptr
1113 };
1114
1115 extern const TargetRegisterClass GPRCRegClass = {
1116 .MC: &PPCMCRegisterClasses[GPRCRegClassID],
1117 .SubClassMask: GPRCSubClassMask,
1118 .SuperRegIndices: SuperRegIdxSeqs + 73,
1119 .LaneMask: LaneBitmask(0x0000000000000001),
1120 .AllocationPriority: 0,
1121 .GlobalPriority: false,
1122 .TSFlags: 0x00, /* TSFlags */
1123 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1124 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1125 .SuperClasses: nullptr, .SuperClassesSize: 0,
1126 .OrderFunc: GPRCGetRawAllocationOrder
1127 };
1128
1129 extern const TargetRegisterClass GPRC_NOR0RegClass = {
1130 .MC: &PPCMCRegisterClasses[GPRC_NOR0RegClassID],
1131 .SubClassMask: GPRC_NOR0SubClassMask,
1132 .SuperRegIndices: SuperRegIdxSeqs + 73,
1133 .LaneMask: LaneBitmask(0x0000000000000001),
1134 .AllocationPriority: 0,
1135 .GlobalPriority: false,
1136 .TSFlags: 0x00, /* TSFlags */
1137 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1138 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1139 .SuperClasses: nullptr, .SuperClassesSize: 0,
1140 .OrderFunc: GPRC_NOR0GetRawAllocationOrder
1141 };
1142
1143 extern const TargetRegisterClass GPRC_and_GPRC_NOR0RegClass = {
1144 .MC: &PPCMCRegisterClasses[GPRC_and_GPRC_NOR0RegClassID],
1145 .SubClassMask: GPRC_and_GPRC_NOR0SubClassMask,
1146 .SuperRegIndices: SuperRegIdxSeqs + 73,
1147 .LaneMask: LaneBitmask(0x0000000000000001),
1148 .AllocationPriority: 0,
1149 .GlobalPriority: false,
1150 .TSFlags: 0x00, /* TSFlags */
1151 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1152 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1153 .SuperClasses: GPRC_and_GPRC_NOR0Superclasses, .SuperClassesSize: 2,
1154 .OrderFunc: GPRC_and_GPRC_NOR0GetRawAllocationOrder
1155 };
1156
1157 extern const TargetRegisterClass CRBITRCRegClass = {
1158 .MC: &PPCMCRegisterClasses[CRBITRCRegClassID],
1159 .SubClassMask: CRBITRCSubClassMask,
1160 .SuperRegIndices: SuperRegIdxSeqs + 9,
1161 .LaneMask: LaneBitmask(0x0000000000000001),
1162 .AllocationPriority: 0,
1163 .GlobalPriority: false,
1164 .TSFlags: 0x00, /* TSFlags */
1165 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1166 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1167 .SuperClasses: nullptr, .SuperClassesSize: 0,
1168 .OrderFunc: CRBITRCGetRawAllocationOrder
1169 };
1170
1171 extern const TargetRegisterClass F4RCRegClass = {
1172 .MC: &PPCMCRegisterClasses[F4RCRegClassID],
1173 .SubClassMask: F4RCSubClassMask,
1174 .SuperRegIndices: SuperRegIdxSeqs + 25,
1175 .LaneMask: LaneBitmask(0x0000000000000001),
1176 .AllocationPriority: 0,
1177 .GlobalPriority: false,
1178 .TSFlags: 0x00, /* TSFlags */
1179 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1180 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1181 .SuperClasses: F4RCSuperclasses, .SuperClassesSize: 1,
1182 .OrderFunc: nullptr
1183 };
1184
1185 extern const TargetRegisterClass GPRC32RegClass = {
1186 .MC: &PPCMCRegisterClasses[GPRC32RegClassID],
1187 .SubClassMask: GPRC32SubClassMask,
1188 .SuperRegIndices: SuperRegIdxSeqs + 2,
1189 .LaneMask: LaneBitmask(0x0000000000000001),
1190 .AllocationPriority: 0,
1191 .GlobalPriority: false,
1192 .TSFlags: 0x00, /* TSFlags */
1193 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1194 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1195 .SuperClasses: nullptr, .SuperClassesSize: 0,
1196 .OrderFunc: nullptr
1197 };
1198
1199 extern const TargetRegisterClass CRRCRegClass = {
1200 .MC: &PPCMCRegisterClasses[CRRCRegClassID],
1201 .SubClassMask: CRRCSubClassMask,
1202 .SuperRegIndices: SuperRegIdxSeqs + 2,
1203 .LaneMask: LaneBitmask(0x0000000000000E40),
1204 .AllocationPriority: 0,
1205 .GlobalPriority: false,
1206 .TSFlags: 0x00, /* TSFlags */
1207 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1208 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1209 .SuperClasses: nullptr, .SuperClassesSize: 0,
1210 .OrderFunc: CRRCGetRawAllocationOrder
1211 };
1212
1213 extern const TargetRegisterClass CARRYRCRegClass = {
1214 .MC: &PPCMCRegisterClasses[CARRYRCRegClassID],
1215 .SubClassMask: CARRYRCSubClassMask,
1216 .SuperRegIndices: SuperRegIdxSeqs + 2,
1217 .LaneMask: LaneBitmask(0x0000000000000001),
1218 .AllocationPriority: 0,
1219 .GlobalPriority: false,
1220 .TSFlags: 0x00, /* TSFlags */
1221 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1222 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1223 .SuperClasses: nullptr, .SuperClassesSize: 0,
1224 .OrderFunc: nullptr
1225 };
1226
1227 extern const TargetRegisterClass CTRRCRegClass = {
1228 .MC: &PPCMCRegisterClasses[CTRRCRegClassID],
1229 .SubClassMask: CTRRCSubClassMask,
1230 .SuperRegIndices: SuperRegIdxSeqs + 2,
1231 .LaneMask: LaneBitmask(0x0000000000000001),
1232 .AllocationPriority: 0,
1233 .GlobalPriority: false,
1234 .TSFlags: 0x00, /* TSFlags */
1235 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1236 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1237 .SuperClasses: nullptr, .SuperClassesSize: 0,
1238 .OrderFunc: nullptr
1239 };
1240
1241 extern const TargetRegisterClass LRRCRegClass = {
1242 .MC: &PPCMCRegisterClasses[LRRCRegClassID],
1243 .SubClassMask: LRRCSubClassMask,
1244 .SuperRegIndices: SuperRegIdxSeqs + 2,
1245 .LaneMask: LaneBitmask(0x0000000000000001),
1246 .AllocationPriority: 0,
1247 .GlobalPriority: false,
1248 .TSFlags: 0x00, /* TSFlags */
1249 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1250 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1251 .SuperClasses: nullptr, .SuperClassesSize: 0,
1252 .OrderFunc: nullptr
1253 };
1254
1255 extern const TargetRegisterClass VRSAVERCRegClass = {
1256 .MC: &PPCMCRegisterClasses[VRSAVERCRegClassID],
1257 .SubClassMask: VRSAVERCSubClassMask,
1258 .SuperRegIndices: SuperRegIdxSeqs + 2,
1259 .LaneMask: LaneBitmask(0x0000000000000001),
1260 .AllocationPriority: 0,
1261 .GlobalPriority: false,
1262 .TSFlags: 0x00, /* TSFlags */
1263 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1264 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1265 .SuperClasses: nullptr, .SuperClassesSize: 0,
1266 .OrderFunc: nullptr
1267 };
1268
1269 extern const TargetRegisterClass SPILLTOVSRRCRegClass = {
1270 .MC: &PPCMCRegisterClasses[SPILLTOVSRRCRegClassID],
1271 .SubClassMask: SPILLTOVSRRCSubClassMask,
1272 .SuperRegIndices: SuperRegIdxSeqs + 32,
1273 .LaneMask: LaneBitmask(0x0000000000000001),
1274 .AllocationPriority: 0,
1275 .GlobalPriority: false,
1276 .TSFlags: 0x00, /* TSFlags */
1277 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1278 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1279 .SuperClasses: nullptr, .SuperClassesSize: 0,
1280 .OrderFunc: nullptr
1281 };
1282
1283 extern const TargetRegisterClass VSFRCRegClass = {
1284 .MC: &PPCMCRegisterClasses[VSFRCRegClassID],
1285 .SubClassMask: VSFRCSubClassMask,
1286 .SuperRegIndices: SuperRegIdxSeqs + 25,
1287 .LaneMask: LaneBitmask(0x0000000000000001),
1288 .AllocationPriority: 0,
1289 .GlobalPriority: false,
1290 .TSFlags: 0x00, /* TSFlags */
1291 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1292 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1293 .SuperClasses: VSFRCSuperclasses, .SuperClassesSize: 1,
1294 .OrderFunc: nullptr
1295 };
1296
1297 extern const TargetRegisterClass G8RCRegClass = {
1298 .MC: &PPCMCRegisterClasses[G8RCRegClassID],
1299 .SubClassMask: G8RCSubClassMask,
1300 .SuperRegIndices: SuperRegIdxSeqs + 3,
1301 .LaneMask: LaneBitmask(0x0000000000000001),
1302 .AllocationPriority: 0,
1303 .GlobalPriority: false,
1304 .TSFlags: 0x00, /* TSFlags */
1305 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1306 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1307 .SuperClasses: G8RCSuperclasses, .SuperClassesSize: 1,
1308 .OrderFunc: G8RCGetRawAllocationOrder
1309 };
1310
1311 extern const TargetRegisterClass G8RC_NOX0RegClass = {
1312 .MC: &PPCMCRegisterClasses[G8RC_NOX0RegClassID],
1313 .SubClassMask: G8RC_NOX0SubClassMask,
1314 .SuperRegIndices: SuperRegIdxSeqs + 3,
1315 .LaneMask: LaneBitmask(0x0000000000000001),
1316 .AllocationPriority: 0,
1317 .GlobalPriority: false,
1318 .TSFlags: 0x00, /* TSFlags */
1319 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1320 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1321 .SuperClasses: nullptr, .SuperClassesSize: 0,
1322 .OrderFunc: G8RC_NOX0GetRawAllocationOrder
1323 };
1324
1325 extern const TargetRegisterClass SPILLTOVSRRC_and_VSFRCRegClass = {
1326 .MC: &PPCMCRegisterClasses[SPILLTOVSRRC_and_VSFRCRegClassID],
1327 .SubClassMask: SPILLTOVSRRC_and_VSFRCSubClassMask,
1328 .SuperRegIndices: SuperRegIdxSeqs + 25,
1329 .LaneMask: LaneBitmask(0x0000000000000001),
1330 .AllocationPriority: 0,
1331 .GlobalPriority: false,
1332 .TSFlags: 0x00, /* TSFlags */
1333 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1334 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1335 .SuperClasses: SPILLTOVSRRC_and_VSFRCSuperclasses, .SuperClassesSize: 3,
1336 .OrderFunc: nullptr
1337 };
1338
1339 extern const TargetRegisterClass G8RC_and_G8RC_NOX0RegClass = {
1340 .MC: &PPCMCRegisterClasses[G8RC_and_G8RC_NOX0RegClassID],
1341 .SubClassMask: G8RC_and_G8RC_NOX0SubClassMask,
1342 .SuperRegIndices: SuperRegIdxSeqs + 3,
1343 .LaneMask: LaneBitmask(0x0000000000000001),
1344 .AllocationPriority: 0,
1345 .GlobalPriority: false,
1346 .TSFlags: 0x00, /* TSFlags */
1347 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1348 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1349 .SuperClasses: G8RC_and_G8RC_NOX0Superclasses, .SuperClassesSize: 3,
1350 .OrderFunc: G8RC_and_G8RC_NOX0GetRawAllocationOrder
1351 };
1352
1353 extern const TargetRegisterClass F8RCRegClass = {
1354 .MC: &PPCMCRegisterClasses[F8RCRegClassID],
1355 .SubClassMask: F8RCSubClassMask,
1356 .SuperRegIndices: SuperRegIdxSeqs + 25,
1357 .LaneMask: LaneBitmask(0x0000000000000001),
1358 .AllocationPriority: 0,
1359 .GlobalPriority: false,
1360 .TSFlags: 0x00, /* TSFlags */
1361 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1362 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1363 .SuperClasses: F8RCSuperclasses, .SuperClassesSize: 3,
1364 .OrderFunc: nullptr
1365 };
1366
1367 extern const TargetRegisterClass FHRCRegClass = {
1368 .MC: &PPCMCRegisterClasses[FHRCRegClassID],
1369 .SubClassMask: FHRCSubClassMask,
1370 .SuperRegIndices: SuperRegIdxSeqs + 2,
1371 .LaneMask: LaneBitmask(0x0000000000000001),
1372 .AllocationPriority: 0,
1373 .GlobalPriority: false,
1374 .TSFlags: 0x00, /* TSFlags */
1375 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1376 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1377 .SuperClasses: nullptr, .SuperClassesSize: 0,
1378 .OrderFunc: nullptr
1379 };
1380
1381 extern const TargetRegisterClass SPERCRegClass = {
1382 .MC: &PPCMCRegisterClasses[SPERCRegClassID],
1383 .SubClassMask: SPERCSubClassMask,
1384 .SuperRegIndices: SuperRegIdxSeqs + 2,
1385 .LaneMask: LaneBitmask(0x0000000000000003),
1386 .AllocationPriority: 0,
1387 .GlobalPriority: false,
1388 .TSFlags: 0x00, /* TSFlags */
1389 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1390 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1391 .SuperClasses: nullptr, .SuperClassesSize: 0,
1392 .OrderFunc: nullptr
1393 };
1394
1395 extern const TargetRegisterClass VFHRCRegClass = {
1396 .MC: &PPCMCRegisterClasses[VFHRCRegClassID],
1397 .SubClassMask: VFHRCSubClassMask,
1398 .SuperRegIndices: SuperRegIdxSeqs + 2,
1399 .LaneMask: LaneBitmask(0x0000000000000001),
1400 .AllocationPriority: 0,
1401 .GlobalPriority: false,
1402 .TSFlags: 0x00, /* TSFlags */
1403 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1404 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1405 .SuperClasses: nullptr, .SuperClassesSize: 0,
1406 .OrderFunc: nullptr
1407 };
1408
1409 extern const TargetRegisterClass VFRCRegClass = {
1410 .MC: &PPCMCRegisterClasses[VFRCRegClassID],
1411 .SubClassMask: VFRCSubClassMask,
1412 .SuperRegIndices: SuperRegIdxSeqs + 17,
1413 .LaneMask: LaneBitmask(0x0000000000000001),
1414 .AllocationPriority: 0,
1415 .GlobalPriority: false,
1416 .TSFlags: 0x00, /* TSFlags */
1417 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1418 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1419 .SuperClasses: VFRCSuperclasses, .SuperClassesSize: 2,
1420 .OrderFunc: nullptr
1421 };
1422
1423 extern const TargetRegisterClass SPERC_with_sub_32_in_GPRC_NOR0RegClass = {
1424 .MC: &PPCMCRegisterClasses[SPERC_with_sub_32_in_GPRC_NOR0RegClassID],
1425 .SubClassMask: SPERC_with_sub_32_in_GPRC_NOR0SubClassMask,
1426 .SuperRegIndices: SuperRegIdxSeqs + 2,
1427 .LaneMask: LaneBitmask(0x0000000000000003),
1428 .AllocationPriority: 0,
1429 .GlobalPriority: false,
1430 .TSFlags: 0x00, /* TSFlags */
1431 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1432 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1433 .SuperClasses: SPERC_with_sub_32_in_GPRC_NOR0Superclasses, .SuperClassesSize: 1,
1434 .OrderFunc: nullptr
1435 };
1436
1437 extern const TargetRegisterClass SPILLTOVSRRC_and_VFRCRegClass = {
1438 .MC: &PPCMCRegisterClasses[SPILLTOVSRRC_and_VFRCRegClassID],
1439 .SubClassMask: SPILLTOVSRRC_and_VFRCSubClassMask,
1440 .SuperRegIndices: SuperRegIdxSeqs + 17,
1441 .LaneMask: LaneBitmask(0x0000000000000001),
1442 .AllocationPriority: 0,
1443 .GlobalPriority: false,
1444 .TSFlags: 0x00, /* TSFlags */
1445 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1446 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1447 .SuperClasses: SPILLTOVSRRC_and_VFRCSuperclasses, .SuperClassesSize: 5,
1448 .OrderFunc: nullptr
1449 };
1450
1451 extern const TargetRegisterClass SPILLTOVSRRC_and_F4RCRegClass = {
1452 .MC: &PPCMCRegisterClasses[SPILLTOVSRRC_and_F4RCRegClassID],
1453 .SubClassMask: SPILLTOVSRRC_and_F4RCSubClassMask,
1454 .SuperRegIndices: SuperRegIdxSeqs + 25,
1455 .LaneMask: LaneBitmask(0x0000000000000001),
1456 .AllocationPriority: 0,
1457 .GlobalPriority: false,
1458 .TSFlags: 0x00, /* TSFlags */
1459 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1460 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1461 .SuperClasses: SPILLTOVSRRC_and_F4RCSuperclasses, .SuperClassesSize: 6,
1462 .OrderFunc: nullptr
1463 };
1464
1465 extern const TargetRegisterClass CTRRC8RegClass = {
1466 .MC: &PPCMCRegisterClasses[CTRRC8RegClassID],
1467 .SubClassMask: CTRRC8SubClassMask,
1468 .SuperRegIndices: SuperRegIdxSeqs + 2,
1469 .LaneMask: LaneBitmask(0x0000000000000001),
1470 .AllocationPriority: 0,
1471 .GlobalPriority: false,
1472 .TSFlags: 0x00, /* TSFlags */
1473 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1474 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1475 .SuperClasses: nullptr, .SuperClassesSize: 0,
1476 .OrderFunc: nullptr
1477 };
1478
1479 extern const TargetRegisterClass LR8RCRegClass = {
1480 .MC: &PPCMCRegisterClasses[LR8RCRegClassID],
1481 .SubClassMask: LR8RCSubClassMask,
1482 .SuperRegIndices: SuperRegIdxSeqs + 2,
1483 .LaneMask: LaneBitmask(0x0000000000000001),
1484 .AllocationPriority: 0,
1485 .GlobalPriority: false,
1486 .TSFlags: 0x00, /* TSFlags */
1487 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1488 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1489 .SuperClasses: nullptr, .SuperClassesSize: 0,
1490 .OrderFunc: nullptr
1491 };
1492
1493 extern const TargetRegisterClass DMRROWRCRegClass = {
1494 .MC: &PPCMCRegisterClasses[DMRROWRCRegClassID],
1495 .SubClassMask: DMRROWRCSubClassMask,
1496 .SuperRegIndices: SuperRegIdxSeqs + 56,
1497 .LaneMask: LaneBitmask(0x0000000000000001),
1498 .AllocationPriority: 0,
1499 .GlobalPriority: false,
1500 .TSFlags: 0x00, /* TSFlags */
1501 .HasDisjunctSubRegs: false, /* HasDisjunctSubRegs */
1502 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1503 .SuperClasses: nullptr, .SuperClassesSize: 0,
1504 .OrderFunc: nullptr
1505 };
1506
1507 extern const TargetRegisterClass VSRCRegClass = {
1508 .MC: &PPCMCRegisterClasses[VSRCRegClassID],
1509 .SubClassMask: VSRCSubClassMask,
1510 .SuperRegIndices: SuperRegIdxSeqs + 20,
1511 .LaneMask: LaneBitmask(0x000000000000000C),
1512 .AllocationPriority: 0,
1513 .GlobalPriority: false,
1514 .TSFlags: 0x00, /* TSFlags */
1515 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1516 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1517 .SuperClasses: nullptr, .SuperClassesSize: 0,
1518 .OrderFunc: nullptr
1519 };
1520
1521 extern const TargetRegisterClass VSRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1522 .MC: &PPCMCRegisterClasses[VSRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1523 .SubClassMask: VSRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1524 .SuperRegIndices: SuperRegIdxSeqs + 20,
1525 .LaneMask: LaneBitmask(0x000000000000000C),
1526 .AllocationPriority: 0,
1527 .GlobalPriority: false,
1528 .TSFlags: 0x00, /* TSFlags */
1529 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1530 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1531 .SuperClasses: VSRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 1,
1532 .OrderFunc: nullptr
1533 };
1534
1535 extern const TargetRegisterClass VRRCRegClass = {
1536 .MC: &PPCMCRegisterClasses[VRRCRegClassID],
1537 .SubClassMask: VRRCSubClassMask,
1538 .SuperRegIndices: SuperRegIdxSeqs + 14,
1539 .LaneMask: LaneBitmask(0x000000000000000C),
1540 .AllocationPriority: 0,
1541 .GlobalPriority: false,
1542 .TSFlags: 0x00, /* TSFlags */
1543 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1544 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1545 .SuperClasses: VRRCSuperclasses, .SuperClassesSize: 1,
1546 .OrderFunc: nullptr
1547 };
1548
1549 extern const TargetRegisterClass VSLRCRegClass = {
1550 .MC: &PPCMCRegisterClasses[VSLRCRegClassID],
1551 .SubClassMask: VSLRCSubClassMask,
1552 .SuperRegIndices: SuperRegIdxSeqs + 20,
1553 .LaneMask: LaneBitmask(0x000000000000000C),
1554 .AllocationPriority: 0,
1555 .GlobalPriority: false,
1556 .TSFlags: 0x00, /* TSFlags */
1557 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1558 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1559 .SuperClasses: VSLRCSuperclasses, .SuperClassesSize: 1,
1560 .OrderFunc: nullptr
1561 };
1562
1563 extern const TargetRegisterClass VRRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1564 .MC: &PPCMCRegisterClasses[VRRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1565 .SubClassMask: VRRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1566 .SuperRegIndices: SuperRegIdxSeqs + 14,
1567 .LaneMask: LaneBitmask(0x000000000000000C),
1568 .AllocationPriority: 0,
1569 .GlobalPriority: false,
1570 .TSFlags: 0x00, /* TSFlags */
1571 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1572 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1573 .SuperClasses: VRRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 3,
1574 .OrderFunc: nullptr
1575 };
1576
1577 extern const TargetRegisterClass FpRCRegClass = {
1578 .MC: &PPCMCRegisterClasses[FpRCRegClassID],
1579 .SubClassMask: FpRCSubClassMask,
1580 .SuperRegIndices: SuperRegIdxSeqs + 2,
1581 .LaneMask: LaneBitmask(0x0000000000000180),
1582 .AllocationPriority: 0,
1583 .GlobalPriority: false,
1584 .TSFlags: 0x00, /* TSFlags */
1585 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1586 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1587 .SuperClasses: nullptr, .SuperClassesSize: 0,
1588 .OrderFunc: nullptr
1589 };
1590
1591 extern const TargetRegisterClass G8pRCRegClass = {
1592 .MC: &PPCMCRegisterClasses[G8pRCRegClassID],
1593 .SubClassMask: G8pRCSubClassMask,
1594 .SuperRegIndices: SuperRegIdxSeqs + 2,
1595 .LaneMask: LaneBitmask(0x0000000100000001),
1596 .AllocationPriority: 0,
1597 .GlobalPriority: false,
1598 .TSFlags: 0x00, /* TSFlags */
1599 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1600 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1601 .SuperClasses: nullptr, .SuperClassesSize: 0,
1602 .OrderFunc: G8pRCGetRawAllocationOrder
1603 };
1604
1605 extern const TargetRegisterClass G8pRC_with_sub_32_in_GPRC_NOR0RegClass = {
1606 .MC: &PPCMCRegisterClasses[G8pRC_with_sub_32_in_GPRC_NOR0RegClassID],
1607 .SubClassMask: G8pRC_with_sub_32_in_GPRC_NOR0SubClassMask,
1608 .SuperRegIndices: SuperRegIdxSeqs + 2,
1609 .LaneMask: LaneBitmask(0x0000000100000001),
1610 .AllocationPriority: 0,
1611 .GlobalPriority: false,
1612 .TSFlags: 0x00, /* TSFlags */
1613 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1614 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1615 .SuperClasses: G8pRC_with_sub_32_in_GPRC_NOR0Superclasses, .SuperClassesSize: 1,
1616 .OrderFunc: G8pRC_with_sub_32_in_GPRC_NOR0GetRawAllocationOrder
1617 };
1618
1619 extern const TargetRegisterClass VSLRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1620 .MC: &PPCMCRegisterClasses[VSLRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1621 .SubClassMask: VSLRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1622 .SuperRegIndices: SuperRegIdxSeqs + 20,
1623 .LaneMask: LaneBitmask(0x000000000000000C),
1624 .AllocationPriority: 0,
1625 .GlobalPriority: false,
1626 .TSFlags: 0x00, /* TSFlags */
1627 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1628 .CoveredBySubRegs: true, /* CoveredBySubRegs */
1629 .SuperClasses: VSLRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 3,
1630 .OrderFunc: nullptr
1631 };
1632
1633 extern const TargetRegisterClass FpRC_with_sub_fp0_in_SPILLTOVSRRCRegClass = {
1634 .MC: &PPCMCRegisterClasses[FpRC_with_sub_fp0_in_SPILLTOVSRRCRegClassID],
1635 .SubClassMask: FpRC_with_sub_fp0_in_SPILLTOVSRRCSubClassMask,
1636 .SuperRegIndices: SuperRegIdxSeqs + 2,
1637 .LaneMask: LaneBitmask(0x0000000000000180),
1638 .AllocationPriority: 0,
1639 .GlobalPriority: false,
1640 .TSFlags: 0x00, /* TSFlags */
1641 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1642 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1643 .SuperClasses: FpRC_with_sub_fp0_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 1,
1644 .OrderFunc: nullptr
1645 };
1646
1647 extern const TargetRegisterClass DMRROWpRCRegClass = {
1648 .MC: &PPCMCRegisterClasses[DMRROWpRCRegClassID],
1649 .SubClassMask: DMRROWpRCSubClassMask,
1650 .SuperRegIndices: SuperRegIdxSeqs + 47,
1651 .LaneMask: LaneBitmask(0x0000000000000030),
1652 .AllocationPriority: 0,
1653 .GlobalPriority: false,
1654 .TSFlags: 0x00, /* TSFlags */
1655 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1656 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1657 .SuperClasses: nullptr, .SuperClassesSize: 0,
1658 .OrderFunc: nullptr
1659 };
1660
1661 extern const TargetRegisterClass VSRpRCRegClass = {
1662 .MC: &PPCMCRegisterClasses[VSRpRCRegClassID],
1663 .SubClassMask: VSRpRCSubClassMask,
1664 .SuperRegIndices: SuperRegIdxSeqs + 6,
1665 .LaneMask: LaneBitmask(0x000000000000300C),
1666 .AllocationPriority: 2,
1667 .GlobalPriority: false,
1668 .TSFlags: 0x00, /* TSFlags */
1669 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1670 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1671 .SuperClasses: nullptr, .SuperClassesSize: 0,
1672 .OrderFunc: nullptr
1673 };
1674
1675 extern const TargetRegisterClass VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1676 .MC: &PPCMCRegisterClasses[VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1677 .SubClassMask: VSRpRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1678 .SuperRegIndices: SuperRegIdxSeqs + 6,
1679 .LaneMask: LaneBitmask(0x000000000000300C),
1680 .AllocationPriority: 2,
1681 .GlobalPriority: false,
1682 .TSFlags: 0x00, /* TSFlags */
1683 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1684 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1685 .SuperClasses: VSRpRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 1,
1686 .OrderFunc: nullptr
1687 };
1688
1689 extern const TargetRegisterClass VSRpRC_with_sub_64_in_F4RCRegClass = {
1690 .MC: &PPCMCRegisterClasses[VSRpRC_with_sub_64_in_F4RCRegClassID],
1691 .SubClassMask: VSRpRC_with_sub_64_in_F4RCSubClassMask,
1692 .SuperRegIndices: SuperRegIdxSeqs + 6,
1693 .LaneMask: LaneBitmask(0x000000000000300C),
1694 .AllocationPriority: 2,
1695 .GlobalPriority: false,
1696 .TSFlags: 0x00, /* TSFlags */
1697 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1698 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1699 .SuperClasses: VSRpRC_with_sub_64_in_F4RCSuperclasses, .SuperClassesSize: 1,
1700 .OrderFunc: nullptr
1701 };
1702
1703 extern const TargetRegisterClass VSRpRC_with_sub_64_in_VFRCRegClass = {
1704 .MC: &PPCMCRegisterClasses[VSRpRC_with_sub_64_in_VFRCRegClassID],
1705 .SubClassMask: VSRpRC_with_sub_64_in_VFRCSubClassMask,
1706 .SuperRegIndices: SuperRegIdxSeqs + 2,
1707 .LaneMask: LaneBitmask(0x000000000000300C),
1708 .AllocationPriority: 2,
1709 .GlobalPriority: false,
1710 .TSFlags: 0x00, /* TSFlags */
1711 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1712 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1713 .SuperClasses: VSRpRC_with_sub_64_in_VFRCSuperclasses, .SuperClassesSize: 1,
1714 .OrderFunc: nullptr
1715 };
1716
1717 extern const TargetRegisterClass VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClass = {
1718 .MC: &PPCMCRegisterClasses[VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClassID],
1719 .SubClassMask: VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCSubClassMask,
1720 .SuperRegIndices: SuperRegIdxSeqs + 2,
1721 .LaneMask: LaneBitmask(0x000000000000300C),
1722 .AllocationPriority: 2,
1723 .GlobalPriority: false,
1724 .TSFlags: 0x00, /* TSFlags */
1725 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1726 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1727 .SuperClasses: VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCSuperclasses, .SuperClassesSize: 3,
1728 .OrderFunc: nullptr
1729 };
1730
1731 extern const TargetRegisterClass VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCRegClass = {
1732 .MC: &PPCMCRegisterClasses[VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCRegClassID],
1733 .SubClassMask: VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCSubClassMask,
1734 .SuperRegIndices: SuperRegIdxSeqs + 6,
1735 .LaneMask: LaneBitmask(0x000000000000300C),
1736 .AllocationPriority: 2,
1737 .GlobalPriority: false,
1738 .TSFlags: 0x00, /* TSFlags */
1739 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1740 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1741 .SuperClasses: VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCSuperclasses, .SuperClassesSize: 3,
1742 .OrderFunc: nullptr
1743 };
1744
1745 extern const TargetRegisterClass ACCRCRegClass = {
1746 .MC: &PPCMCRegisterClasses[ACCRCRegClassID],
1747 .SubClassMask: ACCRCSubClassMask,
1748 .SuperRegIndices: SuperRegIdxSeqs + 2,
1749 .LaneMask: LaneBitmask(0x000000000003F00C),
1750 .AllocationPriority: 31,
1751 .GlobalPriority: true,
1752 .TSFlags: 0x00, /* TSFlags */
1753 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1754 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1755 .SuperClasses: nullptr, .SuperClassesSize: 0,
1756 .OrderFunc: nullptr
1757 };
1758
1759 extern const TargetRegisterClass UACCRCRegClass = {
1760 .MC: &PPCMCRegisterClasses[UACCRCRegClassID],
1761 .SubClassMask: UACCRCSubClassMask,
1762 .SuperRegIndices: SuperRegIdxSeqs + 2,
1763 .LaneMask: LaneBitmask(0x000000000003F00C),
1764 .AllocationPriority: 4,
1765 .GlobalPriority: true,
1766 .TSFlags: 0x00, /* TSFlags */
1767 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1768 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1769 .SuperClasses: nullptr, .SuperClassesSize: 0,
1770 .OrderFunc: nullptr
1771 };
1772
1773 extern const TargetRegisterClass WACCRCRegClass = {
1774 .MC: &PPCMCRegisterClasses[WACCRCRegClassID],
1775 .SubClassMask: WACCRCSubClassMask,
1776 .SuperRegIndices: SuperRegIdxSeqs + 44,
1777 .LaneMask: LaneBitmask(0x00000000000C0030),
1778 .AllocationPriority: 0,
1779 .GlobalPriority: false,
1780 .TSFlags: 0x00, /* TSFlags */
1781 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1782 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1783 .SuperClasses: nullptr, .SuperClassesSize: 0,
1784 .OrderFunc: nullptr
1785 };
1786
1787 extern const TargetRegisterClass WACC_HIRCRegClass = {
1788 .MC: &PPCMCRegisterClasses[WACC_HIRCRegClassID],
1789 .SubClassMask: WACC_HIRCSubClassMask,
1790 .SuperRegIndices: SuperRegIdxSeqs + 41,
1791 .LaneMask: LaneBitmask(0x00000000000C0030),
1792 .AllocationPriority: 0,
1793 .GlobalPriority: false,
1794 .TSFlags: 0x00, /* TSFlags */
1795 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1796 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1797 .SuperClasses: nullptr, .SuperClassesSize: 0,
1798 .OrderFunc: nullptr
1799 };
1800
1801 extern const TargetRegisterClass ACCRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1802 .MC: &PPCMCRegisterClasses[ACCRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1803 .SubClassMask: ACCRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1804 .SuperRegIndices: SuperRegIdxSeqs + 2,
1805 .LaneMask: LaneBitmask(0x000000000003F00C),
1806 .AllocationPriority: 31,
1807 .GlobalPriority: true,
1808 .TSFlags: 0x00, /* TSFlags */
1809 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1810 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1811 .SuperClasses: ACCRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 1,
1812 .OrderFunc: nullptr
1813 };
1814
1815 extern const TargetRegisterClass UACCRC_with_sub_64_in_SPILLTOVSRRCRegClass = {
1816 .MC: &PPCMCRegisterClasses[UACCRC_with_sub_64_in_SPILLTOVSRRCRegClassID],
1817 .SubClassMask: UACCRC_with_sub_64_in_SPILLTOVSRRCSubClassMask,
1818 .SuperRegIndices: SuperRegIdxSeqs + 2,
1819 .LaneMask: LaneBitmask(0x000000000003F00C),
1820 .AllocationPriority: 4,
1821 .GlobalPriority: true,
1822 .TSFlags: 0x00, /* TSFlags */
1823 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1824 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1825 .SuperClasses: UACCRC_with_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 1,
1826 .OrderFunc: nullptr
1827 };
1828
1829 extern const TargetRegisterClass ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClass = {
1830 .MC: &PPCMCRegisterClasses[ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClassID],
1831 .SubClassMask: ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSubClassMask,
1832 .SuperRegIndices: SuperRegIdxSeqs + 2,
1833 .LaneMask: LaneBitmask(0x000000000003F00C),
1834 .AllocationPriority: 31,
1835 .GlobalPriority: true,
1836 .TSFlags: 0x00, /* TSFlags */
1837 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1838 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1839 .SuperClasses: ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 2,
1840 .OrderFunc: nullptr
1841 };
1842
1843 extern const TargetRegisterClass UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClass = {
1844 .MC: &PPCMCRegisterClasses[UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClassID],
1845 .SubClassMask: UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSubClassMask,
1846 .SuperRegIndices: SuperRegIdxSeqs + 2,
1847 .LaneMask: LaneBitmask(0x000000000003F00C),
1848 .AllocationPriority: 4,
1849 .GlobalPriority: true,
1850 .TSFlags: 0x00, /* TSFlags */
1851 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1852 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1853 .SuperClasses: UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCSuperclasses, .SuperClassesSize: 2,
1854 .OrderFunc: nullptr
1855 };
1856
1857 extern const TargetRegisterClass DMRRCRegClass = {
1858 .MC: &PPCMCRegisterClasses[DMRRCRegClassID],
1859 .SubClassMask: DMRRCSubClassMask,
1860 .SuperRegIndices: SuperRegIdxSeqs + 0,
1861 .LaneMask: LaneBitmask(0x0000000000FC0030),
1862 .AllocationPriority: 0,
1863 .GlobalPriority: false,
1864 .TSFlags: 0x00, /* TSFlags */
1865 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1866 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1867 .SuperClasses: nullptr, .SuperClassesSize: 0,
1868 .OrderFunc: nullptr
1869 };
1870
1871 extern const TargetRegisterClass DMRpRCRegClass = {
1872 .MC: &PPCMCRegisterClasses[DMRpRCRegClassID],
1873 .SubClassMask: DMRpRCSubClassMask,
1874 .SuperRegIndices: SuperRegIdxSeqs + 2,
1875 .LaneMask: LaneBitmask(0x00000000FFFC0030),
1876 .AllocationPriority: 0,
1877 .GlobalPriority: false,
1878 .TSFlags: 0x00, /* TSFlags */
1879 .HasDisjunctSubRegs: true, /* HasDisjunctSubRegs */
1880 .CoveredBySubRegs: false, /* CoveredBySubRegs */
1881 .SuperClasses: nullptr, .SuperClassesSize: 0,
1882 .OrderFunc: nullptr
1883 };
1884
1885
1886} // namespace PPC
1887static const TargetRegisterClass *const PPCRegisterClasses[] = {
1888 &PPC::VSSRCRegClass,
1889 &PPC::GPRCRegClass,
1890 &PPC::GPRC_NOR0RegClass,
1891 &PPC::GPRC_and_GPRC_NOR0RegClass,
1892 &PPC::CRBITRCRegClass,
1893 &PPC::F4RCRegClass,
1894 &PPC::GPRC32RegClass,
1895 &PPC::CRRCRegClass,
1896 &PPC::CARRYRCRegClass,
1897 &PPC::CTRRCRegClass,
1898 &PPC::LRRCRegClass,
1899 &PPC::VRSAVERCRegClass,
1900 &PPC::SPILLTOVSRRCRegClass,
1901 &PPC::VSFRCRegClass,
1902 &PPC::G8RCRegClass,
1903 &PPC::G8RC_NOX0RegClass,
1904 &PPC::SPILLTOVSRRC_and_VSFRCRegClass,
1905 &PPC::G8RC_and_G8RC_NOX0RegClass,
1906 &PPC::F8RCRegClass,
1907 &PPC::FHRCRegClass,
1908 &PPC::SPERCRegClass,
1909 &PPC::VFHRCRegClass,
1910 &PPC::VFRCRegClass,
1911 &PPC::SPERC_with_sub_32_in_GPRC_NOR0RegClass,
1912 &PPC::SPILLTOVSRRC_and_VFRCRegClass,
1913 &PPC::SPILLTOVSRRC_and_F4RCRegClass,
1914 &PPC::CTRRC8RegClass,
1915 &PPC::LR8RCRegClass,
1916 &PPC::DMRROWRCRegClass,
1917 &PPC::VSRCRegClass,
1918 &PPC::VSRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1919 &PPC::VRRCRegClass,
1920 &PPC::VSLRCRegClass,
1921 &PPC::VRRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1922 &PPC::FpRCRegClass,
1923 &PPC::G8pRCRegClass,
1924 &PPC::G8pRC_with_sub_32_in_GPRC_NOR0RegClass,
1925 &PPC::VSLRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1926 &PPC::FpRC_with_sub_fp0_in_SPILLTOVSRRCRegClass,
1927 &PPC::DMRROWpRCRegClass,
1928 &PPC::VSRpRCRegClass,
1929 &PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1930 &PPC::VSRpRC_with_sub_64_in_F4RCRegClass,
1931 &PPC::VSRpRC_with_sub_64_in_VFRCRegClass,
1932 &PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRCRegClass,
1933 &PPC::VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RCRegClass,
1934 &PPC::ACCRCRegClass,
1935 &PPC::UACCRCRegClass,
1936 &PPC::WACCRCRegClass,
1937 &PPC::WACC_HIRCRegClass,
1938 &PPC::ACCRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1939 &PPC::UACCRC_with_sub_64_in_SPILLTOVSRRCRegClass,
1940 &PPC::ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClass,
1941 &PPC::UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRCRegClass,
1942 &PPC::DMRRCRegClass,
1943 &PPC::DMRpRCRegClass,
1944 };
1945
1946static const uint8_t PPCCostPerUseTable[] = {
19470, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, };
1948
1949
1950static const bool PPCInAllocatableClassTable[] = {
1951false, true, false, false, true, false, false, false, true, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, };
1952
1953
1954static const TargetRegisterInfoDesc PPCRegInfoDesc = { // Extra Descriptors
1955.CostPerUse: PPCCostPerUseTable, .NumCosts: 1, .InAllocatableClass: PPCInAllocatableClassTable};
1956
1957unsigned PPCGenRegisterInfo::composeSubRegIndicesImpl(unsigned IdxA, unsigned IdxB) const {
1958 static const uint8_t RowMap[55] = {
1959 0, 0, 0, 0, 0, 1, 0, 0, 0, 2, 0, 0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 2, 3, 0, 0, 0, 0, 0, 1, 3, 0, 0, 0, 0, 0, 0, 3, 4, 0, 0, 0, 0, 1, 5, 6, 1, 0, 0, 0, 0, 6, 7, 0, 0, 0,
1960 };
1961 static const uint8_t Rows[8][55] = {
1962 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1963 { PPC::sub_gp8_x1_then_sub_32, 0, PPC::sub_pair1_then_sub_64, PPC::sub_pair1_then_sub_64_hi_phony, 0, 0, PPC::sub_dmr1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_dmrrow1, PPC::sub_dmr1_then_sub_dmrrowp0, PPC::sub_dmr1_then_sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_pair1_then_sub_vsx0, PPC::sub_pair1_then_sub_vsx1, PPC::sub_dmr1_then_sub_wacc_hi, PPC::sub_dmr1_then_sub_wacc_lo, PPC::sub_pair1_then_sub_vsx1_then_sub_64, PPC::sub_pair1_then_sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1964 { 0, 0, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1965 { 0, 0, PPC::sub_pair1_then_sub_vsx1_then_sub_64, PPC::sub_pair1_then_sub_vsx1_then_sub_64_hi_phony, 0, 0, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1966 { 0, 0, 0, 0, 0, 0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1967 { 0, 0, 0, 0, 0, 0, PPC::sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1968 { 0, 0, 0, 0, 0, 0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1969 { 0, 0, 0, 0, 0, 0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1970 };
1971
1972 --IdxA; assert(IdxA < 55); (void) IdxA;
1973 --IdxB; assert(IdxB < 55);
1974 return Rows[RowMap[IdxA]][IdxB];
1975}
1976
1977unsigned PPCGenRegisterInfo::reverseComposeSubRegIndicesImpl(unsigned IdxA, unsigned IdxB) const {
1978 static const uint8_t Table[55][55] = {
1979 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1980 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1981 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1982 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1983 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1984 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
1985 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1986 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1987 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1988 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1989 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1990 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1991 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1992 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1993 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
1994 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1995 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1996 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1997 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
1998 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
1999 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2000 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2001 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2002 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2003 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2004 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2005 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2006 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2007 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
2008 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2009 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2010 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2011 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2012 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2013 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2014 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2015 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2016 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2017 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2018 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2019 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2020 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2021 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
2022 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, },
2023 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, },
2024 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_64, PPC::sub_64_hi_phony, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_32, },
2025 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2026 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2027 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2028 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2029 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, 0, },
2030 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, 0, },
2031 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2032 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2033 { PPC::sub_32, 0, PPC::sub_64, PPC::sub_64_hi_phony, 0, 0, PPC::sub_dmrrow0, PPC::sub_dmrrow1, PPC::sub_dmrrowp0, PPC::sub_dmrrowp1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, PPC::sub_vsx0, PPC::sub_vsx1, PPC::sub_wacc_hi, PPC::sub_wacc_lo, PPC::sub_vsx1_then_sub_64, PPC::sub_vsx1_then_sub_64_hi_phony, 0, 0, 0, 0, 0, 0, PPC::sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_dmrrowp1_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrow1, PPC::sub_wacc_hi_then_sub_dmrrowp0, PPC::sub_wacc_hi_then_sub_dmrrowp1, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0, PPC::sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
2034 };
2035
2036 --IdxA; assert(IdxA < 55);
2037 --IdxB; assert(IdxB < 55);
2038 return Table[IdxA][IdxB];
2039 }
2040
2041 struct MaskRolOp {
2042 LaneBitmask Mask;
2043 uint8_t RotateLeft;
2044 };
2045 static const MaskRolOp LaneMaskComposeSequences[] = {
2046 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 0 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 0
2047 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 1 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 2
2048 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 2 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 4
2049 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 3 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 6
2050 { .Mask: LaneBitmask(0x0000000000000030), .RotateLeft: 20 }, { .Mask: LaneBitmask(0x0000000000FC0000), .RotateLeft: 8 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 8
2051 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 4 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 11
2052 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 5 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 13
2053 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 14 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 15
2054 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 6 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 17
2055 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 7 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 19
2056 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 8 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 21
2057 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 32 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 23
2058 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 9 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 25
2059 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 10 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 27
2060 { .Mask: LaneBitmask(0x000000000000000C), .RotateLeft: 12 }, { .Mask: LaneBitmask(0x0000000000003000), .RotateLeft: 4 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 29
2061 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 11 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 32
2062 { .Mask: LaneBitmask(0x0000000000000030), .RotateLeft: 16 }, { .Mask: LaneBitmask(0x00000000000C0000), .RotateLeft: 4 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 34
2063 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 12 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 37
2064 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 13 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 39
2065 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 15 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 41
2066 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 16 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 43
2067 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 17 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 45
2068 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 18 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 47
2069 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 19 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 49
2070 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 20 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 51
2071 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 21 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 53
2072 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 22 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 55
2073 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 23 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 57
2074 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 24 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 59
2075 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 25 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 61
2076 { .Mask: LaneBitmask(0x0000000000000030), .RotateLeft: 24 }, { .Mask: LaneBitmask(0x00000000000C0000), .RotateLeft: 12 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 63
2077 { .Mask: LaneBitmask(0x0000000000000030), .RotateLeft: 20 }, { .Mask: LaneBitmask(0x00000000000C0000), .RotateLeft: 8 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 66
2078 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 26 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 69
2079 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 27 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 71
2080 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 28 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 73
2081 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 29 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 75
2082 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 30 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 }, // Sequence 77
2083 { .Mask: LaneBitmask(0xFFFFFFFFFFFFFFFF), .RotateLeft: 31 }, { .Mask: LaneBitmask::getNone(), .RotateLeft: 0 } // Sequence 79
2084 };
2085 static const uint8_t CompositeSequences[] = {
2086 0, // to sub_32
2087 2, // to sub_32_hi_phony
2088 4, // to sub_64
2089 6, // to sub_64_hi_phony
2090 0, // to sub_dmr0
2091 8, // to sub_dmr1
2092 11, // to sub_dmrrow0
2093 13, // to sub_dmrrow1
2094 0, // to sub_dmrrowp0
2095 15, // to sub_dmrrowp1
2096 17, // to sub_eq
2097 19, // to sub_fp0
2098 21, // to sub_fp1
2099 0, // to sub_gp8_x0
2100 23, // to sub_gp8_x1
2101 25, // to sub_gt
2102 27, // to sub_lt
2103 0, // to sub_pair0
2104 29, // to sub_pair1
2105 32, // to sub_un
2106 0, // to sub_vsx0
2107 27, // to sub_vsx1
2108 34, // to sub_wacc_hi
2109 0, // to sub_wacc_lo
2110 37, // to sub_vsx1_then_sub_64
2111 39, // to sub_vsx1_then_sub_64_hi_phony
2112 15, // to sub_pair1_then_sub_64
2113 41, // to sub_pair1_then_sub_64_hi_phony
2114 37, // to sub_pair1_then_sub_vsx0
2115 15, // to sub_pair1_then_sub_vsx1
2116 43, // to sub_pair1_then_sub_vsx1_then_sub_64
2117 45, // to sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2118 47, // to sub_dmrrowp1_then_sub_dmrrow0
2119 49, // to sub_dmrrowp1_then_sub_dmrrow1
2120 51, // to sub_wacc_hi_then_sub_dmrrow0
2121 53, // to sub_wacc_hi_then_sub_dmrrow1
2122 43, // to sub_wacc_hi_then_sub_dmrrowp0
2123 47, // to sub_wacc_hi_then_sub_dmrrowp1
2124 55, // to sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2125 57, // to sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2126 59, // to sub_dmr1_then_sub_dmrrow0
2127 61, // to sub_dmr1_then_sub_dmrrow1
2128 51, // to sub_dmr1_then_sub_dmrrowp0
2129 55, // to sub_dmr1_then_sub_dmrrowp1
2130 63, // to sub_dmr1_then_sub_wacc_hi
2131 66, // to sub_dmr1_then_sub_wacc_lo
2132 69, // to sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2133 71, // to sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2134 73, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2135 75, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2136 59, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2137 69, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2138 77, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2139 79, // to sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2140 23 // to sub_gp8_x1_then_sub_32
2141 };
2142
2143LaneBitmask PPCGenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
2144 --IdxA; assert(IdxA < 55 && "Subregister index out of bounds");
2145 LaneBitmask Result;
2146 for (const MaskRolOp *Ops =
2147 &LaneMaskComposeSequences[CompositeSequences[IdxA]];
2148 Ops->Mask.any(); ++Ops) {
2149 LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger();
2150 if (unsigned S = Ops->RotateLeft)
2151 Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S)));
2152 else
2153 Result |= LaneBitmask(M);
2154 }
2155 return Result;
2156}
2157
2158LaneBitmask PPCGenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const {
2159 LaneMask &= getSubRegIndexLaneMask(SubIdx: IdxA);
2160 --IdxA; assert(IdxA < 55 && "Subregister index out of bounds");
2161 LaneBitmask Result;
2162 for (const MaskRolOp *Ops =
2163 &LaneMaskComposeSequences[CompositeSequences[IdxA]];
2164 Ops->Mask.any(); ++Ops) {
2165 LaneBitmask::Type M = LaneMask.getAsInteger();
2166 if (unsigned S = Ops->RotateLeft)
2167 Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S)));
2168 else
2169 Result |= LaneBitmask(M);
2170 }
2171 return Result;
2172}
2173
2174const TargetRegisterClass *PPCGenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const {
2175 static constexpr uint8_t Table[56][55] = {
2176 { // VSSRC
2177 0, // sub_32
2178 0, // sub_32_hi_phony
2179 0, // sub_64
2180 0, // sub_64_hi_phony
2181 0, // sub_dmr0
2182 0, // sub_dmr1
2183 0, // sub_dmrrow0
2184 0, // sub_dmrrow1
2185 0, // sub_dmrrowp0
2186 0, // sub_dmrrowp1
2187 0, // sub_eq
2188 0, // sub_fp0
2189 0, // sub_fp1
2190 0, // sub_gp8_x0
2191 0, // sub_gp8_x1
2192 0, // sub_gt
2193 0, // sub_lt
2194 0, // sub_pair0
2195 0, // sub_pair1
2196 0, // sub_un
2197 0, // sub_vsx0
2198 0, // sub_vsx1
2199 0, // sub_wacc_hi
2200 0, // sub_wacc_lo
2201 0, // sub_vsx1_then_sub_64
2202 0, // sub_vsx1_then_sub_64_hi_phony
2203 0, // sub_pair1_then_sub_64
2204 0, // sub_pair1_then_sub_64_hi_phony
2205 0, // sub_pair1_then_sub_vsx0
2206 0, // sub_pair1_then_sub_vsx1
2207 0, // sub_pair1_then_sub_vsx1_then_sub_64
2208 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2209 0, // sub_dmrrowp1_then_sub_dmrrow0
2210 0, // sub_dmrrowp1_then_sub_dmrrow1
2211 0, // sub_wacc_hi_then_sub_dmrrow0
2212 0, // sub_wacc_hi_then_sub_dmrrow1
2213 0, // sub_wacc_hi_then_sub_dmrrowp0
2214 0, // sub_wacc_hi_then_sub_dmrrowp1
2215 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2216 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2217 0, // sub_dmr1_then_sub_dmrrow0
2218 0, // sub_dmr1_then_sub_dmrrow1
2219 0, // sub_dmr1_then_sub_dmrrowp0
2220 0, // sub_dmr1_then_sub_dmrrowp1
2221 0, // sub_dmr1_then_sub_wacc_hi
2222 0, // sub_dmr1_then_sub_wacc_lo
2223 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2224 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2225 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2226 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2227 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2228 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2229 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2230 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2231 0, // sub_gp8_x1_then_sub_32
2232 },
2233 { // GPRC
2234 0, // sub_32
2235 0, // sub_32_hi_phony
2236 0, // sub_64
2237 0, // sub_64_hi_phony
2238 0, // sub_dmr0
2239 0, // sub_dmr1
2240 0, // sub_dmrrow0
2241 0, // sub_dmrrow1
2242 0, // sub_dmrrowp0
2243 0, // sub_dmrrowp1
2244 0, // sub_eq
2245 0, // sub_fp0
2246 0, // sub_fp1
2247 0, // sub_gp8_x0
2248 0, // sub_gp8_x1
2249 0, // sub_gt
2250 0, // sub_lt
2251 0, // sub_pair0
2252 0, // sub_pair1
2253 0, // sub_un
2254 0, // sub_vsx0
2255 0, // sub_vsx1
2256 0, // sub_wacc_hi
2257 0, // sub_wacc_lo
2258 0, // sub_vsx1_then_sub_64
2259 0, // sub_vsx1_then_sub_64_hi_phony
2260 0, // sub_pair1_then_sub_64
2261 0, // sub_pair1_then_sub_64_hi_phony
2262 0, // sub_pair1_then_sub_vsx0
2263 0, // sub_pair1_then_sub_vsx1
2264 0, // sub_pair1_then_sub_vsx1_then_sub_64
2265 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2266 0, // sub_dmrrowp1_then_sub_dmrrow0
2267 0, // sub_dmrrowp1_then_sub_dmrrow1
2268 0, // sub_wacc_hi_then_sub_dmrrow0
2269 0, // sub_wacc_hi_then_sub_dmrrow1
2270 0, // sub_wacc_hi_then_sub_dmrrowp0
2271 0, // sub_wacc_hi_then_sub_dmrrowp1
2272 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2273 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2274 0, // sub_dmr1_then_sub_dmrrow0
2275 0, // sub_dmr1_then_sub_dmrrow1
2276 0, // sub_dmr1_then_sub_dmrrowp0
2277 0, // sub_dmr1_then_sub_dmrrowp1
2278 0, // sub_dmr1_then_sub_wacc_hi
2279 0, // sub_dmr1_then_sub_wacc_lo
2280 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2281 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2282 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2283 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2284 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2285 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2286 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2287 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2288 0, // sub_gp8_x1_then_sub_32
2289 },
2290 { // GPRC_NOR0
2291 0, // sub_32
2292 0, // sub_32_hi_phony
2293 0, // sub_64
2294 0, // sub_64_hi_phony
2295 0, // sub_dmr0
2296 0, // sub_dmr1
2297 0, // sub_dmrrow0
2298 0, // sub_dmrrow1
2299 0, // sub_dmrrowp0
2300 0, // sub_dmrrowp1
2301 0, // sub_eq
2302 0, // sub_fp0
2303 0, // sub_fp1
2304 0, // sub_gp8_x0
2305 0, // sub_gp8_x1
2306 0, // sub_gt
2307 0, // sub_lt
2308 0, // sub_pair0
2309 0, // sub_pair1
2310 0, // sub_un
2311 0, // sub_vsx0
2312 0, // sub_vsx1
2313 0, // sub_wacc_hi
2314 0, // sub_wacc_lo
2315 0, // sub_vsx1_then_sub_64
2316 0, // sub_vsx1_then_sub_64_hi_phony
2317 0, // sub_pair1_then_sub_64
2318 0, // sub_pair1_then_sub_64_hi_phony
2319 0, // sub_pair1_then_sub_vsx0
2320 0, // sub_pair1_then_sub_vsx1
2321 0, // sub_pair1_then_sub_vsx1_then_sub_64
2322 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2323 0, // sub_dmrrowp1_then_sub_dmrrow0
2324 0, // sub_dmrrowp1_then_sub_dmrrow1
2325 0, // sub_wacc_hi_then_sub_dmrrow0
2326 0, // sub_wacc_hi_then_sub_dmrrow1
2327 0, // sub_wacc_hi_then_sub_dmrrowp0
2328 0, // sub_wacc_hi_then_sub_dmrrowp1
2329 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2330 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2331 0, // sub_dmr1_then_sub_dmrrow0
2332 0, // sub_dmr1_then_sub_dmrrow1
2333 0, // sub_dmr1_then_sub_dmrrowp0
2334 0, // sub_dmr1_then_sub_dmrrowp1
2335 0, // sub_dmr1_then_sub_wacc_hi
2336 0, // sub_dmr1_then_sub_wacc_lo
2337 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2338 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2339 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2340 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2341 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2342 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2343 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2344 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2345 0, // sub_gp8_x1_then_sub_32
2346 },
2347 { // GPRC_and_GPRC_NOR0
2348 0, // sub_32
2349 0, // sub_32_hi_phony
2350 0, // sub_64
2351 0, // sub_64_hi_phony
2352 0, // sub_dmr0
2353 0, // sub_dmr1
2354 0, // sub_dmrrow0
2355 0, // sub_dmrrow1
2356 0, // sub_dmrrowp0
2357 0, // sub_dmrrowp1
2358 0, // sub_eq
2359 0, // sub_fp0
2360 0, // sub_fp1
2361 0, // sub_gp8_x0
2362 0, // sub_gp8_x1
2363 0, // sub_gt
2364 0, // sub_lt
2365 0, // sub_pair0
2366 0, // sub_pair1
2367 0, // sub_un
2368 0, // sub_vsx0
2369 0, // sub_vsx1
2370 0, // sub_wacc_hi
2371 0, // sub_wacc_lo
2372 0, // sub_vsx1_then_sub_64
2373 0, // sub_vsx1_then_sub_64_hi_phony
2374 0, // sub_pair1_then_sub_64
2375 0, // sub_pair1_then_sub_64_hi_phony
2376 0, // sub_pair1_then_sub_vsx0
2377 0, // sub_pair1_then_sub_vsx1
2378 0, // sub_pair1_then_sub_vsx1_then_sub_64
2379 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2380 0, // sub_dmrrowp1_then_sub_dmrrow0
2381 0, // sub_dmrrowp1_then_sub_dmrrow1
2382 0, // sub_wacc_hi_then_sub_dmrrow0
2383 0, // sub_wacc_hi_then_sub_dmrrow1
2384 0, // sub_wacc_hi_then_sub_dmrrowp0
2385 0, // sub_wacc_hi_then_sub_dmrrowp1
2386 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2387 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2388 0, // sub_dmr1_then_sub_dmrrow0
2389 0, // sub_dmr1_then_sub_dmrrow1
2390 0, // sub_dmr1_then_sub_dmrrowp0
2391 0, // sub_dmr1_then_sub_dmrrowp1
2392 0, // sub_dmr1_then_sub_wacc_hi
2393 0, // sub_dmr1_then_sub_wacc_lo
2394 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2395 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2396 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2397 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2398 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2399 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2400 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2401 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2402 0, // sub_gp8_x1_then_sub_32
2403 },
2404 { // CRBITRC
2405 0, // sub_32
2406 0, // sub_32_hi_phony
2407 0, // sub_64
2408 0, // sub_64_hi_phony
2409 0, // sub_dmr0
2410 0, // sub_dmr1
2411 0, // sub_dmrrow0
2412 0, // sub_dmrrow1
2413 0, // sub_dmrrowp0
2414 0, // sub_dmrrowp1
2415 0, // sub_eq
2416 0, // sub_fp0
2417 0, // sub_fp1
2418 0, // sub_gp8_x0
2419 0, // sub_gp8_x1
2420 0, // sub_gt
2421 0, // sub_lt
2422 0, // sub_pair0
2423 0, // sub_pair1
2424 0, // sub_un
2425 0, // sub_vsx0
2426 0, // sub_vsx1
2427 0, // sub_wacc_hi
2428 0, // sub_wacc_lo
2429 0, // sub_vsx1_then_sub_64
2430 0, // sub_vsx1_then_sub_64_hi_phony
2431 0, // sub_pair1_then_sub_64
2432 0, // sub_pair1_then_sub_64_hi_phony
2433 0, // sub_pair1_then_sub_vsx0
2434 0, // sub_pair1_then_sub_vsx1
2435 0, // sub_pair1_then_sub_vsx1_then_sub_64
2436 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2437 0, // sub_dmrrowp1_then_sub_dmrrow0
2438 0, // sub_dmrrowp1_then_sub_dmrrow1
2439 0, // sub_wacc_hi_then_sub_dmrrow0
2440 0, // sub_wacc_hi_then_sub_dmrrow1
2441 0, // sub_wacc_hi_then_sub_dmrrowp0
2442 0, // sub_wacc_hi_then_sub_dmrrowp1
2443 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2444 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2445 0, // sub_dmr1_then_sub_dmrrow0
2446 0, // sub_dmr1_then_sub_dmrrow1
2447 0, // sub_dmr1_then_sub_dmrrowp0
2448 0, // sub_dmr1_then_sub_dmrrowp1
2449 0, // sub_dmr1_then_sub_wacc_hi
2450 0, // sub_dmr1_then_sub_wacc_lo
2451 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2452 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2453 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2454 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2455 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2456 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2457 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2458 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2459 0, // sub_gp8_x1_then_sub_32
2460 },
2461 { // F4RC
2462 0, // sub_32
2463 0, // sub_32_hi_phony
2464 0, // sub_64
2465 0, // sub_64_hi_phony
2466 0, // sub_dmr0
2467 0, // sub_dmr1
2468 0, // sub_dmrrow0
2469 0, // sub_dmrrow1
2470 0, // sub_dmrrowp0
2471 0, // sub_dmrrowp1
2472 0, // sub_eq
2473 0, // sub_fp0
2474 0, // sub_fp1
2475 0, // sub_gp8_x0
2476 0, // sub_gp8_x1
2477 0, // sub_gt
2478 0, // sub_lt
2479 0, // sub_pair0
2480 0, // sub_pair1
2481 0, // sub_un
2482 0, // sub_vsx0
2483 0, // sub_vsx1
2484 0, // sub_wacc_hi
2485 0, // sub_wacc_lo
2486 0, // sub_vsx1_then_sub_64
2487 0, // sub_vsx1_then_sub_64_hi_phony
2488 0, // sub_pair1_then_sub_64
2489 0, // sub_pair1_then_sub_64_hi_phony
2490 0, // sub_pair1_then_sub_vsx0
2491 0, // sub_pair1_then_sub_vsx1
2492 0, // sub_pair1_then_sub_vsx1_then_sub_64
2493 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2494 0, // sub_dmrrowp1_then_sub_dmrrow0
2495 0, // sub_dmrrowp1_then_sub_dmrrow1
2496 0, // sub_wacc_hi_then_sub_dmrrow0
2497 0, // sub_wacc_hi_then_sub_dmrrow1
2498 0, // sub_wacc_hi_then_sub_dmrrowp0
2499 0, // sub_wacc_hi_then_sub_dmrrowp1
2500 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2501 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2502 0, // sub_dmr1_then_sub_dmrrow0
2503 0, // sub_dmr1_then_sub_dmrrow1
2504 0, // sub_dmr1_then_sub_dmrrowp0
2505 0, // sub_dmr1_then_sub_dmrrowp1
2506 0, // sub_dmr1_then_sub_wacc_hi
2507 0, // sub_dmr1_then_sub_wacc_lo
2508 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2509 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2510 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2511 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2512 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2513 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2514 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2515 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2516 0, // sub_gp8_x1_then_sub_32
2517 },
2518 { // GPRC32
2519 0, // sub_32
2520 0, // sub_32_hi_phony
2521 0, // sub_64
2522 0, // sub_64_hi_phony
2523 0, // sub_dmr0
2524 0, // sub_dmr1
2525 0, // sub_dmrrow0
2526 0, // sub_dmrrow1
2527 0, // sub_dmrrowp0
2528 0, // sub_dmrrowp1
2529 0, // sub_eq
2530 0, // sub_fp0
2531 0, // sub_fp1
2532 0, // sub_gp8_x0
2533 0, // sub_gp8_x1
2534 0, // sub_gt
2535 0, // sub_lt
2536 0, // sub_pair0
2537 0, // sub_pair1
2538 0, // sub_un
2539 0, // sub_vsx0
2540 0, // sub_vsx1
2541 0, // sub_wacc_hi
2542 0, // sub_wacc_lo
2543 0, // sub_vsx1_then_sub_64
2544 0, // sub_vsx1_then_sub_64_hi_phony
2545 0, // sub_pair1_then_sub_64
2546 0, // sub_pair1_then_sub_64_hi_phony
2547 0, // sub_pair1_then_sub_vsx0
2548 0, // sub_pair1_then_sub_vsx1
2549 0, // sub_pair1_then_sub_vsx1_then_sub_64
2550 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2551 0, // sub_dmrrowp1_then_sub_dmrrow0
2552 0, // sub_dmrrowp1_then_sub_dmrrow1
2553 0, // sub_wacc_hi_then_sub_dmrrow0
2554 0, // sub_wacc_hi_then_sub_dmrrow1
2555 0, // sub_wacc_hi_then_sub_dmrrowp0
2556 0, // sub_wacc_hi_then_sub_dmrrowp1
2557 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2558 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2559 0, // sub_dmr1_then_sub_dmrrow0
2560 0, // sub_dmr1_then_sub_dmrrow1
2561 0, // sub_dmr1_then_sub_dmrrowp0
2562 0, // sub_dmr1_then_sub_dmrrowp1
2563 0, // sub_dmr1_then_sub_wacc_hi
2564 0, // sub_dmr1_then_sub_wacc_lo
2565 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2566 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2567 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2568 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2569 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2570 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2571 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2572 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2573 0, // sub_gp8_x1_then_sub_32
2574 },
2575 { // CRRC
2576 0, // sub_32
2577 0, // sub_32_hi_phony
2578 0, // sub_64
2579 0, // sub_64_hi_phony
2580 0, // sub_dmr0
2581 0, // sub_dmr1
2582 0, // sub_dmrrow0
2583 0, // sub_dmrrow1
2584 0, // sub_dmrrowp0
2585 0, // sub_dmrrowp1
2586 8, // sub_eq -> CRRC
2587 0, // sub_fp0
2588 0, // sub_fp1
2589 0, // sub_gp8_x0
2590 0, // sub_gp8_x1
2591 8, // sub_gt -> CRRC
2592 8, // sub_lt -> CRRC
2593 0, // sub_pair0
2594 0, // sub_pair1
2595 8, // sub_un -> CRRC
2596 0, // sub_vsx0
2597 0, // sub_vsx1
2598 0, // sub_wacc_hi
2599 0, // sub_wacc_lo
2600 0, // sub_vsx1_then_sub_64
2601 0, // sub_vsx1_then_sub_64_hi_phony
2602 0, // sub_pair1_then_sub_64
2603 0, // sub_pair1_then_sub_64_hi_phony
2604 0, // sub_pair1_then_sub_vsx0
2605 0, // sub_pair1_then_sub_vsx1
2606 0, // sub_pair1_then_sub_vsx1_then_sub_64
2607 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2608 0, // sub_dmrrowp1_then_sub_dmrrow0
2609 0, // sub_dmrrowp1_then_sub_dmrrow1
2610 0, // sub_wacc_hi_then_sub_dmrrow0
2611 0, // sub_wacc_hi_then_sub_dmrrow1
2612 0, // sub_wacc_hi_then_sub_dmrrowp0
2613 0, // sub_wacc_hi_then_sub_dmrrowp1
2614 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2615 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2616 0, // sub_dmr1_then_sub_dmrrow0
2617 0, // sub_dmr1_then_sub_dmrrow1
2618 0, // sub_dmr1_then_sub_dmrrowp0
2619 0, // sub_dmr1_then_sub_dmrrowp1
2620 0, // sub_dmr1_then_sub_wacc_hi
2621 0, // sub_dmr1_then_sub_wacc_lo
2622 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2623 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2624 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2625 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2626 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2627 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2628 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2629 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2630 0, // sub_gp8_x1_then_sub_32
2631 },
2632 { // CARRYRC
2633 0, // sub_32
2634 0, // sub_32_hi_phony
2635 0, // sub_64
2636 0, // sub_64_hi_phony
2637 0, // sub_dmr0
2638 0, // sub_dmr1
2639 0, // sub_dmrrow0
2640 0, // sub_dmrrow1
2641 0, // sub_dmrrowp0
2642 0, // sub_dmrrowp1
2643 0, // sub_eq
2644 0, // sub_fp0
2645 0, // sub_fp1
2646 0, // sub_gp8_x0
2647 0, // sub_gp8_x1
2648 0, // sub_gt
2649 0, // sub_lt
2650 0, // sub_pair0
2651 0, // sub_pair1
2652 0, // sub_un
2653 0, // sub_vsx0
2654 0, // sub_vsx1
2655 0, // sub_wacc_hi
2656 0, // sub_wacc_lo
2657 0, // sub_vsx1_then_sub_64
2658 0, // sub_vsx1_then_sub_64_hi_phony
2659 0, // sub_pair1_then_sub_64
2660 0, // sub_pair1_then_sub_64_hi_phony
2661 0, // sub_pair1_then_sub_vsx0
2662 0, // sub_pair1_then_sub_vsx1
2663 0, // sub_pair1_then_sub_vsx1_then_sub_64
2664 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2665 0, // sub_dmrrowp1_then_sub_dmrrow0
2666 0, // sub_dmrrowp1_then_sub_dmrrow1
2667 0, // sub_wacc_hi_then_sub_dmrrow0
2668 0, // sub_wacc_hi_then_sub_dmrrow1
2669 0, // sub_wacc_hi_then_sub_dmrrowp0
2670 0, // sub_wacc_hi_then_sub_dmrrowp1
2671 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2672 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2673 0, // sub_dmr1_then_sub_dmrrow0
2674 0, // sub_dmr1_then_sub_dmrrow1
2675 0, // sub_dmr1_then_sub_dmrrowp0
2676 0, // sub_dmr1_then_sub_dmrrowp1
2677 0, // sub_dmr1_then_sub_wacc_hi
2678 0, // sub_dmr1_then_sub_wacc_lo
2679 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2680 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2681 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2682 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2683 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2684 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2685 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2686 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2687 0, // sub_gp8_x1_then_sub_32
2688 },
2689 { // CTRRC
2690 0, // sub_32
2691 0, // sub_32_hi_phony
2692 0, // sub_64
2693 0, // sub_64_hi_phony
2694 0, // sub_dmr0
2695 0, // sub_dmr1
2696 0, // sub_dmrrow0
2697 0, // sub_dmrrow1
2698 0, // sub_dmrrowp0
2699 0, // sub_dmrrowp1
2700 0, // sub_eq
2701 0, // sub_fp0
2702 0, // sub_fp1
2703 0, // sub_gp8_x0
2704 0, // sub_gp8_x1
2705 0, // sub_gt
2706 0, // sub_lt
2707 0, // sub_pair0
2708 0, // sub_pair1
2709 0, // sub_un
2710 0, // sub_vsx0
2711 0, // sub_vsx1
2712 0, // sub_wacc_hi
2713 0, // sub_wacc_lo
2714 0, // sub_vsx1_then_sub_64
2715 0, // sub_vsx1_then_sub_64_hi_phony
2716 0, // sub_pair1_then_sub_64
2717 0, // sub_pair1_then_sub_64_hi_phony
2718 0, // sub_pair1_then_sub_vsx0
2719 0, // sub_pair1_then_sub_vsx1
2720 0, // sub_pair1_then_sub_vsx1_then_sub_64
2721 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2722 0, // sub_dmrrowp1_then_sub_dmrrow0
2723 0, // sub_dmrrowp1_then_sub_dmrrow1
2724 0, // sub_wacc_hi_then_sub_dmrrow0
2725 0, // sub_wacc_hi_then_sub_dmrrow1
2726 0, // sub_wacc_hi_then_sub_dmrrowp0
2727 0, // sub_wacc_hi_then_sub_dmrrowp1
2728 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2729 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2730 0, // sub_dmr1_then_sub_dmrrow0
2731 0, // sub_dmr1_then_sub_dmrrow1
2732 0, // sub_dmr1_then_sub_dmrrowp0
2733 0, // sub_dmr1_then_sub_dmrrowp1
2734 0, // sub_dmr1_then_sub_wacc_hi
2735 0, // sub_dmr1_then_sub_wacc_lo
2736 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2737 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2738 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2739 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2740 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2741 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2742 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2743 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2744 0, // sub_gp8_x1_then_sub_32
2745 },
2746 { // LRRC
2747 0, // sub_32
2748 0, // sub_32_hi_phony
2749 0, // sub_64
2750 0, // sub_64_hi_phony
2751 0, // sub_dmr0
2752 0, // sub_dmr1
2753 0, // sub_dmrrow0
2754 0, // sub_dmrrow1
2755 0, // sub_dmrrowp0
2756 0, // sub_dmrrowp1
2757 0, // sub_eq
2758 0, // sub_fp0
2759 0, // sub_fp1
2760 0, // sub_gp8_x0
2761 0, // sub_gp8_x1
2762 0, // sub_gt
2763 0, // sub_lt
2764 0, // sub_pair0
2765 0, // sub_pair1
2766 0, // sub_un
2767 0, // sub_vsx0
2768 0, // sub_vsx1
2769 0, // sub_wacc_hi
2770 0, // sub_wacc_lo
2771 0, // sub_vsx1_then_sub_64
2772 0, // sub_vsx1_then_sub_64_hi_phony
2773 0, // sub_pair1_then_sub_64
2774 0, // sub_pair1_then_sub_64_hi_phony
2775 0, // sub_pair1_then_sub_vsx0
2776 0, // sub_pair1_then_sub_vsx1
2777 0, // sub_pair1_then_sub_vsx1_then_sub_64
2778 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2779 0, // sub_dmrrowp1_then_sub_dmrrow0
2780 0, // sub_dmrrowp1_then_sub_dmrrow1
2781 0, // sub_wacc_hi_then_sub_dmrrow0
2782 0, // sub_wacc_hi_then_sub_dmrrow1
2783 0, // sub_wacc_hi_then_sub_dmrrowp0
2784 0, // sub_wacc_hi_then_sub_dmrrowp1
2785 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2786 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2787 0, // sub_dmr1_then_sub_dmrrow0
2788 0, // sub_dmr1_then_sub_dmrrow1
2789 0, // sub_dmr1_then_sub_dmrrowp0
2790 0, // sub_dmr1_then_sub_dmrrowp1
2791 0, // sub_dmr1_then_sub_wacc_hi
2792 0, // sub_dmr1_then_sub_wacc_lo
2793 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2794 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2795 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2796 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2797 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2798 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2799 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2800 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2801 0, // sub_gp8_x1_then_sub_32
2802 },
2803 { // VRSAVERC
2804 0, // sub_32
2805 0, // sub_32_hi_phony
2806 0, // sub_64
2807 0, // sub_64_hi_phony
2808 0, // sub_dmr0
2809 0, // sub_dmr1
2810 0, // sub_dmrrow0
2811 0, // sub_dmrrow1
2812 0, // sub_dmrrowp0
2813 0, // sub_dmrrowp1
2814 0, // sub_eq
2815 0, // sub_fp0
2816 0, // sub_fp1
2817 0, // sub_gp8_x0
2818 0, // sub_gp8_x1
2819 0, // sub_gt
2820 0, // sub_lt
2821 0, // sub_pair0
2822 0, // sub_pair1
2823 0, // sub_un
2824 0, // sub_vsx0
2825 0, // sub_vsx1
2826 0, // sub_wacc_hi
2827 0, // sub_wacc_lo
2828 0, // sub_vsx1_then_sub_64
2829 0, // sub_vsx1_then_sub_64_hi_phony
2830 0, // sub_pair1_then_sub_64
2831 0, // sub_pair1_then_sub_64_hi_phony
2832 0, // sub_pair1_then_sub_vsx0
2833 0, // sub_pair1_then_sub_vsx1
2834 0, // sub_pair1_then_sub_vsx1_then_sub_64
2835 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2836 0, // sub_dmrrowp1_then_sub_dmrrow0
2837 0, // sub_dmrrowp1_then_sub_dmrrow1
2838 0, // sub_wacc_hi_then_sub_dmrrow0
2839 0, // sub_wacc_hi_then_sub_dmrrow1
2840 0, // sub_wacc_hi_then_sub_dmrrowp0
2841 0, // sub_wacc_hi_then_sub_dmrrowp1
2842 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2843 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2844 0, // sub_dmr1_then_sub_dmrrow0
2845 0, // sub_dmr1_then_sub_dmrrow1
2846 0, // sub_dmr1_then_sub_dmrrowp0
2847 0, // sub_dmr1_then_sub_dmrrowp1
2848 0, // sub_dmr1_then_sub_wacc_hi
2849 0, // sub_dmr1_then_sub_wacc_lo
2850 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2851 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2852 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2853 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2854 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2855 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2856 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2857 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2858 0, // sub_gp8_x1_then_sub_32
2859 },
2860 { // SPILLTOVSRRC
2861 15, // sub_32 -> G8RC
2862 0, // sub_32_hi_phony
2863 0, // sub_64
2864 0, // sub_64_hi_phony
2865 0, // sub_dmr0
2866 0, // sub_dmr1
2867 0, // sub_dmrrow0
2868 0, // sub_dmrrow1
2869 0, // sub_dmrrowp0
2870 0, // sub_dmrrowp1
2871 0, // sub_eq
2872 0, // sub_fp0
2873 0, // sub_fp1
2874 0, // sub_gp8_x0
2875 0, // sub_gp8_x1
2876 0, // sub_gt
2877 0, // sub_lt
2878 0, // sub_pair0
2879 0, // sub_pair1
2880 0, // sub_un
2881 0, // sub_vsx0
2882 0, // sub_vsx1
2883 0, // sub_wacc_hi
2884 0, // sub_wacc_lo
2885 0, // sub_vsx1_then_sub_64
2886 0, // sub_vsx1_then_sub_64_hi_phony
2887 0, // sub_pair1_then_sub_64
2888 0, // sub_pair1_then_sub_64_hi_phony
2889 0, // sub_pair1_then_sub_vsx0
2890 0, // sub_pair1_then_sub_vsx1
2891 0, // sub_pair1_then_sub_vsx1_then_sub_64
2892 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2893 0, // sub_dmrrowp1_then_sub_dmrrow0
2894 0, // sub_dmrrowp1_then_sub_dmrrow1
2895 0, // sub_wacc_hi_then_sub_dmrrow0
2896 0, // sub_wacc_hi_then_sub_dmrrow1
2897 0, // sub_wacc_hi_then_sub_dmrrowp0
2898 0, // sub_wacc_hi_then_sub_dmrrowp1
2899 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2900 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2901 0, // sub_dmr1_then_sub_dmrrow0
2902 0, // sub_dmr1_then_sub_dmrrow1
2903 0, // sub_dmr1_then_sub_dmrrowp0
2904 0, // sub_dmr1_then_sub_dmrrowp1
2905 0, // sub_dmr1_then_sub_wacc_hi
2906 0, // sub_dmr1_then_sub_wacc_lo
2907 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2908 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2909 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2910 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2911 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2912 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2913 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2914 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2915 0, // sub_gp8_x1_then_sub_32
2916 },
2917 { // VSFRC
2918 0, // sub_32
2919 0, // sub_32_hi_phony
2920 0, // sub_64
2921 0, // sub_64_hi_phony
2922 0, // sub_dmr0
2923 0, // sub_dmr1
2924 0, // sub_dmrrow0
2925 0, // sub_dmrrow1
2926 0, // sub_dmrrowp0
2927 0, // sub_dmrrowp1
2928 0, // sub_eq
2929 0, // sub_fp0
2930 0, // sub_fp1
2931 0, // sub_gp8_x0
2932 0, // sub_gp8_x1
2933 0, // sub_gt
2934 0, // sub_lt
2935 0, // sub_pair0
2936 0, // sub_pair1
2937 0, // sub_un
2938 0, // sub_vsx0
2939 0, // sub_vsx1
2940 0, // sub_wacc_hi
2941 0, // sub_wacc_lo
2942 0, // sub_vsx1_then_sub_64
2943 0, // sub_vsx1_then_sub_64_hi_phony
2944 0, // sub_pair1_then_sub_64
2945 0, // sub_pair1_then_sub_64_hi_phony
2946 0, // sub_pair1_then_sub_vsx0
2947 0, // sub_pair1_then_sub_vsx1
2948 0, // sub_pair1_then_sub_vsx1_then_sub_64
2949 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
2950 0, // sub_dmrrowp1_then_sub_dmrrow0
2951 0, // sub_dmrrowp1_then_sub_dmrrow1
2952 0, // sub_wacc_hi_then_sub_dmrrow0
2953 0, // sub_wacc_hi_then_sub_dmrrow1
2954 0, // sub_wacc_hi_then_sub_dmrrowp0
2955 0, // sub_wacc_hi_then_sub_dmrrowp1
2956 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2957 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2958 0, // sub_dmr1_then_sub_dmrrow0
2959 0, // sub_dmr1_then_sub_dmrrow1
2960 0, // sub_dmr1_then_sub_dmrrowp0
2961 0, // sub_dmr1_then_sub_dmrrowp1
2962 0, // sub_dmr1_then_sub_wacc_hi
2963 0, // sub_dmr1_then_sub_wacc_lo
2964 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
2965 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
2966 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
2967 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
2968 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
2969 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
2970 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
2971 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
2972 0, // sub_gp8_x1_then_sub_32
2973 },
2974 { // G8RC
2975 15, // sub_32 -> G8RC
2976 0, // sub_32_hi_phony
2977 0, // sub_64
2978 0, // sub_64_hi_phony
2979 0, // sub_dmr0
2980 0, // sub_dmr1
2981 0, // sub_dmrrow0
2982 0, // sub_dmrrow1
2983 0, // sub_dmrrowp0
2984 0, // sub_dmrrowp1
2985 0, // sub_eq
2986 0, // sub_fp0
2987 0, // sub_fp1
2988 0, // sub_gp8_x0
2989 0, // sub_gp8_x1
2990 0, // sub_gt
2991 0, // sub_lt
2992 0, // sub_pair0
2993 0, // sub_pair1
2994 0, // sub_un
2995 0, // sub_vsx0
2996 0, // sub_vsx1
2997 0, // sub_wacc_hi
2998 0, // sub_wacc_lo
2999 0, // sub_vsx1_then_sub_64
3000 0, // sub_vsx1_then_sub_64_hi_phony
3001 0, // sub_pair1_then_sub_64
3002 0, // sub_pair1_then_sub_64_hi_phony
3003 0, // sub_pair1_then_sub_vsx0
3004 0, // sub_pair1_then_sub_vsx1
3005 0, // sub_pair1_then_sub_vsx1_then_sub_64
3006 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3007 0, // sub_dmrrowp1_then_sub_dmrrow0
3008 0, // sub_dmrrowp1_then_sub_dmrrow1
3009 0, // sub_wacc_hi_then_sub_dmrrow0
3010 0, // sub_wacc_hi_then_sub_dmrrow1
3011 0, // sub_wacc_hi_then_sub_dmrrowp0
3012 0, // sub_wacc_hi_then_sub_dmrrowp1
3013 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3014 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3015 0, // sub_dmr1_then_sub_dmrrow0
3016 0, // sub_dmr1_then_sub_dmrrow1
3017 0, // sub_dmr1_then_sub_dmrrowp0
3018 0, // sub_dmr1_then_sub_dmrrowp1
3019 0, // sub_dmr1_then_sub_wacc_hi
3020 0, // sub_dmr1_then_sub_wacc_lo
3021 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3022 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3023 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3024 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3025 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3026 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3027 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3028 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3029 0, // sub_gp8_x1_then_sub_32
3030 },
3031 { // G8RC_NOX0
3032 16, // sub_32 -> G8RC_NOX0
3033 0, // sub_32_hi_phony
3034 0, // sub_64
3035 0, // sub_64_hi_phony
3036 0, // sub_dmr0
3037 0, // sub_dmr1
3038 0, // sub_dmrrow0
3039 0, // sub_dmrrow1
3040 0, // sub_dmrrowp0
3041 0, // sub_dmrrowp1
3042 0, // sub_eq
3043 0, // sub_fp0
3044 0, // sub_fp1
3045 0, // sub_gp8_x0
3046 0, // sub_gp8_x1
3047 0, // sub_gt
3048 0, // sub_lt
3049 0, // sub_pair0
3050 0, // sub_pair1
3051 0, // sub_un
3052 0, // sub_vsx0
3053 0, // sub_vsx1
3054 0, // sub_wacc_hi
3055 0, // sub_wacc_lo
3056 0, // sub_vsx1_then_sub_64
3057 0, // sub_vsx1_then_sub_64_hi_phony
3058 0, // sub_pair1_then_sub_64
3059 0, // sub_pair1_then_sub_64_hi_phony
3060 0, // sub_pair1_then_sub_vsx0
3061 0, // sub_pair1_then_sub_vsx1
3062 0, // sub_pair1_then_sub_vsx1_then_sub_64
3063 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3064 0, // sub_dmrrowp1_then_sub_dmrrow0
3065 0, // sub_dmrrowp1_then_sub_dmrrow1
3066 0, // sub_wacc_hi_then_sub_dmrrow0
3067 0, // sub_wacc_hi_then_sub_dmrrow1
3068 0, // sub_wacc_hi_then_sub_dmrrowp0
3069 0, // sub_wacc_hi_then_sub_dmrrowp1
3070 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3071 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3072 0, // sub_dmr1_then_sub_dmrrow0
3073 0, // sub_dmr1_then_sub_dmrrow1
3074 0, // sub_dmr1_then_sub_dmrrowp0
3075 0, // sub_dmr1_then_sub_dmrrowp1
3076 0, // sub_dmr1_then_sub_wacc_hi
3077 0, // sub_dmr1_then_sub_wacc_lo
3078 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3079 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3080 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3081 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3082 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3083 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3084 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3085 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3086 0, // sub_gp8_x1_then_sub_32
3087 },
3088 { // SPILLTOVSRRC_and_VSFRC
3089 0, // sub_32
3090 0, // sub_32_hi_phony
3091 0, // sub_64
3092 0, // sub_64_hi_phony
3093 0, // sub_dmr0
3094 0, // sub_dmr1
3095 0, // sub_dmrrow0
3096 0, // sub_dmrrow1
3097 0, // sub_dmrrowp0
3098 0, // sub_dmrrowp1
3099 0, // sub_eq
3100 0, // sub_fp0
3101 0, // sub_fp1
3102 0, // sub_gp8_x0
3103 0, // sub_gp8_x1
3104 0, // sub_gt
3105 0, // sub_lt
3106 0, // sub_pair0
3107 0, // sub_pair1
3108 0, // sub_un
3109 0, // sub_vsx0
3110 0, // sub_vsx1
3111 0, // sub_wacc_hi
3112 0, // sub_wacc_lo
3113 0, // sub_vsx1_then_sub_64
3114 0, // sub_vsx1_then_sub_64_hi_phony
3115 0, // sub_pair1_then_sub_64
3116 0, // sub_pair1_then_sub_64_hi_phony
3117 0, // sub_pair1_then_sub_vsx0
3118 0, // sub_pair1_then_sub_vsx1
3119 0, // sub_pair1_then_sub_vsx1_then_sub_64
3120 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3121 0, // sub_dmrrowp1_then_sub_dmrrow0
3122 0, // sub_dmrrowp1_then_sub_dmrrow1
3123 0, // sub_wacc_hi_then_sub_dmrrow0
3124 0, // sub_wacc_hi_then_sub_dmrrow1
3125 0, // sub_wacc_hi_then_sub_dmrrowp0
3126 0, // sub_wacc_hi_then_sub_dmrrowp1
3127 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3128 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3129 0, // sub_dmr1_then_sub_dmrrow0
3130 0, // sub_dmr1_then_sub_dmrrow1
3131 0, // sub_dmr1_then_sub_dmrrowp0
3132 0, // sub_dmr1_then_sub_dmrrowp1
3133 0, // sub_dmr1_then_sub_wacc_hi
3134 0, // sub_dmr1_then_sub_wacc_lo
3135 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3136 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3137 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3138 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3139 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3140 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3141 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3142 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3143 0, // sub_gp8_x1_then_sub_32
3144 },
3145 { // G8RC_and_G8RC_NOX0
3146 18, // sub_32 -> G8RC_and_G8RC_NOX0
3147 0, // sub_32_hi_phony
3148 0, // sub_64
3149 0, // sub_64_hi_phony
3150 0, // sub_dmr0
3151 0, // sub_dmr1
3152 0, // sub_dmrrow0
3153 0, // sub_dmrrow1
3154 0, // sub_dmrrowp0
3155 0, // sub_dmrrowp1
3156 0, // sub_eq
3157 0, // sub_fp0
3158 0, // sub_fp1
3159 0, // sub_gp8_x0
3160 0, // sub_gp8_x1
3161 0, // sub_gt
3162 0, // sub_lt
3163 0, // sub_pair0
3164 0, // sub_pair1
3165 0, // sub_un
3166 0, // sub_vsx0
3167 0, // sub_vsx1
3168 0, // sub_wacc_hi
3169 0, // sub_wacc_lo
3170 0, // sub_vsx1_then_sub_64
3171 0, // sub_vsx1_then_sub_64_hi_phony
3172 0, // sub_pair1_then_sub_64
3173 0, // sub_pair1_then_sub_64_hi_phony
3174 0, // sub_pair1_then_sub_vsx0
3175 0, // sub_pair1_then_sub_vsx1
3176 0, // sub_pair1_then_sub_vsx1_then_sub_64
3177 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3178 0, // sub_dmrrowp1_then_sub_dmrrow0
3179 0, // sub_dmrrowp1_then_sub_dmrrow1
3180 0, // sub_wacc_hi_then_sub_dmrrow0
3181 0, // sub_wacc_hi_then_sub_dmrrow1
3182 0, // sub_wacc_hi_then_sub_dmrrowp0
3183 0, // sub_wacc_hi_then_sub_dmrrowp1
3184 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3185 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3186 0, // sub_dmr1_then_sub_dmrrow0
3187 0, // sub_dmr1_then_sub_dmrrow1
3188 0, // sub_dmr1_then_sub_dmrrowp0
3189 0, // sub_dmr1_then_sub_dmrrowp1
3190 0, // sub_dmr1_then_sub_wacc_hi
3191 0, // sub_dmr1_then_sub_wacc_lo
3192 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3193 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3194 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3195 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3196 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3197 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3198 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3199 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3200 0, // sub_gp8_x1_then_sub_32
3201 },
3202 { // F8RC
3203 0, // sub_32
3204 0, // sub_32_hi_phony
3205 0, // sub_64
3206 0, // sub_64_hi_phony
3207 0, // sub_dmr0
3208 0, // sub_dmr1
3209 0, // sub_dmrrow0
3210 0, // sub_dmrrow1
3211 0, // sub_dmrrowp0
3212 0, // sub_dmrrowp1
3213 0, // sub_eq
3214 0, // sub_fp0
3215 0, // sub_fp1
3216 0, // sub_gp8_x0
3217 0, // sub_gp8_x1
3218 0, // sub_gt
3219 0, // sub_lt
3220 0, // sub_pair0
3221 0, // sub_pair1
3222 0, // sub_un
3223 0, // sub_vsx0
3224 0, // sub_vsx1
3225 0, // sub_wacc_hi
3226 0, // sub_wacc_lo
3227 0, // sub_vsx1_then_sub_64
3228 0, // sub_vsx1_then_sub_64_hi_phony
3229 0, // sub_pair1_then_sub_64
3230 0, // sub_pair1_then_sub_64_hi_phony
3231 0, // sub_pair1_then_sub_vsx0
3232 0, // sub_pair1_then_sub_vsx1
3233 0, // sub_pair1_then_sub_vsx1_then_sub_64
3234 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3235 0, // sub_dmrrowp1_then_sub_dmrrow0
3236 0, // sub_dmrrowp1_then_sub_dmrrow1
3237 0, // sub_wacc_hi_then_sub_dmrrow0
3238 0, // sub_wacc_hi_then_sub_dmrrow1
3239 0, // sub_wacc_hi_then_sub_dmrrowp0
3240 0, // sub_wacc_hi_then_sub_dmrrowp1
3241 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3242 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3243 0, // sub_dmr1_then_sub_dmrrow0
3244 0, // sub_dmr1_then_sub_dmrrow1
3245 0, // sub_dmr1_then_sub_dmrrowp0
3246 0, // sub_dmr1_then_sub_dmrrowp1
3247 0, // sub_dmr1_then_sub_wacc_hi
3248 0, // sub_dmr1_then_sub_wacc_lo
3249 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3250 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3251 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3252 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3253 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3254 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3255 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3256 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3257 0, // sub_gp8_x1_then_sub_32
3258 },
3259 { // FHRC
3260 0, // sub_32
3261 0, // sub_32_hi_phony
3262 0, // sub_64
3263 0, // sub_64_hi_phony
3264 0, // sub_dmr0
3265 0, // sub_dmr1
3266 0, // sub_dmrrow0
3267 0, // sub_dmrrow1
3268 0, // sub_dmrrowp0
3269 0, // sub_dmrrowp1
3270 0, // sub_eq
3271 0, // sub_fp0
3272 0, // sub_fp1
3273 0, // sub_gp8_x0
3274 0, // sub_gp8_x1
3275 0, // sub_gt
3276 0, // sub_lt
3277 0, // sub_pair0
3278 0, // sub_pair1
3279 0, // sub_un
3280 0, // sub_vsx0
3281 0, // sub_vsx1
3282 0, // sub_wacc_hi
3283 0, // sub_wacc_lo
3284 0, // sub_vsx1_then_sub_64
3285 0, // sub_vsx1_then_sub_64_hi_phony
3286 0, // sub_pair1_then_sub_64
3287 0, // sub_pair1_then_sub_64_hi_phony
3288 0, // sub_pair1_then_sub_vsx0
3289 0, // sub_pair1_then_sub_vsx1
3290 0, // sub_pair1_then_sub_vsx1_then_sub_64
3291 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3292 0, // sub_dmrrowp1_then_sub_dmrrow0
3293 0, // sub_dmrrowp1_then_sub_dmrrow1
3294 0, // sub_wacc_hi_then_sub_dmrrow0
3295 0, // sub_wacc_hi_then_sub_dmrrow1
3296 0, // sub_wacc_hi_then_sub_dmrrowp0
3297 0, // sub_wacc_hi_then_sub_dmrrowp1
3298 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3299 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3300 0, // sub_dmr1_then_sub_dmrrow0
3301 0, // sub_dmr1_then_sub_dmrrow1
3302 0, // sub_dmr1_then_sub_dmrrowp0
3303 0, // sub_dmr1_then_sub_dmrrowp1
3304 0, // sub_dmr1_then_sub_wacc_hi
3305 0, // sub_dmr1_then_sub_wacc_lo
3306 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3307 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3308 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3309 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3310 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3311 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3312 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3313 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3314 0, // sub_gp8_x1_then_sub_32
3315 },
3316 { // SPERC
3317 21, // sub_32 -> SPERC
3318 21, // sub_32_hi_phony -> SPERC
3319 0, // sub_64
3320 0, // sub_64_hi_phony
3321 0, // sub_dmr0
3322 0, // sub_dmr1
3323 0, // sub_dmrrow0
3324 0, // sub_dmrrow1
3325 0, // sub_dmrrowp0
3326 0, // sub_dmrrowp1
3327 0, // sub_eq
3328 0, // sub_fp0
3329 0, // sub_fp1
3330 0, // sub_gp8_x0
3331 0, // sub_gp8_x1
3332 0, // sub_gt
3333 0, // sub_lt
3334 0, // sub_pair0
3335 0, // sub_pair1
3336 0, // sub_un
3337 0, // sub_vsx0
3338 0, // sub_vsx1
3339 0, // sub_wacc_hi
3340 0, // sub_wacc_lo
3341 0, // sub_vsx1_then_sub_64
3342 0, // sub_vsx1_then_sub_64_hi_phony
3343 0, // sub_pair1_then_sub_64
3344 0, // sub_pair1_then_sub_64_hi_phony
3345 0, // sub_pair1_then_sub_vsx0
3346 0, // sub_pair1_then_sub_vsx1
3347 0, // sub_pair1_then_sub_vsx1_then_sub_64
3348 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3349 0, // sub_dmrrowp1_then_sub_dmrrow0
3350 0, // sub_dmrrowp1_then_sub_dmrrow1
3351 0, // sub_wacc_hi_then_sub_dmrrow0
3352 0, // sub_wacc_hi_then_sub_dmrrow1
3353 0, // sub_wacc_hi_then_sub_dmrrowp0
3354 0, // sub_wacc_hi_then_sub_dmrrowp1
3355 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3356 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3357 0, // sub_dmr1_then_sub_dmrrow0
3358 0, // sub_dmr1_then_sub_dmrrow1
3359 0, // sub_dmr1_then_sub_dmrrowp0
3360 0, // sub_dmr1_then_sub_dmrrowp1
3361 0, // sub_dmr1_then_sub_wacc_hi
3362 0, // sub_dmr1_then_sub_wacc_lo
3363 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3364 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3365 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3366 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3367 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3368 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3369 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3370 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3371 0, // sub_gp8_x1_then_sub_32
3372 },
3373 { // VFHRC
3374 0, // sub_32
3375 0, // sub_32_hi_phony
3376 0, // sub_64
3377 0, // sub_64_hi_phony
3378 0, // sub_dmr0
3379 0, // sub_dmr1
3380 0, // sub_dmrrow0
3381 0, // sub_dmrrow1
3382 0, // sub_dmrrowp0
3383 0, // sub_dmrrowp1
3384 0, // sub_eq
3385 0, // sub_fp0
3386 0, // sub_fp1
3387 0, // sub_gp8_x0
3388 0, // sub_gp8_x1
3389 0, // sub_gt
3390 0, // sub_lt
3391 0, // sub_pair0
3392 0, // sub_pair1
3393 0, // sub_un
3394 0, // sub_vsx0
3395 0, // sub_vsx1
3396 0, // sub_wacc_hi
3397 0, // sub_wacc_lo
3398 0, // sub_vsx1_then_sub_64
3399 0, // sub_vsx1_then_sub_64_hi_phony
3400 0, // sub_pair1_then_sub_64
3401 0, // sub_pair1_then_sub_64_hi_phony
3402 0, // sub_pair1_then_sub_vsx0
3403 0, // sub_pair1_then_sub_vsx1
3404 0, // sub_pair1_then_sub_vsx1_then_sub_64
3405 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3406 0, // sub_dmrrowp1_then_sub_dmrrow0
3407 0, // sub_dmrrowp1_then_sub_dmrrow1
3408 0, // sub_wacc_hi_then_sub_dmrrow0
3409 0, // sub_wacc_hi_then_sub_dmrrow1
3410 0, // sub_wacc_hi_then_sub_dmrrowp0
3411 0, // sub_wacc_hi_then_sub_dmrrowp1
3412 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3413 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3414 0, // sub_dmr1_then_sub_dmrrow0
3415 0, // sub_dmr1_then_sub_dmrrow1
3416 0, // sub_dmr1_then_sub_dmrrowp0
3417 0, // sub_dmr1_then_sub_dmrrowp1
3418 0, // sub_dmr1_then_sub_wacc_hi
3419 0, // sub_dmr1_then_sub_wacc_lo
3420 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3421 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3422 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3423 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3424 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3425 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3426 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3427 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3428 0, // sub_gp8_x1_then_sub_32
3429 },
3430 { // VFRC
3431 0, // sub_32
3432 0, // sub_32_hi_phony
3433 0, // sub_64
3434 0, // sub_64_hi_phony
3435 0, // sub_dmr0
3436 0, // sub_dmr1
3437 0, // sub_dmrrow0
3438 0, // sub_dmrrow1
3439 0, // sub_dmrrowp0
3440 0, // sub_dmrrowp1
3441 0, // sub_eq
3442 0, // sub_fp0
3443 0, // sub_fp1
3444 0, // sub_gp8_x0
3445 0, // sub_gp8_x1
3446 0, // sub_gt
3447 0, // sub_lt
3448 0, // sub_pair0
3449 0, // sub_pair1
3450 0, // sub_un
3451 0, // sub_vsx0
3452 0, // sub_vsx1
3453 0, // sub_wacc_hi
3454 0, // sub_wacc_lo
3455 0, // sub_vsx1_then_sub_64
3456 0, // sub_vsx1_then_sub_64_hi_phony
3457 0, // sub_pair1_then_sub_64
3458 0, // sub_pair1_then_sub_64_hi_phony
3459 0, // sub_pair1_then_sub_vsx0
3460 0, // sub_pair1_then_sub_vsx1
3461 0, // sub_pair1_then_sub_vsx1_then_sub_64
3462 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3463 0, // sub_dmrrowp1_then_sub_dmrrow0
3464 0, // sub_dmrrowp1_then_sub_dmrrow1
3465 0, // sub_wacc_hi_then_sub_dmrrow0
3466 0, // sub_wacc_hi_then_sub_dmrrow1
3467 0, // sub_wacc_hi_then_sub_dmrrowp0
3468 0, // sub_wacc_hi_then_sub_dmrrowp1
3469 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3470 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3471 0, // sub_dmr1_then_sub_dmrrow0
3472 0, // sub_dmr1_then_sub_dmrrow1
3473 0, // sub_dmr1_then_sub_dmrrowp0
3474 0, // sub_dmr1_then_sub_dmrrowp1
3475 0, // sub_dmr1_then_sub_wacc_hi
3476 0, // sub_dmr1_then_sub_wacc_lo
3477 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3478 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3479 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3480 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3481 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3482 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3483 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3484 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3485 0, // sub_gp8_x1_then_sub_32
3486 },
3487 { // SPERC_with_sub_32_in_GPRC_NOR0
3488 24, // sub_32 -> SPERC_with_sub_32_in_GPRC_NOR0
3489 24, // sub_32_hi_phony -> SPERC_with_sub_32_in_GPRC_NOR0
3490 0, // sub_64
3491 0, // sub_64_hi_phony
3492 0, // sub_dmr0
3493 0, // sub_dmr1
3494 0, // sub_dmrrow0
3495 0, // sub_dmrrow1
3496 0, // sub_dmrrowp0
3497 0, // sub_dmrrowp1
3498 0, // sub_eq
3499 0, // sub_fp0
3500 0, // sub_fp1
3501 0, // sub_gp8_x0
3502 0, // sub_gp8_x1
3503 0, // sub_gt
3504 0, // sub_lt
3505 0, // sub_pair0
3506 0, // sub_pair1
3507 0, // sub_un
3508 0, // sub_vsx0
3509 0, // sub_vsx1
3510 0, // sub_wacc_hi
3511 0, // sub_wacc_lo
3512 0, // sub_vsx1_then_sub_64
3513 0, // sub_vsx1_then_sub_64_hi_phony
3514 0, // sub_pair1_then_sub_64
3515 0, // sub_pair1_then_sub_64_hi_phony
3516 0, // sub_pair1_then_sub_vsx0
3517 0, // sub_pair1_then_sub_vsx1
3518 0, // sub_pair1_then_sub_vsx1_then_sub_64
3519 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3520 0, // sub_dmrrowp1_then_sub_dmrrow0
3521 0, // sub_dmrrowp1_then_sub_dmrrow1
3522 0, // sub_wacc_hi_then_sub_dmrrow0
3523 0, // sub_wacc_hi_then_sub_dmrrow1
3524 0, // sub_wacc_hi_then_sub_dmrrowp0
3525 0, // sub_wacc_hi_then_sub_dmrrowp1
3526 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3527 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3528 0, // sub_dmr1_then_sub_dmrrow0
3529 0, // sub_dmr1_then_sub_dmrrow1
3530 0, // sub_dmr1_then_sub_dmrrowp0
3531 0, // sub_dmr1_then_sub_dmrrowp1
3532 0, // sub_dmr1_then_sub_wacc_hi
3533 0, // sub_dmr1_then_sub_wacc_lo
3534 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3535 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3536 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3537 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3538 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3539 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3540 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3541 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3542 0, // sub_gp8_x1_then_sub_32
3543 },
3544 { // SPILLTOVSRRC_and_VFRC
3545 0, // sub_32
3546 0, // sub_32_hi_phony
3547 0, // sub_64
3548 0, // sub_64_hi_phony
3549 0, // sub_dmr0
3550 0, // sub_dmr1
3551 0, // sub_dmrrow0
3552 0, // sub_dmrrow1
3553 0, // sub_dmrrowp0
3554 0, // sub_dmrrowp1
3555 0, // sub_eq
3556 0, // sub_fp0
3557 0, // sub_fp1
3558 0, // sub_gp8_x0
3559 0, // sub_gp8_x1
3560 0, // sub_gt
3561 0, // sub_lt
3562 0, // sub_pair0
3563 0, // sub_pair1
3564 0, // sub_un
3565 0, // sub_vsx0
3566 0, // sub_vsx1
3567 0, // sub_wacc_hi
3568 0, // sub_wacc_lo
3569 0, // sub_vsx1_then_sub_64
3570 0, // sub_vsx1_then_sub_64_hi_phony
3571 0, // sub_pair1_then_sub_64
3572 0, // sub_pair1_then_sub_64_hi_phony
3573 0, // sub_pair1_then_sub_vsx0
3574 0, // sub_pair1_then_sub_vsx1
3575 0, // sub_pair1_then_sub_vsx1_then_sub_64
3576 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3577 0, // sub_dmrrowp1_then_sub_dmrrow0
3578 0, // sub_dmrrowp1_then_sub_dmrrow1
3579 0, // sub_wacc_hi_then_sub_dmrrow0
3580 0, // sub_wacc_hi_then_sub_dmrrow1
3581 0, // sub_wacc_hi_then_sub_dmrrowp0
3582 0, // sub_wacc_hi_then_sub_dmrrowp1
3583 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3584 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3585 0, // sub_dmr1_then_sub_dmrrow0
3586 0, // sub_dmr1_then_sub_dmrrow1
3587 0, // sub_dmr1_then_sub_dmrrowp0
3588 0, // sub_dmr1_then_sub_dmrrowp1
3589 0, // sub_dmr1_then_sub_wacc_hi
3590 0, // sub_dmr1_then_sub_wacc_lo
3591 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3592 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3593 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3594 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3595 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3596 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3597 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3598 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3599 0, // sub_gp8_x1_then_sub_32
3600 },
3601 { // SPILLTOVSRRC_and_F4RC
3602 0, // sub_32
3603 0, // sub_32_hi_phony
3604 0, // sub_64
3605 0, // sub_64_hi_phony
3606 0, // sub_dmr0
3607 0, // sub_dmr1
3608 0, // sub_dmrrow0
3609 0, // sub_dmrrow1
3610 0, // sub_dmrrowp0
3611 0, // sub_dmrrowp1
3612 0, // sub_eq
3613 0, // sub_fp0
3614 0, // sub_fp1
3615 0, // sub_gp8_x0
3616 0, // sub_gp8_x1
3617 0, // sub_gt
3618 0, // sub_lt
3619 0, // sub_pair0
3620 0, // sub_pair1
3621 0, // sub_un
3622 0, // sub_vsx0
3623 0, // sub_vsx1
3624 0, // sub_wacc_hi
3625 0, // sub_wacc_lo
3626 0, // sub_vsx1_then_sub_64
3627 0, // sub_vsx1_then_sub_64_hi_phony
3628 0, // sub_pair1_then_sub_64
3629 0, // sub_pair1_then_sub_64_hi_phony
3630 0, // sub_pair1_then_sub_vsx0
3631 0, // sub_pair1_then_sub_vsx1
3632 0, // sub_pair1_then_sub_vsx1_then_sub_64
3633 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3634 0, // sub_dmrrowp1_then_sub_dmrrow0
3635 0, // sub_dmrrowp1_then_sub_dmrrow1
3636 0, // sub_wacc_hi_then_sub_dmrrow0
3637 0, // sub_wacc_hi_then_sub_dmrrow1
3638 0, // sub_wacc_hi_then_sub_dmrrowp0
3639 0, // sub_wacc_hi_then_sub_dmrrowp1
3640 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3641 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3642 0, // sub_dmr1_then_sub_dmrrow0
3643 0, // sub_dmr1_then_sub_dmrrow1
3644 0, // sub_dmr1_then_sub_dmrrowp0
3645 0, // sub_dmr1_then_sub_dmrrowp1
3646 0, // sub_dmr1_then_sub_wacc_hi
3647 0, // sub_dmr1_then_sub_wacc_lo
3648 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3649 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3650 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3651 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3652 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3653 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3654 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3655 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3656 0, // sub_gp8_x1_then_sub_32
3657 },
3658 { // CTRRC8
3659 0, // sub_32
3660 0, // sub_32_hi_phony
3661 0, // sub_64
3662 0, // sub_64_hi_phony
3663 0, // sub_dmr0
3664 0, // sub_dmr1
3665 0, // sub_dmrrow0
3666 0, // sub_dmrrow1
3667 0, // sub_dmrrowp0
3668 0, // sub_dmrrowp1
3669 0, // sub_eq
3670 0, // sub_fp0
3671 0, // sub_fp1
3672 0, // sub_gp8_x0
3673 0, // sub_gp8_x1
3674 0, // sub_gt
3675 0, // sub_lt
3676 0, // sub_pair0
3677 0, // sub_pair1
3678 0, // sub_un
3679 0, // sub_vsx0
3680 0, // sub_vsx1
3681 0, // sub_wacc_hi
3682 0, // sub_wacc_lo
3683 0, // sub_vsx1_then_sub_64
3684 0, // sub_vsx1_then_sub_64_hi_phony
3685 0, // sub_pair1_then_sub_64
3686 0, // sub_pair1_then_sub_64_hi_phony
3687 0, // sub_pair1_then_sub_vsx0
3688 0, // sub_pair1_then_sub_vsx1
3689 0, // sub_pair1_then_sub_vsx1_then_sub_64
3690 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3691 0, // sub_dmrrowp1_then_sub_dmrrow0
3692 0, // sub_dmrrowp1_then_sub_dmrrow1
3693 0, // sub_wacc_hi_then_sub_dmrrow0
3694 0, // sub_wacc_hi_then_sub_dmrrow1
3695 0, // sub_wacc_hi_then_sub_dmrrowp0
3696 0, // sub_wacc_hi_then_sub_dmrrowp1
3697 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3698 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3699 0, // sub_dmr1_then_sub_dmrrow0
3700 0, // sub_dmr1_then_sub_dmrrow1
3701 0, // sub_dmr1_then_sub_dmrrowp0
3702 0, // sub_dmr1_then_sub_dmrrowp1
3703 0, // sub_dmr1_then_sub_wacc_hi
3704 0, // sub_dmr1_then_sub_wacc_lo
3705 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3706 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3707 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3708 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3709 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3710 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3711 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3712 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3713 0, // sub_gp8_x1_then_sub_32
3714 },
3715 { // LR8RC
3716 0, // sub_32
3717 0, // sub_32_hi_phony
3718 0, // sub_64
3719 0, // sub_64_hi_phony
3720 0, // sub_dmr0
3721 0, // sub_dmr1
3722 0, // sub_dmrrow0
3723 0, // sub_dmrrow1
3724 0, // sub_dmrrowp0
3725 0, // sub_dmrrowp1
3726 0, // sub_eq
3727 0, // sub_fp0
3728 0, // sub_fp1
3729 0, // sub_gp8_x0
3730 0, // sub_gp8_x1
3731 0, // sub_gt
3732 0, // sub_lt
3733 0, // sub_pair0
3734 0, // sub_pair1
3735 0, // sub_un
3736 0, // sub_vsx0
3737 0, // sub_vsx1
3738 0, // sub_wacc_hi
3739 0, // sub_wacc_lo
3740 0, // sub_vsx1_then_sub_64
3741 0, // sub_vsx1_then_sub_64_hi_phony
3742 0, // sub_pair1_then_sub_64
3743 0, // sub_pair1_then_sub_64_hi_phony
3744 0, // sub_pair1_then_sub_vsx0
3745 0, // sub_pair1_then_sub_vsx1
3746 0, // sub_pair1_then_sub_vsx1_then_sub_64
3747 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3748 0, // sub_dmrrowp1_then_sub_dmrrow0
3749 0, // sub_dmrrowp1_then_sub_dmrrow1
3750 0, // sub_wacc_hi_then_sub_dmrrow0
3751 0, // sub_wacc_hi_then_sub_dmrrow1
3752 0, // sub_wacc_hi_then_sub_dmrrowp0
3753 0, // sub_wacc_hi_then_sub_dmrrowp1
3754 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3755 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3756 0, // sub_dmr1_then_sub_dmrrow0
3757 0, // sub_dmr1_then_sub_dmrrow1
3758 0, // sub_dmr1_then_sub_dmrrowp0
3759 0, // sub_dmr1_then_sub_dmrrowp1
3760 0, // sub_dmr1_then_sub_wacc_hi
3761 0, // sub_dmr1_then_sub_wacc_lo
3762 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3763 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3764 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3765 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3766 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3767 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3768 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3769 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3770 0, // sub_gp8_x1_then_sub_32
3771 },
3772 { // DMRROWRC
3773 0, // sub_32
3774 0, // sub_32_hi_phony
3775 0, // sub_64
3776 0, // sub_64_hi_phony
3777 0, // sub_dmr0
3778 0, // sub_dmr1
3779 0, // sub_dmrrow0
3780 0, // sub_dmrrow1
3781 0, // sub_dmrrowp0
3782 0, // sub_dmrrowp1
3783 0, // sub_eq
3784 0, // sub_fp0
3785 0, // sub_fp1
3786 0, // sub_gp8_x0
3787 0, // sub_gp8_x1
3788 0, // sub_gt
3789 0, // sub_lt
3790 0, // sub_pair0
3791 0, // sub_pair1
3792 0, // sub_un
3793 0, // sub_vsx0
3794 0, // sub_vsx1
3795 0, // sub_wacc_hi
3796 0, // sub_wacc_lo
3797 0, // sub_vsx1_then_sub_64
3798 0, // sub_vsx1_then_sub_64_hi_phony
3799 0, // sub_pair1_then_sub_64
3800 0, // sub_pair1_then_sub_64_hi_phony
3801 0, // sub_pair1_then_sub_vsx0
3802 0, // sub_pair1_then_sub_vsx1
3803 0, // sub_pair1_then_sub_vsx1_then_sub_64
3804 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3805 0, // sub_dmrrowp1_then_sub_dmrrow0
3806 0, // sub_dmrrowp1_then_sub_dmrrow1
3807 0, // sub_wacc_hi_then_sub_dmrrow0
3808 0, // sub_wacc_hi_then_sub_dmrrow1
3809 0, // sub_wacc_hi_then_sub_dmrrowp0
3810 0, // sub_wacc_hi_then_sub_dmrrowp1
3811 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3812 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3813 0, // sub_dmr1_then_sub_dmrrow0
3814 0, // sub_dmr1_then_sub_dmrrow1
3815 0, // sub_dmr1_then_sub_dmrrowp0
3816 0, // sub_dmr1_then_sub_dmrrowp1
3817 0, // sub_dmr1_then_sub_wacc_hi
3818 0, // sub_dmr1_then_sub_wacc_lo
3819 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3820 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3821 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3822 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3823 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3824 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3825 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3826 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3827 0, // sub_gp8_x1_then_sub_32
3828 },
3829 { // VSRC
3830 0, // sub_32
3831 0, // sub_32_hi_phony
3832 30, // sub_64 -> VSRC
3833 30, // sub_64_hi_phony -> VSRC
3834 0, // sub_dmr0
3835 0, // sub_dmr1
3836 0, // sub_dmrrow0
3837 0, // sub_dmrrow1
3838 0, // sub_dmrrowp0
3839 0, // sub_dmrrowp1
3840 0, // sub_eq
3841 0, // sub_fp0
3842 0, // sub_fp1
3843 0, // sub_gp8_x0
3844 0, // sub_gp8_x1
3845 0, // sub_gt
3846 0, // sub_lt
3847 0, // sub_pair0
3848 0, // sub_pair1
3849 0, // sub_un
3850 0, // sub_vsx0
3851 0, // sub_vsx1
3852 0, // sub_wacc_hi
3853 0, // sub_wacc_lo
3854 0, // sub_vsx1_then_sub_64
3855 0, // sub_vsx1_then_sub_64_hi_phony
3856 0, // sub_pair1_then_sub_64
3857 0, // sub_pair1_then_sub_64_hi_phony
3858 0, // sub_pair1_then_sub_vsx0
3859 0, // sub_pair1_then_sub_vsx1
3860 0, // sub_pair1_then_sub_vsx1_then_sub_64
3861 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3862 0, // sub_dmrrowp1_then_sub_dmrrow0
3863 0, // sub_dmrrowp1_then_sub_dmrrow1
3864 0, // sub_wacc_hi_then_sub_dmrrow0
3865 0, // sub_wacc_hi_then_sub_dmrrow1
3866 0, // sub_wacc_hi_then_sub_dmrrowp0
3867 0, // sub_wacc_hi_then_sub_dmrrowp1
3868 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3869 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3870 0, // sub_dmr1_then_sub_dmrrow0
3871 0, // sub_dmr1_then_sub_dmrrow1
3872 0, // sub_dmr1_then_sub_dmrrowp0
3873 0, // sub_dmr1_then_sub_dmrrowp1
3874 0, // sub_dmr1_then_sub_wacc_hi
3875 0, // sub_dmr1_then_sub_wacc_lo
3876 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3877 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3878 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3879 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3880 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3881 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3882 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3883 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3884 0, // sub_gp8_x1_then_sub_32
3885 },
3886 { // VSRC_with_sub_64_in_SPILLTOVSRRC
3887 0, // sub_32
3888 0, // sub_32_hi_phony
3889 31, // sub_64 -> VSRC_with_sub_64_in_SPILLTOVSRRC
3890 31, // sub_64_hi_phony -> VSRC_with_sub_64_in_SPILLTOVSRRC
3891 0, // sub_dmr0
3892 0, // sub_dmr1
3893 0, // sub_dmrrow0
3894 0, // sub_dmrrow1
3895 0, // sub_dmrrowp0
3896 0, // sub_dmrrowp1
3897 0, // sub_eq
3898 0, // sub_fp0
3899 0, // sub_fp1
3900 0, // sub_gp8_x0
3901 0, // sub_gp8_x1
3902 0, // sub_gt
3903 0, // sub_lt
3904 0, // sub_pair0
3905 0, // sub_pair1
3906 0, // sub_un
3907 0, // sub_vsx0
3908 0, // sub_vsx1
3909 0, // sub_wacc_hi
3910 0, // sub_wacc_lo
3911 0, // sub_vsx1_then_sub_64
3912 0, // sub_vsx1_then_sub_64_hi_phony
3913 0, // sub_pair1_then_sub_64
3914 0, // sub_pair1_then_sub_64_hi_phony
3915 0, // sub_pair1_then_sub_vsx0
3916 0, // sub_pair1_then_sub_vsx1
3917 0, // sub_pair1_then_sub_vsx1_then_sub_64
3918 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3919 0, // sub_dmrrowp1_then_sub_dmrrow0
3920 0, // sub_dmrrowp1_then_sub_dmrrow1
3921 0, // sub_wacc_hi_then_sub_dmrrow0
3922 0, // sub_wacc_hi_then_sub_dmrrow1
3923 0, // sub_wacc_hi_then_sub_dmrrowp0
3924 0, // sub_wacc_hi_then_sub_dmrrowp1
3925 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3926 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3927 0, // sub_dmr1_then_sub_dmrrow0
3928 0, // sub_dmr1_then_sub_dmrrow1
3929 0, // sub_dmr1_then_sub_dmrrowp0
3930 0, // sub_dmr1_then_sub_dmrrowp1
3931 0, // sub_dmr1_then_sub_wacc_hi
3932 0, // sub_dmr1_then_sub_wacc_lo
3933 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3934 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3935 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3936 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3937 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3938 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3939 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3940 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3941 0, // sub_gp8_x1_then_sub_32
3942 },
3943 { // VRRC
3944 0, // sub_32
3945 0, // sub_32_hi_phony
3946 32, // sub_64 -> VRRC
3947 32, // sub_64_hi_phony -> VRRC
3948 0, // sub_dmr0
3949 0, // sub_dmr1
3950 0, // sub_dmrrow0
3951 0, // sub_dmrrow1
3952 0, // sub_dmrrowp0
3953 0, // sub_dmrrowp1
3954 0, // sub_eq
3955 0, // sub_fp0
3956 0, // sub_fp1
3957 0, // sub_gp8_x0
3958 0, // sub_gp8_x1
3959 0, // sub_gt
3960 0, // sub_lt
3961 0, // sub_pair0
3962 0, // sub_pair1
3963 0, // sub_un
3964 0, // sub_vsx0
3965 0, // sub_vsx1
3966 0, // sub_wacc_hi
3967 0, // sub_wacc_lo
3968 0, // sub_vsx1_then_sub_64
3969 0, // sub_vsx1_then_sub_64_hi_phony
3970 0, // sub_pair1_then_sub_64
3971 0, // sub_pair1_then_sub_64_hi_phony
3972 0, // sub_pair1_then_sub_vsx0
3973 0, // sub_pair1_then_sub_vsx1
3974 0, // sub_pair1_then_sub_vsx1_then_sub_64
3975 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
3976 0, // sub_dmrrowp1_then_sub_dmrrow0
3977 0, // sub_dmrrowp1_then_sub_dmrrow1
3978 0, // sub_wacc_hi_then_sub_dmrrow0
3979 0, // sub_wacc_hi_then_sub_dmrrow1
3980 0, // sub_wacc_hi_then_sub_dmrrowp0
3981 0, // sub_wacc_hi_then_sub_dmrrowp1
3982 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3983 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3984 0, // sub_dmr1_then_sub_dmrrow0
3985 0, // sub_dmr1_then_sub_dmrrow1
3986 0, // sub_dmr1_then_sub_dmrrowp0
3987 0, // sub_dmr1_then_sub_dmrrowp1
3988 0, // sub_dmr1_then_sub_wacc_hi
3989 0, // sub_dmr1_then_sub_wacc_lo
3990 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
3991 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
3992 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
3993 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
3994 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
3995 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
3996 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
3997 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
3998 0, // sub_gp8_x1_then_sub_32
3999 },
4000 { // VSLRC
4001 0, // sub_32
4002 0, // sub_32_hi_phony
4003 33, // sub_64 -> VSLRC
4004 33, // sub_64_hi_phony -> VSLRC
4005 0, // sub_dmr0
4006 0, // sub_dmr1
4007 0, // sub_dmrrow0
4008 0, // sub_dmrrow1
4009 0, // sub_dmrrowp0
4010 0, // sub_dmrrowp1
4011 0, // sub_eq
4012 0, // sub_fp0
4013 0, // sub_fp1
4014 0, // sub_gp8_x0
4015 0, // sub_gp8_x1
4016 0, // sub_gt
4017 0, // sub_lt
4018 0, // sub_pair0
4019 0, // sub_pair1
4020 0, // sub_un
4021 0, // sub_vsx0
4022 0, // sub_vsx1
4023 0, // sub_wacc_hi
4024 0, // sub_wacc_lo
4025 0, // sub_vsx1_then_sub_64
4026 0, // sub_vsx1_then_sub_64_hi_phony
4027 0, // sub_pair1_then_sub_64
4028 0, // sub_pair1_then_sub_64_hi_phony
4029 0, // sub_pair1_then_sub_vsx0
4030 0, // sub_pair1_then_sub_vsx1
4031 0, // sub_pair1_then_sub_vsx1_then_sub_64
4032 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4033 0, // sub_dmrrowp1_then_sub_dmrrow0
4034 0, // sub_dmrrowp1_then_sub_dmrrow1
4035 0, // sub_wacc_hi_then_sub_dmrrow0
4036 0, // sub_wacc_hi_then_sub_dmrrow1
4037 0, // sub_wacc_hi_then_sub_dmrrowp0
4038 0, // sub_wacc_hi_then_sub_dmrrowp1
4039 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4040 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4041 0, // sub_dmr1_then_sub_dmrrow0
4042 0, // sub_dmr1_then_sub_dmrrow1
4043 0, // sub_dmr1_then_sub_dmrrowp0
4044 0, // sub_dmr1_then_sub_dmrrowp1
4045 0, // sub_dmr1_then_sub_wacc_hi
4046 0, // sub_dmr1_then_sub_wacc_lo
4047 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4048 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4049 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4050 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4051 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4052 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4053 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4054 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4055 0, // sub_gp8_x1_then_sub_32
4056 },
4057 { // VRRC_with_sub_64_in_SPILLTOVSRRC
4058 0, // sub_32
4059 0, // sub_32_hi_phony
4060 34, // sub_64 -> VRRC_with_sub_64_in_SPILLTOVSRRC
4061 34, // sub_64_hi_phony -> VRRC_with_sub_64_in_SPILLTOVSRRC
4062 0, // sub_dmr0
4063 0, // sub_dmr1
4064 0, // sub_dmrrow0
4065 0, // sub_dmrrow1
4066 0, // sub_dmrrowp0
4067 0, // sub_dmrrowp1
4068 0, // sub_eq
4069 0, // sub_fp0
4070 0, // sub_fp1
4071 0, // sub_gp8_x0
4072 0, // sub_gp8_x1
4073 0, // sub_gt
4074 0, // sub_lt
4075 0, // sub_pair0
4076 0, // sub_pair1
4077 0, // sub_un
4078 0, // sub_vsx0
4079 0, // sub_vsx1
4080 0, // sub_wacc_hi
4081 0, // sub_wacc_lo
4082 0, // sub_vsx1_then_sub_64
4083 0, // sub_vsx1_then_sub_64_hi_phony
4084 0, // sub_pair1_then_sub_64
4085 0, // sub_pair1_then_sub_64_hi_phony
4086 0, // sub_pair1_then_sub_vsx0
4087 0, // sub_pair1_then_sub_vsx1
4088 0, // sub_pair1_then_sub_vsx1_then_sub_64
4089 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4090 0, // sub_dmrrowp1_then_sub_dmrrow0
4091 0, // sub_dmrrowp1_then_sub_dmrrow1
4092 0, // sub_wacc_hi_then_sub_dmrrow0
4093 0, // sub_wacc_hi_then_sub_dmrrow1
4094 0, // sub_wacc_hi_then_sub_dmrrowp0
4095 0, // sub_wacc_hi_then_sub_dmrrowp1
4096 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4097 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4098 0, // sub_dmr1_then_sub_dmrrow0
4099 0, // sub_dmr1_then_sub_dmrrow1
4100 0, // sub_dmr1_then_sub_dmrrowp0
4101 0, // sub_dmr1_then_sub_dmrrowp1
4102 0, // sub_dmr1_then_sub_wacc_hi
4103 0, // sub_dmr1_then_sub_wacc_lo
4104 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4105 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4106 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4107 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4108 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4109 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4110 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4111 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4112 0, // sub_gp8_x1_then_sub_32
4113 },
4114 { // FpRC
4115 0, // sub_32
4116 0, // sub_32_hi_phony
4117 0, // sub_64
4118 0, // sub_64_hi_phony
4119 0, // sub_dmr0
4120 0, // sub_dmr1
4121 0, // sub_dmrrow0
4122 0, // sub_dmrrow1
4123 0, // sub_dmrrowp0
4124 0, // sub_dmrrowp1
4125 0, // sub_eq
4126 35, // sub_fp0 -> FpRC
4127 35, // sub_fp1 -> FpRC
4128 0, // sub_gp8_x0
4129 0, // sub_gp8_x1
4130 0, // sub_gt
4131 0, // sub_lt
4132 0, // sub_pair0
4133 0, // sub_pair1
4134 0, // sub_un
4135 0, // sub_vsx0
4136 0, // sub_vsx1
4137 0, // sub_wacc_hi
4138 0, // sub_wacc_lo
4139 0, // sub_vsx1_then_sub_64
4140 0, // sub_vsx1_then_sub_64_hi_phony
4141 0, // sub_pair1_then_sub_64
4142 0, // sub_pair1_then_sub_64_hi_phony
4143 0, // sub_pair1_then_sub_vsx0
4144 0, // sub_pair1_then_sub_vsx1
4145 0, // sub_pair1_then_sub_vsx1_then_sub_64
4146 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4147 0, // sub_dmrrowp1_then_sub_dmrrow0
4148 0, // sub_dmrrowp1_then_sub_dmrrow1
4149 0, // sub_wacc_hi_then_sub_dmrrow0
4150 0, // sub_wacc_hi_then_sub_dmrrow1
4151 0, // sub_wacc_hi_then_sub_dmrrowp0
4152 0, // sub_wacc_hi_then_sub_dmrrowp1
4153 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4154 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4155 0, // sub_dmr1_then_sub_dmrrow0
4156 0, // sub_dmr1_then_sub_dmrrow1
4157 0, // sub_dmr1_then_sub_dmrrowp0
4158 0, // sub_dmr1_then_sub_dmrrowp1
4159 0, // sub_dmr1_then_sub_wacc_hi
4160 0, // sub_dmr1_then_sub_wacc_lo
4161 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4162 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4163 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4164 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4165 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4166 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4167 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4168 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4169 0, // sub_gp8_x1_then_sub_32
4170 },
4171 { // G8pRC
4172 36, // sub_32 -> G8pRC
4173 0, // sub_32_hi_phony
4174 0, // sub_64
4175 0, // sub_64_hi_phony
4176 0, // sub_dmr0
4177 0, // sub_dmr1
4178 0, // sub_dmrrow0
4179 0, // sub_dmrrow1
4180 0, // sub_dmrrowp0
4181 0, // sub_dmrrowp1
4182 0, // sub_eq
4183 0, // sub_fp0
4184 0, // sub_fp1
4185 36, // sub_gp8_x0 -> G8pRC
4186 36, // sub_gp8_x1 -> G8pRC
4187 0, // sub_gt
4188 0, // sub_lt
4189 0, // sub_pair0
4190 0, // sub_pair1
4191 0, // sub_un
4192 0, // sub_vsx0
4193 0, // sub_vsx1
4194 0, // sub_wacc_hi
4195 0, // sub_wacc_lo
4196 0, // sub_vsx1_then_sub_64
4197 0, // sub_vsx1_then_sub_64_hi_phony
4198 0, // sub_pair1_then_sub_64
4199 0, // sub_pair1_then_sub_64_hi_phony
4200 0, // sub_pair1_then_sub_vsx0
4201 0, // sub_pair1_then_sub_vsx1
4202 0, // sub_pair1_then_sub_vsx1_then_sub_64
4203 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4204 0, // sub_dmrrowp1_then_sub_dmrrow0
4205 0, // sub_dmrrowp1_then_sub_dmrrow1
4206 0, // sub_wacc_hi_then_sub_dmrrow0
4207 0, // sub_wacc_hi_then_sub_dmrrow1
4208 0, // sub_wacc_hi_then_sub_dmrrowp0
4209 0, // sub_wacc_hi_then_sub_dmrrowp1
4210 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4211 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4212 0, // sub_dmr1_then_sub_dmrrow0
4213 0, // sub_dmr1_then_sub_dmrrow1
4214 0, // sub_dmr1_then_sub_dmrrowp0
4215 0, // sub_dmr1_then_sub_dmrrowp1
4216 0, // sub_dmr1_then_sub_wacc_hi
4217 0, // sub_dmr1_then_sub_wacc_lo
4218 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4219 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4220 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4221 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4222 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4223 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4224 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4225 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4226 36, // sub_gp8_x1_then_sub_32 -> G8pRC
4227 },
4228 { // G8pRC_with_sub_32_in_GPRC_NOR0
4229 37, // sub_32 -> G8pRC_with_sub_32_in_GPRC_NOR0
4230 0, // sub_32_hi_phony
4231 0, // sub_64
4232 0, // sub_64_hi_phony
4233 0, // sub_dmr0
4234 0, // sub_dmr1
4235 0, // sub_dmrrow0
4236 0, // sub_dmrrow1
4237 0, // sub_dmrrowp0
4238 0, // sub_dmrrowp1
4239 0, // sub_eq
4240 0, // sub_fp0
4241 0, // sub_fp1
4242 37, // sub_gp8_x0 -> G8pRC_with_sub_32_in_GPRC_NOR0
4243 37, // sub_gp8_x1 -> G8pRC_with_sub_32_in_GPRC_NOR0
4244 0, // sub_gt
4245 0, // sub_lt
4246 0, // sub_pair0
4247 0, // sub_pair1
4248 0, // sub_un
4249 0, // sub_vsx0
4250 0, // sub_vsx1
4251 0, // sub_wacc_hi
4252 0, // sub_wacc_lo
4253 0, // sub_vsx1_then_sub_64
4254 0, // sub_vsx1_then_sub_64_hi_phony
4255 0, // sub_pair1_then_sub_64
4256 0, // sub_pair1_then_sub_64_hi_phony
4257 0, // sub_pair1_then_sub_vsx0
4258 0, // sub_pair1_then_sub_vsx1
4259 0, // sub_pair1_then_sub_vsx1_then_sub_64
4260 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4261 0, // sub_dmrrowp1_then_sub_dmrrow0
4262 0, // sub_dmrrowp1_then_sub_dmrrow1
4263 0, // sub_wacc_hi_then_sub_dmrrow0
4264 0, // sub_wacc_hi_then_sub_dmrrow1
4265 0, // sub_wacc_hi_then_sub_dmrrowp0
4266 0, // sub_wacc_hi_then_sub_dmrrowp1
4267 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4268 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4269 0, // sub_dmr1_then_sub_dmrrow0
4270 0, // sub_dmr1_then_sub_dmrrow1
4271 0, // sub_dmr1_then_sub_dmrrowp0
4272 0, // sub_dmr1_then_sub_dmrrowp1
4273 0, // sub_dmr1_then_sub_wacc_hi
4274 0, // sub_dmr1_then_sub_wacc_lo
4275 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4276 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4277 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4278 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4279 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4280 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4281 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4282 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4283 37, // sub_gp8_x1_then_sub_32 -> G8pRC_with_sub_32_in_GPRC_NOR0
4284 },
4285 { // VSLRC_with_sub_64_in_SPILLTOVSRRC
4286 0, // sub_32
4287 0, // sub_32_hi_phony
4288 38, // sub_64 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
4289 38, // sub_64_hi_phony -> VSLRC_with_sub_64_in_SPILLTOVSRRC
4290 0, // sub_dmr0
4291 0, // sub_dmr1
4292 0, // sub_dmrrow0
4293 0, // sub_dmrrow1
4294 0, // sub_dmrrowp0
4295 0, // sub_dmrrowp1
4296 0, // sub_eq
4297 0, // sub_fp0
4298 0, // sub_fp1
4299 0, // sub_gp8_x0
4300 0, // sub_gp8_x1
4301 0, // sub_gt
4302 0, // sub_lt
4303 0, // sub_pair0
4304 0, // sub_pair1
4305 0, // sub_un
4306 0, // sub_vsx0
4307 0, // sub_vsx1
4308 0, // sub_wacc_hi
4309 0, // sub_wacc_lo
4310 0, // sub_vsx1_then_sub_64
4311 0, // sub_vsx1_then_sub_64_hi_phony
4312 0, // sub_pair1_then_sub_64
4313 0, // sub_pair1_then_sub_64_hi_phony
4314 0, // sub_pair1_then_sub_vsx0
4315 0, // sub_pair1_then_sub_vsx1
4316 0, // sub_pair1_then_sub_vsx1_then_sub_64
4317 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4318 0, // sub_dmrrowp1_then_sub_dmrrow0
4319 0, // sub_dmrrowp1_then_sub_dmrrow1
4320 0, // sub_wacc_hi_then_sub_dmrrow0
4321 0, // sub_wacc_hi_then_sub_dmrrow1
4322 0, // sub_wacc_hi_then_sub_dmrrowp0
4323 0, // sub_wacc_hi_then_sub_dmrrowp1
4324 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4325 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4326 0, // sub_dmr1_then_sub_dmrrow0
4327 0, // sub_dmr1_then_sub_dmrrow1
4328 0, // sub_dmr1_then_sub_dmrrowp0
4329 0, // sub_dmr1_then_sub_dmrrowp1
4330 0, // sub_dmr1_then_sub_wacc_hi
4331 0, // sub_dmr1_then_sub_wacc_lo
4332 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4333 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4334 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4335 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4336 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4337 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4338 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4339 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4340 0, // sub_gp8_x1_then_sub_32
4341 },
4342 { // FpRC_with_sub_fp0_in_SPILLTOVSRRC
4343 0, // sub_32
4344 0, // sub_32_hi_phony
4345 0, // sub_64
4346 0, // sub_64_hi_phony
4347 0, // sub_dmr0
4348 0, // sub_dmr1
4349 0, // sub_dmrrow0
4350 0, // sub_dmrrow1
4351 0, // sub_dmrrowp0
4352 0, // sub_dmrrowp1
4353 0, // sub_eq
4354 39, // sub_fp0 -> FpRC_with_sub_fp0_in_SPILLTOVSRRC
4355 39, // sub_fp1 -> FpRC_with_sub_fp0_in_SPILLTOVSRRC
4356 0, // sub_gp8_x0
4357 0, // sub_gp8_x1
4358 0, // sub_gt
4359 0, // sub_lt
4360 0, // sub_pair0
4361 0, // sub_pair1
4362 0, // sub_un
4363 0, // sub_vsx0
4364 0, // sub_vsx1
4365 0, // sub_wacc_hi
4366 0, // sub_wacc_lo
4367 0, // sub_vsx1_then_sub_64
4368 0, // sub_vsx1_then_sub_64_hi_phony
4369 0, // sub_pair1_then_sub_64
4370 0, // sub_pair1_then_sub_64_hi_phony
4371 0, // sub_pair1_then_sub_vsx0
4372 0, // sub_pair1_then_sub_vsx1
4373 0, // sub_pair1_then_sub_vsx1_then_sub_64
4374 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4375 0, // sub_dmrrowp1_then_sub_dmrrow0
4376 0, // sub_dmrrowp1_then_sub_dmrrow1
4377 0, // sub_wacc_hi_then_sub_dmrrow0
4378 0, // sub_wacc_hi_then_sub_dmrrow1
4379 0, // sub_wacc_hi_then_sub_dmrrowp0
4380 0, // sub_wacc_hi_then_sub_dmrrowp1
4381 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4382 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4383 0, // sub_dmr1_then_sub_dmrrow0
4384 0, // sub_dmr1_then_sub_dmrrow1
4385 0, // sub_dmr1_then_sub_dmrrowp0
4386 0, // sub_dmr1_then_sub_dmrrowp1
4387 0, // sub_dmr1_then_sub_wacc_hi
4388 0, // sub_dmr1_then_sub_wacc_lo
4389 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4390 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4391 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4392 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4393 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4394 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4395 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4396 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4397 0, // sub_gp8_x1_then_sub_32
4398 },
4399 { // DMRROWpRC
4400 0, // sub_32
4401 0, // sub_32_hi_phony
4402 0, // sub_64
4403 0, // sub_64_hi_phony
4404 0, // sub_dmr0
4405 0, // sub_dmr1
4406 40, // sub_dmrrow0 -> DMRROWpRC
4407 40, // sub_dmrrow1 -> DMRROWpRC
4408 0, // sub_dmrrowp0
4409 0, // sub_dmrrowp1
4410 0, // sub_eq
4411 0, // sub_fp0
4412 0, // sub_fp1
4413 0, // sub_gp8_x0
4414 0, // sub_gp8_x1
4415 0, // sub_gt
4416 0, // sub_lt
4417 0, // sub_pair0
4418 0, // sub_pair1
4419 0, // sub_un
4420 0, // sub_vsx0
4421 0, // sub_vsx1
4422 0, // sub_wacc_hi
4423 0, // sub_wacc_lo
4424 0, // sub_vsx1_then_sub_64
4425 0, // sub_vsx1_then_sub_64_hi_phony
4426 0, // sub_pair1_then_sub_64
4427 0, // sub_pair1_then_sub_64_hi_phony
4428 0, // sub_pair1_then_sub_vsx0
4429 0, // sub_pair1_then_sub_vsx1
4430 0, // sub_pair1_then_sub_vsx1_then_sub_64
4431 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4432 0, // sub_dmrrowp1_then_sub_dmrrow0
4433 0, // sub_dmrrowp1_then_sub_dmrrow1
4434 0, // sub_wacc_hi_then_sub_dmrrow0
4435 0, // sub_wacc_hi_then_sub_dmrrow1
4436 0, // sub_wacc_hi_then_sub_dmrrowp0
4437 0, // sub_wacc_hi_then_sub_dmrrowp1
4438 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4439 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4440 0, // sub_dmr1_then_sub_dmrrow0
4441 0, // sub_dmr1_then_sub_dmrrow1
4442 0, // sub_dmr1_then_sub_dmrrowp0
4443 0, // sub_dmr1_then_sub_dmrrowp1
4444 0, // sub_dmr1_then_sub_wacc_hi
4445 0, // sub_dmr1_then_sub_wacc_lo
4446 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4447 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4448 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4449 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4450 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4451 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4452 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4453 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4454 0, // sub_gp8_x1_then_sub_32
4455 },
4456 { // VSRpRC
4457 0, // sub_32
4458 0, // sub_32_hi_phony
4459 41, // sub_64 -> VSRpRC
4460 41, // sub_64_hi_phony -> VSRpRC
4461 0, // sub_dmr0
4462 0, // sub_dmr1
4463 0, // sub_dmrrow0
4464 0, // sub_dmrrow1
4465 0, // sub_dmrrowp0
4466 0, // sub_dmrrowp1
4467 0, // sub_eq
4468 0, // sub_fp0
4469 0, // sub_fp1
4470 0, // sub_gp8_x0
4471 0, // sub_gp8_x1
4472 0, // sub_gt
4473 0, // sub_lt
4474 0, // sub_pair0
4475 0, // sub_pair1
4476 0, // sub_un
4477 41, // sub_vsx0 -> VSRpRC
4478 41, // sub_vsx1 -> VSRpRC
4479 0, // sub_wacc_hi
4480 0, // sub_wacc_lo
4481 41, // sub_vsx1_then_sub_64 -> VSRpRC
4482 41, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC
4483 0, // sub_pair1_then_sub_64
4484 0, // sub_pair1_then_sub_64_hi_phony
4485 0, // sub_pair1_then_sub_vsx0
4486 0, // sub_pair1_then_sub_vsx1
4487 0, // sub_pair1_then_sub_vsx1_then_sub_64
4488 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4489 0, // sub_dmrrowp1_then_sub_dmrrow0
4490 0, // sub_dmrrowp1_then_sub_dmrrow1
4491 0, // sub_wacc_hi_then_sub_dmrrow0
4492 0, // sub_wacc_hi_then_sub_dmrrow1
4493 0, // sub_wacc_hi_then_sub_dmrrowp0
4494 0, // sub_wacc_hi_then_sub_dmrrowp1
4495 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4496 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4497 0, // sub_dmr1_then_sub_dmrrow0
4498 0, // sub_dmr1_then_sub_dmrrow1
4499 0, // sub_dmr1_then_sub_dmrrowp0
4500 0, // sub_dmr1_then_sub_dmrrowp1
4501 0, // sub_dmr1_then_sub_wacc_hi
4502 0, // sub_dmr1_then_sub_wacc_lo
4503 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4504 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4505 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4506 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4507 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4508 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4509 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4510 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4511 0, // sub_gp8_x1_then_sub_32
4512 },
4513 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC
4514 0, // sub_32
4515 0, // sub_32_hi_phony
4516 42, // sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4517 42, // sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4518 0, // sub_dmr0
4519 0, // sub_dmr1
4520 0, // sub_dmrrow0
4521 0, // sub_dmrrow1
4522 0, // sub_dmrrowp0
4523 0, // sub_dmrrowp1
4524 0, // sub_eq
4525 0, // sub_fp0
4526 0, // sub_fp1
4527 0, // sub_gp8_x0
4528 0, // sub_gp8_x1
4529 0, // sub_gt
4530 0, // sub_lt
4531 0, // sub_pair0
4532 0, // sub_pair1
4533 0, // sub_un
4534 42, // sub_vsx0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4535 42, // sub_vsx1 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4536 0, // sub_wacc_hi
4537 0, // sub_wacc_lo
4538 42, // sub_vsx1_then_sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4539 42, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC
4540 0, // sub_pair1_then_sub_64
4541 0, // sub_pair1_then_sub_64_hi_phony
4542 0, // sub_pair1_then_sub_vsx0
4543 0, // sub_pair1_then_sub_vsx1
4544 0, // sub_pair1_then_sub_vsx1_then_sub_64
4545 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4546 0, // sub_dmrrowp1_then_sub_dmrrow0
4547 0, // sub_dmrrowp1_then_sub_dmrrow1
4548 0, // sub_wacc_hi_then_sub_dmrrow0
4549 0, // sub_wacc_hi_then_sub_dmrrow1
4550 0, // sub_wacc_hi_then_sub_dmrrowp0
4551 0, // sub_wacc_hi_then_sub_dmrrowp1
4552 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4553 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4554 0, // sub_dmr1_then_sub_dmrrow0
4555 0, // sub_dmr1_then_sub_dmrrow1
4556 0, // sub_dmr1_then_sub_dmrrowp0
4557 0, // sub_dmr1_then_sub_dmrrowp1
4558 0, // sub_dmr1_then_sub_wacc_hi
4559 0, // sub_dmr1_then_sub_wacc_lo
4560 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4561 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4562 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4563 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4564 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4565 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4566 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4567 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4568 0, // sub_gp8_x1_then_sub_32
4569 },
4570 { // VSRpRC_with_sub_64_in_F4RC
4571 0, // sub_32
4572 0, // sub_32_hi_phony
4573 43, // sub_64 -> VSRpRC_with_sub_64_in_F4RC
4574 43, // sub_64_hi_phony -> VSRpRC_with_sub_64_in_F4RC
4575 0, // sub_dmr0
4576 0, // sub_dmr1
4577 0, // sub_dmrrow0
4578 0, // sub_dmrrow1
4579 0, // sub_dmrrowp0
4580 0, // sub_dmrrowp1
4581 0, // sub_eq
4582 0, // sub_fp0
4583 0, // sub_fp1
4584 0, // sub_gp8_x0
4585 0, // sub_gp8_x1
4586 0, // sub_gt
4587 0, // sub_lt
4588 0, // sub_pair0
4589 0, // sub_pair1
4590 0, // sub_un
4591 43, // sub_vsx0 -> VSRpRC_with_sub_64_in_F4RC
4592 43, // sub_vsx1 -> VSRpRC_with_sub_64_in_F4RC
4593 0, // sub_wacc_hi
4594 0, // sub_wacc_lo
4595 43, // sub_vsx1_then_sub_64 -> VSRpRC_with_sub_64_in_F4RC
4596 43, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC_with_sub_64_in_F4RC
4597 0, // sub_pair1_then_sub_64
4598 0, // sub_pair1_then_sub_64_hi_phony
4599 0, // sub_pair1_then_sub_vsx0
4600 0, // sub_pair1_then_sub_vsx1
4601 0, // sub_pair1_then_sub_vsx1_then_sub_64
4602 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4603 0, // sub_dmrrowp1_then_sub_dmrrow0
4604 0, // sub_dmrrowp1_then_sub_dmrrow1
4605 0, // sub_wacc_hi_then_sub_dmrrow0
4606 0, // sub_wacc_hi_then_sub_dmrrow1
4607 0, // sub_wacc_hi_then_sub_dmrrowp0
4608 0, // sub_wacc_hi_then_sub_dmrrowp1
4609 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4610 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4611 0, // sub_dmr1_then_sub_dmrrow0
4612 0, // sub_dmr1_then_sub_dmrrow1
4613 0, // sub_dmr1_then_sub_dmrrowp0
4614 0, // sub_dmr1_then_sub_dmrrowp1
4615 0, // sub_dmr1_then_sub_wacc_hi
4616 0, // sub_dmr1_then_sub_wacc_lo
4617 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4618 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4619 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4620 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4621 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4622 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4623 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4624 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4625 0, // sub_gp8_x1_then_sub_32
4626 },
4627 { // VSRpRC_with_sub_64_in_VFRC
4628 0, // sub_32
4629 0, // sub_32_hi_phony
4630 44, // sub_64 -> VSRpRC_with_sub_64_in_VFRC
4631 44, // sub_64_hi_phony -> VSRpRC_with_sub_64_in_VFRC
4632 0, // sub_dmr0
4633 0, // sub_dmr1
4634 0, // sub_dmrrow0
4635 0, // sub_dmrrow1
4636 0, // sub_dmrrowp0
4637 0, // sub_dmrrowp1
4638 0, // sub_eq
4639 0, // sub_fp0
4640 0, // sub_fp1
4641 0, // sub_gp8_x0
4642 0, // sub_gp8_x1
4643 0, // sub_gt
4644 0, // sub_lt
4645 0, // sub_pair0
4646 0, // sub_pair1
4647 0, // sub_un
4648 44, // sub_vsx0 -> VSRpRC_with_sub_64_in_VFRC
4649 44, // sub_vsx1 -> VSRpRC_with_sub_64_in_VFRC
4650 0, // sub_wacc_hi
4651 0, // sub_wacc_lo
4652 44, // sub_vsx1_then_sub_64 -> VSRpRC_with_sub_64_in_VFRC
4653 44, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC_with_sub_64_in_VFRC
4654 0, // sub_pair1_then_sub_64
4655 0, // sub_pair1_then_sub_64_hi_phony
4656 0, // sub_pair1_then_sub_vsx0
4657 0, // sub_pair1_then_sub_vsx1
4658 0, // sub_pair1_then_sub_vsx1_then_sub_64
4659 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4660 0, // sub_dmrrowp1_then_sub_dmrrow0
4661 0, // sub_dmrrowp1_then_sub_dmrrow1
4662 0, // sub_wacc_hi_then_sub_dmrrow0
4663 0, // sub_wacc_hi_then_sub_dmrrow1
4664 0, // sub_wacc_hi_then_sub_dmrrowp0
4665 0, // sub_wacc_hi_then_sub_dmrrowp1
4666 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4667 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4668 0, // sub_dmr1_then_sub_dmrrow0
4669 0, // sub_dmr1_then_sub_dmrrow1
4670 0, // sub_dmr1_then_sub_dmrrowp0
4671 0, // sub_dmr1_then_sub_dmrrowp1
4672 0, // sub_dmr1_then_sub_wacc_hi
4673 0, // sub_dmr1_then_sub_wacc_lo
4674 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4675 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4676 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4677 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4678 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4679 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4680 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4681 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4682 0, // sub_gp8_x1_then_sub_32
4683 },
4684 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4685 0, // sub_32
4686 0, // sub_32_hi_phony
4687 45, // sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4688 45, // sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4689 0, // sub_dmr0
4690 0, // sub_dmr1
4691 0, // sub_dmrrow0
4692 0, // sub_dmrrow1
4693 0, // sub_dmrrowp0
4694 0, // sub_dmrrowp1
4695 0, // sub_eq
4696 0, // sub_fp0
4697 0, // sub_fp1
4698 0, // sub_gp8_x0
4699 0, // sub_gp8_x1
4700 0, // sub_gt
4701 0, // sub_lt
4702 0, // sub_pair0
4703 0, // sub_pair1
4704 0, // sub_un
4705 45, // sub_vsx0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4706 45, // sub_vsx1 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4707 0, // sub_wacc_hi
4708 0, // sub_wacc_lo
4709 45, // sub_vsx1_then_sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4710 45, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
4711 0, // sub_pair1_then_sub_64
4712 0, // sub_pair1_then_sub_64_hi_phony
4713 0, // sub_pair1_then_sub_vsx0
4714 0, // sub_pair1_then_sub_vsx1
4715 0, // sub_pair1_then_sub_vsx1_then_sub_64
4716 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4717 0, // sub_dmrrowp1_then_sub_dmrrow0
4718 0, // sub_dmrrowp1_then_sub_dmrrow1
4719 0, // sub_wacc_hi_then_sub_dmrrow0
4720 0, // sub_wacc_hi_then_sub_dmrrow1
4721 0, // sub_wacc_hi_then_sub_dmrrowp0
4722 0, // sub_wacc_hi_then_sub_dmrrowp1
4723 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4724 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4725 0, // sub_dmr1_then_sub_dmrrow0
4726 0, // sub_dmr1_then_sub_dmrrow1
4727 0, // sub_dmr1_then_sub_dmrrowp0
4728 0, // sub_dmr1_then_sub_dmrrowp1
4729 0, // sub_dmr1_then_sub_wacc_hi
4730 0, // sub_dmr1_then_sub_wacc_lo
4731 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4732 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4733 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4734 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4735 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4736 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4737 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4738 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4739 0, // sub_gp8_x1_then_sub_32
4740 },
4741 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4742 0, // sub_32
4743 0, // sub_32_hi_phony
4744 46, // sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4745 46, // sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4746 0, // sub_dmr0
4747 0, // sub_dmr1
4748 0, // sub_dmrrow0
4749 0, // sub_dmrrow1
4750 0, // sub_dmrrowp0
4751 0, // sub_dmrrowp1
4752 0, // sub_eq
4753 0, // sub_fp0
4754 0, // sub_fp1
4755 0, // sub_gp8_x0
4756 0, // sub_gp8_x1
4757 0, // sub_gt
4758 0, // sub_lt
4759 0, // sub_pair0
4760 0, // sub_pair1
4761 0, // sub_un
4762 46, // sub_vsx0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4763 46, // sub_vsx1 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4764 0, // sub_wacc_hi
4765 0, // sub_wacc_lo
4766 46, // sub_vsx1_then_sub_64 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4767 46, // sub_vsx1_then_sub_64_hi_phony -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
4768 0, // sub_pair1_then_sub_64
4769 0, // sub_pair1_then_sub_64_hi_phony
4770 0, // sub_pair1_then_sub_vsx0
4771 0, // sub_pair1_then_sub_vsx1
4772 0, // sub_pair1_then_sub_vsx1_then_sub_64
4773 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4774 0, // sub_dmrrowp1_then_sub_dmrrow0
4775 0, // sub_dmrrowp1_then_sub_dmrrow1
4776 0, // sub_wacc_hi_then_sub_dmrrow0
4777 0, // sub_wacc_hi_then_sub_dmrrow1
4778 0, // sub_wacc_hi_then_sub_dmrrowp0
4779 0, // sub_wacc_hi_then_sub_dmrrowp1
4780 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4781 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4782 0, // sub_dmr1_then_sub_dmrrow0
4783 0, // sub_dmr1_then_sub_dmrrow1
4784 0, // sub_dmr1_then_sub_dmrrowp0
4785 0, // sub_dmr1_then_sub_dmrrowp1
4786 0, // sub_dmr1_then_sub_wacc_hi
4787 0, // sub_dmr1_then_sub_wacc_lo
4788 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4789 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4790 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4791 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4792 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4793 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4794 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4795 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4796 0, // sub_gp8_x1_then_sub_32
4797 },
4798 { // ACCRC
4799 0, // sub_32
4800 0, // sub_32_hi_phony
4801 47, // sub_64 -> ACCRC
4802 47, // sub_64_hi_phony -> ACCRC
4803 0, // sub_dmr0
4804 0, // sub_dmr1
4805 0, // sub_dmrrow0
4806 0, // sub_dmrrow1
4807 0, // sub_dmrrowp0
4808 0, // sub_dmrrowp1
4809 0, // sub_eq
4810 0, // sub_fp0
4811 0, // sub_fp1
4812 0, // sub_gp8_x0
4813 0, // sub_gp8_x1
4814 0, // sub_gt
4815 0, // sub_lt
4816 47, // sub_pair0 -> ACCRC
4817 47, // sub_pair1 -> ACCRC
4818 0, // sub_un
4819 47, // sub_vsx0 -> ACCRC
4820 47, // sub_vsx1 -> ACCRC
4821 0, // sub_wacc_hi
4822 0, // sub_wacc_lo
4823 47, // sub_vsx1_then_sub_64 -> ACCRC
4824 47, // sub_vsx1_then_sub_64_hi_phony -> ACCRC
4825 47, // sub_pair1_then_sub_64 -> ACCRC
4826 47, // sub_pair1_then_sub_64_hi_phony -> ACCRC
4827 47, // sub_pair1_then_sub_vsx0 -> ACCRC
4828 47, // sub_pair1_then_sub_vsx1 -> ACCRC
4829 47, // sub_pair1_then_sub_vsx1_then_sub_64 -> ACCRC
4830 47, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> ACCRC
4831 0, // sub_dmrrowp1_then_sub_dmrrow0
4832 0, // sub_dmrrowp1_then_sub_dmrrow1
4833 0, // sub_wacc_hi_then_sub_dmrrow0
4834 0, // sub_wacc_hi_then_sub_dmrrow1
4835 0, // sub_wacc_hi_then_sub_dmrrowp0
4836 0, // sub_wacc_hi_then_sub_dmrrowp1
4837 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4838 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4839 0, // sub_dmr1_then_sub_dmrrow0
4840 0, // sub_dmr1_then_sub_dmrrow1
4841 0, // sub_dmr1_then_sub_dmrrowp0
4842 0, // sub_dmr1_then_sub_dmrrowp1
4843 0, // sub_dmr1_then_sub_wacc_hi
4844 0, // sub_dmr1_then_sub_wacc_lo
4845 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4846 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4847 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4848 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4849 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4850 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4851 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4852 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4853 0, // sub_gp8_x1_then_sub_32
4854 },
4855 { // UACCRC
4856 0, // sub_32
4857 0, // sub_32_hi_phony
4858 48, // sub_64 -> UACCRC
4859 48, // sub_64_hi_phony -> UACCRC
4860 0, // sub_dmr0
4861 0, // sub_dmr1
4862 0, // sub_dmrrow0
4863 0, // sub_dmrrow1
4864 0, // sub_dmrrowp0
4865 0, // sub_dmrrowp1
4866 0, // sub_eq
4867 0, // sub_fp0
4868 0, // sub_fp1
4869 0, // sub_gp8_x0
4870 0, // sub_gp8_x1
4871 0, // sub_gt
4872 0, // sub_lt
4873 48, // sub_pair0 -> UACCRC
4874 48, // sub_pair1 -> UACCRC
4875 0, // sub_un
4876 48, // sub_vsx0 -> UACCRC
4877 48, // sub_vsx1 -> UACCRC
4878 0, // sub_wacc_hi
4879 0, // sub_wacc_lo
4880 48, // sub_vsx1_then_sub_64 -> UACCRC
4881 48, // sub_vsx1_then_sub_64_hi_phony -> UACCRC
4882 48, // sub_pair1_then_sub_64 -> UACCRC
4883 48, // sub_pair1_then_sub_64_hi_phony -> UACCRC
4884 48, // sub_pair1_then_sub_vsx0 -> UACCRC
4885 48, // sub_pair1_then_sub_vsx1 -> UACCRC
4886 48, // sub_pair1_then_sub_vsx1_then_sub_64 -> UACCRC
4887 48, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> UACCRC
4888 0, // sub_dmrrowp1_then_sub_dmrrow0
4889 0, // sub_dmrrowp1_then_sub_dmrrow1
4890 0, // sub_wacc_hi_then_sub_dmrrow0
4891 0, // sub_wacc_hi_then_sub_dmrrow1
4892 0, // sub_wacc_hi_then_sub_dmrrowp0
4893 0, // sub_wacc_hi_then_sub_dmrrowp1
4894 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4895 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4896 0, // sub_dmr1_then_sub_dmrrow0
4897 0, // sub_dmr1_then_sub_dmrrow1
4898 0, // sub_dmr1_then_sub_dmrrowp0
4899 0, // sub_dmr1_then_sub_dmrrowp1
4900 0, // sub_dmr1_then_sub_wacc_hi
4901 0, // sub_dmr1_then_sub_wacc_lo
4902 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4903 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4904 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4905 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4906 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4907 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4908 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4909 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4910 0, // sub_gp8_x1_then_sub_32
4911 },
4912 { // WACCRC
4913 0, // sub_32
4914 0, // sub_32_hi_phony
4915 0, // sub_64
4916 0, // sub_64_hi_phony
4917 0, // sub_dmr0
4918 0, // sub_dmr1
4919 49, // sub_dmrrow0 -> WACCRC
4920 49, // sub_dmrrow1 -> WACCRC
4921 49, // sub_dmrrowp0 -> WACCRC
4922 49, // sub_dmrrowp1 -> WACCRC
4923 0, // sub_eq
4924 0, // sub_fp0
4925 0, // sub_fp1
4926 0, // sub_gp8_x0
4927 0, // sub_gp8_x1
4928 0, // sub_gt
4929 0, // sub_lt
4930 0, // sub_pair0
4931 0, // sub_pair1
4932 0, // sub_un
4933 0, // sub_vsx0
4934 0, // sub_vsx1
4935 0, // sub_wacc_hi
4936 0, // sub_wacc_lo
4937 0, // sub_vsx1_then_sub_64
4938 0, // sub_vsx1_then_sub_64_hi_phony
4939 0, // sub_pair1_then_sub_64
4940 0, // sub_pair1_then_sub_64_hi_phony
4941 0, // sub_pair1_then_sub_vsx0
4942 0, // sub_pair1_then_sub_vsx1
4943 0, // sub_pair1_then_sub_vsx1_then_sub_64
4944 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
4945 49, // sub_dmrrowp1_then_sub_dmrrow0 -> WACCRC
4946 49, // sub_dmrrowp1_then_sub_dmrrow1 -> WACCRC
4947 0, // sub_wacc_hi_then_sub_dmrrow0
4948 0, // sub_wacc_hi_then_sub_dmrrow1
4949 0, // sub_wacc_hi_then_sub_dmrrowp0
4950 0, // sub_wacc_hi_then_sub_dmrrowp1
4951 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4952 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4953 0, // sub_dmr1_then_sub_dmrrow0
4954 0, // sub_dmr1_then_sub_dmrrow1
4955 0, // sub_dmr1_then_sub_dmrrowp0
4956 0, // sub_dmr1_then_sub_dmrrowp1
4957 0, // sub_dmr1_then_sub_wacc_hi
4958 0, // sub_dmr1_then_sub_wacc_lo
4959 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
4960 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
4961 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
4962 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
4963 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
4964 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
4965 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
4966 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
4967 0, // sub_gp8_x1_then_sub_32
4968 },
4969 { // WACC_HIRC
4970 0, // sub_32
4971 0, // sub_32_hi_phony
4972 0, // sub_64
4973 0, // sub_64_hi_phony
4974 0, // sub_dmr0
4975 0, // sub_dmr1
4976 50, // sub_dmrrow0 -> WACC_HIRC
4977 50, // sub_dmrrow1 -> WACC_HIRC
4978 50, // sub_dmrrowp0 -> WACC_HIRC
4979 50, // sub_dmrrowp1 -> WACC_HIRC
4980 0, // sub_eq
4981 0, // sub_fp0
4982 0, // sub_fp1
4983 0, // sub_gp8_x0
4984 0, // sub_gp8_x1
4985 0, // sub_gt
4986 0, // sub_lt
4987 0, // sub_pair0
4988 0, // sub_pair1
4989 0, // sub_un
4990 0, // sub_vsx0
4991 0, // sub_vsx1
4992 0, // sub_wacc_hi
4993 0, // sub_wacc_lo
4994 0, // sub_vsx1_then_sub_64
4995 0, // sub_vsx1_then_sub_64_hi_phony
4996 0, // sub_pair1_then_sub_64
4997 0, // sub_pair1_then_sub_64_hi_phony
4998 0, // sub_pair1_then_sub_vsx0
4999 0, // sub_pair1_then_sub_vsx1
5000 0, // sub_pair1_then_sub_vsx1_then_sub_64
5001 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5002 50, // sub_dmrrowp1_then_sub_dmrrow0 -> WACC_HIRC
5003 50, // sub_dmrrowp1_then_sub_dmrrow1 -> WACC_HIRC
5004 0, // sub_wacc_hi_then_sub_dmrrow0
5005 0, // sub_wacc_hi_then_sub_dmrrow1
5006 0, // sub_wacc_hi_then_sub_dmrrowp0
5007 0, // sub_wacc_hi_then_sub_dmrrowp1
5008 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5009 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5010 0, // sub_dmr1_then_sub_dmrrow0
5011 0, // sub_dmr1_then_sub_dmrrow1
5012 0, // sub_dmr1_then_sub_dmrrowp0
5013 0, // sub_dmr1_then_sub_dmrrowp1
5014 0, // sub_dmr1_then_sub_wacc_hi
5015 0, // sub_dmr1_then_sub_wacc_lo
5016 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5017 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5018 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5019 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5020 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5021 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5022 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5023 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5024 0, // sub_gp8_x1_then_sub_32
5025 },
5026 { // ACCRC_with_sub_64_in_SPILLTOVSRRC
5027 0, // sub_32
5028 0, // sub_32_hi_phony
5029 51, // sub_64 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5030 51, // sub_64_hi_phony -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5031 0, // sub_dmr0
5032 0, // sub_dmr1
5033 0, // sub_dmrrow0
5034 0, // sub_dmrrow1
5035 0, // sub_dmrrowp0
5036 0, // sub_dmrrowp1
5037 0, // sub_eq
5038 0, // sub_fp0
5039 0, // sub_fp1
5040 0, // sub_gp8_x0
5041 0, // sub_gp8_x1
5042 0, // sub_gt
5043 0, // sub_lt
5044 51, // sub_pair0 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5045 51, // sub_pair1 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5046 0, // sub_un
5047 51, // sub_vsx0 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5048 51, // sub_vsx1 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5049 0, // sub_wacc_hi
5050 0, // sub_wacc_lo
5051 51, // sub_vsx1_then_sub_64 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5052 51, // sub_vsx1_then_sub_64_hi_phony -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5053 51, // sub_pair1_then_sub_64 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5054 51, // sub_pair1_then_sub_64_hi_phony -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5055 51, // sub_pair1_then_sub_vsx0 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5056 51, // sub_pair1_then_sub_vsx1 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5057 51, // sub_pair1_then_sub_vsx1_then_sub_64 -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5058 51, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> ACCRC_with_sub_64_in_SPILLTOVSRRC
5059 0, // sub_dmrrowp1_then_sub_dmrrow0
5060 0, // sub_dmrrowp1_then_sub_dmrrow1
5061 0, // sub_wacc_hi_then_sub_dmrrow0
5062 0, // sub_wacc_hi_then_sub_dmrrow1
5063 0, // sub_wacc_hi_then_sub_dmrrowp0
5064 0, // sub_wacc_hi_then_sub_dmrrowp1
5065 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5066 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5067 0, // sub_dmr1_then_sub_dmrrow0
5068 0, // sub_dmr1_then_sub_dmrrow1
5069 0, // sub_dmr1_then_sub_dmrrowp0
5070 0, // sub_dmr1_then_sub_dmrrowp1
5071 0, // sub_dmr1_then_sub_wacc_hi
5072 0, // sub_dmr1_then_sub_wacc_lo
5073 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5074 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5075 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5076 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5077 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5078 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5079 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5080 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5081 0, // sub_gp8_x1_then_sub_32
5082 },
5083 { // UACCRC_with_sub_64_in_SPILLTOVSRRC
5084 0, // sub_32
5085 0, // sub_32_hi_phony
5086 52, // sub_64 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5087 52, // sub_64_hi_phony -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5088 0, // sub_dmr0
5089 0, // sub_dmr1
5090 0, // sub_dmrrow0
5091 0, // sub_dmrrow1
5092 0, // sub_dmrrowp0
5093 0, // sub_dmrrowp1
5094 0, // sub_eq
5095 0, // sub_fp0
5096 0, // sub_fp1
5097 0, // sub_gp8_x0
5098 0, // sub_gp8_x1
5099 0, // sub_gt
5100 0, // sub_lt
5101 52, // sub_pair0 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5102 52, // sub_pair1 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5103 0, // sub_un
5104 52, // sub_vsx0 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5105 52, // sub_vsx1 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5106 0, // sub_wacc_hi
5107 0, // sub_wacc_lo
5108 52, // sub_vsx1_then_sub_64 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5109 52, // sub_vsx1_then_sub_64_hi_phony -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5110 52, // sub_pair1_then_sub_64 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5111 52, // sub_pair1_then_sub_64_hi_phony -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5112 52, // sub_pair1_then_sub_vsx0 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5113 52, // sub_pair1_then_sub_vsx1 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5114 52, // sub_pair1_then_sub_vsx1_then_sub_64 -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5115 52, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> UACCRC_with_sub_64_in_SPILLTOVSRRC
5116 0, // sub_dmrrowp1_then_sub_dmrrow0
5117 0, // sub_dmrrowp1_then_sub_dmrrow1
5118 0, // sub_wacc_hi_then_sub_dmrrow0
5119 0, // sub_wacc_hi_then_sub_dmrrow1
5120 0, // sub_wacc_hi_then_sub_dmrrowp0
5121 0, // sub_wacc_hi_then_sub_dmrrowp1
5122 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5123 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5124 0, // sub_dmr1_then_sub_dmrrow0
5125 0, // sub_dmr1_then_sub_dmrrow1
5126 0, // sub_dmr1_then_sub_dmrrowp0
5127 0, // sub_dmr1_then_sub_dmrrowp1
5128 0, // sub_dmr1_then_sub_wacc_hi
5129 0, // sub_dmr1_then_sub_wacc_lo
5130 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5131 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5132 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5133 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5134 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5135 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5136 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5137 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5138 0, // sub_gp8_x1_then_sub_32
5139 },
5140 { // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5141 0, // sub_32
5142 0, // sub_32_hi_phony
5143 53, // sub_64 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5144 53, // sub_64_hi_phony -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5145 0, // sub_dmr0
5146 0, // sub_dmr1
5147 0, // sub_dmrrow0
5148 0, // sub_dmrrow1
5149 0, // sub_dmrrowp0
5150 0, // sub_dmrrowp1
5151 0, // sub_eq
5152 0, // sub_fp0
5153 0, // sub_fp1
5154 0, // sub_gp8_x0
5155 0, // sub_gp8_x1
5156 0, // sub_gt
5157 0, // sub_lt
5158 53, // sub_pair0 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5159 53, // sub_pair1 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5160 0, // sub_un
5161 53, // sub_vsx0 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5162 53, // sub_vsx1 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5163 0, // sub_wacc_hi
5164 0, // sub_wacc_lo
5165 53, // sub_vsx1_then_sub_64 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5166 53, // sub_vsx1_then_sub_64_hi_phony -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5167 53, // sub_pair1_then_sub_64 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5168 53, // sub_pair1_then_sub_64_hi_phony -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5169 53, // sub_pair1_then_sub_vsx0 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5170 53, // sub_pair1_then_sub_vsx1 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5171 53, // sub_pair1_then_sub_vsx1_then_sub_64 -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5172 53, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5173 0, // sub_dmrrowp1_then_sub_dmrrow0
5174 0, // sub_dmrrowp1_then_sub_dmrrow1
5175 0, // sub_wacc_hi_then_sub_dmrrow0
5176 0, // sub_wacc_hi_then_sub_dmrrow1
5177 0, // sub_wacc_hi_then_sub_dmrrowp0
5178 0, // sub_wacc_hi_then_sub_dmrrowp1
5179 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5180 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5181 0, // sub_dmr1_then_sub_dmrrow0
5182 0, // sub_dmr1_then_sub_dmrrow1
5183 0, // sub_dmr1_then_sub_dmrrowp0
5184 0, // sub_dmr1_then_sub_dmrrowp1
5185 0, // sub_dmr1_then_sub_wacc_hi
5186 0, // sub_dmr1_then_sub_wacc_lo
5187 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5188 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5189 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5190 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5191 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5192 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5193 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5194 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5195 0, // sub_gp8_x1_then_sub_32
5196 },
5197 { // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5198 0, // sub_32
5199 0, // sub_32_hi_phony
5200 54, // sub_64 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5201 54, // sub_64_hi_phony -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5202 0, // sub_dmr0
5203 0, // sub_dmr1
5204 0, // sub_dmrrow0
5205 0, // sub_dmrrow1
5206 0, // sub_dmrrowp0
5207 0, // sub_dmrrowp1
5208 0, // sub_eq
5209 0, // sub_fp0
5210 0, // sub_fp1
5211 0, // sub_gp8_x0
5212 0, // sub_gp8_x1
5213 0, // sub_gt
5214 0, // sub_lt
5215 54, // sub_pair0 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5216 54, // sub_pair1 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5217 0, // sub_un
5218 54, // sub_vsx0 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5219 54, // sub_vsx1 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5220 0, // sub_wacc_hi
5221 0, // sub_wacc_lo
5222 54, // sub_vsx1_then_sub_64 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5223 54, // sub_vsx1_then_sub_64_hi_phony -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5224 54, // sub_pair1_then_sub_64 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5225 54, // sub_pair1_then_sub_64_hi_phony -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5226 54, // sub_pair1_then_sub_vsx0 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5227 54, // sub_pair1_then_sub_vsx1 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5228 54, // sub_pair1_then_sub_vsx1_then_sub_64 -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5229 54, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony -> UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
5230 0, // sub_dmrrowp1_then_sub_dmrrow0
5231 0, // sub_dmrrowp1_then_sub_dmrrow1
5232 0, // sub_wacc_hi_then_sub_dmrrow0
5233 0, // sub_wacc_hi_then_sub_dmrrow1
5234 0, // sub_wacc_hi_then_sub_dmrrowp0
5235 0, // sub_wacc_hi_then_sub_dmrrowp1
5236 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5237 0, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5238 0, // sub_dmr1_then_sub_dmrrow0
5239 0, // sub_dmr1_then_sub_dmrrow1
5240 0, // sub_dmr1_then_sub_dmrrowp0
5241 0, // sub_dmr1_then_sub_dmrrowp1
5242 0, // sub_dmr1_then_sub_wacc_hi
5243 0, // sub_dmr1_then_sub_wacc_lo
5244 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5245 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5246 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5247 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5248 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5249 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5250 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5251 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5252 0, // sub_gp8_x1_then_sub_32
5253 },
5254 { // DMRRC
5255 0, // sub_32
5256 0, // sub_32_hi_phony
5257 0, // sub_64
5258 0, // sub_64_hi_phony
5259 0, // sub_dmr0
5260 0, // sub_dmr1
5261 55, // sub_dmrrow0 -> DMRRC
5262 55, // sub_dmrrow1 -> DMRRC
5263 55, // sub_dmrrowp0 -> DMRRC
5264 55, // sub_dmrrowp1 -> DMRRC
5265 0, // sub_eq
5266 0, // sub_fp0
5267 0, // sub_fp1
5268 0, // sub_gp8_x0
5269 0, // sub_gp8_x1
5270 0, // sub_gt
5271 0, // sub_lt
5272 0, // sub_pair0
5273 0, // sub_pair1
5274 0, // sub_un
5275 0, // sub_vsx0
5276 0, // sub_vsx1
5277 55, // sub_wacc_hi -> DMRRC
5278 55, // sub_wacc_lo -> DMRRC
5279 0, // sub_vsx1_then_sub_64
5280 0, // sub_vsx1_then_sub_64_hi_phony
5281 0, // sub_pair1_then_sub_64
5282 0, // sub_pair1_then_sub_64_hi_phony
5283 0, // sub_pair1_then_sub_vsx0
5284 0, // sub_pair1_then_sub_vsx1
5285 0, // sub_pair1_then_sub_vsx1_then_sub_64
5286 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5287 55, // sub_dmrrowp1_then_sub_dmrrow0 -> DMRRC
5288 55, // sub_dmrrowp1_then_sub_dmrrow1 -> DMRRC
5289 55, // sub_wacc_hi_then_sub_dmrrow0 -> DMRRC
5290 55, // sub_wacc_hi_then_sub_dmrrow1 -> DMRRC
5291 55, // sub_wacc_hi_then_sub_dmrrowp0 -> DMRRC
5292 55, // sub_wacc_hi_then_sub_dmrrowp1 -> DMRRC
5293 55, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRRC
5294 55, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRRC
5295 0, // sub_dmr1_then_sub_dmrrow0
5296 0, // sub_dmr1_then_sub_dmrrow1
5297 0, // sub_dmr1_then_sub_dmrrowp0
5298 0, // sub_dmr1_then_sub_dmrrowp1
5299 0, // sub_dmr1_then_sub_wacc_hi
5300 0, // sub_dmr1_then_sub_wacc_lo
5301 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5302 0, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5303 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5304 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5305 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5306 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5307 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5308 0, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5309 0, // sub_gp8_x1_then_sub_32
5310 },
5311 { // DMRpRC
5312 0, // sub_32
5313 0, // sub_32_hi_phony
5314 0, // sub_64
5315 0, // sub_64_hi_phony
5316 56, // sub_dmr0 -> DMRpRC
5317 56, // sub_dmr1 -> DMRpRC
5318 56, // sub_dmrrow0 -> DMRpRC
5319 56, // sub_dmrrow1 -> DMRpRC
5320 56, // sub_dmrrowp0 -> DMRpRC
5321 56, // sub_dmrrowp1 -> DMRpRC
5322 0, // sub_eq
5323 0, // sub_fp0
5324 0, // sub_fp1
5325 0, // sub_gp8_x0
5326 0, // sub_gp8_x1
5327 0, // sub_gt
5328 0, // sub_lt
5329 0, // sub_pair0
5330 0, // sub_pair1
5331 0, // sub_un
5332 0, // sub_vsx0
5333 0, // sub_vsx1
5334 56, // sub_wacc_hi -> DMRpRC
5335 56, // sub_wacc_lo -> DMRpRC
5336 0, // sub_vsx1_then_sub_64
5337 0, // sub_vsx1_then_sub_64_hi_phony
5338 0, // sub_pair1_then_sub_64
5339 0, // sub_pair1_then_sub_64_hi_phony
5340 0, // sub_pair1_then_sub_vsx0
5341 0, // sub_pair1_then_sub_vsx1
5342 0, // sub_pair1_then_sub_vsx1_then_sub_64
5343 0, // sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5344 56, // sub_dmrrowp1_then_sub_dmrrow0 -> DMRpRC
5345 56, // sub_dmrrowp1_then_sub_dmrrow1 -> DMRpRC
5346 56, // sub_wacc_hi_then_sub_dmrrow0 -> DMRpRC
5347 56, // sub_wacc_hi_then_sub_dmrrow1 -> DMRpRC
5348 56, // sub_wacc_hi_then_sub_dmrrowp0 -> DMRpRC
5349 56, // sub_wacc_hi_then_sub_dmrrowp1 -> DMRpRC
5350 56, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRpRC
5351 56, // sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRpRC
5352 56, // sub_dmr1_then_sub_dmrrow0 -> DMRpRC
5353 56, // sub_dmr1_then_sub_dmrrow1 -> DMRpRC
5354 56, // sub_dmr1_then_sub_dmrrowp0 -> DMRpRC
5355 56, // sub_dmr1_then_sub_dmrrowp1 -> DMRpRC
5356 56, // sub_dmr1_then_sub_wacc_hi -> DMRpRC
5357 56, // sub_dmr1_then_sub_wacc_lo -> DMRpRC
5358 56, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRpRC
5359 56, // sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRpRC
5360 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0 -> DMRpRC
5361 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1 -> DMRpRC
5362 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0 -> DMRpRC
5363 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1 -> DMRpRC
5364 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRpRC
5365 56, // sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRpRC
5366 0, // sub_gp8_x1_then_sub_32
5367 },
5368
5369 };
5370 assert(RC && "Missing regclass");
5371 if (!Idx) return RC;
5372 --Idx;
5373 assert(Idx < 55 && "Bad subreg");
5374 unsigned TV = Table[RC->getID()][Idx];
5375 return TV ? getRegClass(i: TV - 1) : nullptr;
5376}const TargetRegisterClass *PPCGenRegisterInfo::getSubRegisterClass(const TargetRegisterClass *RC, unsigned Idx) const {
5377 static constexpr uint8_t Table[56][55] = {
5378 { // VSSRC
5379 0, // VSSRC:sub_32
5380 0, // VSSRC:sub_32_hi_phony
5381 0, // VSSRC:sub_64
5382 0, // VSSRC:sub_64_hi_phony
5383 0, // VSSRC:sub_dmr0
5384 0, // VSSRC:sub_dmr1
5385 0, // VSSRC:sub_dmrrow0
5386 0, // VSSRC:sub_dmrrow1
5387 0, // VSSRC:sub_dmrrowp0
5388 0, // VSSRC:sub_dmrrowp1
5389 0, // VSSRC:sub_eq
5390 0, // VSSRC:sub_fp0
5391 0, // VSSRC:sub_fp1
5392 0, // VSSRC:sub_gp8_x0
5393 0, // VSSRC:sub_gp8_x1
5394 0, // VSSRC:sub_gt
5395 0, // VSSRC:sub_lt
5396 0, // VSSRC:sub_pair0
5397 0, // VSSRC:sub_pair1
5398 0, // VSSRC:sub_un
5399 0, // VSSRC:sub_vsx0
5400 0, // VSSRC:sub_vsx1
5401 0, // VSSRC:sub_wacc_hi
5402 0, // VSSRC:sub_wacc_lo
5403 0, // VSSRC:sub_vsx1_then_sub_64
5404 0, // VSSRC:sub_vsx1_then_sub_64_hi_phony
5405 0, // VSSRC:sub_pair1_then_sub_64
5406 0, // VSSRC:sub_pair1_then_sub_64_hi_phony
5407 0, // VSSRC:sub_pair1_then_sub_vsx0
5408 0, // VSSRC:sub_pair1_then_sub_vsx1
5409 0, // VSSRC:sub_pair1_then_sub_vsx1_then_sub_64
5410 0, // VSSRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5411 0, // VSSRC:sub_dmrrowp1_then_sub_dmrrow0
5412 0, // VSSRC:sub_dmrrowp1_then_sub_dmrrow1
5413 0, // VSSRC:sub_wacc_hi_then_sub_dmrrow0
5414 0, // VSSRC:sub_wacc_hi_then_sub_dmrrow1
5415 0, // VSSRC:sub_wacc_hi_then_sub_dmrrowp0
5416 0, // VSSRC:sub_wacc_hi_then_sub_dmrrowp1
5417 0, // VSSRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5418 0, // VSSRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5419 0, // VSSRC:sub_dmr1_then_sub_dmrrow0
5420 0, // VSSRC:sub_dmr1_then_sub_dmrrow1
5421 0, // VSSRC:sub_dmr1_then_sub_dmrrowp0
5422 0, // VSSRC:sub_dmr1_then_sub_dmrrowp1
5423 0, // VSSRC:sub_dmr1_then_sub_wacc_hi
5424 0, // VSSRC:sub_dmr1_then_sub_wacc_lo
5425 0, // VSSRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5426 0, // VSSRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5427 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5428 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5429 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5430 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5431 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5432 0, // VSSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5433 0, // VSSRC:sub_gp8_x1_then_sub_32
5434 },
5435 { // GPRC
5436 0, // GPRC:sub_32
5437 0, // GPRC:sub_32_hi_phony
5438 0, // GPRC:sub_64
5439 0, // GPRC:sub_64_hi_phony
5440 0, // GPRC:sub_dmr0
5441 0, // GPRC:sub_dmr1
5442 0, // GPRC:sub_dmrrow0
5443 0, // GPRC:sub_dmrrow1
5444 0, // GPRC:sub_dmrrowp0
5445 0, // GPRC:sub_dmrrowp1
5446 0, // GPRC:sub_eq
5447 0, // GPRC:sub_fp0
5448 0, // GPRC:sub_fp1
5449 0, // GPRC:sub_gp8_x0
5450 0, // GPRC:sub_gp8_x1
5451 0, // GPRC:sub_gt
5452 0, // GPRC:sub_lt
5453 0, // GPRC:sub_pair0
5454 0, // GPRC:sub_pair1
5455 0, // GPRC:sub_un
5456 0, // GPRC:sub_vsx0
5457 0, // GPRC:sub_vsx1
5458 0, // GPRC:sub_wacc_hi
5459 0, // GPRC:sub_wacc_lo
5460 0, // GPRC:sub_vsx1_then_sub_64
5461 0, // GPRC:sub_vsx1_then_sub_64_hi_phony
5462 0, // GPRC:sub_pair1_then_sub_64
5463 0, // GPRC:sub_pair1_then_sub_64_hi_phony
5464 0, // GPRC:sub_pair1_then_sub_vsx0
5465 0, // GPRC:sub_pair1_then_sub_vsx1
5466 0, // GPRC:sub_pair1_then_sub_vsx1_then_sub_64
5467 0, // GPRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5468 0, // GPRC:sub_dmrrowp1_then_sub_dmrrow0
5469 0, // GPRC:sub_dmrrowp1_then_sub_dmrrow1
5470 0, // GPRC:sub_wacc_hi_then_sub_dmrrow0
5471 0, // GPRC:sub_wacc_hi_then_sub_dmrrow1
5472 0, // GPRC:sub_wacc_hi_then_sub_dmrrowp0
5473 0, // GPRC:sub_wacc_hi_then_sub_dmrrowp1
5474 0, // GPRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5475 0, // GPRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5476 0, // GPRC:sub_dmr1_then_sub_dmrrow0
5477 0, // GPRC:sub_dmr1_then_sub_dmrrow1
5478 0, // GPRC:sub_dmr1_then_sub_dmrrowp0
5479 0, // GPRC:sub_dmr1_then_sub_dmrrowp1
5480 0, // GPRC:sub_dmr1_then_sub_wacc_hi
5481 0, // GPRC:sub_dmr1_then_sub_wacc_lo
5482 0, // GPRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5483 0, // GPRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5484 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5485 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5486 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5487 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5488 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5489 0, // GPRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5490 0, // GPRC:sub_gp8_x1_then_sub_32
5491 },
5492 { // GPRC_NOR0
5493 0, // GPRC_NOR0:sub_32
5494 0, // GPRC_NOR0:sub_32_hi_phony
5495 0, // GPRC_NOR0:sub_64
5496 0, // GPRC_NOR0:sub_64_hi_phony
5497 0, // GPRC_NOR0:sub_dmr0
5498 0, // GPRC_NOR0:sub_dmr1
5499 0, // GPRC_NOR0:sub_dmrrow0
5500 0, // GPRC_NOR0:sub_dmrrow1
5501 0, // GPRC_NOR0:sub_dmrrowp0
5502 0, // GPRC_NOR0:sub_dmrrowp1
5503 0, // GPRC_NOR0:sub_eq
5504 0, // GPRC_NOR0:sub_fp0
5505 0, // GPRC_NOR0:sub_fp1
5506 0, // GPRC_NOR0:sub_gp8_x0
5507 0, // GPRC_NOR0:sub_gp8_x1
5508 0, // GPRC_NOR0:sub_gt
5509 0, // GPRC_NOR0:sub_lt
5510 0, // GPRC_NOR0:sub_pair0
5511 0, // GPRC_NOR0:sub_pair1
5512 0, // GPRC_NOR0:sub_un
5513 0, // GPRC_NOR0:sub_vsx0
5514 0, // GPRC_NOR0:sub_vsx1
5515 0, // GPRC_NOR0:sub_wacc_hi
5516 0, // GPRC_NOR0:sub_wacc_lo
5517 0, // GPRC_NOR0:sub_vsx1_then_sub_64
5518 0, // GPRC_NOR0:sub_vsx1_then_sub_64_hi_phony
5519 0, // GPRC_NOR0:sub_pair1_then_sub_64
5520 0, // GPRC_NOR0:sub_pair1_then_sub_64_hi_phony
5521 0, // GPRC_NOR0:sub_pair1_then_sub_vsx0
5522 0, // GPRC_NOR0:sub_pair1_then_sub_vsx1
5523 0, // GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64
5524 0, // GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5525 0, // GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow0
5526 0, // GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow1
5527 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow0
5528 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow1
5529 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp0
5530 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1
5531 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5532 0, // GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5533 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrow0
5534 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrow1
5535 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrowp0
5536 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1
5537 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi
5538 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_lo
5539 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5540 0, // GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5541 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5542 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5543 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5544 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5545 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5546 0, // GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5547 0, // GPRC_NOR0:sub_gp8_x1_then_sub_32
5548 },
5549 { // GPRC_and_GPRC_NOR0
5550 0, // GPRC_and_GPRC_NOR0:sub_32
5551 0, // GPRC_and_GPRC_NOR0:sub_32_hi_phony
5552 0, // GPRC_and_GPRC_NOR0:sub_64
5553 0, // GPRC_and_GPRC_NOR0:sub_64_hi_phony
5554 0, // GPRC_and_GPRC_NOR0:sub_dmr0
5555 0, // GPRC_and_GPRC_NOR0:sub_dmr1
5556 0, // GPRC_and_GPRC_NOR0:sub_dmrrow0
5557 0, // GPRC_and_GPRC_NOR0:sub_dmrrow1
5558 0, // GPRC_and_GPRC_NOR0:sub_dmrrowp0
5559 0, // GPRC_and_GPRC_NOR0:sub_dmrrowp1
5560 0, // GPRC_and_GPRC_NOR0:sub_eq
5561 0, // GPRC_and_GPRC_NOR0:sub_fp0
5562 0, // GPRC_and_GPRC_NOR0:sub_fp1
5563 0, // GPRC_and_GPRC_NOR0:sub_gp8_x0
5564 0, // GPRC_and_GPRC_NOR0:sub_gp8_x1
5565 0, // GPRC_and_GPRC_NOR0:sub_gt
5566 0, // GPRC_and_GPRC_NOR0:sub_lt
5567 0, // GPRC_and_GPRC_NOR0:sub_pair0
5568 0, // GPRC_and_GPRC_NOR0:sub_pair1
5569 0, // GPRC_and_GPRC_NOR0:sub_un
5570 0, // GPRC_and_GPRC_NOR0:sub_vsx0
5571 0, // GPRC_and_GPRC_NOR0:sub_vsx1
5572 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi
5573 0, // GPRC_and_GPRC_NOR0:sub_wacc_lo
5574 0, // GPRC_and_GPRC_NOR0:sub_vsx1_then_sub_64
5575 0, // GPRC_and_GPRC_NOR0:sub_vsx1_then_sub_64_hi_phony
5576 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_64
5577 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_64_hi_phony
5578 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_vsx0
5579 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_vsx1
5580 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64
5581 0, // GPRC_and_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5582 0, // GPRC_and_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow0
5583 0, // GPRC_and_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow1
5584 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow0
5585 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow1
5586 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp0
5587 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1
5588 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5589 0, // GPRC_and_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5590 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrow0
5591 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrow1
5592 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp0
5593 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1
5594 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi
5595 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_lo
5596 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5597 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5598 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5599 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5600 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5601 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5602 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5603 0, // GPRC_and_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5604 0, // GPRC_and_GPRC_NOR0:sub_gp8_x1_then_sub_32
5605 },
5606 { // CRBITRC
5607 0, // CRBITRC:sub_32
5608 0, // CRBITRC:sub_32_hi_phony
5609 0, // CRBITRC:sub_64
5610 0, // CRBITRC:sub_64_hi_phony
5611 0, // CRBITRC:sub_dmr0
5612 0, // CRBITRC:sub_dmr1
5613 0, // CRBITRC:sub_dmrrow0
5614 0, // CRBITRC:sub_dmrrow1
5615 0, // CRBITRC:sub_dmrrowp0
5616 0, // CRBITRC:sub_dmrrowp1
5617 0, // CRBITRC:sub_eq
5618 0, // CRBITRC:sub_fp0
5619 0, // CRBITRC:sub_fp1
5620 0, // CRBITRC:sub_gp8_x0
5621 0, // CRBITRC:sub_gp8_x1
5622 0, // CRBITRC:sub_gt
5623 0, // CRBITRC:sub_lt
5624 0, // CRBITRC:sub_pair0
5625 0, // CRBITRC:sub_pair1
5626 0, // CRBITRC:sub_un
5627 0, // CRBITRC:sub_vsx0
5628 0, // CRBITRC:sub_vsx1
5629 0, // CRBITRC:sub_wacc_hi
5630 0, // CRBITRC:sub_wacc_lo
5631 0, // CRBITRC:sub_vsx1_then_sub_64
5632 0, // CRBITRC:sub_vsx1_then_sub_64_hi_phony
5633 0, // CRBITRC:sub_pair1_then_sub_64
5634 0, // CRBITRC:sub_pair1_then_sub_64_hi_phony
5635 0, // CRBITRC:sub_pair1_then_sub_vsx0
5636 0, // CRBITRC:sub_pair1_then_sub_vsx1
5637 0, // CRBITRC:sub_pair1_then_sub_vsx1_then_sub_64
5638 0, // CRBITRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5639 0, // CRBITRC:sub_dmrrowp1_then_sub_dmrrow0
5640 0, // CRBITRC:sub_dmrrowp1_then_sub_dmrrow1
5641 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrow0
5642 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrow1
5643 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrowp0
5644 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrowp1
5645 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5646 0, // CRBITRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5647 0, // CRBITRC:sub_dmr1_then_sub_dmrrow0
5648 0, // CRBITRC:sub_dmr1_then_sub_dmrrow1
5649 0, // CRBITRC:sub_dmr1_then_sub_dmrrowp0
5650 0, // CRBITRC:sub_dmr1_then_sub_dmrrowp1
5651 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi
5652 0, // CRBITRC:sub_dmr1_then_sub_wacc_lo
5653 0, // CRBITRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5654 0, // CRBITRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5655 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5656 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5657 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5658 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5659 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5660 0, // CRBITRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5661 0, // CRBITRC:sub_gp8_x1_then_sub_32
5662 },
5663 { // F4RC
5664 0, // F4RC:sub_32
5665 0, // F4RC:sub_32_hi_phony
5666 0, // F4RC:sub_64
5667 0, // F4RC:sub_64_hi_phony
5668 0, // F4RC:sub_dmr0
5669 0, // F4RC:sub_dmr1
5670 0, // F4RC:sub_dmrrow0
5671 0, // F4RC:sub_dmrrow1
5672 0, // F4RC:sub_dmrrowp0
5673 0, // F4RC:sub_dmrrowp1
5674 0, // F4RC:sub_eq
5675 0, // F4RC:sub_fp0
5676 0, // F4RC:sub_fp1
5677 0, // F4RC:sub_gp8_x0
5678 0, // F4RC:sub_gp8_x1
5679 0, // F4RC:sub_gt
5680 0, // F4RC:sub_lt
5681 0, // F4RC:sub_pair0
5682 0, // F4RC:sub_pair1
5683 0, // F4RC:sub_un
5684 0, // F4RC:sub_vsx0
5685 0, // F4RC:sub_vsx1
5686 0, // F4RC:sub_wacc_hi
5687 0, // F4RC:sub_wacc_lo
5688 0, // F4RC:sub_vsx1_then_sub_64
5689 0, // F4RC:sub_vsx1_then_sub_64_hi_phony
5690 0, // F4RC:sub_pair1_then_sub_64
5691 0, // F4RC:sub_pair1_then_sub_64_hi_phony
5692 0, // F4RC:sub_pair1_then_sub_vsx0
5693 0, // F4RC:sub_pair1_then_sub_vsx1
5694 0, // F4RC:sub_pair1_then_sub_vsx1_then_sub_64
5695 0, // F4RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5696 0, // F4RC:sub_dmrrowp1_then_sub_dmrrow0
5697 0, // F4RC:sub_dmrrowp1_then_sub_dmrrow1
5698 0, // F4RC:sub_wacc_hi_then_sub_dmrrow0
5699 0, // F4RC:sub_wacc_hi_then_sub_dmrrow1
5700 0, // F4RC:sub_wacc_hi_then_sub_dmrrowp0
5701 0, // F4RC:sub_wacc_hi_then_sub_dmrrowp1
5702 0, // F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5703 0, // F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5704 0, // F4RC:sub_dmr1_then_sub_dmrrow0
5705 0, // F4RC:sub_dmr1_then_sub_dmrrow1
5706 0, // F4RC:sub_dmr1_then_sub_dmrrowp0
5707 0, // F4RC:sub_dmr1_then_sub_dmrrowp1
5708 0, // F4RC:sub_dmr1_then_sub_wacc_hi
5709 0, // F4RC:sub_dmr1_then_sub_wacc_lo
5710 0, // F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5711 0, // F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5712 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5713 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5714 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5715 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5716 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5717 0, // F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5718 0, // F4RC:sub_gp8_x1_then_sub_32
5719 },
5720 { // GPRC32
5721 0, // GPRC32:sub_32
5722 0, // GPRC32:sub_32_hi_phony
5723 0, // GPRC32:sub_64
5724 0, // GPRC32:sub_64_hi_phony
5725 0, // GPRC32:sub_dmr0
5726 0, // GPRC32:sub_dmr1
5727 0, // GPRC32:sub_dmrrow0
5728 0, // GPRC32:sub_dmrrow1
5729 0, // GPRC32:sub_dmrrowp0
5730 0, // GPRC32:sub_dmrrowp1
5731 0, // GPRC32:sub_eq
5732 0, // GPRC32:sub_fp0
5733 0, // GPRC32:sub_fp1
5734 0, // GPRC32:sub_gp8_x0
5735 0, // GPRC32:sub_gp8_x1
5736 0, // GPRC32:sub_gt
5737 0, // GPRC32:sub_lt
5738 0, // GPRC32:sub_pair0
5739 0, // GPRC32:sub_pair1
5740 0, // GPRC32:sub_un
5741 0, // GPRC32:sub_vsx0
5742 0, // GPRC32:sub_vsx1
5743 0, // GPRC32:sub_wacc_hi
5744 0, // GPRC32:sub_wacc_lo
5745 0, // GPRC32:sub_vsx1_then_sub_64
5746 0, // GPRC32:sub_vsx1_then_sub_64_hi_phony
5747 0, // GPRC32:sub_pair1_then_sub_64
5748 0, // GPRC32:sub_pair1_then_sub_64_hi_phony
5749 0, // GPRC32:sub_pair1_then_sub_vsx0
5750 0, // GPRC32:sub_pair1_then_sub_vsx1
5751 0, // GPRC32:sub_pair1_then_sub_vsx1_then_sub_64
5752 0, // GPRC32:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5753 0, // GPRC32:sub_dmrrowp1_then_sub_dmrrow0
5754 0, // GPRC32:sub_dmrrowp1_then_sub_dmrrow1
5755 0, // GPRC32:sub_wacc_hi_then_sub_dmrrow0
5756 0, // GPRC32:sub_wacc_hi_then_sub_dmrrow1
5757 0, // GPRC32:sub_wacc_hi_then_sub_dmrrowp0
5758 0, // GPRC32:sub_wacc_hi_then_sub_dmrrowp1
5759 0, // GPRC32:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5760 0, // GPRC32:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5761 0, // GPRC32:sub_dmr1_then_sub_dmrrow0
5762 0, // GPRC32:sub_dmr1_then_sub_dmrrow1
5763 0, // GPRC32:sub_dmr1_then_sub_dmrrowp0
5764 0, // GPRC32:sub_dmr1_then_sub_dmrrowp1
5765 0, // GPRC32:sub_dmr1_then_sub_wacc_hi
5766 0, // GPRC32:sub_dmr1_then_sub_wacc_lo
5767 0, // GPRC32:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5768 0, // GPRC32:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5769 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5770 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5771 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5772 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5773 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5774 0, // GPRC32:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5775 0, // GPRC32:sub_gp8_x1_then_sub_32
5776 },
5777 { // CRRC
5778 0, // CRRC:sub_32
5779 0, // CRRC:sub_32_hi_phony
5780 0, // CRRC:sub_64
5781 0, // CRRC:sub_64_hi_phony
5782 0, // CRRC:sub_dmr0
5783 0, // CRRC:sub_dmr1
5784 0, // CRRC:sub_dmrrow0
5785 0, // CRRC:sub_dmrrow1
5786 0, // CRRC:sub_dmrrowp0
5787 0, // CRRC:sub_dmrrowp1
5788 5, // CRRC:sub_eq -> CRBITRC
5789 0, // CRRC:sub_fp0
5790 0, // CRRC:sub_fp1
5791 0, // CRRC:sub_gp8_x0
5792 0, // CRRC:sub_gp8_x1
5793 5, // CRRC:sub_gt -> CRBITRC
5794 5, // CRRC:sub_lt -> CRBITRC
5795 0, // CRRC:sub_pair0
5796 0, // CRRC:sub_pair1
5797 5, // CRRC:sub_un -> CRBITRC
5798 0, // CRRC:sub_vsx0
5799 0, // CRRC:sub_vsx1
5800 0, // CRRC:sub_wacc_hi
5801 0, // CRRC:sub_wacc_lo
5802 0, // CRRC:sub_vsx1_then_sub_64
5803 0, // CRRC:sub_vsx1_then_sub_64_hi_phony
5804 0, // CRRC:sub_pair1_then_sub_64
5805 0, // CRRC:sub_pair1_then_sub_64_hi_phony
5806 0, // CRRC:sub_pair1_then_sub_vsx0
5807 0, // CRRC:sub_pair1_then_sub_vsx1
5808 0, // CRRC:sub_pair1_then_sub_vsx1_then_sub_64
5809 0, // CRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5810 0, // CRRC:sub_dmrrowp1_then_sub_dmrrow0
5811 0, // CRRC:sub_dmrrowp1_then_sub_dmrrow1
5812 0, // CRRC:sub_wacc_hi_then_sub_dmrrow0
5813 0, // CRRC:sub_wacc_hi_then_sub_dmrrow1
5814 0, // CRRC:sub_wacc_hi_then_sub_dmrrowp0
5815 0, // CRRC:sub_wacc_hi_then_sub_dmrrowp1
5816 0, // CRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5817 0, // CRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5818 0, // CRRC:sub_dmr1_then_sub_dmrrow0
5819 0, // CRRC:sub_dmr1_then_sub_dmrrow1
5820 0, // CRRC:sub_dmr1_then_sub_dmrrowp0
5821 0, // CRRC:sub_dmr1_then_sub_dmrrowp1
5822 0, // CRRC:sub_dmr1_then_sub_wacc_hi
5823 0, // CRRC:sub_dmr1_then_sub_wacc_lo
5824 0, // CRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5825 0, // CRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5826 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5827 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5828 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5829 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5830 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5831 0, // CRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5832 0, // CRRC:sub_gp8_x1_then_sub_32
5833 },
5834 { // CARRYRC
5835 0, // CARRYRC:sub_32
5836 0, // CARRYRC:sub_32_hi_phony
5837 0, // CARRYRC:sub_64
5838 0, // CARRYRC:sub_64_hi_phony
5839 0, // CARRYRC:sub_dmr0
5840 0, // CARRYRC:sub_dmr1
5841 0, // CARRYRC:sub_dmrrow0
5842 0, // CARRYRC:sub_dmrrow1
5843 0, // CARRYRC:sub_dmrrowp0
5844 0, // CARRYRC:sub_dmrrowp1
5845 0, // CARRYRC:sub_eq
5846 0, // CARRYRC:sub_fp0
5847 0, // CARRYRC:sub_fp1
5848 0, // CARRYRC:sub_gp8_x0
5849 0, // CARRYRC:sub_gp8_x1
5850 0, // CARRYRC:sub_gt
5851 0, // CARRYRC:sub_lt
5852 0, // CARRYRC:sub_pair0
5853 0, // CARRYRC:sub_pair1
5854 0, // CARRYRC:sub_un
5855 0, // CARRYRC:sub_vsx0
5856 0, // CARRYRC:sub_vsx1
5857 0, // CARRYRC:sub_wacc_hi
5858 0, // CARRYRC:sub_wacc_lo
5859 0, // CARRYRC:sub_vsx1_then_sub_64
5860 0, // CARRYRC:sub_vsx1_then_sub_64_hi_phony
5861 0, // CARRYRC:sub_pair1_then_sub_64
5862 0, // CARRYRC:sub_pair1_then_sub_64_hi_phony
5863 0, // CARRYRC:sub_pair1_then_sub_vsx0
5864 0, // CARRYRC:sub_pair1_then_sub_vsx1
5865 0, // CARRYRC:sub_pair1_then_sub_vsx1_then_sub_64
5866 0, // CARRYRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5867 0, // CARRYRC:sub_dmrrowp1_then_sub_dmrrow0
5868 0, // CARRYRC:sub_dmrrowp1_then_sub_dmrrow1
5869 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrow0
5870 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrow1
5871 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrowp0
5872 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrowp1
5873 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5874 0, // CARRYRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5875 0, // CARRYRC:sub_dmr1_then_sub_dmrrow0
5876 0, // CARRYRC:sub_dmr1_then_sub_dmrrow1
5877 0, // CARRYRC:sub_dmr1_then_sub_dmrrowp0
5878 0, // CARRYRC:sub_dmr1_then_sub_dmrrowp1
5879 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi
5880 0, // CARRYRC:sub_dmr1_then_sub_wacc_lo
5881 0, // CARRYRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5882 0, // CARRYRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5883 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5884 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5885 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5886 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5887 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5888 0, // CARRYRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5889 0, // CARRYRC:sub_gp8_x1_then_sub_32
5890 },
5891 { // CTRRC
5892 0, // CTRRC:sub_32
5893 0, // CTRRC:sub_32_hi_phony
5894 0, // CTRRC:sub_64
5895 0, // CTRRC:sub_64_hi_phony
5896 0, // CTRRC:sub_dmr0
5897 0, // CTRRC:sub_dmr1
5898 0, // CTRRC:sub_dmrrow0
5899 0, // CTRRC:sub_dmrrow1
5900 0, // CTRRC:sub_dmrrowp0
5901 0, // CTRRC:sub_dmrrowp1
5902 0, // CTRRC:sub_eq
5903 0, // CTRRC:sub_fp0
5904 0, // CTRRC:sub_fp1
5905 0, // CTRRC:sub_gp8_x0
5906 0, // CTRRC:sub_gp8_x1
5907 0, // CTRRC:sub_gt
5908 0, // CTRRC:sub_lt
5909 0, // CTRRC:sub_pair0
5910 0, // CTRRC:sub_pair1
5911 0, // CTRRC:sub_un
5912 0, // CTRRC:sub_vsx0
5913 0, // CTRRC:sub_vsx1
5914 0, // CTRRC:sub_wacc_hi
5915 0, // CTRRC:sub_wacc_lo
5916 0, // CTRRC:sub_vsx1_then_sub_64
5917 0, // CTRRC:sub_vsx1_then_sub_64_hi_phony
5918 0, // CTRRC:sub_pair1_then_sub_64
5919 0, // CTRRC:sub_pair1_then_sub_64_hi_phony
5920 0, // CTRRC:sub_pair1_then_sub_vsx0
5921 0, // CTRRC:sub_pair1_then_sub_vsx1
5922 0, // CTRRC:sub_pair1_then_sub_vsx1_then_sub_64
5923 0, // CTRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5924 0, // CTRRC:sub_dmrrowp1_then_sub_dmrrow0
5925 0, // CTRRC:sub_dmrrowp1_then_sub_dmrrow1
5926 0, // CTRRC:sub_wacc_hi_then_sub_dmrrow0
5927 0, // CTRRC:sub_wacc_hi_then_sub_dmrrow1
5928 0, // CTRRC:sub_wacc_hi_then_sub_dmrrowp0
5929 0, // CTRRC:sub_wacc_hi_then_sub_dmrrowp1
5930 0, // CTRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5931 0, // CTRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5932 0, // CTRRC:sub_dmr1_then_sub_dmrrow0
5933 0, // CTRRC:sub_dmr1_then_sub_dmrrow1
5934 0, // CTRRC:sub_dmr1_then_sub_dmrrowp0
5935 0, // CTRRC:sub_dmr1_then_sub_dmrrowp1
5936 0, // CTRRC:sub_dmr1_then_sub_wacc_hi
5937 0, // CTRRC:sub_dmr1_then_sub_wacc_lo
5938 0, // CTRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5939 0, // CTRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5940 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5941 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5942 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
5943 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
5944 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5945 0, // CTRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5946 0, // CTRRC:sub_gp8_x1_then_sub_32
5947 },
5948 { // LRRC
5949 0, // LRRC:sub_32
5950 0, // LRRC:sub_32_hi_phony
5951 0, // LRRC:sub_64
5952 0, // LRRC:sub_64_hi_phony
5953 0, // LRRC:sub_dmr0
5954 0, // LRRC:sub_dmr1
5955 0, // LRRC:sub_dmrrow0
5956 0, // LRRC:sub_dmrrow1
5957 0, // LRRC:sub_dmrrowp0
5958 0, // LRRC:sub_dmrrowp1
5959 0, // LRRC:sub_eq
5960 0, // LRRC:sub_fp0
5961 0, // LRRC:sub_fp1
5962 0, // LRRC:sub_gp8_x0
5963 0, // LRRC:sub_gp8_x1
5964 0, // LRRC:sub_gt
5965 0, // LRRC:sub_lt
5966 0, // LRRC:sub_pair0
5967 0, // LRRC:sub_pair1
5968 0, // LRRC:sub_un
5969 0, // LRRC:sub_vsx0
5970 0, // LRRC:sub_vsx1
5971 0, // LRRC:sub_wacc_hi
5972 0, // LRRC:sub_wacc_lo
5973 0, // LRRC:sub_vsx1_then_sub_64
5974 0, // LRRC:sub_vsx1_then_sub_64_hi_phony
5975 0, // LRRC:sub_pair1_then_sub_64
5976 0, // LRRC:sub_pair1_then_sub_64_hi_phony
5977 0, // LRRC:sub_pair1_then_sub_vsx0
5978 0, // LRRC:sub_pair1_then_sub_vsx1
5979 0, // LRRC:sub_pair1_then_sub_vsx1_then_sub_64
5980 0, // LRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
5981 0, // LRRC:sub_dmrrowp1_then_sub_dmrrow0
5982 0, // LRRC:sub_dmrrowp1_then_sub_dmrrow1
5983 0, // LRRC:sub_wacc_hi_then_sub_dmrrow0
5984 0, // LRRC:sub_wacc_hi_then_sub_dmrrow1
5985 0, // LRRC:sub_wacc_hi_then_sub_dmrrowp0
5986 0, // LRRC:sub_wacc_hi_then_sub_dmrrowp1
5987 0, // LRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
5988 0, // LRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
5989 0, // LRRC:sub_dmr1_then_sub_dmrrow0
5990 0, // LRRC:sub_dmr1_then_sub_dmrrow1
5991 0, // LRRC:sub_dmr1_then_sub_dmrrowp0
5992 0, // LRRC:sub_dmr1_then_sub_dmrrowp1
5993 0, // LRRC:sub_dmr1_then_sub_wacc_hi
5994 0, // LRRC:sub_dmr1_then_sub_wacc_lo
5995 0, // LRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
5996 0, // LRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
5997 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
5998 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
5999 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6000 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6001 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6002 0, // LRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6003 0, // LRRC:sub_gp8_x1_then_sub_32
6004 },
6005 { // VRSAVERC
6006 0, // VRSAVERC:sub_32
6007 0, // VRSAVERC:sub_32_hi_phony
6008 0, // VRSAVERC:sub_64
6009 0, // VRSAVERC:sub_64_hi_phony
6010 0, // VRSAVERC:sub_dmr0
6011 0, // VRSAVERC:sub_dmr1
6012 0, // VRSAVERC:sub_dmrrow0
6013 0, // VRSAVERC:sub_dmrrow1
6014 0, // VRSAVERC:sub_dmrrowp0
6015 0, // VRSAVERC:sub_dmrrowp1
6016 0, // VRSAVERC:sub_eq
6017 0, // VRSAVERC:sub_fp0
6018 0, // VRSAVERC:sub_fp1
6019 0, // VRSAVERC:sub_gp8_x0
6020 0, // VRSAVERC:sub_gp8_x1
6021 0, // VRSAVERC:sub_gt
6022 0, // VRSAVERC:sub_lt
6023 0, // VRSAVERC:sub_pair0
6024 0, // VRSAVERC:sub_pair1
6025 0, // VRSAVERC:sub_un
6026 0, // VRSAVERC:sub_vsx0
6027 0, // VRSAVERC:sub_vsx1
6028 0, // VRSAVERC:sub_wacc_hi
6029 0, // VRSAVERC:sub_wacc_lo
6030 0, // VRSAVERC:sub_vsx1_then_sub_64
6031 0, // VRSAVERC:sub_vsx1_then_sub_64_hi_phony
6032 0, // VRSAVERC:sub_pair1_then_sub_64
6033 0, // VRSAVERC:sub_pair1_then_sub_64_hi_phony
6034 0, // VRSAVERC:sub_pair1_then_sub_vsx0
6035 0, // VRSAVERC:sub_pair1_then_sub_vsx1
6036 0, // VRSAVERC:sub_pair1_then_sub_vsx1_then_sub_64
6037 0, // VRSAVERC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6038 0, // VRSAVERC:sub_dmrrowp1_then_sub_dmrrow0
6039 0, // VRSAVERC:sub_dmrrowp1_then_sub_dmrrow1
6040 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrow0
6041 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrow1
6042 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrowp0
6043 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrowp1
6044 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6045 0, // VRSAVERC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6046 0, // VRSAVERC:sub_dmr1_then_sub_dmrrow0
6047 0, // VRSAVERC:sub_dmr1_then_sub_dmrrow1
6048 0, // VRSAVERC:sub_dmr1_then_sub_dmrrowp0
6049 0, // VRSAVERC:sub_dmr1_then_sub_dmrrowp1
6050 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi
6051 0, // VRSAVERC:sub_dmr1_then_sub_wacc_lo
6052 0, // VRSAVERC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6053 0, // VRSAVERC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6054 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6055 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6056 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6057 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6058 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6059 0, // VRSAVERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6060 0, // VRSAVERC:sub_gp8_x1_then_sub_32
6061 },
6062 { // SPILLTOVSRRC
6063 2, // SPILLTOVSRRC:sub_32 -> GPRC
6064 0, // SPILLTOVSRRC:sub_32_hi_phony
6065 0, // SPILLTOVSRRC:sub_64
6066 0, // SPILLTOVSRRC:sub_64_hi_phony
6067 0, // SPILLTOVSRRC:sub_dmr0
6068 0, // SPILLTOVSRRC:sub_dmr1
6069 0, // SPILLTOVSRRC:sub_dmrrow0
6070 0, // SPILLTOVSRRC:sub_dmrrow1
6071 0, // SPILLTOVSRRC:sub_dmrrowp0
6072 0, // SPILLTOVSRRC:sub_dmrrowp1
6073 0, // SPILLTOVSRRC:sub_eq
6074 0, // SPILLTOVSRRC:sub_fp0
6075 0, // SPILLTOVSRRC:sub_fp1
6076 0, // SPILLTOVSRRC:sub_gp8_x0
6077 0, // SPILLTOVSRRC:sub_gp8_x1
6078 0, // SPILLTOVSRRC:sub_gt
6079 0, // SPILLTOVSRRC:sub_lt
6080 0, // SPILLTOVSRRC:sub_pair0
6081 0, // SPILLTOVSRRC:sub_pair1
6082 0, // SPILLTOVSRRC:sub_un
6083 0, // SPILLTOVSRRC:sub_vsx0
6084 0, // SPILLTOVSRRC:sub_vsx1
6085 0, // SPILLTOVSRRC:sub_wacc_hi
6086 0, // SPILLTOVSRRC:sub_wacc_lo
6087 0, // SPILLTOVSRRC:sub_vsx1_then_sub_64
6088 0, // SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
6089 0, // SPILLTOVSRRC:sub_pair1_then_sub_64
6090 0, // SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
6091 0, // SPILLTOVSRRC:sub_pair1_then_sub_vsx0
6092 0, // SPILLTOVSRRC:sub_pair1_then_sub_vsx1
6093 0, // SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
6094 0, // SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6095 0, // SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
6096 0, // SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
6097 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
6098 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
6099 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
6100 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
6101 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6102 0, // SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6103 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
6104 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
6105 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
6106 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
6107 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
6108 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
6109 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6110 0, // SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6111 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6112 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6113 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6114 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6115 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6116 0, // SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6117 0, // SPILLTOVSRRC:sub_gp8_x1_then_sub_32
6118 },
6119 { // VSFRC
6120 0, // VSFRC:sub_32
6121 0, // VSFRC:sub_32_hi_phony
6122 0, // VSFRC:sub_64
6123 0, // VSFRC:sub_64_hi_phony
6124 0, // VSFRC:sub_dmr0
6125 0, // VSFRC:sub_dmr1
6126 0, // VSFRC:sub_dmrrow0
6127 0, // VSFRC:sub_dmrrow1
6128 0, // VSFRC:sub_dmrrowp0
6129 0, // VSFRC:sub_dmrrowp1
6130 0, // VSFRC:sub_eq
6131 0, // VSFRC:sub_fp0
6132 0, // VSFRC:sub_fp1
6133 0, // VSFRC:sub_gp8_x0
6134 0, // VSFRC:sub_gp8_x1
6135 0, // VSFRC:sub_gt
6136 0, // VSFRC:sub_lt
6137 0, // VSFRC:sub_pair0
6138 0, // VSFRC:sub_pair1
6139 0, // VSFRC:sub_un
6140 0, // VSFRC:sub_vsx0
6141 0, // VSFRC:sub_vsx1
6142 0, // VSFRC:sub_wacc_hi
6143 0, // VSFRC:sub_wacc_lo
6144 0, // VSFRC:sub_vsx1_then_sub_64
6145 0, // VSFRC:sub_vsx1_then_sub_64_hi_phony
6146 0, // VSFRC:sub_pair1_then_sub_64
6147 0, // VSFRC:sub_pair1_then_sub_64_hi_phony
6148 0, // VSFRC:sub_pair1_then_sub_vsx0
6149 0, // VSFRC:sub_pair1_then_sub_vsx1
6150 0, // VSFRC:sub_pair1_then_sub_vsx1_then_sub_64
6151 0, // VSFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6152 0, // VSFRC:sub_dmrrowp1_then_sub_dmrrow0
6153 0, // VSFRC:sub_dmrrowp1_then_sub_dmrrow1
6154 0, // VSFRC:sub_wacc_hi_then_sub_dmrrow0
6155 0, // VSFRC:sub_wacc_hi_then_sub_dmrrow1
6156 0, // VSFRC:sub_wacc_hi_then_sub_dmrrowp0
6157 0, // VSFRC:sub_wacc_hi_then_sub_dmrrowp1
6158 0, // VSFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6159 0, // VSFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6160 0, // VSFRC:sub_dmr1_then_sub_dmrrow0
6161 0, // VSFRC:sub_dmr1_then_sub_dmrrow1
6162 0, // VSFRC:sub_dmr1_then_sub_dmrrowp0
6163 0, // VSFRC:sub_dmr1_then_sub_dmrrowp1
6164 0, // VSFRC:sub_dmr1_then_sub_wacc_hi
6165 0, // VSFRC:sub_dmr1_then_sub_wacc_lo
6166 0, // VSFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6167 0, // VSFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6168 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6169 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6170 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6171 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6172 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6173 0, // VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6174 0, // VSFRC:sub_gp8_x1_then_sub_32
6175 },
6176 { // G8RC
6177 2, // G8RC:sub_32 -> GPRC
6178 0, // G8RC:sub_32_hi_phony
6179 0, // G8RC:sub_64
6180 0, // G8RC:sub_64_hi_phony
6181 0, // G8RC:sub_dmr0
6182 0, // G8RC:sub_dmr1
6183 0, // G8RC:sub_dmrrow0
6184 0, // G8RC:sub_dmrrow1
6185 0, // G8RC:sub_dmrrowp0
6186 0, // G8RC:sub_dmrrowp1
6187 0, // G8RC:sub_eq
6188 0, // G8RC:sub_fp0
6189 0, // G8RC:sub_fp1
6190 0, // G8RC:sub_gp8_x0
6191 0, // G8RC:sub_gp8_x1
6192 0, // G8RC:sub_gt
6193 0, // G8RC:sub_lt
6194 0, // G8RC:sub_pair0
6195 0, // G8RC:sub_pair1
6196 0, // G8RC:sub_un
6197 0, // G8RC:sub_vsx0
6198 0, // G8RC:sub_vsx1
6199 0, // G8RC:sub_wacc_hi
6200 0, // G8RC:sub_wacc_lo
6201 0, // G8RC:sub_vsx1_then_sub_64
6202 0, // G8RC:sub_vsx1_then_sub_64_hi_phony
6203 0, // G8RC:sub_pair1_then_sub_64
6204 0, // G8RC:sub_pair1_then_sub_64_hi_phony
6205 0, // G8RC:sub_pair1_then_sub_vsx0
6206 0, // G8RC:sub_pair1_then_sub_vsx1
6207 0, // G8RC:sub_pair1_then_sub_vsx1_then_sub_64
6208 0, // G8RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6209 0, // G8RC:sub_dmrrowp1_then_sub_dmrrow0
6210 0, // G8RC:sub_dmrrowp1_then_sub_dmrrow1
6211 0, // G8RC:sub_wacc_hi_then_sub_dmrrow0
6212 0, // G8RC:sub_wacc_hi_then_sub_dmrrow1
6213 0, // G8RC:sub_wacc_hi_then_sub_dmrrowp0
6214 0, // G8RC:sub_wacc_hi_then_sub_dmrrowp1
6215 0, // G8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6216 0, // G8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6217 0, // G8RC:sub_dmr1_then_sub_dmrrow0
6218 0, // G8RC:sub_dmr1_then_sub_dmrrow1
6219 0, // G8RC:sub_dmr1_then_sub_dmrrowp0
6220 0, // G8RC:sub_dmr1_then_sub_dmrrowp1
6221 0, // G8RC:sub_dmr1_then_sub_wacc_hi
6222 0, // G8RC:sub_dmr1_then_sub_wacc_lo
6223 0, // G8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6224 0, // G8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6225 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6226 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6227 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6228 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6229 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6230 0, // G8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6231 0, // G8RC:sub_gp8_x1_then_sub_32
6232 },
6233 { // G8RC_NOX0
6234 3, // G8RC_NOX0:sub_32 -> GPRC_NOR0
6235 0, // G8RC_NOX0:sub_32_hi_phony
6236 0, // G8RC_NOX0:sub_64
6237 0, // G8RC_NOX0:sub_64_hi_phony
6238 0, // G8RC_NOX0:sub_dmr0
6239 0, // G8RC_NOX0:sub_dmr1
6240 0, // G8RC_NOX0:sub_dmrrow0
6241 0, // G8RC_NOX0:sub_dmrrow1
6242 0, // G8RC_NOX0:sub_dmrrowp0
6243 0, // G8RC_NOX0:sub_dmrrowp1
6244 0, // G8RC_NOX0:sub_eq
6245 0, // G8RC_NOX0:sub_fp0
6246 0, // G8RC_NOX0:sub_fp1
6247 0, // G8RC_NOX0:sub_gp8_x0
6248 0, // G8RC_NOX0:sub_gp8_x1
6249 0, // G8RC_NOX0:sub_gt
6250 0, // G8RC_NOX0:sub_lt
6251 0, // G8RC_NOX0:sub_pair0
6252 0, // G8RC_NOX0:sub_pair1
6253 0, // G8RC_NOX0:sub_un
6254 0, // G8RC_NOX0:sub_vsx0
6255 0, // G8RC_NOX0:sub_vsx1
6256 0, // G8RC_NOX0:sub_wacc_hi
6257 0, // G8RC_NOX0:sub_wacc_lo
6258 0, // G8RC_NOX0:sub_vsx1_then_sub_64
6259 0, // G8RC_NOX0:sub_vsx1_then_sub_64_hi_phony
6260 0, // G8RC_NOX0:sub_pair1_then_sub_64
6261 0, // G8RC_NOX0:sub_pair1_then_sub_64_hi_phony
6262 0, // G8RC_NOX0:sub_pair1_then_sub_vsx0
6263 0, // G8RC_NOX0:sub_pair1_then_sub_vsx1
6264 0, // G8RC_NOX0:sub_pair1_then_sub_vsx1_then_sub_64
6265 0, // G8RC_NOX0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6266 0, // G8RC_NOX0:sub_dmrrowp1_then_sub_dmrrow0
6267 0, // G8RC_NOX0:sub_dmrrowp1_then_sub_dmrrow1
6268 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrow0
6269 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrow1
6270 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp0
6271 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1
6272 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6273 0, // G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6274 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrow0
6275 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrow1
6276 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrowp0
6277 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1
6278 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi
6279 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_lo
6280 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6281 0, // G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6282 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6283 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6284 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6285 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6286 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6287 0, // G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6288 0, // G8RC_NOX0:sub_gp8_x1_then_sub_32
6289 },
6290 { // SPILLTOVSRRC_and_VSFRC
6291 0, // SPILLTOVSRRC_and_VSFRC:sub_32
6292 0, // SPILLTOVSRRC_and_VSFRC:sub_32_hi_phony
6293 0, // SPILLTOVSRRC_and_VSFRC:sub_64
6294 0, // SPILLTOVSRRC_and_VSFRC:sub_64_hi_phony
6295 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr0
6296 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1
6297 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrow0
6298 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrow1
6299 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrowp0
6300 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrowp1
6301 0, // SPILLTOVSRRC_and_VSFRC:sub_eq
6302 0, // SPILLTOVSRRC_and_VSFRC:sub_fp0
6303 0, // SPILLTOVSRRC_and_VSFRC:sub_fp1
6304 0, // SPILLTOVSRRC_and_VSFRC:sub_gp8_x0
6305 0, // SPILLTOVSRRC_and_VSFRC:sub_gp8_x1
6306 0, // SPILLTOVSRRC_and_VSFRC:sub_gt
6307 0, // SPILLTOVSRRC_and_VSFRC:sub_lt
6308 0, // SPILLTOVSRRC_and_VSFRC:sub_pair0
6309 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1
6310 0, // SPILLTOVSRRC_and_VSFRC:sub_un
6311 0, // SPILLTOVSRRC_and_VSFRC:sub_vsx0
6312 0, // SPILLTOVSRRC_and_VSFRC:sub_vsx1
6313 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi
6314 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_lo
6315 0, // SPILLTOVSRRC_and_VSFRC:sub_vsx1_then_sub_64
6316 0, // SPILLTOVSRRC_and_VSFRC:sub_vsx1_then_sub_64_hi_phony
6317 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_64
6318 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_64_hi_phony
6319 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_vsx0
6320 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_vsx1
6321 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_vsx1_then_sub_64
6322 0, // SPILLTOVSRRC_and_VSFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6323 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrowp1_then_sub_dmrrow0
6324 0, // SPILLTOVSRRC_and_VSFRC:sub_dmrrowp1_then_sub_dmrrow1
6325 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrow0
6326 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrow1
6327 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrowp0
6328 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrowp1
6329 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6330 0, // SPILLTOVSRRC_and_VSFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6331 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrow0
6332 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrow1
6333 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrowp0
6334 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrowp1
6335 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi
6336 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_lo
6337 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6338 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6339 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6340 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6341 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6342 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6343 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6344 0, // SPILLTOVSRRC_and_VSFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6345 0, // SPILLTOVSRRC_and_VSFRC:sub_gp8_x1_then_sub_32
6346 },
6347 { // G8RC_and_G8RC_NOX0
6348 4, // G8RC_and_G8RC_NOX0:sub_32 -> GPRC_and_GPRC_NOR0
6349 0, // G8RC_and_G8RC_NOX0:sub_32_hi_phony
6350 0, // G8RC_and_G8RC_NOX0:sub_64
6351 0, // G8RC_and_G8RC_NOX0:sub_64_hi_phony
6352 0, // G8RC_and_G8RC_NOX0:sub_dmr0
6353 0, // G8RC_and_G8RC_NOX0:sub_dmr1
6354 0, // G8RC_and_G8RC_NOX0:sub_dmrrow0
6355 0, // G8RC_and_G8RC_NOX0:sub_dmrrow1
6356 0, // G8RC_and_G8RC_NOX0:sub_dmrrowp0
6357 0, // G8RC_and_G8RC_NOX0:sub_dmrrowp1
6358 0, // G8RC_and_G8RC_NOX0:sub_eq
6359 0, // G8RC_and_G8RC_NOX0:sub_fp0
6360 0, // G8RC_and_G8RC_NOX0:sub_fp1
6361 0, // G8RC_and_G8RC_NOX0:sub_gp8_x0
6362 0, // G8RC_and_G8RC_NOX0:sub_gp8_x1
6363 0, // G8RC_and_G8RC_NOX0:sub_gt
6364 0, // G8RC_and_G8RC_NOX0:sub_lt
6365 0, // G8RC_and_G8RC_NOX0:sub_pair0
6366 0, // G8RC_and_G8RC_NOX0:sub_pair1
6367 0, // G8RC_and_G8RC_NOX0:sub_un
6368 0, // G8RC_and_G8RC_NOX0:sub_vsx0
6369 0, // G8RC_and_G8RC_NOX0:sub_vsx1
6370 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi
6371 0, // G8RC_and_G8RC_NOX0:sub_wacc_lo
6372 0, // G8RC_and_G8RC_NOX0:sub_vsx1_then_sub_64
6373 0, // G8RC_and_G8RC_NOX0:sub_vsx1_then_sub_64_hi_phony
6374 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_64
6375 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_64_hi_phony
6376 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_vsx0
6377 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_vsx1
6378 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_vsx1_then_sub_64
6379 0, // G8RC_and_G8RC_NOX0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6380 0, // G8RC_and_G8RC_NOX0:sub_dmrrowp1_then_sub_dmrrow0
6381 0, // G8RC_and_G8RC_NOX0:sub_dmrrowp1_then_sub_dmrrow1
6382 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrow0
6383 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrow1
6384 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp0
6385 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1
6386 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6387 0, // G8RC_and_G8RC_NOX0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6388 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrow0
6389 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrow1
6390 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrowp0
6391 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1
6392 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi
6393 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_lo
6394 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6395 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6396 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6397 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6398 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6399 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6400 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6401 0, // G8RC_and_G8RC_NOX0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6402 0, // G8RC_and_G8RC_NOX0:sub_gp8_x1_then_sub_32
6403 },
6404 { // F8RC
6405 0, // F8RC:sub_32
6406 0, // F8RC:sub_32_hi_phony
6407 0, // F8RC:sub_64
6408 0, // F8RC:sub_64_hi_phony
6409 0, // F8RC:sub_dmr0
6410 0, // F8RC:sub_dmr1
6411 0, // F8RC:sub_dmrrow0
6412 0, // F8RC:sub_dmrrow1
6413 0, // F8RC:sub_dmrrowp0
6414 0, // F8RC:sub_dmrrowp1
6415 0, // F8RC:sub_eq
6416 0, // F8RC:sub_fp0
6417 0, // F8RC:sub_fp1
6418 0, // F8RC:sub_gp8_x0
6419 0, // F8RC:sub_gp8_x1
6420 0, // F8RC:sub_gt
6421 0, // F8RC:sub_lt
6422 0, // F8RC:sub_pair0
6423 0, // F8RC:sub_pair1
6424 0, // F8RC:sub_un
6425 0, // F8RC:sub_vsx0
6426 0, // F8RC:sub_vsx1
6427 0, // F8RC:sub_wacc_hi
6428 0, // F8RC:sub_wacc_lo
6429 0, // F8RC:sub_vsx1_then_sub_64
6430 0, // F8RC:sub_vsx1_then_sub_64_hi_phony
6431 0, // F8RC:sub_pair1_then_sub_64
6432 0, // F8RC:sub_pair1_then_sub_64_hi_phony
6433 0, // F8RC:sub_pair1_then_sub_vsx0
6434 0, // F8RC:sub_pair1_then_sub_vsx1
6435 0, // F8RC:sub_pair1_then_sub_vsx1_then_sub_64
6436 0, // F8RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6437 0, // F8RC:sub_dmrrowp1_then_sub_dmrrow0
6438 0, // F8RC:sub_dmrrowp1_then_sub_dmrrow1
6439 0, // F8RC:sub_wacc_hi_then_sub_dmrrow0
6440 0, // F8RC:sub_wacc_hi_then_sub_dmrrow1
6441 0, // F8RC:sub_wacc_hi_then_sub_dmrrowp0
6442 0, // F8RC:sub_wacc_hi_then_sub_dmrrowp1
6443 0, // F8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6444 0, // F8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6445 0, // F8RC:sub_dmr1_then_sub_dmrrow0
6446 0, // F8RC:sub_dmr1_then_sub_dmrrow1
6447 0, // F8RC:sub_dmr1_then_sub_dmrrowp0
6448 0, // F8RC:sub_dmr1_then_sub_dmrrowp1
6449 0, // F8RC:sub_dmr1_then_sub_wacc_hi
6450 0, // F8RC:sub_dmr1_then_sub_wacc_lo
6451 0, // F8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6452 0, // F8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6453 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6454 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6455 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6456 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6457 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6458 0, // F8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6459 0, // F8RC:sub_gp8_x1_then_sub_32
6460 },
6461 { // FHRC
6462 0, // FHRC:sub_32
6463 0, // FHRC:sub_32_hi_phony
6464 0, // FHRC:sub_64
6465 0, // FHRC:sub_64_hi_phony
6466 0, // FHRC:sub_dmr0
6467 0, // FHRC:sub_dmr1
6468 0, // FHRC:sub_dmrrow0
6469 0, // FHRC:sub_dmrrow1
6470 0, // FHRC:sub_dmrrowp0
6471 0, // FHRC:sub_dmrrowp1
6472 0, // FHRC:sub_eq
6473 0, // FHRC:sub_fp0
6474 0, // FHRC:sub_fp1
6475 0, // FHRC:sub_gp8_x0
6476 0, // FHRC:sub_gp8_x1
6477 0, // FHRC:sub_gt
6478 0, // FHRC:sub_lt
6479 0, // FHRC:sub_pair0
6480 0, // FHRC:sub_pair1
6481 0, // FHRC:sub_un
6482 0, // FHRC:sub_vsx0
6483 0, // FHRC:sub_vsx1
6484 0, // FHRC:sub_wacc_hi
6485 0, // FHRC:sub_wacc_lo
6486 0, // FHRC:sub_vsx1_then_sub_64
6487 0, // FHRC:sub_vsx1_then_sub_64_hi_phony
6488 0, // FHRC:sub_pair1_then_sub_64
6489 0, // FHRC:sub_pair1_then_sub_64_hi_phony
6490 0, // FHRC:sub_pair1_then_sub_vsx0
6491 0, // FHRC:sub_pair1_then_sub_vsx1
6492 0, // FHRC:sub_pair1_then_sub_vsx1_then_sub_64
6493 0, // FHRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6494 0, // FHRC:sub_dmrrowp1_then_sub_dmrrow0
6495 0, // FHRC:sub_dmrrowp1_then_sub_dmrrow1
6496 0, // FHRC:sub_wacc_hi_then_sub_dmrrow0
6497 0, // FHRC:sub_wacc_hi_then_sub_dmrrow1
6498 0, // FHRC:sub_wacc_hi_then_sub_dmrrowp0
6499 0, // FHRC:sub_wacc_hi_then_sub_dmrrowp1
6500 0, // FHRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6501 0, // FHRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6502 0, // FHRC:sub_dmr1_then_sub_dmrrow0
6503 0, // FHRC:sub_dmr1_then_sub_dmrrow1
6504 0, // FHRC:sub_dmr1_then_sub_dmrrowp0
6505 0, // FHRC:sub_dmr1_then_sub_dmrrowp1
6506 0, // FHRC:sub_dmr1_then_sub_wacc_hi
6507 0, // FHRC:sub_dmr1_then_sub_wacc_lo
6508 0, // FHRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6509 0, // FHRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6510 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6511 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6512 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6513 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6514 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6515 0, // FHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6516 0, // FHRC:sub_gp8_x1_then_sub_32
6517 },
6518 { // SPERC
6519 2, // SPERC:sub_32 -> GPRC
6520 0, // SPERC:sub_32_hi_phony
6521 0, // SPERC:sub_64
6522 0, // SPERC:sub_64_hi_phony
6523 0, // SPERC:sub_dmr0
6524 0, // SPERC:sub_dmr1
6525 0, // SPERC:sub_dmrrow0
6526 0, // SPERC:sub_dmrrow1
6527 0, // SPERC:sub_dmrrowp0
6528 0, // SPERC:sub_dmrrowp1
6529 0, // SPERC:sub_eq
6530 0, // SPERC:sub_fp0
6531 0, // SPERC:sub_fp1
6532 0, // SPERC:sub_gp8_x0
6533 0, // SPERC:sub_gp8_x1
6534 0, // SPERC:sub_gt
6535 0, // SPERC:sub_lt
6536 0, // SPERC:sub_pair0
6537 0, // SPERC:sub_pair1
6538 0, // SPERC:sub_un
6539 0, // SPERC:sub_vsx0
6540 0, // SPERC:sub_vsx1
6541 0, // SPERC:sub_wacc_hi
6542 0, // SPERC:sub_wacc_lo
6543 0, // SPERC:sub_vsx1_then_sub_64
6544 0, // SPERC:sub_vsx1_then_sub_64_hi_phony
6545 0, // SPERC:sub_pair1_then_sub_64
6546 0, // SPERC:sub_pair1_then_sub_64_hi_phony
6547 0, // SPERC:sub_pair1_then_sub_vsx0
6548 0, // SPERC:sub_pair1_then_sub_vsx1
6549 0, // SPERC:sub_pair1_then_sub_vsx1_then_sub_64
6550 0, // SPERC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6551 0, // SPERC:sub_dmrrowp1_then_sub_dmrrow0
6552 0, // SPERC:sub_dmrrowp1_then_sub_dmrrow1
6553 0, // SPERC:sub_wacc_hi_then_sub_dmrrow0
6554 0, // SPERC:sub_wacc_hi_then_sub_dmrrow1
6555 0, // SPERC:sub_wacc_hi_then_sub_dmrrowp0
6556 0, // SPERC:sub_wacc_hi_then_sub_dmrrowp1
6557 0, // SPERC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6558 0, // SPERC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6559 0, // SPERC:sub_dmr1_then_sub_dmrrow0
6560 0, // SPERC:sub_dmr1_then_sub_dmrrow1
6561 0, // SPERC:sub_dmr1_then_sub_dmrrowp0
6562 0, // SPERC:sub_dmr1_then_sub_dmrrowp1
6563 0, // SPERC:sub_dmr1_then_sub_wacc_hi
6564 0, // SPERC:sub_dmr1_then_sub_wacc_lo
6565 0, // SPERC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6566 0, // SPERC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6567 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6568 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6569 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6570 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6571 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6572 0, // SPERC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6573 0, // SPERC:sub_gp8_x1_then_sub_32
6574 },
6575 { // VFHRC
6576 0, // VFHRC:sub_32
6577 0, // VFHRC:sub_32_hi_phony
6578 0, // VFHRC:sub_64
6579 0, // VFHRC:sub_64_hi_phony
6580 0, // VFHRC:sub_dmr0
6581 0, // VFHRC:sub_dmr1
6582 0, // VFHRC:sub_dmrrow0
6583 0, // VFHRC:sub_dmrrow1
6584 0, // VFHRC:sub_dmrrowp0
6585 0, // VFHRC:sub_dmrrowp1
6586 0, // VFHRC:sub_eq
6587 0, // VFHRC:sub_fp0
6588 0, // VFHRC:sub_fp1
6589 0, // VFHRC:sub_gp8_x0
6590 0, // VFHRC:sub_gp8_x1
6591 0, // VFHRC:sub_gt
6592 0, // VFHRC:sub_lt
6593 0, // VFHRC:sub_pair0
6594 0, // VFHRC:sub_pair1
6595 0, // VFHRC:sub_un
6596 0, // VFHRC:sub_vsx0
6597 0, // VFHRC:sub_vsx1
6598 0, // VFHRC:sub_wacc_hi
6599 0, // VFHRC:sub_wacc_lo
6600 0, // VFHRC:sub_vsx1_then_sub_64
6601 0, // VFHRC:sub_vsx1_then_sub_64_hi_phony
6602 0, // VFHRC:sub_pair1_then_sub_64
6603 0, // VFHRC:sub_pair1_then_sub_64_hi_phony
6604 0, // VFHRC:sub_pair1_then_sub_vsx0
6605 0, // VFHRC:sub_pair1_then_sub_vsx1
6606 0, // VFHRC:sub_pair1_then_sub_vsx1_then_sub_64
6607 0, // VFHRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6608 0, // VFHRC:sub_dmrrowp1_then_sub_dmrrow0
6609 0, // VFHRC:sub_dmrrowp1_then_sub_dmrrow1
6610 0, // VFHRC:sub_wacc_hi_then_sub_dmrrow0
6611 0, // VFHRC:sub_wacc_hi_then_sub_dmrrow1
6612 0, // VFHRC:sub_wacc_hi_then_sub_dmrrowp0
6613 0, // VFHRC:sub_wacc_hi_then_sub_dmrrowp1
6614 0, // VFHRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6615 0, // VFHRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6616 0, // VFHRC:sub_dmr1_then_sub_dmrrow0
6617 0, // VFHRC:sub_dmr1_then_sub_dmrrow1
6618 0, // VFHRC:sub_dmr1_then_sub_dmrrowp0
6619 0, // VFHRC:sub_dmr1_then_sub_dmrrowp1
6620 0, // VFHRC:sub_dmr1_then_sub_wacc_hi
6621 0, // VFHRC:sub_dmr1_then_sub_wacc_lo
6622 0, // VFHRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6623 0, // VFHRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6624 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6625 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6626 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6627 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6628 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6629 0, // VFHRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6630 0, // VFHRC:sub_gp8_x1_then_sub_32
6631 },
6632 { // VFRC
6633 0, // VFRC:sub_32
6634 0, // VFRC:sub_32_hi_phony
6635 0, // VFRC:sub_64
6636 0, // VFRC:sub_64_hi_phony
6637 0, // VFRC:sub_dmr0
6638 0, // VFRC:sub_dmr1
6639 0, // VFRC:sub_dmrrow0
6640 0, // VFRC:sub_dmrrow1
6641 0, // VFRC:sub_dmrrowp0
6642 0, // VFRC:sub_dmrrowp1
6643 0, // VFRC:sub_eq
6644 0, // VFRC:sub_fp0
6645 0, // VFRC:sub_fp1
6646 0, // VFRC:sub_gp8_x0
6647 0, // VFRC:sub_gp8_x1
6648 0, // VFRC:sub_gt
6649 0, // VFRC:sub_lt
6650 0, // VFRC:sub_pair0
6651 0, // VFRC:sub_pair1
6652 0, // VFRC:sub_un
6653 0, // VFRC:sub_vsx0
6654 0, // VFRC:sub_vsx1
6655 0, // VFRC:sub_wacc_hi
6656 0, // VFRC:sub_wacc_lo
6657 0, // VFRC:sub_vsx1_then_sub_64
6658 0, // VFRC:sub_vsx1_then_sub_64_hi_phony
6659 0, // VFRC:sub_pair1_then_sub_64
6660 0, // VFRC:sub_pair1_then_sub_64_hi_phony
6661 0, // VFRC:sub_pair1_then_sub_vsx0
6662 0, // VFRC:sub_pair1_then_sub_vsx1
6663 0, // VFRC:sub_pair1_then_sub_vsx1_then_sub_64
6664 0, // VFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6665 0, // VFRC:sub_dmrrowp1_then_sub_dmrrow0
6666 0, // VFRC:sub_dmrrowp1_then_sub_dmrrow1
6667 0, // VFRC:sub_wacc_hi_then_sub_dmrrow0
6668 0, // VFRC:sub_wacc_hi_then_sub_dmrrow1
6669 0, // VFRC:sub_wacc_hi_then_sub_dmrrowp0
6670 0, // VFRC:sub_wacc_hi_then_sub_dmrrowp1
6671 0, // VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6672 0, // VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6673 0, // VFRC:sub_dmr1_then_sub_dmrrow0
6674 0, // VFRC:sub_dmr1_then_sub_dmrrow1
6675 0, // VFRC:sub_dmr1_then_sub_dmrrowp0
6676 0, // VFRC:sub_dmr1_then_sub_dmrrowp1
6677 0, // VFRC:sub_dmr1_then_sub_wacc_hi
6678 0, // VFRC:sub_dmr1_then_sub_wacc_lo
6679 0, // VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6680 0, // VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6681 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6682 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6683 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6684 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6685 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6686 0, // VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6687 0, // VFRC:sub_gp8_x1_then_sub_32
6688 },
6689 { // SPERC_with_sub_32_in_GPRC_NOR0
6690 4, // SPERC_with_sub_32_in_GPRC_NOR0:sub_32 -> GPRC_and_GPRC_NOR0
6691 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_32_hi_phony
6692 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_64
6693 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_64_hi_phony
6694 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr0
6695 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1
6696 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrow0
6697 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrow1
6698 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp0
6699 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1
6700 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_eq
6701 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_fp0
6702 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_fp1
6703 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_gp8_x0
6704 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_gp8_x1
6705 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_gt
6706 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_lt
6707 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair0
6708 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1
6709 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_un
6710 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_vsx0
6711 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_vsx1
6712 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi
6713 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_lo
6714 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_vsx1_then_sub_64
6715 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_vsx1_then_sub_64_hi_phony
6716 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_64
6717 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_64_hi_phony
6718 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx0
6719 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1
6720 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64
6721 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6722 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow0
6723 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow1
6724 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow0
6725 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow1
6726 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp0
6727 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1
6728 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6729 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6730 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrow0
6731 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrow1
6732 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp0
6733 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1
6734 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi
6735 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_lo
6736 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6737 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6738 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6739 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6740 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6741 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6742 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6743 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6744 0, // SPERC_with_sub_32_in_GPRC_NOR0:sub_gp8_x1_then_sub_32
6745 },
6746 { // SPILLTOVSRRC_and_VFRC
6747 0, // SPILLTOVSRRC_and_VFRC:sub_32
6748 0, // SPILLTOVSRRC_and_VFRC:sub_32_hi_phony
6749 0, // SPILLTOVSRRC_and_VFRC:sub_64
6750 0, // SPILLTOVSRRC_and_VFRC:sub_64_hi_phony
6751 0, // SPILLTOVSRRC_and_VFRC:sub_dmr0
6752 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1
6753 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrow0
6754 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrow1
6755 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrowp0
6756 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrowp1
6757 0, // SPILLTOVSRRC_and_VFRC:sub_eq
6758 0, // SPILLTOVSRRC_and_VFRC:sub_fp0
6759 0, // SPILLTOVSRRC_and_VFRC:sub_fp1
6760 0, // SPILLTOVSRRC_and_VFRC:sub_gp8_x0
6761 0, // SPILLTOVSRRC_and_VFRC:sub_gp8_x1
6762 0, // SPILLTOVSRRC_and_VFRC:sub_gt
6763 0, // SPILLTOVSRRC_and_VFRC:sub_lt
6764 0, // SPILLTOVSRRC_and_VFRC:sub_pair0
6765 0, // SPILLTOVSRRC_and_VFRC:sub_pair1
6766 0, // SPILLTOVSRRC_and_VFRC:sub_un
6767 0, // SPILLTOVSRRC_and_VFRC:sub_vsx0
6768 0, // SPILLTOVSRRC_and_VFRC:sub_vsx1
6769 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi
6770 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_lo
6771 0, // SPILLTOVSRRC_and_VFRC:sub_vsx1_then_sub_64
6772 0, // SPILLTOVSRRC_and_VFRC:sub_vsx1_then_sub_64_hi_phony
6773 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_64
6774 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_64_hi_phony
6775 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx0
6776 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1
6777 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1_then_sub_64
6778 0, // SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6779 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrowp1_then_sub_dmrrow0
6780 0, // SPILLTOVSRRC_and_VFRC:sub_dmrrowp1_then_sub_dmrrow1
6781 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrow0
6782 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrow1
6783 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp0
6784 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1
6785 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6786 0, // SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6787 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrow0
6788 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrow1
6789 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp0
6790 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1
6791 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi
6792 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_lo
6793 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6794 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6795 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6796 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6797 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6798 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6799 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6800 0, // SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6801 0, // SPILLTOVSRRC_and_VFRC:sub_gp8_x1_then_sub_32
6802 },
6803 { // SPILLTOVSRRC_and_F4RC
6804 0, // SPILLTOVSRRC_and_F4RC:sub_32
6805 0, // SPILLTOVSRRC_and_F4RC:sub_32_hi_phony
6806 0, // SPILLTOVSRRC_and_F4RC:sub_64
6807 0, // SPILLTOVSRRC_and_F4RC:sub_64_hi_phony
6808 0, // SPILLTOVSRRC_and_F4RC:sub_dmr0
6809 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1
6810 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrow0
6811 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrow1
6812 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrowp0
6813 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrowp1
6814 0, // SPILLTOVSRRC_and_F4RC:sub_eq
6815 0, // SPILLTOVSRRC_and_F4RC:sub_fp0
6816 0, // SPILLTOVSRRC_and_F4RC:sub_fp1
6817 0, // SPILLTOVSRRC_and_F4RC:sub_gp8_x0
6818 0, // SPILLTOVSRRC_and_F4RC:sub_gp8_x1
6819 0, // SPILLTOVSRRC_and_F4RC:sub_gt
6820 0, // SPILLTOVSRRC_and_F4RC:sub_lt
6821 0, // SPILLTOVSRRC_and_F4RC:sub_pair0
6822 0, // SPILLTOVSRRC_and_F4RC:sub_pair1
6823 0, // SPILLTOVSRRC_and_F4RC:sub_un
6824 0, // SPILLTOVSRRC_and_F4RC:sub_vsx0
6825 0, // SPILLTOVSRRC_and_F4RC:sub_vsx1
6826 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi
6827 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_lo
6828 0, // SPILLTOVSRRC_and_F4RC:sub_vsx1_then_sub_64
6829 0, // SPILLTOVSRRC_and_F4RC:sub_vsx1_then_sub_64_hi_phony
6830 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_64
6831 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_64_hi_phony
6832 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx0
6833 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1
6834 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1_then_sub_64
6835 0, // SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6836 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrowp1_then_sub_dmrrow0
6837 0, // SPILLTOVSRRC_and_F4RC:sub_dmrrowp1_then_sub_dmrrow1
6838 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrow0
6839 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrow1
6840 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp0
6841 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1
6842 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6843 0, // SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6844 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrow0
6845 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrow1
6846 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp0
6847 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1
6848 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi
6849 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_lo
6850 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6851 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6852 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6853 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6854 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6855 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6856 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6857 0, // SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6858 0, // SPILLTOVSRRC_and_F4RC:sub_gp8_x1_then_sub_32
6859 },
6860 { // CTRRC8
6861 0, // CTRRC8:sub_32
6862 0, // CTRRC8:sub_32_hi_phony
6863 0, // CTRRC8:sub_64
6864 0, // CTRRC8:sub_64_hi_phony
6865 0, // CTRRC8:sub_dmr0
6866 0, // CTRRC8:sub_dmr1
6867 0, // CTRRC8:sub_dmrrow0
6868 0, // CTRRC8:sub_dmrrow1
6869 0, // CTRRC8:sub_dmrrowp0
6870 0, // CTRRC8:sub_dmrrowp1
6871 0, // CTRRC8:sub_eq
6872 0, // CTRRC8:sub_fp0
6873 0, // CTRRC8:sub_fp1
6874 0, // CTRRC8:sub_gp8_x0
6875 0, // CTRRC8:sub_gp8_x1
6876 0, // CTRRC8:sub_gt
6877 0, // CTRRC8:sub_lt
6878 0, // CTRRC8:sub_pair0
6879 0, // CTRRC8:sub_pair1
6880 0, // CTRRC8:sub_un
6881 0, // CTRRC8:sub_vsx0
6882 0, // CTRRC8:sub_vsx1
6883 0, // CTRRC8:sub_wacc_hi
6884 0, // CTRRC8:sub_wacc_lo
6885 0, // CTRRC8:sub_vsx1_then_sub_64
6886 0, // CTRRC8:sub_vsx1_then_sub_64_hi_phony
6887 0, // CTRRC8:sub_pair1_then_sub_64
6888 0, // CTRRC8:sub_pair1_then_sub_64_hi_phony
6889 0, // CTRRC8:sub_pair1_then_sub_vsx0
6890 0, // CTRRC8:sub_pair1_then_sub_vsx1
6891 0, // CTRRC8:sub_pair1_then_sub_vsx1_then_sub_64
6892 0, // CTRRC8:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6893 0, // CTRRC8:sub_dmrrowp1_then_sub_dmrrow0
6894 0, // CTRRC8:sub_dmrrowp1_then_sub_dmrrow1
6895 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrow0
6896 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrow1
6897 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrowp0
6898 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrowp1
6899 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6900 0, // CTRRC8:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6901 0, // CTRRC8:sub_dmr1_then_sub_dmrrow0
6902 0, // CTRRC8:sub_dmr1_then_sub_dmrrow1
6903 0, // CTRRC8:sub_dmr1_then_sub_dmrrowp0
6904 0, // CTRRC8:sub_dmr1_then_sub_dmrrowp1
6905 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi
6906 0, // CTRRC8:sub_dmr1_then_sub_wacc_lo
6907 0, // CTRRC8:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6908 0, // CTRRC8:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6909 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6910 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6911 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6912 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6913 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6914 0, // CTRRC8:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6915 0, // CTRRC8:sub_gp8_x1_then_sub_32
6916 },
6917 { // LR8RC
6918 0, // LR8RC:sub_32
6919 0, // LR8RC:sub_32_hi_phony
6920 0, // LR8RC:sub_64
6921 0, // LR8RC:sub_64_hi_phony
6922 0, // LR8RC:sub_dmr0
6923 0, // LR8RC:sub_dmr1
6924 0, // LR8RC:sub_dmrrow0
6925 0, // LR8RC:sub_dmrrow1
6926 0, // LR8RC:sub_dmrrowp0
6927 0, // LR8RC:sub_dmrrowp1
6928 0, // LR8RC:sub_eq
6929 0, // LR8RC:sub_fp0
6930 0, // LR8RC:sub_fp1
6931 0, // LR8RC:sub_gp8_x0
6932 0, // LR8RC:sub_gp8_x1
6933 0, // LR8RC:sub_gt
6934 0, // LR8RC:sub_lt
6935 0, // LR8RC:sub_pair0
6936 0, // LR8RC:sub_pair1
6937 0, // LR8RC:sub_un
6938 0, // LR8RC:sub_vsx0
6939 0, // LR8RC:sub_vsx1
6940 0, // LR8RC:sub_wacc_hi
6941 0, // LR8RC:sub_wacc_lo
6942 0, // LR8RC:sub_vsx1_then_sub_64
6943 0, // LR8RC:sub_vsx1_then_sub_64_hi_phony
6944 0, // LR8RC:sub_pair1_then_sub_64
6945 0, // LR8RC:sub_pair1_then_sub_64_hi_phony
6946 0, // LR8RC:sub_pair1_then_sub_vsx0
6947 0, // LR8RC:sub_pair1_then_sub_vsx1
6948 0, // LR8RC:sub_pair1_then_sub_vsx1_then_sub_64
6949 0, // LR8RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
6950 0, // LR8RC:sub_dmrrowp1_then_sub_dmrrow0
6951 0, // LR8RC:sub_dmrrowp1_then_sub_dmrrow1
6952 0, // LR8RC:sub_wacc_hi_then_sub_dmrrow0
6953 0, // LR8RC:sub_wacc_hi_then_sub_dmrrow1
6954 0, // LR8RC:sub_wacc_hi_then_sub_dmrrowp0
6955 0, // LR8RC:sub_wacc_hi_then_sub_dmrrowp1
6956 0, // LR8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6957 0, // LR8RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6958 0, // LR8RC:sub_dmr1_then_sub_dmrrow0
6959 0, // LR8RC:sub_dmr1_then_sub_dmrrow1
6960 0, // LR8RC:sub_dmr1_then_sub_dmrrowp0
6961 0, // LR8RC:sub_dmr1_then_sub_dmrrowp1
6962 0, // LR8RC:sub_dmr1_then_sub_wacc_hi
6963 0, // LR8RC:sub_dmr1_then_sub_wacc_lo
6964 0, // LR8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
6965 0, // LR8RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
6966 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
6967 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
6968 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
6969 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
6970 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
6971 0, // LR8RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
6972 0, // LR8RC:sub_gp8_x1_then_sub_32
6973 },
6974 { // DMRROWRC
6975 0, // DMRROWRC:sub_32
6976 0, // DMRROWRC:sub_32_hi_phony
6977 0, // DMRROWRC:sub_64
6978 0, // DMRROWRC:sub_64_hi_phony
6979 0, // DMRROWRC:sub_dmr0
6980 0, // DMRROWRC:sub_dmr1
6981 0, // DMRROWRC:sub_dmrrow0
6982 0, // DMRROWRC:sub_dmrrow1
6983 0, // DMRROWRC:sub_dmrrowp0
6984 0, // DMRROWRC:sub_dmrrowp1
6985 0, // DMRROWRC:sub_eq
6986 0, // DMRROWRC:sub_fp0
6987 0, // DMRROWRC:sub_fp1
6988 0, // DMRROWRC:sub_gp8_x0
6989 0, // DMRROWRC:sub_gp8_x1
6990 0, // DMRROWRC:sub_gt
6991 0, // DMRROWRC:sub_lt
6992 0, // DMRROWRC:sub_pair0
6993 0, // DMRROWRC:sub_pair1
6994 0, // DMRROWRC:sub_un
6995 0, // DMRROWRC:sub_vsx0
6996 0, // DMRROWRC:sub_vsx1
6997 0, // DMRROWRC:sub_wacc_hi
6998 0, // DMRROWRC:sub_wacc_lo
6999 0, // DMRROWRC:sub_vsx1_then_sub_64
7000 0, // DMRROWRC:sub_vsx1_then_sub_64_hi_phony
7001 0, // DMRROWRC:sub_pair1_then_sub_64
7002 0, // DMRROWRC:sub_pair1_then_sub_64_hi_phony
7003 0, // DMRROWRC:sub_pair1_then_sub_vsx0
7004 0, // DMRROWRC:sub_pair1_then_sub_vsx1
7005 0, // DMRROWRC:sub_pair1_then_sub_vsx1_then_sub_64
7006 0, // DMRROWRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7007 0, // DMRROWRC:sub_dmrrowp1_then_sub_dmrrow0
7008 0, // DMRROWRC:sub_dmrrowp1_then_sub_dmrrow1
7009 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrow0
7010 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrow1
7011 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrowp0
7012 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrowp1
7013 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7014 0, // DMRROWRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7015 0, // DMRROWRC:sub_dmr1_then_sub_dmrrow0
7016 0, // DMRROWRC:sub_dmr1_then_sub_dmrrow1
7017 0, // DMRROWRC:sub_dmr1_then_sub_dmrrowp0
7018 0, // DMRROWRC:sub_dmr1_then_sub_dmrrowp1
7019 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi
7020 0, // DMRROWRC:sub_dmr1_then_sub_wacc_lo
7021 0, // DMRROWRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7022 0, // DMRROWRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7023 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7024 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7025 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7026 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7027 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7028 0, // DMRROWRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7029 0, // DMRROWRC:sub_gp8_x1_then_sub_32
7030 },
7031 { // VSRC
7032 0, // VSRC:sub_32
7033 0, // VSRC:sub_32_hi_phony
7034 1, // VSRC:sub_64 -> VSSRC
7035 0, // VSRC:sub_64_hi_phony
7036 0, // VSRC:sub_dmr0
7037 0, // VSRC:sub_dmr1
7038 0, // VSRC:sub_dmrrow0
7039 0, // VSRC:sub_dmrrow1
7040 0, // VSRC:sub_dmrrowp0
7041 0, // VSRC:sub_dmrrowp1
7042 0, // VSRC:sub_eq
7043 0, // VSRC:sub_fp0
7044 0, // VSRC:sub_fp1
7045 0, // VSRC:sub_gp8_x0
7046 0, // VSRC:sub_gp8_x1
7047 0, // VSRC:sub_gt
7048 0, // VSRC:sub_lt
7049 0, // VSRC:sub_pair0
7050 0, // VSRC:sub_pair1
7051 0, // VSRC:sub_un
7052 0, // VSRC:sub_vsx0
7053 0, // VSRC:sub_vsx1
7054 0, // VSRC:sub_wacc_hi
7055 0, // VSRC:sub_wacc_lo
7056 0, // VSRC:sub_vsx1_then_sub_64
7057 0, // VSRC:sub_vsx1_then_sub_64_hi_phony
7058 0, // VSRC:sub_pair1_then_sub_64
7059 0, // VSRC:sub_pair1_then_sub_64_hi_phony
7060 0, // VSRC:sub_pair1_then_sub_vsx0
7061 0, // VSRC:sub_pair1_then_sub_vsx1
7062 0, // VSRC:sub_pair1_then_sub_vsx1_then_sub_64
7063 0, // VSRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7064 0, // VSRC:sub_dmrrowp1_then_sub_dmrrow0
7065 0, // VSRC:sub_dmrrowp1_then_sub_dmrrow1
7066 0, // VSRC:sub_wacc_hi_then_sub_dmrrow0
7067 0, // VSRC:sub_wacc_hi_then_sub_dmrrow1
7068 0, // VSRC:sub_wacc_hi_then_sub_dmrrowp0
7069 0, // VSRC:sub_wacc_hi_then_sub_dmrrowp1
7070 0, // VSRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7071 0, // VSRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7072 0, // VSRC:sub_dmr1_then_sub_dmrrow0
7073 0, // VSRC:sub_dmr1_then_sub_dmrrow1
7074 0, // VSRC:sub_dmr1_then_sub_dmrrowp0
7075 0, // VSRC:sub_dmr1_then_sub_dmrrowp1
7076 0, // VSRC:sub_dmr1_then_sub_wacc_hi
7077 0, // VSRC:sub_dmr1_then_sub_wacc_lo
7078 0, // VSRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7079 0, // VSRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7080 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7081 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7082 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7083 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7084 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7085 0, // VSRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7086 0, // VSRC:sub_gp8_x1_then_sub_32
7087 },
7088 { // VSRC_with_sub_64_in_SPILLTOVSRRC
7089 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_32
7090 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
7091 17, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_VSFRC
7092 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
7093 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
7094 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
7095 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
7096 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
7097 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
7098 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
7099 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
7100 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
7101 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
7102 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
7103 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
7104 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
7105 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
7106 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0
7107 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1
7108 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_un
7109 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0
7110 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1
7111 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
7112 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
7113 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64
7114 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
7115 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64
7116 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
7117 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0
7118 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1
7119 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
7120 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7121 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
7122 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
7123 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
7124 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
7125 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
7126 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
7127 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7128 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7129 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
7130 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
7131 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
7132 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
7133 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
7134 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
7135 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7136 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7137 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7138 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7139 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7140 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7141 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7142 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7143 0, // VSRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
7144 },
7145 { // VRRC
7146 0, // VRRC:sub_32
7147 0, // VRRC:sub_32_hi_phony
7148 23, // VRRC:sub_64 -> VFRC
7149 0, // VRRC:sub_64_hi_phony
7150 0, // VRRC:sub_dmr0
7151 0, // VRRC:sub_dmr1
7152 0, // VRRC:sub_dmrrow0
7153 0, // VRRC:sub_dmrrow1
7154 0, // VRRC:sub_dmrrowp0
7155 0, // VRRC:sub_dmrrowp1
7156 0, // VRRC:sub_eq
7157 0, // VRRC:sub_fp0
7158 0, // VRRC:sub_fp1
7159 0, // VRRC:sub_gp8_x0
7160 0, // VRRC:sub_gp8_x1
7161 0, // VRRC:sub_gt
7162 0, // VRRC:sub_lt
7163 0, // VRRC:sub_pair0
7164 0, // VRRC:sub_pair1
7165 0, // VRRC:sub_un
7166 0, // VRRC:sub_vsx0
7167 0, // VRRC:sub_vsx1
7168 0, // VRRC:sub_wacc_hi
7169 0, // VRRC:sub_wacc_lo
7170 0, // VRRC:sub_vsx1_then_sub_64
7171 0, // VRRC:sub_vsx1_then_sub_64_hi_phony
7172 0, // VRRC:sub_pair1_then_sub_64
7173 0, // VRRC:sub_pair1_then_sub_64_hi_phony
7174 0, // VRRC:sub_pair1_then_sub_vsx0
7175 0, // VRRC:sub_pair1_then_sub_vsx1
7176 0, // VRRC:sub_pair1_then_sub_vsx1_then_sub_64
7177 0, // VRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7178 0, // VRRC:sub_dmrrowp1_then_sub_dmrrow0
7179 0, // VRRC:sub_dmrrowp1_then_sub_dmrrow1
7180 0, // VRRC:sub_wacc_hi_then_sub_dmrrow0
7181 0, // VRRC:sub_wacc_hi_then_sub_dmrrow1
7182 0, // VRRC:sub_wacc_hi_then_sub_dmrrowp0
7183 0, // VRRC:sub_wacc_hi_then_sub_dmrrowp1
7184 0, // VRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7185 0, // VRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7186 0, // VRRC:sub_dmr1_then_sub_dmrrow0
7187 0, // VRRC:sub_dmr1_then_sub_dmrrow1
7188 0, // VRRC:sub_dmr1_then_sub_dmrrowp0
7189 0, // VRRC:sub_dmr1_then_sub_dmrrowp1
7190 0, // VRRC:sub_dmr1_then_sub_wacc_hi
7191 0, // VRRC:sub_dmr1_then_sub_wacc_lo
7192 0, // VRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7193 0, // VRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7194 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7195 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7196 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7197 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7198 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7199 0, // VRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7200 0, // VRRC:sub_gp8_x1_then_sub_32
7201 },
7202 { // VSLRC
7203 0, // VSLRC:sub_32
7204 0, // VSLRC:sub_32_hi_phony
7205 6, // VSLRC:sub_64 -> F4RC
7206 0, // VSLRC:sub_64_hi_phony
7207 0, // VSLRC:sub_dmr0
7208 0, // VSLRC:sub_dmr1
7209 0, // VSLRC:sub_dmrrow0
7210 0, // VSLRC:sub_dmrrow1
7211 0, // VSLRC:sub_dmrrowp0
7212 0, // VSLRC:sub_dmrrowp1
7213 0, // VSLRC:sub_eq
7214 0, // VSLRC:sub_fp0
7215 0, // VSLRC:sub_fp1
7216 0, // VSLRC:sub_gp8_x0
7217 0, // VSLRC:sub_gp8_x1
7218 0, // VSLRC:sub_gt
7219 0, // VSLRC:sub_lt
7220 0, // VSLRC:sub_pair0
7221 0, // VSLRC:sub_pair1
7222 0, // VSLRC:sub_un
7223 0, // VSLRC:sub_vsx0
7224 0, // VSLRC:sub_vsx1
7225 0, // VSLRC:sub_wacc_hi
7226 0, // VSLRC:sub_wacc_lo
7227 0, // VSLRC:sub_vsx1_then_sub_64
7228 0, // VSLRC:sub_vsx1_then_sub_64_hi_phony
7229 0, // VSLRC:sub_pair1_then_sub_64
7230 0, // VSLRC:sub_pair1_then_sub_64_hi_phony
7231 0, // VSLRC:sub_pair1_then_sub_vsx0
7232 0, // VSLRC:sub_pair1_then_sub_vsx1
7233 0, // VSLRC:sub_pair1_then_sub_vsx1_then_sub_64
7234 0, // VSLRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7235 0, // VSLRC:sub_dmrrowp1_then_sub_dmrrow0
7236 0, // VSLRC:sub_dmrrowp1_then_sub_dmrrow1
7237 0, // VSLRC:sub_wacc_hi_then_sub_dmrrow0
7238 0, // VSLRC:sub_wacc_hi_then_sub_dmrrow1
7239 0, // VSLRC:sub_wacc_hi_then_sub_dmrrowp0
7240 0, // VSLRC:sub_wacc_hi_then_sub_dmrrowp1
7241 0, // VSLRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7242 0, // VSLRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7243 0, // VSLRC:sub_dmr1_then_sub_dmrrow0
7244 0, // VSLRC:sub_dmr1_then_sub_dmrrow1
7245 0, // VSLRC:sub_dmr1_then_sub_dmrrowp0
7246 0, // VSLRC:sub_dmr1_then_sub_dmrrowp1
7247 0, // VSLRC:sub_dmr1_then_sub_wacc_hi
7248 0, // VSLRC:sub_dmr1_then_sub_wacc_lo
7249 0, // VSLRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7250 0, // VSLRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7251 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7252 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7253 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7254 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7255 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7256 0, // VSLRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7257 0, // VSLRC:sub_gp8_x1_then_sub_32
7258 },
7259 { // VRRC_with_sub_64_in_SPILLTOVSRRC
7260 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_32
7261 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
7262 25, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_VFRC
7263 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
7264 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
7265 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
7266 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
7267 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
7268 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
7269 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
7270 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
7271 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
7272 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
7273 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
7274 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
7275 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
7276 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
7277 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0
7278 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1
7279 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_un
7280 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0
7281 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1
7282 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
7283 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
7284 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64
7285 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
7286 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64
7287 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
7288 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0
7289 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1
7290 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
7291 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7292 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
7293 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
7294 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
7295 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
7296 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
7297 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
7298 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7299 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7300 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
7301 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
7302 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
7303 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
7304 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
7305 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
7306 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7307 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7308 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7309 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7310 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7311 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7312 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7313 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7314 0, // VRRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
7315 },
7316 { // FpRC
7317 0, // FpRC:sub_32
7318 0, // FpRC:sub_32_hi_phony
7319 0, // FpRC:sub_64
7320 0, // FpRC:sub_64_hi_phony
7321 0, // FpRC:sub_dmr0
7322 0, // FpRC:sub_dmr1
7323 0, // FpRC:sub_dmrrow0
7324 0, // FpRC:sub_dmrrow1
7325 0, // FpRC:sub_dmrrowp0
7326 0, // FpRC:sub_dmrrowp1
7327 0, // FpRC:sub_eq
7328 19, // FpRC:sub_fp0 -> F8RC
7329 19, // FpRC:sub_fp1 -> F8RC
7330 0, // FpRC:sub_gp8_x0
7331 0, // FpRC:sub_gp8_x1
7332 0, // FpRC:sub_gt
7333 0, // FpRC:sub_lt
7334 0, // FpRC:sub_pair0
7335 0, // FpRC:sub_pair1
7336 0, // FpRC:sub_un
7337 0, // FpRC:sub_vsx0
7338 0, // FpRC:sub_vsx1
7339 0, // FpRC:sub_wacc_hi
7340 0, // FpRC:sub_wacc_lo
7341 0, // FpRC:sub_vsx1_then_sub_64
7342 0, // FpRC:sub_vsx1_then_sub_64_hi_phony
7343 0, // FpRC:sub_pair1_then_sub_64
7344 0, // FpRC:sub_pair1_then_sub_64_hi_phony
7345 0, // FpRC:sub_pair1_then_sub_vsx0
7346 0, // FpRC:sub_pair1_then_sub_vsx1
7347 0, // FpRC:sub_pair1_then_sub_vsx1_then_sub_64
7348 0, // FpRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7349 0, // FpRC:sub_dmrrowp1_then_sub_dmrrow0
7350 0, // FpRC:sub_dmrrowp1_then_sub_dmrrow1
7351 0, // FpRC:sub_wacc_hi_then_sub_dmrrow0
7352 0, // FpRC:sub_wacc_hi_then_sub_dmrrow1
7353 0, // FpRC:sub_wacc_hi_then_sub_dmrrowp0
7354 0, // FpRC:sub_wacc_hi_then_sub_dmrrowp1
7355 0, // FpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7356 0, // FpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7357 0, // FpRC:sub_dmr1_then_sub_dmrrow0
7358 0, // FpRC:sub_dmr1_then_sub_dmrrow1
7359 0, // FpRC:sub_dmr1_then_sub_dmrrowp0
7360 0, // FpRC:sub_dmr1_then_sub_dmrrowp1
7361 0, // FpRC:sub_dmr1_then_sub_wacc_hi
7362 0, // FpRC:sub_dmr1_then_sub_wacc_lo
7363 0, // FpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7364 0, // FpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7365 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7366 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7367 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7368 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7369 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7370 0, // FpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7371 0, // FpRC:sub_gp8_x1_then_sub_32
7372 },
7373 { // G8pRC
7374 2, // G8pRC:sub_32 -> GPRC
7375 0, // G8pRC:sub_32_hi_phony
7376 0, // G8pRC:sub_64
7377 0, // G8pRC:sub_64_hi_phony
7378 0, // G8pRC:sub_dmr0
7379 0, // G8pRC:sub_dmr1
7380 0, // G8pRC:sub_dmrrow0
7381 0, // G8pRC:sub_dmrrow1
7382 0, // G8pRC:sub_dmrrowp0
7383 0, // G8pRC:sub_dmrrowp1
7384 0, // G8pRC:sub_eq
7385 0, // G8pRC:sub_fp0
7386 0, // G8pRC:sub_fp1
7387 15, // G8pRC:sub_gp8_x0 -> G8RC
7388 18, // G8pRC:sub_gp8_x1 -> G8RC_and_G8RC_NOX0
7389 0, // G8pRC:sub_gt
7390 0, // G8pRC:sub_lt
7391 0, // G8pRC:sub_pair0
7392 0, // G8pRC:sub_pair1
7393 0, // G8pRC:sub_un
7394 0, // G8pRC:sub_vsx0
7395 0, // G8pRC:sub_vsx1
7396 0, // G8pRC:sub_wacc_hi
7397 0, // G8pRC:sub_wacc_lo
7398 0, // G8pRC:sub_vsx1_then_sub_64
7399 0, // G8pRC:sub_vsx1_then_sub_64_hi_phony
7400 0, // G8pRC:sub_pair1_then_sub_64
7401 0, // G8pRC:sub_pair1_then_sub_64_hi_phony
7402 0, // G8pRC:sub_pair1_then_sub_vsx0
7403 0, // G8pRC:sub_pair1_then_sub_vsx1
7404 0, // G8pRC:sub_pair1_then_sub_vsx1_then_sub_64
7405 0, // G8pRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7406 0, // G8pRC:sub_dmrrowp1_then_sub_dmrrow0
7407 0, // G8pRC:sub_dmrrowp1_then_sub_dmrrow1
7408 0, // G8pRC:sub_wacc_hi_then_sub_dmrrow0
7409 0, // G8pRC:sub_wacc_hi_then_sub_dmrrow1
7410 0, // G8pRC:sub_wacc_hi_then_sub_dmrrowp0
7411 0, // G8pRC:sub_wacc_hi_then_sub_dmrrowp1
7412 0, // G8pRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7413 0, // G8pRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7414 0, // G8pRC:sub_dmr1_then_sub_dmrrow0
7415 0, // G8pRC:sub_dmr1_then_sub_dmrrow1
7416 0, // G8pRC:sub_dmr1_then_sub_dmrrowp0
7417 0, // G8pRC:sub_dmr1_then_sub_dmrrowp1
7418 0, // G8pRC:sub_dmr1_then_sub_wacc_hi
7419 0, // G8pRC:sub_dmr1_then_sub_wacc_lo
7420 0, // G8pRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7421 0, // G8pRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7422 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7423 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7424 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7425 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7426 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7427 0, // G8pRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7428 4, // G8pRC:sub_gp8_x1_then_sub_32 -> GPRC_and_GPRC_NOR0
7429 },
7430 { // G8pRC_with_sub_32_in_GPRC_NOR0
7431 4, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_32 -> GPRC_and_GPRC_NOR0
7432 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_32_hi_phony
7433 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_64
7434 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_64_hi_phony
7435 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr0
7436 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1
7437 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrow0
7438 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrow1
7439 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp0
7440 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1
7441 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_eq
7442 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_fp0
7443 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_fp1
7444 18, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_gp8_x0 -> G8RC_and_G8RC_NOX0
7445 18, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_gp8_x1 -> G8RC_and_G8RC_NOX0
7446 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_gt
7447 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_lt
7448 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair0
7449 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1
7450 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_un
7451 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_vsx0
7452 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_vsx1
7453 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi
7454 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_lo
7455 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_vsx1_then_sub_64
7456 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_vsx1_then_sub_64_hi_phony
7457 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_64
7458 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_64_hi_phony
7459 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx0
7460 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1
7461 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64
7462 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7463 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow0
7464 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmrrowp1_then_sub_dmrrow1
7465 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow0
7466 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrow1
7467 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp0
7468 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1
7469 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7470 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7471 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrow0
7472 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrow1
7473 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp0
7474 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1
7475 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi
7476 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_lo
7477 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7478 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7479 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7480 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7481 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7482 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7483 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7484 0, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7485 4, // G8pRC_with_sub_32_in_GPRC_NOR0:sub_gp8_x1_then_sub_32 -> GPRC_and_GPRC_NOR0
7486 },
7487 { // VSLRC_with_sub_64_in_SPILLTOVSRRC
7488 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_32
7489 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
7490 26, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_F4RC
7491 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
7492 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
7493 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
7494 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
7495 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
7496 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
7497 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
7498 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
7499 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
7500 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
7501 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
7502 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
7503 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
7504 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
7505 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0
7506 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1
7507 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_un
7508 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0
7509 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1
7510 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
7511 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
7512 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64
7513 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
7514 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64
7515 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
7516 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0
7517 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1
7518 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
7519 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7520 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
7521 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
7522 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
7523 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
7524 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
7525 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
7526 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7527 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7528 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
7529 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
7530 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
7531 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
7532 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
7533 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
7534 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7535 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7536 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7537 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7538 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7539 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7540 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7541 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7542 0, // VSLRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
7543 },
7544 { // FpRC_with_sub_fp0_in_SPILLTOVSRRC
7545 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_32
7546 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_32_hi_phony
7547 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_64
7548 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_64_hi_phony
7549 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr0
7550 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1
7551 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrow0
7552 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrow1
7553 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrowp0
7554 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrowp1
7555 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_eq
7556 26, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_fp0 -> SPILLTOVSRRC_and_F4RC
7557 26, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_fp1 -> SPILLTOVSRRC_and_F4RC
7558 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_gp8_x0
7559 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_gp8_x1
7560 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_gt
7561 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_lt
7562 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair0
7563 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1
7564 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_un
7565 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_vsx0
7566 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_vsx1
7567 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi
7568 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_lo
7569 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_vsx1_then_sub_64
7570 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
7571 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_64
7572 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
7573 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0
7574 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1
7575 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
7576 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7577 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
7578 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
7579 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
7580 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
7581 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
7582 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
7583 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7584 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7585 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
7586 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
7587 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
7588 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
7589 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
7590 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
7591 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7592 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7593 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7594 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7595 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7596 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7597 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7598 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7599 0, // FpRC_with_sub_fp0_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
7600 },
7601 { // DMRROWpRC
7602 0, // DMRROWpRC:sub_32
7603 0, // DMRROWpRC:sub_32_hi_phony
7604 0, // DMRROWpRC:sub_64
7605 0, // DMRROWpRC:sub_64_hi_phony
7606 0, // DMRROWpRC:sub_dmr0
7607 0, // DMRROWpRC:sub_dmr1
7608 29, // DMRROWpRC:sub_dmrrow0 -> DMRROWRC
7609 29, // DMRROWpRC:sub_dmrrow1 -> DMRROWRC
7610 0, // DMRROWpRC:sub_dmrrowp0
7611 0, // DMRROWpRC:sub_dmrrowp1
7612 0, // DMRROWpRC:sub_eq
7613 0, // DMRROWpRC:sub_fp0
7614 0, // DMRROWpRC:sub_fp1
7615 0, // DMRROWpRC:sub_gp8_x0
7616 0, // DMRROWpRC:sub_gp8_x1
7617 0, // DMRROWpRC:sub_gt
7618 0, // DMRROWpRC:sub_lt
7619 0, // DMRROWpRC:sub_pair0
7620 0, // DMRROWpRC:sub_pair1
7621 0, // DMRROWpRC:sub_un
7622 0, // DMRROWpRC:sub_vsx0
7623 0, // DMRROWpRC:sub_vsx1
7624 0, // DMRROWpRC:sub_wacc_hi
7625 0, // DMRROWpRC:sub_wacc_lo
7626 0, // DMRROWpRC:sub_vsx1_then_sub_64
7627 0, // DMRROWpRC:sub_vsx1_then_sub_64_hi_phony
7628 0, // DMRROWpRC:sub_pair1_then_sub_64
7629 0, // DMRROWpRC:sub_pair1_then_sub_64_hi_phony
7630 0, // DMRROWpRC:sub_pair1_then_sub_vsx0
7631 0, // DMRROWpRC:sub_pair1_then_sub_vsx1
7632 0, // DMRROWpRC:sub_pair1_then_sub_vsx1_then_sub_64
7633 0, // DMRROWpRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7634 0, // DMRROWpRC:sub_dmrrowp1_then_sub_dmrrow0
7635 0, // DMRROWpRC:sub_dmrrowp1_then_sub_dmrrow1
7636 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrow0
7637 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrow1
7638 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrowp0
7639 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrowp1
7640 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7641 0, // DMRROWpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7642 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrow0
7643 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrow1
7644 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrowp0
7645 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrowp1
7646 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi
7647 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_lo
7648 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7649 0, // DMRROWpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7650 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7651 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7652 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7653 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7654 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7655 0, // DMRROWpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7656 0, // DMRROWpRC:sub_gp8_x1_then_sub_32
7657 },
7658 { // VSRpRC
7659 0, // VSRpRC:sub_32
7660 0, // VSRpRC:sub_32_hi_phony
7661 14, // VSRpRC:sub_64 -> VSFRC
7662 0, // VSRpRC:sub_64_hi_phony
7663 0, // VSRpRC:sub_dmr0
7664 0, // VSRpRC:sub_dmr1
7665 0, // VSRpRC:sub_dmrrow0
7666 0, // VSRpRC:sub_dmrrow1
7667 0, // VSRpRC:sub_dmrrowp0
7668 0, // VSRpRC:sub_dmrrowp1
7669 0, // VSRpRC:sub_eq
7670 0, // VSRpRC:sub_fp0
7671 0, // VSRpRC:sub_fp1
7672 0, // VSRpRC:sub_gp8_x0
7673 0, // VSRpRC:sub_gp8_x1
7674 0, // VSRpRC:sub_gt
7675 0, // VSRpRC:sub_lt
7676 0, // VSRpRC:sub_pair0
7677 0, // VSRpRC:sub_pair1
7678 0, // VSRpRC:sub_un
7679 30, // VSRpRC:sub_vsx0 -> VSRC
7680 30, // VSRpRC:sub_vsx1 -> VSRC
7681 0, // VSRpRC:sub_wacc_hi
7682 0, // VSRpRC:sub_wacc_lo
7683 14, // VSRpRC:sub_vsx1_then_sub_64 -> VSFRC
7684 0, // VSRpRC:sub_vsx1_then_sub_64_hi_phony
7685 0, // VSRpRC:sub_pair1_then_sub_64
7686 0, // VSRpRC:sub_pair1_then_sub_64_hi_phony
7687 0, // VSRpRC:sub_pair1_then_sub_vsx0
7688 0, // VSRpRC:sub_pair1_then_sub_vsx1
7689 0, // VSRpRC:sub_pair1_then_sub_vsx1_then_sub_64
7690 0, // VSRpRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7691 0, // VSRpRC:sub_dmrrowp1_then_sub_dmrrow0
7692 0, // VSRpRC:sub_dmrrowp1_then_sub_dmrrow1
7693 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrow0
7694 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrow1
7695 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrowp0
7696 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrowp1
7697 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7698 0, // VSRpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7699 0, // VSRpRC:sub_dmr1_then_sub_dmrrow0
7700 0, // VSRpRC:sub_dmr1_then_sub_dmrrow1
7701 0, // VSRpRC:sub_dmr1_then_sub_dmrrowp0
7702 0, // VSRpRC:sub_dmr1_then_sub_dmrrowp1
7703 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi
7704 0, // VSRpRC:sub_dmr1_then_sub_wacc_lo
7705 0, // VSRpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7706 0, // VSRpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7707 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7708 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7709 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7710 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7711 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7712 0, // VSRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7713 0, // VSRpRC:sub_gp8_x1_then_sub_32
7714 },
7715 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC
7716 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_32
7717 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
7718 17, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_VSFRC
7719 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
7720 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
7721 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
7722 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
7723 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
7724 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
7725 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
7726 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
7727 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
7728 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
7729 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
7730 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
7731 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
7732 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
7733 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0
7734 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1
7735 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_un
7736 31, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0 -> VSRC_with_sub_64_in_SPILLTOVSRRC
7737 31, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1 -> VSRC_with_sub_64_in_SPILLTOVSRRC
7738 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
7739 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
7740 17, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_VSFRC
7741 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
7742 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64
7743 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
7744 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0
7745 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1
7746 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64
7747 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7748 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
7749 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
7750 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
7751 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
7752 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
7753 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
7754 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7755 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7756 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
7757 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
7758 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
7759 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
7760 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
7761 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
7762 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7763 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7764 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7765 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7766 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7767 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7768 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7769 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7770 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
7771 },
7772 { // VSRpRC_with_sub_64_in_F4RC
7773 0, // VSRpRC_with_sub_64_in_F4RC:sub_32
7774 0, // VSRpRC_with_sub_64_in_F4RC:sub_32_hi_phony
7775 19, // VSRpRC_with_sub_64_in_F4RC:sub_64 -> F8RC
7776 0, // VSRpRC_with_sub_64_in_F4RC:sub_64_hi_phony
7777 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr0
7778 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1
7779 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrow0
7780 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrow1
7781 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrowp0
7782 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrowp1
7783 0, // VSRpRC_with_sub_64_in_F4RC:sub_eq
7784 0, // VSRpRC_with_sub_64_in_F4RC:sub_fp0
7785 0, // VSRpRC_with_sub_64_in_F4RC:sub_fp1
7786 0, // VSRpRC_with_sub_64_in_F4RC:sub_gp8_x0
7787 0, // VSRpRC_with_sub_64_in_F4RC:sub_gp8_x1
7788 0, // VSRpRC_with_sub_64_in_F4RC:sub_gt
7789 0, // VSRpRC_with_sub_64_in_F4RC:sub_lt
7790 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair0
7791 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1
7792 0, // VSRpRC_with_sub_64_in_F4RC:sub_un
7793 33, // VSRpRC_with_sub_64_in_F4RC:sub_vsx0 -> VSLRC
7794 33, // VSRpRC_with_sub_64_in_F4RC:sub_vsx1 -> VSLRC
7795 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi
7796 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_lo
7797 19, // VSRpRC_with_sub_64_in_F4RC:sub_vsx1_then_sub_64 -> F8RC
7798 0, // VSRpRC_with_sub_64_in_F4RC:sub_vsx1_then_sub_64_hi_phony
7799 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_64
7800 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_64_hi_phony
7801 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_vsx0
7802 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_vsx1
7803 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_vsx1_then_sub_64
7804 0, // VSRpRC_with_sub_64_in_F4RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7805 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrowp1_then_sub_dmrrow0
7806 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmrrowp1_then_sub_dmrrow1
7807 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrow0
7808 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrow1
7809 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrowp0
7810 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrowp1
7811 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7812 0, // VSRpRC_with_sub_64_in_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7813 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrow0
7814 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrow1
7815 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrowp0
7816 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrowp1
7817 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi
7818 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_lo
7819 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7820 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7821 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7822 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7823 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7824 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7825 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7826 0, // VSRpRC_with_sub_64_in_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7827 0, // VSRpRC_with_sub_64_in_F4RC:sub_gp8_x1_then_sub_32
7828 },
7829 { // VSRpRC_with_sub_64_in_VFRC
7830 0, // VSRpRC_with_sub_64_in_VFRC:sub_32
7831 0, // VSRpRC_with_sub_64_in_VFRC:sub_32_hi_phony
7832 23, // VSRpRC_with_sub_64_in_VFRC:sub_64 -> VFRC
7833 0, // VSRpRC_with_sub_64_in_VFRC:sub_64_hi_phony
7834 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr0
7835 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1
7836 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrow0
7837 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrow1
7838 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrowp0
7839 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrowp1
7840 0, // VSRpRC_with_sub_64_in_VFRC:sub_eq
7841 0, // VSRpRC_with_sub_64_in_VFRC:sub_fp0
7842 0, // VSRpRC_with_sub_64_in_VFRC:sub_fp1
7843 0, // VSRpRC_with_sub_64_in_VFRC:sub_gp8_x0
7844 0, // VSRpRC_with_sub_64_in_VFRC:sub_gp8_x1
7845 0, // VSRpRC_with_sub_64_in_VFRC:sub_gt
7846 0, // VSRpRC_with_sub_64_in_VFRC:sub_lt
7847 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair0
7848 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1
7849 0, // VSRpRC_with_sub_64_in_VFRC:sub_un
7850 32, // VSRpRC_with_sub_64_in_VFRC:sub_vsx0 -> VRRC
7851 32, // VSRpRC_with_sub_64_in_VFRC:sub_vsx1 -> VRRC
7852 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi
7853 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_lo
7854 23, // VSRpRC_with_sub_64_in_VFRC:sub_vsx1_then_sub_64 -> VFRC
7855 0, // VSRpRC_with_sub_64_in_VFRC:sub_vsx1_then_sub_64_hi_phony
7856 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_64
7857 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_64_hi_phony
7858 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_vsx0
7859 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_vsx1
7860 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_vsx1_then_sub_64
7861 0, // VSRpRC_with_sub_64_in_VFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7862 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrowp1_then_sub_dmrrow0
7863 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmrrowp1_then_sub_dmrrow1
7864 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrow0
7865 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrow1
7866 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrowp0
7867 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrowp1
7868 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7869 0, // VSRpRC_with_sub_64_in_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7870 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrow0
7871 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrow1
7872 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrowp0
7873 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrowp1
7874 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi
7875 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_lo
7876 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7877 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7878 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7879 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7880 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7881 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7882 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7883 0, // VSRpRC_with_sub_64_in_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7884 0, // VSRpRC_with_sub_64_in_VFRC:sub_gp8_x1_then_sub_32
7885 },
7886 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
7887 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_32
7888 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_32_hi_phony
7889 25, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_64 -> SPILLTOVSRRC_and_VFRC
7890 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_64_hi_phony
7891 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr0
7892 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1
7893 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrow0
7894 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrow1
7895 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrowp0
7896 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrowp1
7897 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_eq
7898 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_fp0
7899 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_fp1
7900 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_gp8_x0
7901 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_gp8_x1
7902 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_gt
7903 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_lt
7904 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair0
7905 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1
7906 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_un
7907 34, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_vsx0 -> VRRC_with_sub_64_in_SPILLTOVSRRC
7908 34, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_vsx1 -> VRRC_with_sub_64_in_SPILLTOVSRRC
7909 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi
7910 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_lo
7911 25, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_VFRC
7912 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_vsx1_then_sub_64_hi_phony
7913 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_64
7914 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_64_hi_phony
7915 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx0
7916 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1
7917 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1_then_sub_64
7918 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7919 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrowp1_then_sub_dmrrow0
7920 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmrrowp1_then_sub_dmrrow1
7921 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrow0
7922 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrow1
7923 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp0
7924 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1
7925 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7926 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7927 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrow0
7928 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrow1
7929 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp0
7930 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1
7931 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi
7932 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_lo
7933 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7934 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7935 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7936 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7937 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7938 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7939 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7940 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7941 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC:sub_gp8_x1_then_sub_32
7942 },
7943 { // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
7944 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_32
7945 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_32_hi_phony
7946 26, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_64 -> SPILLTOVSRRC_and_F4RC
7947 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_64_hi_phony
7948 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr0
7949 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1
7950 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrow0
7951 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrow1
7952 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrowp0
7953 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrowp1
7954 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_eq
7955 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_fp0
7956 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_fp1
7957 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_gp8_x0
7958 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_gp8_x1
7959 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_gt
7960 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_lt
7961 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair0
7962 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1
7963 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_un
7964 38, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
7965 38, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
7966 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi
7967 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_lo
7968 26, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
7969 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_vsx1_then_sub_64_hi_phony
7970 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_64
7971 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_64_hi_phony
7972 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx0
7973 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1
7974 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1_then_sub_64
7975 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
7976 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrowp1_then_sub_dmrrow0
7977 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmrrowp1_then_sub_dmrrow1
7978 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrow0
7979 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrow1
7980 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp0
7981 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1
7982 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7983 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7984 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrow0
7985 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrow1
7986 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp0
7987 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1
7988 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi
7989 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_lo
7990 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
7991 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
7992 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
7993 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
7994 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
7995 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
7996 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
7997 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
7998 0, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC:sub_gp8_x1_then_sub_32
7999 },
8000 { // ACCRC
8001 0, // ACCRC:sub_32
8002 0, // ACCRC:sub_32_hi_phony
8003 19, // ACCRC:sub_64 -> F8RC
8004 0, // ACCRC:sub_64_hi_phony
8005 0, // ACCRC:sub_dmr0
8006 0, // ACCRC:sub_dmr1
8007 0, // ACCRC:sub_dmrrow0
8008 0, // ACCRC:sub_dmrrow1
8009 0, // ACCRC:sub_dmrrowp0
8010 0, // ACCRC:sub_dmrrowp1
8011 0, // ACCRC:sub_eq
8012 0, // ACCRC:sub_fp0
8013 0, // ACCRC:sub_fp1
8014 0, // ACCRC:sub_gp8_x0
8015 0, // ACCRC:sub_gp8_x1
8016 0, // ACCRC:sub_gt
8017 0, // ACCRC:sub_lt
8018 43, // ACCRC:sub_pair0 -> VSRpRC_with_sub_64_in_F4RC
8019 43, // ACCRC:sub_pair1 -> VSRpRC_with_sub_64_in_F4RC
8020 0, // ACCRC:sub_un
8021 33, // ACCRC:sub_vsx0 -> VSLRC
8022 33, // ACCRC:sub_vsx1 -> VSLRC
8023 0, // ACCRC:sub_wacc_hi
8024 0, // ACCRC:sub_wacc_lo
8025 19, // ACCRC:sub_vsx1_then_sub_64 -> F8RC
8026 0, // ACCRC:sub_vsx1_then_sub_64_hi_phony
8027 19, // ACCRC:sub_pair1_then_sub_64 -> F8RC
8028 0, // ACCRC:sub_pair1_then_sub_64_hi_phony
8029 33, // ACCRC:sub_pair1_then_sub_vsx0 -> VSLRC
8030 33, // ACCRC:sub_pair1_then_sub_vsx1 -> VSLRC
8031 19, // ACCRC:sub_pair1_then_sub_vsx1_then_sub_64 -> F8RC
8032 0, // ACCRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8033 0, // ACCRC:sub_dmrrowp1_then_sub_dmrrow0
8034 0, // ACCRC:sub_dmrrowp1_then_sub_dmrrow1
8035 0, // ACCRC:sub_wacc_hi_then_sub_dmrrow0
8036 0, // ACCRC:sub_wacc_hi_then_sub_dmrrow1
8037 0, // ACCRC:sub_wacc_hi_then_sub_dmrrowp0
8038 0, // ACCRC:sub_wacc_hi_then_sub_dmrrowp1
8039 0, // ACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8040 0, // ACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8041 0, // ACCRC:sub_dmr1_then_sub_dmrrow0
8042 0, // ACCRC:sub_dmr1_then_sub_dmrrow1
8043 0, // ACCRC:sub_dmr1_then_sub_dmrrowp0
8044 0, // ACCRC:sub_dmr1_then_sub_dmrrowp1
8045 0, // ACCRC:sub_dmr1_then_sub_wacc_hi
8046 0, // ACCRC:sub_dmr1_then_sub_wacc_lo
8047 0, // ACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8048 0, // ACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8049 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8050 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8051 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8052 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8053 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8054 0, // ACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8055 0, // ACCRC:sub_gp8_x1_then_sub_32
8056 },
8057 { // UACCRC
8058 0, // UACCRC:sub_32
8059 0, // UACCRC:sub_32_hi_phony
8060 19, // UACCRC:sub_64 -> F8RC
8061 0, // UACCRC:sub_64_hi_phony
8062 0, // UACCRC:sub_dmr0
8063 0, // UACCRC:sub_dmr1
8064 0, // UACCRC:sub_dmrrow0
8065 0, // UACCRC:sub_dmrrow1
8066 0, // UACCRC:sub_dmrrowp0
8067 0, // UACCRC:sub_dmrrowp1
8068 0, // UACCRC:sub_eq
8069 0, // UACCRC:sub_fp0
8070 0, // UACCRC:sub_fp1
8071 0, // UACCRC:sub_gp8_x0
8072 0, // UACCRC:sub_gp8_x1
8073 0, // UACCRC:sub_gt
8074 0, // UACCRC:sub_lt
8075 43, // UACCRC:sub_pair0 -> VSRpRC_with_sub_64_in_F4RC
8076 43, // UACCRC:sub_pair1 -> VSRpRC_with_sub_64_in_F4RC
8077 0, // UACCRC:sub_un
8078 33, // UACCRC:sub_vsx0 -> VSLRC
8079 33, // UACCRC:sub_vsx1 -> VSLRC
8080 0, // UACCRC:sub_wacc_hi
8081 0, // UACCRC:sub_wacc_lo
8082 19, // UACCRC:sub_vsx1_then_sub_64 -> F8RC
8083 0, // UACCRC:sub_vsx1_then_sub_64_hi_phony
8084 19, // UACCRC:sub_pair1_then_sub_64 -> F8RC
8085 0, // UACCRC:sub_pair1_then_sub_64_hi_phony
8086 33, // UACCRC:sub_pair1_then_sub_vsx0 -> VSLRC
8087 33, // UACCRC:sub_pair1_then_sub_vsx1 -> VSLRC
8088 19, // UACCRC:sub_pair1_then_sub_vsx1_then_sub_64 -> F8RC
8089 0, // UACCRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8090 0, // UACCRC:sub_dmrrowp1_then_sub_dmrrow0
8091 0, // UACCRC:sub_dmrrowp1_then_sub_dmrrow1
8092 0, // UACCRC:sub_wacc_hi_then_sub_dmrrow0
8093 0, // UACCRC:sub_wacc_hi_then_sub_dmrrow1
8094 0, // UACCRC:sub_wacc_hi_then_sub_dmrrowp0
8095 0, // UACCRC:sub_wacc_hi_then_sub_dmrrowp1
8096 0, // UACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8097 0, // UACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8098 0, // UACCRC:sub_dmr1_then_sub_dmrrow0
8099 0, // UACCRC:sub_dmr1_then_sub_dmrrow1
8100 0, // UACCRC:sub_dmr1_then_sub_dmrrowp0
8101 0, // UACCRC:sub_dmr1_then_sub_dmrrowp1
8102 0, // UACCRC:sub_dmr1_then_sub_wacc_hi
8103 0, // UACCRC:sub_dmr1_then_sub_wacc_lo
8104 0, // UACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8105 0, // UACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8106 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8107 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8108 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8109 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8110 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8111 0, // UACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8112 0, // UACCRC:sub_gp8_x1_then_sub_32
8113 },
8114 { // WACCRC
8115 0, // WACCRC:sub_32
8116 0, // WACCRC:sub_32_hi_phony
8117 0, // WACCRC:sub_64
8118 0, // WACCRC:sub_64_hi_phony
8119 0, // WACCRC:sub_dmr0
8120 0, // WACCRC:sub_dmr1
8121 29, // WACCRC:sub_dmrrow0 -> DMRROWRC
8122 29, // WACCRC:sub_dmrrow1 -> DMRROWRC
8123 40, // WACCRC:sub_dmrrowp0 -> DMRROWpRC
8124 40, // WACCRC:sub_dmrrowp1 -> DMRROWpRC
8125 0, // WACCRC:sub_eq
8126 0, // WACCRC:sub_fp0
8127 0, // WACCRC:sub_fp1
8128 0, // WACCRC:sub_gp8_x0
8129 0, // WACCRC:sub_gp8_x1
8130 0, // WACCRC:sub_gt
8131 0, // WACCRC:sub_lt
8132 0, // WACCRC:sub_pair0
8133 0, // WACCRC:sub_pair1
8134 0, // WACCRC:sub_un
8135 0, // WACCRC:sub_vsx0
8136 0, // WACCRC:sub_vsx1
8137 0, // WACCRC:sub_wacc_hi
8138 0, // WACCRC:sub_wacc_lo
8139 0, // WACCRC:sub_vsx1_then_sub_64
8140 0, // WACCRC:sub_vsx1_then_sub_64_hi_phony
8141 0, // WACCRC:sub_pair1_then_sub_64
8142 0, // WACCRC:sub_pair1_then_sub_64_hi_phony
8143 0, // WACCRC:sub_pair1_then_sub_vsx0
8144 0, // WACCRC:sub_pair1_then_sub_vsx1
8145 0, // WACCRC:sub_pair1_then_sub_vsx1_then_sub_64
8146 0, // WACCRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8147 29, // WACCRC:sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8148 29, // WACCRC:sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8149 0, // WACCRC:sub_wacc_hi_then_sub_dmrrow0
8150 0, // WACCRC:sub_wacc_hi_then_sub_dmrrow1
8151 0, // WACCRC:sub_wacc_hi_then_sub_dmrrowp0
8152 0, // WACCRC:sub_wacc_hi_then_sub_dmrrowp1
8153 0, // WACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8154 0, // WACCRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8155 0, // WACCRC:sub_dmr1_then_sub_dmrrow0
8156 0, // WACCRC:sub_dmr1_then_sub_dmrrow1
8157 0, // WACCRC:sub_dmr1_then_sub_dmrrowp0
8158 0, // WACCRC:sub_dmr1_then_sub_dmrrowp1
8159 0, // WACCRC:sub_dmr1_then_sub_wacc_hi
8160 0, // WACCRC:sub_dmr1_then_sub_wacc_lo
8161 0, // WACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8162 0, // WACCRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8163 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8164 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8165 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8166 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8167 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8168 0, // WACCRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8169 0, // WACCRC:sub_gp8_x1_then_sub_32
8170 },
8171 { // WACC_HIRC
8172 0, // WACC_HIRC:sub_32
8173 0, // WACC_HIRC:sub_32_hi_phony
8174 0, // WACC_HIRC:sub_64
8175 0, // WACC_HIRC:sub_64_hi_phony
8176 0, // WACC_HIRC:sub_dmr0
8177 0, // WACC_HIRC:sub_dmr1
8178 29, // WACC_HIRC:sub_dmrrow0 -> DMRROWRC
8179 29, // WACC_HIRC:sub_dmrrow1 -> DMRROWRC
8180 40, // WACC_HIRC:sub_dmrrowp0 -> DMRROWpRC
8181 40, // WACC_HIRC:sub_dmrrowp1 -> DMRROWpRC
8182 0, // WACC_HIRC:sub_eq
8183 0, // WACC_HIRC:sub_fp0
8184 0, // WACC_HIRC:sub_fp1
8185 0, // WACC_HIRC:sub_gp8_x0
8186 0, // WACC_HIRC:sub_gp8_x1
8187 0, // WACC_HIRC:sub_gt
8188 0, // WACC_HIRC:sub_lt
8189 0, // WACC_HIRC:sub_pair0
8190 0, // WACC_HIRC:sub_pair1
8191 0, // WACC_HIRC:sub_un
8192 0, // WACC_HIRC:sub_vsx0
8193 0, // WACC_HIRC:sub_vsx1
8194 0, // WACC_HIRC:sub_wacc_hi
8195 0, // WACC_HIRC:sub_wacc_lo
8196 0, // WACC_HIRC:sub_vsx1_then_sub_64
8197 0, // WACC_HIRC:sub_vsx1_then_sub_64_hi_phony
8198 0, // WACC_HIRC:sub_pair1_then_sub_64
8199 0, // WACC_HIRC:sub_pair1_then_sub_64_hi_phony
8200 0, // WACC_HIRC:sub_pair1_then_sub_vsx0
8201 0, // WACC_HIRC:sub_pair1_then_sub_vsx1
8202 0, // WACC_HIRC:sub_pair1_then_sub_vsx1_then_sub_64
8203 0, // WACC_HIRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8204 29, // WACC_HIRC:sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8205 29, // WACC_HIRC:sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8206 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrow0
8207 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrow1
8208 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrowp0
8209 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrowp1
8210 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8211 0, // WACC_HIRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8212 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrow0
8213 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrow1
8214 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrowp0
8215 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrowp1
8216 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi
8217 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_lo
8218 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8219 0, // WACC_HIRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8220 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8221 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8222 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8223 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8224 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8225 0, // WACC_HIRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8226 0, // WACC_HIRC:sub_gp8_x1_then_sub_32
8227 },
8228 { // ACCRC_with_sub_64_in_SPILLTOVSRRC
8229 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_32
8230 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
8231 26, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_F4RC
8232 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
8233 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
8234 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
8235 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
8236 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
8237 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
8238 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
8239 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
8240 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
8241 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
8242 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
8243 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
8244 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
8245 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
8246 46, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8247 43, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1 -> VSRpRC_with_sub_64_in_F4RC
8248 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_un
8249 38, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8250 38, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8251 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
8252 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
8253 26, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8254 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
8255 19, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64 -> F8RC
8256 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
8257 33, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0 -> VSLRC
8258 33, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1 -> VSLRC
8259 19, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64 -> F8RC
8260 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8261 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
8262 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
8263 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
8264 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
8265 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
8266 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
8267 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8268 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8269 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
8270 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
8271 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
8272 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
8273 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
8274 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
8275 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8276 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8277 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8278 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8279 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8280 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8281 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8282 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8283 0, // ACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
8284 },
8285 { // UACCRC_with_sub_64_in_SPILLTOVSRRC
8286 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_32
8287 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
8288 26, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_F4RC
8289 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
8290 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr0
8291 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1
8292 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
8293 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
8294 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
8295 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
8296 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_eq
8297 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_fp0
8298 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_fp1
8299 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
8300 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
8301 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gt
8302 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_lt
8303 46, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8304 43, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1 -> VSRpRC_with_sub_64_in_F4RC
8305 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_un
8306 38, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8307 38, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8308 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
8309 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
8310 26, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8311 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
8312 19, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64 -> F8RC
8313 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
8314 33, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0 -> VSLRC
8315 33, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1 -> VSLRC
8316 19, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64 -> F8RC
8317 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8318 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
8319 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
8320 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
8321 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
8322 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
8323 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
8324 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8325 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8326 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
8327 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
8328 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
8329 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
8330 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
8331 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
8332 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8333 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8334 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8335 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8336 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8337 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8338 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8339 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8340 0, // UACCRC_with_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
8341 },
8342 { // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
8343 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_32
8344 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
8345 26, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_F4RC
8346 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
8347 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr0
8348 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1
8349 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
8350 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
8351 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
8352 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
8353 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_eq
8354 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_fp0
8355 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_fp1
8356 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
8357 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
8358 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gt
8359 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_lt
8360 46, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8361 46, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8362 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_un
8363 38, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8364 38, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8365 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
8366 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
8367 26, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8368 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
8369 26, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8370 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
8371 38, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8372 38, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8373 26, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8374 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8375 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
8376 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
8377 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
8378 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
8379 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
8380 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
8381 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8382 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8383 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
8384 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
8385 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
8386 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
8387 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
8388 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
8389 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8390 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8391 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8392 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8393 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8394 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8395 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8396 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8397 0, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
8398 },
8399 { // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
8400 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_32
8401 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_32_hi_phony
8402 26, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_64 -> SPILLTOVSRRC_and_F4RC
8403 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_64_hi_phony
8404 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr0
8405 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1
8406 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrow0
8407 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrow1
8408 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp0
8409 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1
8410 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_eq
8411 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_fp0
8412 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_fp1
8413 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x0
8414 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x1
8415 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gt
8416 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_lt
8417 46, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair0 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8418 46, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1 -> VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8419 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_un
8420 38, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8421 38, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8422 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi
8423 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_lo
8424 26, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8425 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_vsx1_then_sub_64_hi_phony
8426 26, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8427 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_64_hi_phony
8428 38, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx0 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8429 38, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1 -> VSLRC_with_sub_64_in_SPILLTOVSRRC
8430 26, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64 -> SPILLTOVSRRC_and_F4RC
8431 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8432 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow0
8433 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmrrowp1_then_sub_dmrrow1
8434 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow0
8435 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrow1
8436 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp0
8437 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1
8438 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8439 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8440 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow0
8441 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrow1
8442 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp0
8443 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1
8444 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi
8445 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_lo
8446 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8447 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8448 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8449 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8450 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8451 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8452 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8453 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8454 0, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC:sub_gp8_x1_then_sub_32
8455 },
8456 { // DMRRC
8457 0, // DMRRC:sub_32
8458 0, // DMRRC:sub_32_hi_phony
8459 0, // DMRRC:sub_64
8460 0, // DMRRC:sub_64_hi_phony
8461 0, // DMRRC:sub_dmr0
8462 0, // DMRRC:sub_dmr1
8463 29, // DMRRC:sub_dmrrow0 -> DMRROWRC
8464 29, // DMRRC:sub_dmrrow1 -> DMRROWRC
8465 40, // DMRRC:sub_dmrrowp0 -> DMRROWpRC
8466 40, // DMRRC:sub_dmrrowp1 -> DMRROWpRC
8467 0, // DMRRC:sub_eq
8468 0, // DMRRC:sub_fp0
8469 0, // DMRRC:sub_fp1
8470 0, // DMRRC:sub_gp8_x0
8471 0, // DMRRC:sub_gp8_x1
8472 0, // DMRRC:sub_gt
8473 0, // DMRRC:sub_lt
8474 0, // DMRRC:sub_pair0
8475 0, // DMRRC:sub_pair1
8476 0, // DMRRC:sub_un
8477 0, // DMRRC:sub_vsx0
8478 0, // DMRRC:sub_vsx1
8479 50, // DMRRC:sub_wacc_hi -> WACC_HIRC
8480 49, // DMRRC:sub_wacc_lo -> WACCRC
8481 0, // DMRRC:sub_vsx1_then_sub_64
8482 0, // DMRRC:sub_vsx1_then_sub_64_hi_phony
8483 0, // DMRRC:sub_pair1_then_sub_64
8484 0, // DMRRC:sub_pair1_then_sub_64_hi_phony
8485 0, // DMRRC:sub_pair1_then_sub_vsx0
8486 0, // DMRRC:sub_pair1_then_sub_vsx1
8487 0, // DMRRC:sub_pair1_then_sub_vsx1_then_sub_64
8488 0, // DMRRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8489 29, // DMRRC:sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8490 29, // DMRRC:sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8491 29, // DMRRC:sub_wacc_hi_then_sub_dmrrow0 -> DMRROWRC
8492 29, // DMRRC:sub_wacc_hi_then_sub_dmrrow1 -> DMRROWRC
8493 40, // DMRRC:sub_wacc_hi_then_sub_dmrrowp0 -> DMRROWpRC
8494 40, // DMRRC:sub_wacc_hi_then_sub_dmrrowp1 -> DMRROWpRC
8495 29, // DMRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8496 29, // DMRRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8497 0, // DMRRC:sub_dmr1_then_sub_dmrrow0
8498 0, // DMRRC:sub_dmr1_then_sub_dmrrow1
8499 0, // DMRRC:sub_dmr1_then_sub_dmrrowp0
8500 0, // DMRRC:sub_dmr1_then_sub_dmrrowp1
8501 0, // DMRRC:sub_dmr1_then_sub_wacc_hi
8502 0, // DMRRC:sub_dmr1_then_sub_wacc_lo
8503 0, // DMRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0
8504 0, // DMRRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1
8505 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0
8506 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1
8507 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0
8508 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1
8509 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0
8510 0, // DMRRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1
8511 0, // DMRRC:sub_gp8_x1_then_sub_32
8512 },
8513 { // DMRpRC
8514 0, // DMRpRC:sub_32
8515 0, // DMRpRC:sub_32_hi_phony
8516 0, // DMRpRC:sub_64
8517 0, // DMRpRC:sub_64_hi_phony
8518 55, // DMRpRC:sub_dmr0 -> DMRRC
8519 55, // DMRpRC:sub_dmr1 -> DMRRC
8520 29, // DMRpRC:sub_dmrrow0 -> DMRROWRC
8521 29, // DMRpRC:sub_dmrrow1 -> DMRROWRC
8522 40, // DMRpRC:sub_dmrrowp0 -> DMRROWpRC
8523 40, // DMRpRC:sub_dmrrowp1 -> DMRROWpRC
8524 0, // DMRpRC:sub_eq
8525 0, // DMRpRC:sub_fp0
8526 0, // DMRpRC:sub_fp1
8527 0, // DMRpRC:sub_gp8_x0
8528 0, // DMRpRC:sub_gp8_x1
8529 0, // DMRpRC:sub_gt
8530 0, // DMRpRC:sub_lt
8531 0, // DMRpRC:sub_pair0
8532 0, // DMRpRC:sub_pair1
8533 0, // DMRpRC:sub_un
8534 0, // DMRpRC:sub_vsx0
8535 0, // DMRpRC:sub_vsx1
8536 50, // DMRpRC:sub_wacc_hi -> WACC_HIRC
8537 49, // DMRpRC:sub_wacc_lo -> WACCRC
8538 0, // DMRpRC:sub_vsx1_then_sub_64
8539 0, // DMRpRC:sub_vsx1_then_sub_64_hi_phony
8540 0, // DMRpRC:sub_pair1_then_sub_64
8541 0, // DMRpRC:sub_pair1_then_sub_64_hi_phony
8542 0, // DMRpRC:sub_pair1_then_sub_vsx0
8543 0, // DMRpRC:sub_pair1_then_sub_vsx1
8544 0, // DMRpRC:sub_pair1_then_sub_vsx1_then_sub_64
8545 0, // DMRpRC:sub_pair1_then_sub_vsx1_then_sub_64_hi_phony
8546 29, // DMRpRC:sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8547 29, // DMRpRC:sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8548 29, // DMRpRC:sub_wacc_hi_then_sub_dmrrow0 -> DMRROWRC
8549 29, // DMRpRC:sub_wacc_hi_then_sub_dmrrow1 -> DMRROWRC
8550 40, // DMRpRC:sub_wacc_hi_then_sub_dmrrowp0 -> DMRROWpRC
8551 40, // DMRpRC:sub_wacc_hi_then_sub_dmrrowp1 -> DMRROWpRC
8552 29, // DMRpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8553 29, // DMRpRC:sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8554 29, // DMRpRC:sub_dmr1_then_sub_dmrrow0 -> DMRROWRC
8555 29, // DMRpRC:sub_dmr1_then_sub_dmrrow1 -> DMRROWRC
8556 40, // DMRpRC:sub_dmr1_then_sub_dmrrowp0 -> DMRROWpRC
8557 40, // DMRpRC:sub_dmr1_then_sub_dmrrowp1 -> DMRROWpRC
8558 50, // DMRpRC:sub_dmr1_then_sub_wacc_hi -> WACC_HIRC
8559 49, // DMRpRC:sub_dmr1_then_sub_wacc_lo -> WACCRC
8560 29, // DMRpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8561 29, // DMRpRC:sub_dmr1_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8562 29, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow0 -> DMRROWRC
8563 29, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrow1 -> DMRROWRC
8564 40, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp0 -> DMRROWpRC
8565 40, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1 -> DMRROWpRC
8566 29, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow0 -> DMRROWRC
8567 29, // DMRpRC:sub_dmr1_then_sub_wacc_hi_then_sub_dmrrowp1_then_sub_dmrrow1 -> DMRROWRC
8568 0, // DMRpRC:sub_gp8_x1_then_sub_32
8569 },
8570
8571 };
8572 assert(RC && "Missing regclass");
8573 if (!Idx) return RC;
8574 --Idx;
8575 assert(Idx < 55 && "Bad subreg");
8576 unsigned TV = Table[RC->getID()][Idx];
8577 return TV ? getRegClass(i: TV - 1) : nullptr;
8578}/// Get the weight in units of pressure for this register class.
8579const RegClassWeight &PPCGenRegisterInfo::
8580getRegClassWeight(const TargetRegisterClass *RC) const {
8581 static const RegClassWeight RCWeightTable[] = {
8582 {.RegWeight: 1, .WeightLimit: 64}, // VSSRC
8583 {.RegWeight: 1, .WeightLimit: 34}, // GPRC
8584 {.RegWeight: 1, .WeightLimit: 34}, // GPRC_NOR0
8585 {.RegWeight: 1, .WeightLimit: 33}, // GPRC_and_GPRC_NOR0
8586 {.RegWeight: 1, .WeightLimit: 32}, // CRBITRC
8587 {.RegWeight: 1, .WeightLimit: 32}, // F4RC
8588 {.RegWeight: 0, .WeightLimit: 0}, // GPRC32
8589 {.RegWeight: 4, .WeightLimit: 32}, // CRRC
8590 {.RegWeight: 0, .WeightLimit: 0}, // CARRYRC
8591 {.RegWeight: 0, .WeightLimit: 0}, // CTRRC
8592 {.RegWeight: 0, .WeightLimit: 0}, // LRRC
8593 {.RegWeight: 1, .WeightLimit: 1}, // VRSAVERC
8594 {.RegWeight: 1, .WeightLimit: 68}, // SPILLTOVSRRC
8595 {.RegWeight: 1, .WeightLimit: 64}, // VSFRC
8596 {.RegWeight: 1, .WeightLimit: 34}, // G8RC
8597 {.RegWeight: 1, .WeightLimit: 34}, // G8RC_NOX0
8598 {.RegWeight: 1, .WeightLimit: 34}, // SPILLTOVSRRC_and_VSFRC
8599 {.RegWeight: 1, .WeightLimit: 33}, // G8RC_and_G8RC_NOX0
8600 {.RegWeight: 1, .WeightLimit: 32}, // F8RC
8601 {.RegWeight: 0, .WeightLimit: 0}, // FHRC
8602 {.RegWeight: 1, .WeightLimit: 32}, // SPERC
8603 {.RegWeight: 0, .WeightLimit: 0}, // VFHRC
8604 {.RegWeight: 1, .WeightLimit: 32}, // VFRC
8605 {.RegWeight: 1, .WeightLimit: 31}, // SPERC_with_sub_32_in_GPRC_NOR0
8606 {.RegWeight: 1, .WeightLimit: 20}, // SPILLTOVSRRC_and_VFRC
8607 {.RegWeight: 1, .WeightLimit: 14}, // SPILLTOVSRRC_and_F4RC
8608 {.RegWeight: 0, .WeightLimit: 0}, // CTRRC8
8609 {.RegWeight: 0, .WeightLimit: 0}, // LR8RC
8610 {.RegWeight: 1, .WeightLimit: 64}, // DMRROWRC
8611 {.RegWeight: 1, .WeightLimit: 64}, // VSRC
8612 {.RegWeight: 1, .WeightLimit: 34}, // VSRC_with_sub_64_in_SPILLTOVSRRC
8613 {.RegWeight: 1, .WeightLimit: 32}, // VRRC
8614 {.RegWeight: 1, .WeightLimit: 32}, // VSLRC
8615 {.RegWeight: 1, .WeightLimit: 20}, // VRRC_with_sub_64_in_SPILLTOVSRRC
8616 {.RegWeight: 2, .WeightLimit: 32}, // FpRC
8617 {.RegWeight: 2, .WeightLimit: 32}, // G8pRC
8618 {.RegWeight: 2, .WeightLimit: 30}, // G8pRC_with_sub_32_in_GPRC_NOR0
8619 {.RegWeight: 1, .WeightLimit: 14}, // VSLRC_with_sub_64_in_SPILLTOVSRRC
8620 {.RegWeight: 2, .WeightLimit: 14}, // FpRC_with_sub_fp0_in_SPILLTOVSRRC
8621 {.RegWeight: 2, .WeightLimit: 64}, // DMRROWpRC
8622 {.RegWeight: 2, .WeightLimit: 64}, // VSRpRC
8623 {.RegWeight: 2, .WeightLimit: 34}, // VSRpRC_with_sub_64_in_SPILLTOVSRRC
8624 {.RegWeight: 2, .WeightLimit: 32}, // VSRpRC_with_sub_64_in_F4RC
8625 {.RegWeight: 2, .WeightLimit: 32}, // VSRpRC_with_sub_64_in_VFRC
8626 {.RegWeight: 2, .WeightLimit: 20}, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_VFRC
8627 {.RegWeight: 2, .WeightLimit: 14}, // VSRpRC_with_sub_64_in_SPILLTOVSRRC_and_F4RC
8628 {.RegWeight: 4, .WeightLimit: 32}, // ACCRC
8629 {.RegWeight: 4, .WeightLimit: 32}, // UACCRC
8630 {.RegWeight: 4, .WeightLimit: 32}, // WACCRC
8631 {.RegWeight: 4, .WeightLimit: 32}, // WACC_HIRC
8632 {.RegWeight: 4, .WeightLimit: 16}, // ACCRC_with_sub_64_in_SPILLTOVSRRC
8633 {.RegWeight: 4, .WeightLimit: 16}, // UACCRC_with_sub_64_in_SPILLTOVSRRC
8634 {.RegWeight: 4, .WeightLimit: 12}, // ACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
8635 {.RegWeight: 4, .WeightLimit: 12}, // UACCRC_with_sub_pair1_then_sub_64_in_SPILLTOVSRRC
8636 {.RegWeight: 8, .WeightLimit: 64}, // DMRRC
8637 {.RegWeight: 16, .WeightLimit: 64}, // DMRpRC
8638 };
8639 return RCWeightTable[RC->getID()];
8640}
8641
8642/// Get the weight in units of pressure for this register unit.
8643unsigned PPCGenRegisterInfo::
8644getRegUnitWeight(MCRegUnit RegUnit) const {
8645 assert(static_cast<unsigned>(RegUnit) < 335 && "invalid register unit");
8646 // All register units have unit weight.
8647 return 1;
8648}
8649
8650
8651// Get the number of dimensions of register pressure.
8652unsigned PPCGenRegisterInfo::getNumRegPressureSets() const {
8653 return 19;
8654}
8655
8656// Get the name of this register unit pressure set.
8657const char *PPCGenRegisterInfo::
8658getRegPressureSetName(unsigned Idx) const {
8659 static const char *PressureNameTable[] = {
8660 "VRSAVERC",
8661 "SPILLTOVSRRC_and_F4RC",
8662 "SPILLTOVSRRC_and_VFRC",
8663 "CRBITRC",
8664 "F4RC",
8665 "VFRC",
8666 "WACCRC",
8667 "WACC_HIRC",
8668 "GPRC",
8669 "SPILLTOVSRRC_and_VSFRC",
8670 "SPILLTOVSRRC_and_VSFRC_with_VFRC",
8671 "F4RC_with_SPILLTOVSRRC_and_VSFRC",
8672 "VSSRC",
8673 "DMRROWRC",
8674 "SPILLTOVSRRC",
8675 "SPILLTOVSRRC_with_SPILLTOVSRRC_and_F4RC",
8676 "SPILLTOVSRRC_with_VFRC",
8677 "F4RC_with_SPILLTOVSRRC",
8678 "VSSRC_with_SPILLTOVSRRC",
8679 };
8680 return PressureNameTable[Idx];
8681}
8682
8683// Get the register unit pressure limit for this dimension.
8684// This limit must be adjusted dynamically for reserved registers.
8685unsigned PPCGenRegisterInfo::
8686getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const {
8687 static const uint8_t PressureLimitTable[] = {
8688 1, // 0: VRSAVERC
8689 16, // 1: SPILLTOVSRRC_and_F4RC
8690 20, // 2: SPILLTOVSRRC_and_VFRC
8691 32, // 3: CRBITRC
8692 32, // 4: F4RC
8693 32, // 5: VFRC
8694 32, // 6: WACCRC
8695 32, // 7: WACC_HIRC
8696 35, // 8: GPRC
8697 36, // 9: SPILLTOVSRRC_and_VSFRC
8698 46, // 10: SPILLTOVSRRC_and_VSFRC_with_VFRC
8699 52, // 11: F4RC_with_SPILLTOVSRRC_and_VSFRC
8700 64, // 12: VSSRC
8701 64, // 13: DMRROWRC
8702 69, // 14: SPILLTOVSRRC
8703 70, // 15: SPILLTOVSRRC_with_SPILLTOVSRRC_and_F4RC
8704 80, // 16: SPILLTOVSRRC_with_VFRC
8705 86, // 17: F4RC_with_SPILLTOVSRRC
8706 98, // 18: VSSRC_with_SPILLTOVSRRC
8707 };
8708 return PressureLimitTable[Idx];
8709}
8710
8711/// Table of pressure sets per register class or unit.
8712static const int RCSetsTable[] = {
8713 /* 0 */ 0, -1,
8714 /* 2 */ 3, -1,
8715 /* 4 */ 6, 13, -1,
8716 /* 7 */ 7, 13, -1,
8717 /* 10 */ 8, 14, -1,
8718 /* 13 */ 12, 18, -1,
8719 /* 16 */ 5, 10, 12, 16, 18, -1,
8720 /* 22 */ 4, 11, 12, 17, 18, -1,
8721 /* 28 */ 1, 4, 9, 11, 12, 15, 17, 18, -1,
8722 /* 37 */ 8, 14, 15, 16, 17, 18, -1,
8723 /* 44 */ 1, 4, 9, 10, 11, 12, 14, 15, 16, 17, 18, -1,
8724 /* 56 */ 2, 5, 9, 10, 11, 12, 14, 15, 16, 17, 18, -1,
8725};
8726
8727/// Get the dimensions of register pressure impacted by this register class.
8728/// Returns a -1 terminated array of pressure set IDs
8729const int *PPCGenRegisterInfo::
8730getRegClassPressureSets(const TargetRegisterClass *RC) const {
8731 static const uint8_t RCSetStartTable[] = {
8732 13,37,10,37,2,22,1,2,1,1,1,0,38,13,37,10,46,37,22,1,37,1,16,37,56,44,1,1,5,13,46,16,22,56,22,37,37,44,44,5,13,46,22,16,56,44,22,22,4,7,28,28,44,44,5,5,};
8733 return &RCSetsTable[RCSetStartTable[RC->getID()]];
8734}
8735
8736/// Get the dimensions of register pressure impacted by this register unit.
8737/// Returns a -1 terminated array of pressure set IDs
8738const int *PPCGenRegisterInfo::
8739getRegUnitPressureSets(MCRegUnit RegUnit) const {
8740 assert(static_cast<unsigned>(RegUnit) < 335 && "invalid register unit");
8741 static const uint8_t RUSetStartTable[] = {
8742 37,1,1,1,1,37,1,1,1,1,0,1,10,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,44,1,28,1,28,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,22,1,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,1,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,4,4,4,4,7,7,7,7,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,37,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,56,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,16,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,};
8743 return &RCSetsTable[RUSetStartTable[static_cast<unsigned>(RegUnit)]];
8744}
8745
8746extern const MCRegisterDesc PPCRegDesc[];
8747extern const int16_t PPCRegDiffLists[];
8748extern const LaneBitmask PPCLaneMaskLists[];
8749extern const char PPCRegStrings[];
8750extern const char PPCRegClassStrings[];
8751extern const MCPhysReg PPCRegUnitRoots[][2];
8752extern const uint16_t PPCSubRegIdxLists[];
8753extern const uint16_t PPCRegEncodingTable[];
8754// PPC Dwarf<->LLVM register mappings.
8755extern const MCRegisterInfo::DwarfLLVMRegPair PPCDwarfFlavour0Dwarf2L[];
8756extern const unsigned PPCDwarfFlavour0Dwarf2LSize;
8757
8758extern const MCRegisterInfo::DwarfLLVMRegPair PPCDwarfFlavour1Dwarf2L[];
8759extern const unsigned PPCDwarfFlavour1Dwarf2LSize;
8760
8761extern const MCRegisterInfo::DwarfLLVMRegPair PPCEHFlavour0Dwarf2L[];
8762extern const unsigned PPCEHFlavour0Dwarf2LSize;
8763
8764extern const MCRegisterInfo::DwarfLLVMRegPair PPCEHFlavour1Dwarf2L[];
8765extern const unsigned PPCEHFlavour1Dwarf2LSize;
8766
8767extern const MCRegisterInfo::DwarfLLVMRegPair PPCDwarfFlavour0L2Dwarf[];
8768extern const unsigned PPCDwarfFlavour0L2DwarfSize;
8769
8770extern const MCRegisterInfo::DwarfLLVMRegPair PPCDwarfFlavour1L2Dwarf[];
8771extern const unsigned PPCDwarfFlavour1L2DwarfSize;
8772
8773extern const MCRegisterInfo::DwarfLLVMRegPair PPCEHFlavour0L2Dwarf[];
8774extern const unsigned PPCEHFlavour0L2DwarfSize;
8775
8776extern const MCRegisterInfo::DwarfLLVMRegPair PPCEHFlavour1L2Dwarf[];
8777extern const unsigned PPCEHFlavour1L2DwarfSize;
8778
8779
8780PPCGenRegisterInfo::
8781PPCGenRegisterInfo(unsigned RA, unsigned DwarfFlavour, unsigned EHFlavour,
8782 unsigned PC, unsigned HwMode)
8783 : TargetRegisterInfo(&PPCRegInfoDesc, PPCRegisterClasses,
8784 PPCSubRegIndexStrings, PPCSubRegIndexNameOffsets,
8785 PPCSubRegIdxRangeTable, PPCSubRegIndexLaneMaskTable,
8786
8787 LaneBitmask(0xFFFFFFFE00000002), PPCRegClassInfos, PPCVTLists, HwMode) {
8788 InitMCRegisterInfo(D: PPCRegDesc, NR: 612, RA, PC,
8789 C: PPCMCRegisterClasses, NC: 56, RURoots: PPCRegUnitRoots, NRU: 335, DL: PPCRegDiffLists,
8790 RUMS: PPCLaneMaskLists, Strings: PPCRegStrings, ClassStrings: PPCRegClassStrings, SubIndices: PPCSubRegIdxLists, NumIndices: 56,
8791 RET: PPCRegEncodingTable, RUI: nullptr);
8792
8793 switch (DwarfFlavour) {
8794 default:
8795 llvm_unreachable("Unknown DWARF flavour");
8796 case 0:
8797 mapDwarfRegsToLLVMRegs(Map: PPCDwarfFlavour0Dwarf2L, Size: PPCDwarfFlavour0Dwarf2LSize, isEH: false);
8798 break;
8799 case 1:
8800 mapDwarfRegsToLLVMRegs(Map: PPCDwarfFlavour1Dwarf2L, Size: PPCDwarfFlavour1Dwarf2LSize, isEH: false);
8801 break;
8802 }
8803 switch (EHFlavour) {
8804 default:
8805 llvm_unreachable("Unknown DWARF flavour");
8806 case 0:
8807 mapDwarfRegsToLLVMRegs(Map: PPCEHFlavour0Dwarf2L, Size: PPCEHFlavour0Dwarf2LSize, isEH: true);
8808 break;
8809 case 1:
8810 mapDwarfRegsToLLVMRegs(Map: PPCEHFlavour1Dwarf2L, Size: PPCEHFlavour1Dwarf2LSize, isEH: true);
8811 break;
8812 }
8813 switch (DwarfFlavour) {
8814 default:
8815 llvm_unreachable("Unknown DWARF flavour");
8816 case 0:
8817 mapLLVMRegsToDwarfRegs(Map: PPCDwarfFlavour0L2Dwarf, Size: PPCDwarfFlavour0L2DwarfSize, isEH: false);
8818 break;
8819 case 1:
8820 mapLLVMRegsToDwarfRegs(Map: PPCDwarfFlavour1L2Dwarf, Size: PPCDwarfFlavour1L2DwarfSize, isEH: false);
8821 break;
8822 }
8823 switch (EHFlavour) {
8824 default:
8825 llvm_unreachable("Unknown DWARF flavour");
8826 case 0:
8827 mapLLVMRegsToDwarfRegs(Map: PPCEHFlavour0L2Dwarf, Size: PPCEHFlavour0L2DwarfSize, isEH: true);
8828 break;
8829 case 1:
8830 mapLLVMRegsToDwarfRegs(Map: PPCEHFlavour1L2Dwarf, Size: PPCEHFlavour1L2DwarfSize, isEH: true);
8831 break;
8832 }
8833}
8834
8835static const MCPhysReg CSR_64_AllRegs_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, 0 };
8836static const uint32_t CSR_64_AllRegs_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0x000001ff, 0x00000000, 0xc8000000, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
8837static const MCPhysReg CSR_64_AllRegs_AIX_Dflt_Altivec_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, 0 };
8838static const uint32_t CSR_64_AllRegs_AIX_Dflt_Altivec_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0x000001ff, 0x00000000, 0xc8000000, 0x07fffe3f, 0x00000000, 0x007ffff8, 0x007ffff8, 0x007ffff8, 0x00000000, 0x00000000, 0x00000000, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
8839static const MCPhysReg CSR_64_AllRegs_AIX_Dflt_VSX_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSL0, PPC::VSL1, PPC::VSL2, PPC::VSL3, PPC::VSL4, PPC::VSL5, PPC::VSL6, PPC::VSL7, PPC::VSL8, PPC::VSL9, PPC::VSL10, PPC::VSL11, PPC::VSL12, PPC::VSL13, PPC::VSL14, PPC::VSL15, PPC::VSL16, PPC::VSL17, PPC::VSL18, PPC::VSL19, 0 };
8840static const uint32_t CSR_64_AllRegs_AIX_Dflt_VSX_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0x1fffffff, 0x00000000, 0xc8000000, 0x07fffe3f, 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0x007fffff, 0x00000000, 0x00000000, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
8841static const MCPhysReg CSR_64_AllRegs_Altivec_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8842static const uint32_t CSR_64_AllRegs_Altivec_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0x000001ff, 0x00000000, 0xc8000000, 0x07fffe3f, 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0x00000007, 0x00000000, 0x00000000, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
8843static const MCPhysReg CSR_64_AllRegs_VSRP_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSL0, PPC::VSL1, PPC::VSL2, PPC::VSL3, PPC::VSL4, PPC::VSL5, PPC::VSL6, PPC::VSL7, PPC::VSL8, PPC::VSL9, PPC::VSL10, PPC::VSL11, PPC::VSL12, PPC::VSL13, PPC::VSL14, PPC::VSL15, PPC::VSL16, PPC::VSL17, PPC::VSL18, PPC::VSL19, PPC::VSL20, PPC::VSL21, PPC::VSL22, PPC::VSL23, PPC::VSL24, PPC::VSL25, PPC::VSL26, PPC::VSL27, PPC::VSL28, PPC::VSL29, PPC::VSL30, PPC::VSL31, PPC::VSRp0, PPC::VSRp1, PPC::VSRp2, PPC::VSRp3, PPC::VSRp4, PPC::VSRp5, PPC::VSRp6, PPC::VSRp7, PPC::VSRp8, PPC::VSRp9, PPC::VSRp10, PPC::VSRp11, PPC::VSRp12, PPC::VSRp13, PPC::VSRp14, PPC::VSRp15, PPC::VSRp16, PPC::VSRp17, PPC::VSRp18, PPC::VSRp19, PPC::VSRp20, PPC::VSRp21, PPC::VSRp22, PPC::VSRp23, PPC::VSRp24, PPC::VSRp25, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8844static const uint32_t CSR_64_AllRegs_VSRP_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0xc8000000, 0x07fffe3f, 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000007, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
8845static const MCPhysReg CSR_64_AllRegs_VSX_SaveList[] = { PPC::X0, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSL0, PPC::VSL1, PPC::VSL2, PPC::VSL3, PPC::VSL4, PPC::VSL5, PPC::VSL6, PPC::VSL7, PPC::VSL8, PPC::VSL9, PPC::VSL10, PPC::VSL11, PPC::VSL12, PPC::VSL13, PPC::VSL14, PPC::VSL15, PPC::VSL16, PPC::VSL17, PPC::VSL18, PPC::VSL19, PPC::VSL20, PPC::VSL21, PPC::VSL22, PPC::VSL23, PPC::VSL24, PPC::VSL25, PPC::VSL26, PPC::VSL27, PPC::VSL28, PPC::VSL29, PPC::VSL30, PPC::VSL31, 0 };
8846static const uint32_t CSR_64_AllRegs_VSX_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0xc8000000, 0x07fffe3f, 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000007, 0x00000000, 0x3fc80000, 0xfffffffe, 0x000fffff, 0x00000000, };
8847static const MCPhysReg CSR_AIX32_SaveList[] = { PPC::R13, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, 0 };
8848static const uint32_t CSR_AIX32_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07ffff00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8849static const MCPhysReg CSR_AIX32_Altivec_SaveList[] = { PPC::R13, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8850static const uint32_t CSR_AIX32_Altivec_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07ffff00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8851static const MCPhysReg CSR_AIX32_VSRP_SaveList[] = { PPC::R13, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8852static const uint32_t CSR_AIX32_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07ffff00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8853static const MCPhysReg CSR_AIX64_R2_VSRP_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, PPC::X2, 0 };
8854static const uint32_t CSR_AIX64_R2_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x20000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00200000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8855static const MCPhysReg CSR_AIX64_VSRP_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8856static const uint32_t CSR_AIX64_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00000000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8857static const MCPhysReg CSR_ALL_VSRP_SaveList[] = { PPC::VSRp0, PPC::VSRp1, PPC::VSRp2, PPC::VSRp3, PPC::VSRp4, PPC::VSRp5, PPC::VSRp6, PPC::VSRp7, PPC::VSRp8, PPC::VSRp9, PPC::VSRp10, PPC::VSRp11, PPC::VSRp12, PPC::VSRp13, PPC::VSRp14, PPC::VSRp15, PPC::VSRp16, PPC::VSRp17, PPC::VSRp18, PPC::VSRp19, PPC::VSRp20, PPC::VSRp21, PPC::VSRp22, PPC::VSRp23, PPC::VSRp24, PPC::VSRp25, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8858static const uint32_t CSR_ALL_VSRP_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0x00000000, 0x00000000, 0x00000000, 0xfffffff8, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000007, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
8859static const MCPhysReg CSR_Altivec_SaveList[] = { PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8860static const uint32_t CSR_Altivec_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
8861static const MCPhysReg CSR_NoRegs_SaveList[] = { 0 };
8862static const uint32_t CSR_NoRegs_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
8863static const MCPhysReg CSR_PPC64_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, 0 };
8864static const uint32_t CSR_PPC64_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8865static const MCPhysReg CSR_PPC64_Altivec_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8866static const uint32_t CSR_PPC64_Altivec_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8867static const MCPhysReg CSR_PPC64_R2_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::X2, 0 };
8868static const uint32_t CSR_PPC64_R2_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x20000000, 0x07fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00200000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8869static const MCPhysReg CSR_PPC64_R2_Altivec_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::X2, 0 };
8870static const uint32_t CSR_PPC64_R2_Altivec_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x20000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0x00000000, 0x00000000, 0x00200000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8871static const MCPhysReg CSR_SPE_SaveList[] = { PPC::S14, PPC::S15, PPC::S16, PPC::S17, PPC::S18, PPC::S19, PPC::S20, PPC::S21, PPC::S22, PPC::S23, PPC::S24, PPC::S25, PPC::S26, PPC::S27, PPC::S28, PPC::S29, PPC::S30, 0 };
8872static const uint32_t CSR_SPE_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01ffff00, 0x03fffe00, 0x03fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
8873static const MCPhysReg CSR_SPE_NO_S30_31_SaveList[] = { PPC::S14, PPC::S15, PPC::S16, PPC::S17, PPC::S18, PPC::S19, PPC::S20, PPC::S21, PPC::S22, PPC::S23, PPC::S24, PPC::S25, PPC::S26, PPC::S27, PPC::S28, PPC::S29, 0 };
8874static const uint32_t CSR_SPE_NO_S30_31_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00ffff00, 0x01fffe00, 0x01fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
8875static const MCPhysReg CSR_SVR32_ColdCC_SaveList[] = { PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, 0 };
8876static const uint32_t CSR_SVR32_ColdCC_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0x80000000, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff80000, 0x000fffff, 0x00000000, };
8877static const MCPhysReg CSR_SVR32_ColdCC_Altivec_SaveList[] = { PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::V0, PPC::V1, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8878static const uint32_t CSR_SVR32_ColdCC_Altivec_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0x80000000, 0x07fffe3f, 0x00000000, 0xffffffd8, 0xffffffdf, 0xffffffdf, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0xfff80000, 0x000fffff, 0x00000000, };
8879static const MCPhysReg CSR_SVR32_ColdCC_Common_SaveList[] = { PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, 0 };
8880static const uint32_t CSR_SVR32_ColdCC_Common_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff80000, 0x000fffff, 0x00000000, };
8881static const MCPhysReg CSR_SVR32_ColdCC_SPE_SaveList[] = { PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::S4, PPC::S5, PPC::S6, PPC::S7, PPC::S8, PPC::S9, PPC::S10, PPC::S14, PPC::S15, PPC::S16, PPC::S17, PPC::S18, PPC::S19, PPC::S20, PPC::S21, PPC::S22, PPC::S23, PPC::S24, PPC::S25, PPC::S26, PPC::S27, PPC::S28, PPC::S29, PPC::S30, PPC::S31, 0 };
8882static const uint32_t CSR_SVR32_ColdCC_SPE_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc0000000, 0x83ffff1f, 0x87fffe3f, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff80000, 0x000fffff, 0x00000000, };
8883static const MCPhysReg CSR_SVR32_ColdCC_VSRP_SaveList[] = { PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::V0, PPC::V1, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp0, PPC::VSRp1, PPC::VSRp2, PPC::VSRp3, PPC::VSRp4, PPC::VSRp5, PPC::VSRp6, PPC::VSRp7, PPC::VSRp8, PPC::VSRp9, PPC::VSRp10, PPC::VSRp11, PPC::VSRp12, PPC::VSRp13, PPC::VSRp14, PPC::VSRp15, PPC::VSRp16, PPC::VSRp18, PPC::VSRp19, PPC::VSRp20, PPC::VSRp21, PPC::VSRp22, PPC::VSRp23, PPC::VSRp24, PPC::VSRp25, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8884static const uint32_t CSR_SVR32_ColdCC_VSRP_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0x80000000, 0x07fffe3f, 0x00000000, 0xffffffd8, 0xffffffdf, 0xffffffdf, 0xffffffff, 0xffefffff, 0x00000007, 0x00000000, 0xfff80000, 0x000fffff, 0x00000000, };
8885static const MCPhysReg CSR_SVR64_ColdCC_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, 0 };
8886static const uint32_t CSR_SVR64_ColdCC_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0x80000000, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3f800000, 0xfffffffe, 0x000fffff, 0x00000000, };
8887static const MCPhysReg CSR_SVR64_ColdCC_Altivec_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8888static const uint32_t CSR_SVR64_ColdCC_Altivec_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0x80000000, 0x07fffe3f, 0x00000000, 0xffffffd8, 0xffffffdf, 0xffffffdf, 0x00000007, 0x00000000, 0x00000000, 0x3f800000, 0xfffffffe, 0x000fffff, 0x00000000, };
8889static const MCPhysReg CSR_SVR64_ColdCC_R2_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::X2, 0 };
8890static const uint32_t CSR_SVR64_ColdCC_R2_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0xa0000000, 0x07fffe3f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x3fa00000, 0xfffffffe, 0x000fffff, 0x00000000, };
8891static const MCPhysReg CSR_SVR64_ColdCC_R2_Altivec_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::V0, PPC::V1, PPC::V3, PPC::V4, PPC::V5, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::X2, 0 };
8892static const uint32_t CSR_SVR64_ColdCC_R2_Altivec_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffa00, 0x000001ff, 0x00000000, 0xa0000000, 0x07fffe3f, 0x00000000, 0xffffffd8, 0xffffffdf, 0xffffffdf, 0x00000007, 0x00000000, 0x00000000, 0x3fa00000, 0xfffffffe, 0x000fffff, 0x00000000, };
8893static const MCPhysReg CSR_SVR64_ColdCC_R2_VSRP_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::VSRp0, PPC::VSRp1, PPC::VSRp2, PPC::VSRp3, PPC::VSRp4, PPC::VSRp5, PPC::VSRp6, PPC::VSRp7, PPC::VSRp8, PPC::VSRp9, PPC::VSRp10, PPC::VSRp11, PPC::VSRp12, PPC::VSRp13, PPC::VSRp14, PPC::VSRp15, PPC::VSRp16, PPC::VSRp18, PPC::VSRp19, PPC::VSRp20, PPC::VSRp21, PPC::VSRp22, PPC::VSRp23, PPC::VSRp24, PPC::VSRp25, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, PPC::X2, 0 };
8894static const uint32_t CSR_SVR64_ColdCC_R2_VSRP_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0xa0000000, 0x07fffe3f, 0x00000000, 0xffffff98, 0xffffff9f, 0xffffff9f, 0xffffffff, 0xffefffff, 0x00000007, 0x3fa00000, 0xfffffffe, 0x000fffff, 0x00000000, };
8895static const MCPhysReg CSR_SVR64_ColdCC_VSRP_SaveList[] = { PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F0, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR0, PPC::CR1, PPC::CR2, PPC::CR3, PPC::CR4, PPC::CR5, PPC::CR6, PPC::CR7, PPC::VSRp0, PPC::VSRp1, PPC::VSRp2, PPC::VSRp3, PPC::VSRp4, PPC::VSRp5, PPC::VSRp6, PPC::VSRp7, PPC::VSRp8, PPC::VSRp9, PPC::VSRp10, PPC::VSRp11, PPC::VSRp12, PPC::VSRp13, PPC::VSRp14, PPC::VSRp15, PPC::VSRp16, PPC::VSRp18, PPC::VSRp19, PPC::VSRp20, PPC::VSRp21, PPC::VSRp22, PPC::VSRp23, PPC::VSRp24, PPC::VSRp25, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8896static const uint32_t CSR_SVR64_ColdCC_VSRP_RegMask[] = { 0x0ff00400, 0x00000000, 0x00000000, 0x00000000, 0xfffffe00, 0xffffffff, 0x000001ff, 0x80000000, 0x07fffe3f, 0x00000000, 0xffffff98, 0xffffff9f, 0xffffff9f, 0xffffffff, 0xffefffff, 0x00000007, 0x3f800000, 0xfffffffe, 0x000fffff, 0x00000000, };
8897static const MCPhysReg CSR_SVR432_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, 0 };
8898static const uint32_t CSR_SVR432_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8899static const MCPhysReg CSR_SVR432_Altivec_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 0 };
8900static const uint32_t CSR_SVR432_Altivec_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8901static const MCPhysReg CSR_SVR432_COMM_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, 0 };
8902static const uint32_t CSR_SVR432_COMM_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8903static const MCPhysReg CSR_SVR432_SPE_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::S14, PPC::S15, PPC::S16, PPC::S17, PPC::S18, PPC::S19, PPC::S20, PPC::S21, PPC::S22, PPC::S23, PPC::S24, PPC::S25, PPC::S26, PPC::S27, PPC::S28, PPC::S29, PPC::S30, 0 };
8904static const uint32_t CSR_SVR432_SPE_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01ffff00, 0x07fffe00, 0x03fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8905static const MCPhysReg CSR_SVR432_SPE_NO_S30_31_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::S14, PPC::S15, PPC::S16, PPC::S17, PPC::S18, PPC::S19, PPC::S20, PPC::S21, PPC::S22, PPC::S23, PPC::S24, PPC::S25, PPC::S26, PPC::S27, PPC::S28, PPC::S29, 0 };
8906static const uint32_t CSR_SVR432_SPE_NO_S30_31_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00ffff00, 0x07fffe00, 0x01fffe00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8907static const MCPhysReg CSR_SVR432_VSRP_SaveList[] = { PPC::R14, PPC::R15, PPC::R16, PPC::R17, PPC::R18, PPC::R19, PPC::R20, PPC::R21, PPC::R22, PPC::R23, PPC::R24, PPC::R25, PPC::R26, PPC::R27, PPC::R28, PPC::R29, PPC::R30, PPC::R31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8908static const uint32_t CSR_SVR432_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00000000, 0xc1c80000, 0x0001c1c1, 0x00000000, };
8909static const MCPhysReg CSR_SVR464_R2_VSRP_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, PPC::X2, 0 };
8910static const uint32_t CSR_SVR464_R2_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x20000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00200000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8911static const MCPhysReg CSR_SVR464_VSRP_SaveList[] = { PPC::X14, PPC::X15, PPC::X16, PPC::X17, PPC::X18, PPC::X19, PPC::X20, PPC::X21, PPC::X22, PPC::X23, PPC::X24, PPC::X25, PPC::X26, PPC::X27, PPC::X28, PPC::X29, PPC::X30, PPC::X31, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, PPC::CR2, PPC::CR3, PPC::CR4, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8912static const uint32_t CSR_SVR464_VSRP_RegMask[] = { 0x01c00400, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0x000001ff, 0x00000000, 0x00000000, 0x07fffe00, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00000000, 0xc1cffffe, 0x0001c1c1, 0x00000000, };
8913static const MCPhysReg CSR_VSRP_SaveList[] = { PPC::VSRp26, PPC::VSRp27, PPC::VSRp28, PPC::VSRp29, PPC::VSRp30, PPC::VSRp31, 0 };
8914static const uint32_t CSR_VSRP_RegMask[] = { 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff800000, 0xff800007, 0xff800007, 0x00000007, 0xe0000000, 0x00000007, 0x00000000, 0x00080000, 0x00000000, 0x00000000, };
8915
8916
8917ArrayRef<const uint32_t *> PPCGenRegisterInfo::getRegMasks() const {
8918 static const uint32_t *const Masks[] = {
8919 CSR_64_AllRegs_RegMask,
8920 CSR_64_AllRegs_AIX_Dflt_Altivec_RegMask,
8921 CSR_64_AllRegs_AIX_Dflt_VSX_RegMask,
8922 CSR_64_AllRegs_Altivec_RegMask,
8923 CSR_64_AllRegs_VSRP_RegMask,
8924 CSR_64_AllRegs_VSX_RegMask,
8925 CSR_AIX32_RegMask,
8926 CSR_AIX32_Altivec_RegMask,
8927 CSR_AIX32_VSRP_RegMask,
8928 CSR_AIX64_R2_VSRP_RegMask,
8929 CSR_AIX64_VSRP_RegMask,
8930 CSR_ALL_VSRP_RegMask,
8931 CSR_Altivec_RegMask,
8932 CSR_NoRegs_RegMask,
8933 CSR_PPC64_RegMask,
8934 CSR_PPC64_Altivec_RegMask,
8935 CSR_PPC64_R2_RegMask,
8936 CSR_PPC64_R2_Altivec_RegMask,
8937 CSR_SPE_RegMask,
8938 CSR_SPE_NO_S30_31_RegMask,
8939 CSR_SVR32_ColdCC_RegMask,
8940 CSR_SVR32_ColdCC_Altivec_RegMask,
8941 CSR_SVR32_ColdCC_Common_RegMask,
8942 CSR_SVR32_ColdCC_SPE_RegMask,
8943 CSR_SVR32_ColdCC_VSRP_RegMask,
8944 CSR_SVR64_ColdCC_RegMask,
8945 CSR_SVR64_ColdCC_Altivec_RegMask,
8946 CSR_SVR64_ColdCC_R2_RegMask,
8947 CSR_SVR64_ColdCC_R2_Altivec_RegMask,
8948 CSR_SVR64_ColdCC_R2_VSRP_RegMask,
8949 CSR_SVR64_ColdCC_VSRP_RegMask,
8950 CSR_SVR432_RegMask,
8951 CSR_SVR432_Altivec_RegMask,
8952 CSR_SVR432_COMM_RegMask,
8953 CSR_SVR432_SPE_RegMask,
8954 CSR_SVR432_SPE_NO_S30_31_RegMask,
8955 CSR_SVR432_VSRP_RegMask,
8956 CSR_SVR464_R2_VSRP_RegMask,
8957 CSR_SVR464_VSRP_RegMask,
8958 CSR_VSRP_RegMask,
8959 };
8960 return ArrayRef(Masks);
8961}
8962
8963bool PPCGenRegisterInfo::
8964isGeneralPurposeRegister(const MachineFunction &MF, MCRegister PhysReg) const {
8965 return
8966 false;
8967}
8968
8969bool PPCGenRegisterInfo::
8970isGeneralPurposeRegisterClass(const TargetRegisterClass *RC) const {
8971 return
8972 false;
8973}
8974
8975bool PPCGenRegisterInfo::
8976isFixedRegister(const MachineFunction &MF, MCRegister PhysReg) const {
8977 return
8978 false;
8979}
8980
8981bool PPCGenRegisterInfo::
8982isArgumentRegister(const MachineFunction &MF, MCRegister PhysReg) const {
8983 return
8984 false;
8985}
8986
8987bool PPCGenRegisterInfo::
8988isConstantPhysReg(MCRegister PhysReg) const {
8989 return
8990 PhysReg == PPC::ZERO ||
8991 PhysReg == PPC::ZERO8 ||
8992 false;
8993}
8994
8995ArrayRef<const char *> PPCGenRegisterInfo::getRegMaskNames() const {
8996 static const char *Names[] = {
8997 "CSR_64_AllRegs",
8998 "CSR_64_AllRegs_AIX_Dflt_Altivec",
8999 "CSR_64_AllRegs_AIX_Dflt_VSX",
9000 "CSR_64_AllRegs_Altivec",
9001 "CSR_64_AllRegs_VSRP",
9002 "CSR_64_AllRegs_VSX",
9003 "CSR_AIX32",
9004 "CSR_AIX32_Altivec",
9005 "CSR_AIX32_VSRP",
9006 "CSR_AIX64_R2_VSRP",
9007 "CSR_AIX64_VSRP",
9008 "CSR_ALL_VSRP",
9009 "CSR_Altivec",
9010 "CSR_NoRegs",
9011 "CSR_PPC64",
9012 "CSR_PPC64_Altivec",
9013 "CSR_PPC64_R2",
9014 "CSR_PPC64_R2_Altivec",
9015 "CSR_SPE",
9016 "CSR_SPE_NO_S30_31",
9017 "CSR_SVR32_ColdCC",
9018 "CSR_SVR32_ColdCC_Altivec",
9019 "CSR_SVR32_ColdCC_Common",
9020 "CSR_SVR32_ColdCC_SPE",
9021 "CSR_SVR32_ColdCC_VSRP",
9022 "CSR_SVR64_ColdCC",
9023 "CSR_SVR64_ColdCC_Altivec",
9024 "CSR_SVR64_ColdCC_R2",
9025 "CSR_SVR64_ColdCC_R2_Altivec",
9026 "CSR_SVR64_ColdCC_R2_VSRP",
9027 "CSR_SVR64_ColdCC_VSRP",
9028 "CSR_SVR432",
9029 "CSR_SVR432_Altivec",
9030 "CSR_SVR432_COMM",
9031 "CSR_SVR432_SPE",
9032 "CSR_SVR432_SPE_NO_S30_31",
9033 "CSR_SVR432_VSRP",
9034 "CSR_SVR464_R2_VSRP",
9035 "CSR_SVR464_VSRP",
9036 "CSR_VSRP",
9037 };
9038 return ArrayRef(Names);
9039}
9040
9041const PPCFrameLowering *
9042PPCGenRegisterInfo::getFrameLowering(const MachineFunction &MF) {
9043 return static_cast<const PPCFrameLowering *>(
9044 MF.getSubtarget().getFrameLowering());
9045}
9046
9047
9048} // namespace llvm
9049