1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Calling Convention Implementation Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_CALLING_CONV_IMPL
10#undef GET_CALLING_CONV_IMPL
11
12static bool CC_Sparc32(unsigned ValNo, MVT ValVT,
13 MVT LocVT, CCValAssign::LocInfo LocInfo,
14 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
15static bool CC_Sparc64(unsigned ValNo, MVT ValVT,
16 MVT LocVT, CCValAssign::LocInfo LocInfo,
17 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
18static bool RetCC_Sparc32(unsigned ValNo, MVT ValVT,
19 MVT LocVT, CCValAssign::LocInfo LocInfo,
20 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
21static bool RetCC_Sparc64(unsigned ValNo, MVT ValVT,
22 MVT LocVT, CCValAssign::LocInfo LocInfo,
23 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
24
25
26static bool CC_Sparc32(unsigned ValNo, MVT ValVT,
27 MVT LocVT, CCValAssign::LocInfo LocInfo,
28 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
29
30 if (ArgFlags.isSRet()) {
31 if (CC_Sparc_Assign_SRet(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
32 return false;
33 }
34
35 if (LocVT == MVT::f128) {
36 LocVT = MVT::i32;
37 LocInfo = CCValAssign::Indirect;
38 }
39
40 if (LocVT == MVT::i32 ||
41 LocVT == MVT::f32) {
42 static const MCPhysReg RegList1[] = {
43 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5
44 };
45 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
46 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
47 return false;
48 }
49 }
50
51 if (LocVT == MVT::f64) {
52 if (CC_Sparc_Assign_Split_64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
53 return false;
54 }
55
56 if (LocVT == MVT::v2i32) {
57 if (CC_Sparc_Assign_Split_64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
58 return false;
59 }
60
61 int64_t Offset2 = State.AllocateStack(Size: 4, Alignment: Align(4));
62 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset2, LocVT, HTP: LocInfo));
63 return false;
64
65 return true; // CC didn't match.
66}
67
68
69static bool CC_Sparc64(unsigned ValNo, MVT ValVT,
70 MVT LocVT, CCValAssign::LocInfo LocInfo,
71 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
72
73 if (ArgFlags.isInReg()) {
74 if (LocVT == MVT::i32 ||
75 LocVT == MVT::f32) {
76 if (CC_Sparc64_Half(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
77 return false;
78 }
79 }
80
81 if (LocVT == MVT::i32) {
82 LocVT = MVT::i64;
83 if (ArgFlags.isSExt())
84 LocInfo = CCValAssign::SExt;
85 else if (ArgFlags.isZExt())
86 LocInfo = CCValAssign::ZExt;
87 else
88 LocInfo = CCValAssign::AExt;
89 }
90
91 if (CC_Sparc64_Full(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
92 return false;
93
94 return true; // CC didn't match.
95}
96
97
98static bool RetCC_Sparc32(unsigned ValNo, MVT ValVT,
99 MVT LocVT, CCValAssign::LocInfo LocInfo,
100 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
101
102 if (LocVT == MVT::i32) {
103 static const MCPhysReg RegList1[] = {
104 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5
105 };
106 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
107 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
108 return false;
109 }
110 }
111
112 if (LocVT == MVT::f32) {
113 static const MCPhysReg RegList2[] = {
114 SP::F0, SP::F1, SP::F2, SP::F3
115 };
116 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
117 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
118 return false;
119 }
120 }
121
122 if (LocVT == MVT::f64) {
123 static const MCPhysReg RegList3[] = {
124 SP::D0, SP::D1
125 };
126 if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) {
127 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
128 return false;
129 }
130 }
131
132 if (LocVT == MVT::f128) {
133 if (ArgFlags.isInReg()) {
134 static const MCPhysReg RegList4[] = {
135 SP::Q0, SP::Q1
136 };
137 if (MCRegister Reg = State.AllocateReg(Regs: RegList4)) {
138 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
139 return false;
140 }
141 }
142 }
143
144 if (LocVT == MVT::v2i32) {
145 if (CC_Sparc_Assign_Ret_Split_64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
146 return false;
147 }
148
149 return true; // CC didn't match.
150}
151
152
153static bool RetCC_Sparc64(unsigned ValNo, MVT ValVT,
154 MVT LocVT, CCValAssign::LocInfo LocInfo,
155 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
156
157 if (LocVT == MVT::f32) {
158 if (RetCC_Sparc64_Half(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
159 return false;
160 }
161
162 if (ArgFlags.isInReg()) {
163 if (LocVT == MVT::i32 ||
164 LocVT == MVT::f32) {
165 if (RetCC_Sparc64_Half(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
166 return false;
167 }
168 }
169
170 if (LocVT == MVT::i32) {
171 LocVT = MVT::i64;
172 if (ArgFlags.isSExt())
173 LocInfo = CCValAssign::SExt;
174 else if (ArgFlags.isZExt())
175 LocInfo = CCValAssign::ZExt;
176 else
177 LocInfo = CCValAssign::AExt;
178 }
179
180 if (RetCC_Sparc64_Full(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
181 return false;
182
183 return true; // CC didn't match.
184}
185
186#endif // GET_CALLING_CONV_IMPL
187
188#ifdef GET_CC_REGISTER_LISTS
189#undef GET_CC_REGISTER_LISTS
190
191const MCRegister CC_Sparc32_ArgRegs[] = { SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 };
192const MCRegister CC_Sparc64_ArgRegs[] = { 0 };
193const MCRegister RetCC_Sparc32_ArgRegs[] = { SP::D0, SP::D1, SP::F0, SP::F1, SP::F2, SP::F3, SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5, SP::Q0, SP::Q1 };
194const MCRegister RetCC_Sparc64_ArgRegs[] = { 0 };
195
196#endif // GET_CC_REGISTER_LISTS
197
198