| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 2 | |* *| |
| 3 | |* Calling Convention Implementation Fragment *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* *| |
| 7 | \*===----------------------------------------------------------------------===*/ |
| 8 | |
| 9 | #ifdef GET_CALLING_CONV_IMPL |
| 10 | #undef GET_CALLING_CONV_IMPL |
| 11 | |
| 12 | static bool CC_SystemZ(unsigned ValNo, MVT ValVT, |
| 13 | MVT LocVT, CCValAssign::LocInfo LocInfo, |
| 14 | ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State); |
| 15 | static bool CC_SystemZ_ELF(unsigned ValNo, MVT ValVT, |
| 16 | MVT LocVT, CCValAssign::LocInfo LocInfo, |
| 17 | ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State); |
| 18 | static bool CC_SystemZ_GHC(unsigned ValNo, MVT ValVT, |
| 19 | MVT LocVT, CCValAssign::LocInfo LocInfo, |
| 20 | ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State); |
| 21 | static bool CC_SystemZ_XPLINK64(unsigned ValNo, MVT ValVT, |
| 22 | MVT LocVT, CCValAssign::LocInfo LocInfo, |
| 23 | ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State); |
| 24 | static bool RetCC_SystemZ(unsigned ValNo, MVT ValVT, |
| 25 | MVT LocVT, CCValAssign::LocInfo LocInfo, |
| 26 | ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State); |
| 27 | static bool RetCC_SystemZ_ELF(unsigned ValNo, MVT ValVT, |
| 28 | MVT LocVT, CCValAssign::LocInfo LocInfo, |
| 29 | ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State); |
| 30 | static bool RetCC_SystemZ_XPLINK64(unsigned ValNo, MVT ValVT, |
| 31 | MVT LocVT, CCValAssign::LocInfo LocInfo, |
| 32 | ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State); |
| 33 | |
| 34 | |
| 35 | static bool CC_SystemZ(unsigned ValNo, MVT ValVT, |
| 36 | MVT LocVT, CCValAssign::LocInfo LocInfo, |
| 37 | ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) { |
| 38 | |
| 39 | if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().isTargetXPLINK64()) { |
| 40 | if (!CC_SystemZ_XPLINK64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State)) |
| 41 | return false; |
| 42 | } |
| 43 | |
| 44 | if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().isTargetELF()) { |
| 45 | if (!CC_SystemZ_ELF(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State)) |
| 46 | return false; |
| 47 | } |
| 48 | |
| 49 | return true; // CC didn't match. |
| 50 | } |
| 51 | |
| 52 | |
| 53 | static bool CC_SystemZ_ELF(unsigned ValNo, MVT ValVT, |
| 54 | MVT LocVT, CCValAssign::LocInfo LocInfo, |
| 55 | ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) { |
| 56 | |
| 57 | if (State.getCallingConv() == CallingConv::GHC) { |
| 58 | if (!CC_SystemZ_GHC(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State)) |
| 59 | return false; |
| 60 | } |
| 61 | |
| 62 | if (LocVT == MVT::i32) { |
| 63 | if (ArgFlags.isSExt() || ArgFlags.isZExt()) { |
| 64 | LocVT = MVT::i64; |
| 65 | if (ArgFlags.isSExt()) |
| 66 | LocInfo = CCValAssign::SExt; |
| 67 | else if (ArgFlags.isZExt()) |
| 68 | LocInfo = CCValAssign::ZExt; |
| 69 | else |
| 70 | LocInfo = CCValAssign::AExt; |
| 71 | } |
| 72 | } |
| 73 | |
| 74 | if (ArgFlags.isSwiftSelf()) { |
| 75 | if (LocVT == MVT::i64) { |
| 76 | if (MCRegister Reg = State.AllocateReg(Reg: SystemZ::R10D)) { |
| 77 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 78 | return false; |
| 79 | } |
| 80 | } |
| 81 | } |
| 82 | |
| 83 | if (ArgFlags.isSwiftError()) { |
| 84 | if (LocVT == MVT::i64) { |
| 85 | if (MCRegister Reg = State.AllocateReg(Reg: SystemZ::R9D)) { |
| 86 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 87 | return false; |
| 88 | } |
| 89 | } |
| 90 | } |
| 91 | |
| 92 | if (LocVT == MVT::i128 || |
| 93 | LocVT == MVT::f128) { |
| 94 | LocVT = MVT::i64; |
| 95 | LocInfo = CCValAssign::Indirect; |
| 96 | } |
| 97 | |
| 98 | if (LocVT == MVT::i64) { |
| 99 | if (CC_SystemZ_I128Indirect(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) |
| 100 | return false; |
| 101 | } |
| 102 | |
| 103 | if (LocVT == MVT::i32) { |
| 104 | static const MCPhysReg RegList1[] = { |
| 105 | SystemZ::R2L, SystemZ::R3L, SystemZ::R4L, SystemZ::R5L, SystemZ::R6L |
| 106 | }; |
| 107 | if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) { |
| 108 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 109 | return false; |
| 110 | } |
| 111 | } |
| 112 | |
| 113 | if (LocVT == MVT::i64) { |
| 114 | static const MCPhysReg RegList2[] = { |
| 115 | SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, SystemZ::R6D |
| 116 | }; |
| 117 | if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) { |
| 118 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 119 | return false; |
| 120 | } |
| 121 | } |
| 122 | |
| 123 | if (LocVT == MVT::f16) { |
| 124 | static const MCPhysReg RegList3[] = { |
| 125 | SystemZ::F0H, SystemZ::F2H, SystemZ::F4H, SystemZ::F6H |
| 126 | }; |
| 127 | if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) { |
| 128 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 129 | return false; |
| 130 | } |
| 131 | } |
| 132 | |
| 133 | if (LocVT == MVT::f32) { |
| 134 | static const MCPhysReg RegList4[] = { |
| 135 | SystemZ::F0S, SystemZ::F2S, SystemZ::F4S, SystemZ::F6S |
| 136 | }; |
| 137 | if (MCRegister Reg = State.AllocateReg(Regs: RegList4)) { |
| 138 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 139 | return false; |
| 140 | } |
| 141 | } |
| 142 | |
| 143 | if (LocVT == MVT::f64) { |
| 144 | static const MCPhysReg RegList5[] = { |
| 145 | SystemZ::F0D, SystemZ::F2D, SystemZ::F4D, SystemZ::F6D |
| 146 | }; |
| 147 | if (MCRegister Reg = State.AllocateReg(Regs: RegList5)) { |
| 148 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 149 | return false; |
| 150 | } |
| 151 | } |
| 152 | |
| 153 | if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().hasVector()) { |
| 154 | if (LocVT == MVT::v16i8 || |
| 155 | LocVT == MVT::v8i16 || |
| 156 | LocVT == MVT::v4i32 || |
| 157 | LocVT == MVT::v2i64 || |
| 158 | LocVT == MVT::v8f16 || |
| 159 | LocVT == MVT::v4f32 || |
| 160 | LocVT == MVT::v2f64) { |
| 161 | if (!ArgFlags.isVarArg()) { |
| 162 | static const MCPhysReg RegList6[] = { |
| 163 | SystemZ::V24, SystemZ::V26, SystemZ::V28, SystemZ::V30, SystemZ::V25, SystemZ::V27, SystemZ::V29, SystemZ::V31 |
| 164 | }; |
| 165 | if (MCRegister Reg = State.AllocateReg(Regs: RegList6)) { |
| 166 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 167 | return false; |
| 168 | } |
| 169 | } |
| 170 | } |
| 171 | } |
| 172 | |
| 173 | if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().hasVector()) { |
| 174 | if (LocVT == MVT::v16i8 || |
| 175 | LocVT == MVT::v8i16 || |
| 176 | LocVT == MVT::v4i32 || |
| 177 | LocVT == MVT::v2i64 || |
| 178 | LocVT == MVT::v8f16 || |
| 179 | LocVT == MVT::v4f32 || |
| 180 | LocVT == MVT::v2f64) { |
| 181 | if (OrigTy->isVectorTy() && OrigTy->getPrimitiveSizeInBits() <= 64) { |
| 182 | LocVT = MVT::i64; |
| 183 | LocInfo = CCValAssign::BCvt; |
| 184 | } |
| 185 | } |
| 186 | } |
| 187 | |
| 188 | if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().hasVector()) { |
| 189 | if (LocVT == MVT::v16i8 || |
| 190 | LocVT == MVT::v8i16 || |
| 191 | LocVT == MVT::v4i32 || |
| 192 | LocVT == MVT::v2i64 || |
| 193 | LocVT == MVT::v8f16 || |
| 194 | LocVT == MVT::v4f32 || |
| 195 | LocVT == MVT::v2f64) { |
| 196 | int64_t Offset7 = State.AllocateStack(Size: 16, Alignment: Align(8)); |
| 197 | State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset7, LocVT, HTP: LocInfo)); |
| 198 | return false; |
| 199 | } |
| 200 | } |
| 201 | |
| 202 | if (LocVT == MVT::i32 || |
| 203 | LocVT == MVT::i64 || |
| 204 | LocVT == MVT::f16 || |
| 205 | LocVT == MVT::f32 || |
| 206 | LocVT == MVT::f64) { |
| 207 | int64_t Offset8 = State.AllocateStack(Size: 8, Alignment: Align(8)); |
| 208 | State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset8, LocVT, HTP: LocInfo)); |
| 209 | return false; |
| 210 | } |
| 211 | |
| 212 | return true; // CC didn't match. |
| 213 | } |
| 214 | |
| 215 | |
| 216 | static bool CC_SystemZ_GHC(unsigned ValNo, MVT ValVT, |
| 217 | MVT LocVT, CCValAssign::LocInfo LocInfo, |
| 218 | ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) { |
| 219 | |
| 220 | if (LocVT == MVT::i64) { |
| 221 | static const MCPhysReg RegList1[] = { |
| 222 | SystemZ::R7D, SystemZ::R8D, SystemZ::R10D, SystemZ::R11D, SystemZ::R12D, SystemZ::R13D, SystemZ::R6D, SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, SystemZ::R9D |
| 223 | }; |
| 224 | if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) { |
| 225 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 226 | return false; |
| 227 | } |
| 228 | } |
| 229 | |
| 230 | if (LocVT == MVT::f32) { |
| 231 | static const MCPhysReg RegList2[] = { |
| 232 | SystemZ::F8S, SystemZ::F9S, SystemZ::F10S, SystemZ::F11S, SystemZ::F0S, SystemZ::F1S |
| 233 | }; |
| 234 | if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) { |
| 235 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 236 | return false; |
| 237 | } |
| 238 | } |
| 239 | |
| 240 | if (LocVT == MVT::f64) { |
| 241 | static const MCPhysReg RegList3[] = { |
| 242 | SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D, SystemZ::F2D, SystemZ::F3D |
| 243 | }; |
| 244 | if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) { |
| 245 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 246 | return false; |
| 247 | } |
| 248 | } |
| 249 | |
| 250 | if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().hasVector()) { |
| 251 | if (LocVT == MVT::v16i8 || |
| 252 | LocVT == MVT::v8i16 || |
| 253 | LocVT == MVT::v4i32 || |
| 254 | LocVT == MVT::v2i64 || |
| 255 | LocVT == MVT::v4f32 || |
| 256 | LocVT == MVT::v2f64) { |
| 257 | if (!ArgFlags.isVarArg()) { |
| 258 | static const MCPhysReg RegList4[] = { |
| 259 | SystemZ::V16, SystemZ::V17, SystemZ::V18, SystemZ::V19, SystemZ::V20, SystemZ::V21 |
| 260 | }; |
| 261 | if (MCRegister Reg = State.AllocateReg(Regs: RegList4)) { |
| 262 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 263 | return false; |
| 264 | } |
| 265 | } |
| 266 | } |
| 267 | } |
| 268 | |
| 269 | if (CC_SystemZ_GHC_Error(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) |
| 270 | return false; |
| 271 | |
| 272 | return true; // CC didn't match. |
| 273 | } |
| 274 | |
| 275 | |
| 276 | static bool CC_SystemZ_XPLINK64(unsigned ValNo, MVT ValVT, |
| 277 | MVT LocVT, CCValAssign::LocInfo LocInfo, |
| 278 | ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) { |
| 279 | |
| 280 | if (LocVT == MVT::i32) { |
| 281 | if (ArgFlags.isSExt() || ArgFlags.isZExt()) { |
| 282 | LocVT = MVT::i64; |
| 283 | if (ArgFlags.isSExt()) |
| 284 | LocInfo = CCValAssign::SExt; |
| 285 | else if (ArgFlags.isZExt()) |
| 286 | LocInfo = CCValAssign::ZExt; |
| 287 | else |
| 288 | LocInfo = CCValAssign::AExt; |
| 289 | } |
| 290 | } |
| 291 | |
| 292 | if (LocVT == MVT::f32 || |
| 293 | LocVT == MVT::f64) { |
| 294 | if (ArgFlags.isVarArg()) { |
| 295 | LocVT = MVT::i64; |
| 296 | LocInfo = CCValAssign::BCvt; |
| 297 | } |
| 298 | } |
| 299 | |
| 300 | if (ArgFlags.isPointer()) { |
| 301 | if (CC_XPLINK64_Pointer(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) |
| 302 | return false; |
| 303 | } |
| 304 | |
| 305 | if (LocVT == MVT::f128) { |
| 306 | if (ArgFlags.isVarArg()) { |
| 307 | if (CC_XPLINK64_Allocate128BitVararg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) |
| 308 | return false; |
| 309 | } |
| 310 | } |
| 311 | |
| 312 | if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().hasVector()) { |
| 313 | if (LocVT == MVT::v16i8 || |
| 314 | LocVT == MVT::v8i16 || |
| 315 | LocVT == MVT::v4i32 || |
| 316 | LocVT == MVT::v2i64 || |
| 317 | LocVT == MVT::v4f32 || |
| 318 | LocVT == MVT::v2f64) { |
| 319 | if (ArgFlags.isVarArg()) { |
| 320 | if (CC_XPLINK64_Allocate128BitVararg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) |
| 321 | return false; |
| 322 | } |
| 323 | } |
| 324 | } |
| 325 | |
| 326 | if (ArgFlags.isSwiftSelf()) { |
| 327 | if (LocVT == MVT::i64) { |
| 328 | if (MCRegister Reg = State.AllocateReg(Reg: SystemZ::R10D)) { |
| 329 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 330 | return false; |
| 331 | } |
| 332 | } |
| 333 | } |
| 334 | |
| 335 | if (ArgFlags.isSwiftError()) { |
| 336 | if (LocVT == MVT::i64) { |
| 337 | if (MCRegister Reg = State.AllocateReg(Reg: SystemZ::R0D)) { |
| 338 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 339 | return false; |
| 340 | } |
| 341 | } |
| 342 | } |
| 343 | |
| 344 | if (LocVT == MVT::i128) { |
| 345 | LocVT = MVT::i64; |
| 346 | LocInfo = CCValAssign::Indirect; |
| 347 | } |
| 348 | |
| 349 | if (LocVT == MVT::i64) { |
| 350 | if (CC_SystemZ_I128Indirect(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) |
| 351 | return false; |
| 352 | } |
| 353 | |
| 354 | if (LocVT == MVT::i32) { |
| 355 | static const MCPhysReg RegList1[] = { |
| 356 | SystemZ::R1L, SystemZ::R2L, SystemZ::R3L |
| 357 | }; |
| 358 | if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) { |
| 359 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 360 | (void)State.AllocateStack(Size: 8, Alignment: Align(8)); |
| 361 | return false; |
| 362 | } |
| 363 | } |
| 364 | |
| 365 | if (LocVT == MVT::i64) { |
| 366 | static const MCPhysReg RegList2[] = { |
| 367 | SystemZ::R1D, SystemZ::R2D, SystemZ::R3D |
| 368 | }; |
| 369 | if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) { |
| 370 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 371 | (void)State.AllocateStack(Size: 8, Alignment: Align(8)); |
| 372 | return false; |
| 373 | } |
| 374 | } |
| 375 | |
| 376 | if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().hasVector()) { |
| 377 | if (LocVT == MVT::v16i8 || |
| 378 | LocVT == MVT::v8i16 || |
| 379 | LocVT == MVT::v4i32 || |
| 380 | LocVT == MVT::v2i64 || |
| 381 | LocVT == MVT::v4f32 || |
| 382 | LocVT == MVT::v2f64) { |
| 383 | if (!ArgFlags.isVarArg()) { |
| 384 | if (CC_XPLINK64_Shadow_Reg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) |
| 385 | return false; |
| 386 | } |
| 387 | } |
| 388 | } |
| 389 | |
| 390 | if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().hasVector()) { |
| 391 | if (LocVT == MVT::v16i8 || |
| 392 | LocVT == MVT::v8i16 || |
| 393 | LocVT == MVT::v4i32 || |
| 394 | LocVT == MVT::v2i64 || |
| 395 | LocVT == MVT::v4f32 || |
| 396 | LocVT == MVT::v2f64) { |
| 397 | if (!ArgFlags.isVarArg()) { |
| 398 | static const MCPhysReg RegList3[] = { |
| 399 | SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27, SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31 |
| 400 | }; |
| 401 | if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) { |
| 402 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 403 | (void)State.AllocateStack(Size: 16, Alignment: Align(8)); |
| 404 | return false; |
| 405 | } |
| 406 | } |
| 407 | } |
| 408 | } |
| 409 | |
| 410 | if (LocVT == MVT::f32 || |
| 411 | LocVT == MVT::f64) { |
| 412 | if (!ArgFlags.isVarArg()) { |
| 413 | if (CC_XPLINK64_Shadow_Reg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) |
| 414 | return false; |
| 415 | } |
| 416 | } |
| 417 | |
| 418 | if (LocVT == MVT::f32) { |
| 419 | if (!ArgFlags.isVarArg()) { |
| 420 | static const MCPhysReg RegList4[] = { |
| 421 | SystemZ::F0S, SystemZ::F2S, SystemZ::F4S, SystemZ::F6S |
| 422 | }; |
| 423 | if (MCRegister Reg = State.AllocateReg(Regs: RegList4)) { |
| 424 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 425 | (void)State.AllocateStack(Size: 4, Alignment: Align(8)); |
| 426 | return false; |
| 427 | } |
| 428 | } |
| 429 | } |
| 430 | |
| 431 | if (LocVT == MVT::f64) { |
| 432 | if (!ArgFlags.isVarArg()) { |
| 433 | static const MCPhysReg RegList5[] = { |
| 434 | SystemZ::F0D, SystemZ::F2D, SystemZ::F4D, SystemZ::F6D |
| 435 | }; |
| 436 | if (MCRegister Reg = State.AllocateReg(Regs: RegList5)) { |
| 437 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 438 | (void)State.AllocateStack(Size: 8, Alignment: Align(8)); |
| 439 | return false; |
| 440 | } |
| 441 | } |
| 442 | } |
| 443 | |
| 444 | if (LocVT == MVT::f128) { |
| 445 | if (!ArgFlags.isVarArg()) { |
| 446 | if (CC_XPLINK64_Shadow_Reg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) |
| 447 | return false; |
| 448 | } |
| 449 | } |
| 450 | |
| 451 | if (LocVT == MVT::f128) { |
| 452 | if (!ArgFlags.isVarArg()) { |
| 453 | static const MCPhysReg RegList6[] = { |
| 454 | SystemZ::F0Q, SystemZ::F4Q |
| 455 | }; |
| 456 | if (MCRegister Reg = State.AllocateReg(Regs: RegList6)) { |
| 457 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 458 | (void)State.AllocateStack(Size: 16, Alignment: Align(8)); |
| 459 | return false; |
| 460 | } |
| 461 | } |
| 462 | } |
| 463 | |
| 464 | if (LocVT == MVT::i32 || |
| 465 | LocVT == MVT::i64 || |
| 466 | LocVT == MVT::f32 || |
| 467 | LocVT == MVT::f64) { |
| 468 | int64_t Offset7 = State.AllocateStack(Size: 8, Alignment: Align(8)); |
| 469 | State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset7, LocVT, HTP: LocInfo)); |
| 470 | return false; |
| 471 | } |
| 472 | |
| 473 | if (LocVT == MVT::f128) { |
| 474 | int64_t Offset8 = State.AllocateStack(Size: 16, Alignment: Align(8)); |
| 475 | State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset8, LocVT, HTP: LocInfo)); |
| 476 | return false; |
| 477 | } |
| 478 | |
| 479 | if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().hasVector()) { |
| 480 | if (LocVT == MVT::v16i8 || |
| 481 | LocVT == MVT::v8i16 || |
| 482 | LocVT == MVT::v4i32 || |
| 483 | LocVT == MVT::v2i64 || |
| 484 | LocVT == MVT::v4f32 || |
| 485 | LocVT == MVT::v2f64) { |
| 486 | int64_t Offset9 = State.AllocateStack(Size: 16, Alignment: Align(8)); |
| 487 | State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset9, LocVT, HTP: LocInfo)); |
| 488 | return false; |
| 489 | } |
| 490 | } |
| 491 | |
| 492 | return true; // CC didn't match. |
| 493 | } |
| 494 | |
| 495 | |
| 496 | static bool RetCC_SystemZ(unsigned ValNo, MVT ValVT, |
| 497 | MVT LocVT, CCValAssign::LocInfo LocInfo, |
| 498 | ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) { |
| 499 | |
| 500 | if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().isTargetXPLINK64()) { |
| 501 | if (!RetCC_SystemZ_XPLINK64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State)) |
| 502 | return false; |
| 503 | } |
| 504 | |
| 505 | if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().isTargetELF()) { |
| 506 | if (!RetCC_SystemZ_ELF(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State)) |
| 507 | return false; |
| 508 | } |
| 509 | |
| 510 | return true; // CC didn't match. |
| 511 | } |
| 512 | |
| 513 | |
| 514 | static bool RetCC_SystemZ_ELF(unsigned ValNo, MVT ValVT, |
| 515 | MVT LocVT, CCValAssign::LocInfo LocInfo, |
| 516 | ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) { |
| 517 | |
| 518 | if (LocVT == MVT::i32) { |
| 519 | if (ArgFlags.isSExt() || ArgFlags.isZExt()) { |
| 520 | LocVT = MVT::i64; |
| 521 | if (ArgFlags.isSExt()) |
| 522 | LocInfo = CCValAssign::SExt; |
| 523 | else if (ArgFlags.isZExt()) |
| 524 | LocInfo = CCValAssign::ZExt; |
| 525 | else |
| 526 | LocInfo = CCValAssign::AExt; |
| 527 | } |
| 528 | } |
| 529 | |
| 530 | if (ArgFlags.isSwiftError()) { |
| 531 | if (LocVT == MVT::i64) { |
| 532 | if (MCRegister Reg = State.AllocateReg(Reg: SystemZ::R9D)) { |
| 533 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 534 | return false; |
| 535 | } |
| 536 | } |
| 537 | } |
| 538 | |
| 539 | if (LocVT == MVT::i32) { |
| 540 | static const MCPhysReg RegList1[] = { |
| 541 | SystemZ::R2L, SystemZ::R3L, SystemZ::R4L, SystemZ::R5L |
| 542 | }; |
| 543 | if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) { |
| 544 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 545 | return false; |
| 546 | } |
| 547 | } |
| 548 | |
| 549 | if (LocVT == MVT::i64) { |
| 550 | static const MCPhysReg RegList2[] = { |
| 551 | SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D |
| 552 | }; |
| 553 | if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) { |
| 554 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 555 | return false; |
| 556 | } |
| 557 | } |
| 558 | |
| 559 | if (LocVT == MVT::f16) { |
| 560 | static const MCPhysReg RegList3[] = { |
| 561 | SystemZ::F0H, SystemZ::F2H, SystemZ::F4H, SystemZ::F6H |
| 562 | }; |
| 563 | if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) { |
| 564 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 565 | return false; |
| 566 | } |
| 567 | } |
| 568 | |
| 569 | if (LocVT == MVT::f32) { |
| 570 | static const MCPhysReg RegList4[] = { |
| 571 | SystemZ::F0S, SystemZ::F2S, SystemZ::F4S, SystemZ::F6S |
| 572 | }; |
| 573 | if (MCRegister Reg = State.AllocateReg(Regs: RegList4)) { |
| 574 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 575 | return false; |
| 576 | } |
| 577 | } |
| 578 | |
| 579 | if (LocVT == MVT::f64) { |
| 580 | static const MCPhysReg RegList5[] = { |
| 581 | SystemZ::F0D, SystemZ::F2D, SystemZ::F4D, SystemZ::F6D |
| 582 | }; |
| 583 | if (MCRegister Reg = State.AllocateReg(Regs: RegList5)) { |
| 584 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 585 | return false; |
| 586 | } |
| 587 | } |
| 588 | |
| 589 | if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().hasVector()) { |
| 590 | if (LocVT == MVT::v16i8 || |
| 591 | LocVT == MVT::v8i16 || |
| 592 | LocVT == MVT::v4i32 || |
| 593 | LocVT == MVT::v2i64 || |
| 594 | LocVT == MVT::v8f16 || |
| 595 | LocVT == MVT::v4f32 || |
| 596 | LocVT == MVT::v2f64) { |
| 597 | static const MCPhysReg RegList6[] = { |
| 598 | SystemZ::V24, SystemZ::V26, SystemZ::V28, SystemZ::V30, SystemZ::V25, SystemZ::V27, SystemZ::V29, SystemZ::V31 |
| 599 | }; |
| 600 | if (MCRegister Reg = State.AllocateReg(Regs: RegList6)) { |
| 601 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 602 | return false; |
| 603 | } |
| 604 | } |
| 605 | } |
| 606 | |
| 607 | return true; // CC didn't match. |
| 608 | } |
| 609 | |
| 610 | |
| 611 | static bool RetCC_SystemZ_XPLINK64(unsigned ValNo, MVT ValVT, |
| 612 | MVT LocVT, CCValAssign::LocInfo LocInfo, |
| 613 | ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) { |
| 614 | |
| 615 | if (LocVT == MVT::i32) { |
| 616 | LocVT = MVT::i64; |
| 617 | if (ArgFlags.isSExt()) |
| 618 | LocInfo = CCValAssign::SExt; |
| 619 | else if (ArgFlags.isZExt()) |
| 620 | LocInfo = CCValAssign::ZExt; |
| 621 | else |
| 622 | LocInfo = CCValAssign::AExt; |
| 623 | } |
| 624 | |
| 625 | if (LocVT == MVT::i64) { |
| 626 | if (ArgFlags.isInReg()) { |
| 627 | static const MCPhysReg RegList1[] = { |
| 628 | SystemZ::R1D, SystemZ::R2D, SystemZ::R3D |
| 629 | }; |
| 630 | if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) { |
| 631 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 632 | return false; |
| 633 | } |
| 634 | } |
| 635 | } |
| 636 | |
| 637 | if (LocVT == MVT::i64) { |
| 638 | static const MCPhysReg RegList2[] = { |
| 639 | SystemZ::R3D, SystemZ::R2D, SystemZ::R1D |
| 640 | }; |
| 641 | if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) { |
| 642 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 643 | return false; |
| 644 | } |
| 645 | } |
| 646 | |
| 647 | if (LocVT == MVT::f32) { |
| 648 | static const MCPhysReg RegList3[] = { |
| 649 | SystemZ::F0S, SystemZ::F2S, SystemZ::F4S, SystemZ::F6S |
| 650 | }; |
| 651 | if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) { |
| 652 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 653 | return false; |
| 654 | } |
| 655 | } |
| 656 | |
| 657 | if (LocVT == MVT::f64) { |
| 658 | static const MCPhysReg RegList4[] = { |
| 659 | SystemZ::F0D, SystemZ::F2D, SystemZ::F4D, SystemZ::F6D |
| 660 | }; |
| 661 | if (MCRegister Reg = State.AllocateReg(Regs: RegList4)) { |
| 662 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 663 | return false; |
| 664 | } |
| 665 | } |
| 666 | |
| 667 | if (LocVT == MVT::f128) { |
| 668 | static const MCPhysReg RegList5[] = { |
| 669 | SystemZ::F0Q, SystemZ::F4Q |
| 670 | }; |
| 671 | if (MCRegister Reg = State.AllocateReg(Regs: RegList5)) { |
| 672 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 673 | return false; |
| 674 | } |
| 675 | } |
| 676 | |
| 677 | if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().hasVector()) { |
| 678 | if (LocVT == MVT::v16i8 || |
| 679 | LocVT == MVT::v8i16 || |
| 680 | LocVT == MVT::v4i32 || |
| 681 | LocVT == MVT::v2i64 || |
| 682 | LocVT == MVT::v4f32 || |
| 683 | LocVT == MVT::v2f64) { |
| 684 | static const MCPhysReg RegList6[] = { |
| 685 | SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27, SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31 |
| 686 | }; |
| 687 | if (MCRegister Reg = State.AllocateReg(Regs: RegList6)) { |
| 688 | State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo)); |
| 689 | return false; |
| 690 | } |
| 691 | } |
| 692 | } |
| 693 | |
| 694 | return true; // CC didn't match. |
| 695 | } |
| 696 | |
| 697 | #endif // GET_CALLING_CONV_IMPL |
| 698 | |
| 699 | #ifdef GET_CC_REGISTER_LISTS |
| 700 | #undef GET_CC_REGISTER_LISTS |
| 701 | |
| 702 | const MCRegister CC_SystemZ_ArgRegs[] = { 0 }; |
| 703 | const MCRegister CC_SystemZ_ELF_ArgRegs[] = { SystemZ::F0D, SystemZ::F0H, SystemZ::F0S, SystemZ::F2D, SystemZ::F2H, SystemZ::F2S, SystemZ::F4D, SystemZ::F4H, SystemZ::F4S, SystemZ::F6D, SystemZ::F6H, SystemZ::F6S, SystemZ::R2D, SystemZ::R2L, SystemZ::R3D, SystemZ::R3L, SystemZ::R4D, SystemZ::R4L, SystemZ::R5D, SystemZ::R5L, SystemZ::R6D, SystemZ::R6L, SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27, SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31 }; |
| 704 | const MCRegister CC_SystemZ_GHC_ArgRegs[] = { SystemZ::F0S, SystemZ::F10S, SystemZ::F11S, SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D, SystemZ::F1S, SystemZ::F2D, SystemZ::F3D, SystemZ::F8S, SystemZ::F9S, SystemZ::R10D, SystemZ::R11D, SystemZ::R12D, SystemZ::R13D, SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, SystemZ::R6D, SystemZ::R7D, SystemZ::R8D, SystemZ::R9D, SystemZ::V16, SystemZ::V17, SystemZ::V18, SystemZ::V19, SystemZ::V20, SystemZ::V21 }; |
| 705 | const MCRegister CC_SystemZ_XPLINK64_ArgRegs[] = { SystemZ::F0D, SystemZ::F0Q, SystemZ::F0S, SystemZ::F2D, SystemZ::F2S, SystemZ::F4D, SystemZ::F4Q, SystemZ::F4S, SystemZ::F6D, SystemZ::F6S, SystemZ::R1D, SystemZ::R1L, SystemZ::R2D, SystemZ::R2L, SystemZ::R3D, SystemZ::R3L, SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27, SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31 }; |
| 706 | const MCRegister RetCC_SystemZ_ArgRegs[] = { 0 }; |
| 707 | const MCRegister RetCC_SystemZ_ELF_ArgRegs[] = { SystemZ::F0D, SystemZ::F0H, SystemZ::F0S, SystemZ::F2D, SystemZ::F2H, SystemZ::F2S, SystemZ::F4D, SystemZ::F4H, SystemZ::F4S, SystemZ::F6D, SystemZ::F6H, SystemZ::F6S, SystemZ::R2D, SystemZ::R2L, SystemZ::R3D, SystemZ::R3L, SystemZ::R4D, SystemZ::R4L, SystemZ::R5D, SystemZ::R5L, SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27, SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31 }; |
| 708 | const MCRegister RetCC_SystemZ_XPLINK64_ArgRegs[] = { SystemZ::F0D, SystemZ::F0Q, SystemZ::F0S, SystemZ::F2D, SystemZ::F2S, SystemZ::F4D, SystemZ::F4Q, SystemZ::F4S, SystemZ::F6D, SystemZ::F6S, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27, SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31 }; |
| 709 | |
| 710 | // Registers used by Swift. |
| 711 | const MCRegister CC_SystemZ_ELF_Swift_ArgRegs[] = { SystemZ::R10D, SystemZ::R9D }; |
| 712 | const MCRegister CC_SystemZ_XPLINK64_Swift_ArgRegs[] = { SystemZ::R0D, SystemZ::R10D }; |
| 713 | const MCRegister RetCC_SystemZ_ELF_Swift_ArgRegs[] = { SystemZ::R9D }; |
| 714 | |
| 715 | #endif // GET_CC_REGISTER_LISTS |
| 716 | |
| 717 | |