1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Calling Convention Implementation Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_CALLING_CONV_IMPL
10#undef GET_CALLING_CONV_IMPL
11
12static bool CC_SystemZ(unsigned ValNo, MVT ValVT,
13 MVT LocVT, CCValAssign::LocInfo LocInfo,
14 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
15static bool CC_SystemZ_ELF(unsigned ValNo, MVT ValVT,
16 MVT LocVT, CCValAssign::LocInfo LocInfo,
17 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
18static bool CC_SystemZ_GHC(unsigned ValNo, MVT ValVT,
19 MVT LocVT, CCValAssign::LocInfo LocInfo,
20 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
21static bool CC_SystemZ_XPLINK64(unsigned ValNo, MVT ValVT,
22 MVT LocVT, CCValAssign::LocInfo LocInfo,
23 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
24static bool RetCC_SystemZ(unsigned ValNo, MVT ValVT,
25 MVT LocVT, CCValAssign::LocInfo LocInfo,
26 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
27static bool RetCC_SystemZ_ELF(unsigned ValNo, MVT ValVT,
28 MVT LocVT, CCValAssign::LocInfo LocInfo,
29 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
30static bool RetCC_SystemZ_XPLINK64(unsigned ValNo, MVT ValVT,
31 MVT LocVT, CCValAssign::LocInfo LocInfo,
32 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
33
34
35static bool CC_SystemZ(unsigned ValNo, MVT ValVT,
36 MVT LocVT, CCValAssign::LocInfo LocInfo,
37 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
38
39 if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().isTargetXPLINK64()) {
40 if (!CC_SystemZ_XPLINK64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
41 return false;
42 }
43
44 if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().isTargetELF()) {
45 if (!CC_SystemZ_ELF(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
46 return false;
47 }
48
49 return true; // CC didn't match.
50}
51
52
53static bool CC_SystemZ_ELF(unsigned ValNo, MVT ValVT,
54 MVT LocVT, CCValAssign::LocInfo LocInfo,
55 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
56
57 if (State.getCallingConv() == CallingConv::GHC) {
58 if (!CC_SystemZ_GHC(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
59 return false;
60 }
61
62 if (LocVT == MVT::i32) {
63 if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
64 LocVT = MVT::i64;
65 if (ArgFlags.isSExt())
66 LocInfo = CCValAssign::SExt;
67 else if (ArgFlags.isZExt())
68 LocInfo = CCValAssign::ZExt;
69 else
70 LocInfo = CCValAssign::AExt;
71 }
72 }
73
74 if (ArgFlags.isSwiftSelf()) {
75 if (LocVT == MVT::i64) {
76 if (MCRegister Reg = State.AllocateReg(Reg: SystemZ::R10D)) {
77 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
78 return false;
79 }
80 }
81 }
82
83 if (ArgFlags.isSwiftError()) {
84 if (LocVT == MVT::i64) {
85 if (MCRegister Reg = State.AllocateReg(Reg: SystemZ::R9D)) {
86 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
87 return false;
88 }
89 }
90 }
91
92 if (LocVT == MVT::i128 ||
93 LocVT == MVT::f128) {
94 LocVT = MVT::i64;
95 LocInfo = CCValAssign::Indirect;
96 }
97
98 if (LocVT == MVT::i64) {
99 if (CC_SystemZ_I128Indirect(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
100 return false;
101 }
102
103 if (LocVT == MVT::i32) {
104 static const MCPhysReg RegList1[] = {
105 SystemZ::R2L, SystemZ::R3L, SystemZ::R4L, SystemZ::R5L, SystemZ::R6L
106 };
107 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
108 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
109 return false;
110 }
111 }
112
113 if (LocVT == MVT::i64) {
114 static const MCPhysReg RegList2[] = {
115 SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, SystemZ::R6D
116 };
117 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
118 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
119 return false;
120 }
121 }
122
123 if (LocVT == MVT::f16) {
124 static const MCPhysReg RegList3[] = {
125 SystemZ::F0H, SystemZ::F2H, SystemZ::F4H, SystemZ::F6H
126 };
127 if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) {
128 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
129 return false;
130 }
131 }
132
133 if (LocVT == MVT::f32) {
134 static const MCPhysReg RegList4[] = {
135 SystemZ::F0S, SystemZ::F2S, SystemZ::F4S, SystemZ::F6S
136 };
137 if (MCRegister Reg = State.AllocateReg(Regs: RegList4)) {
138 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
139 return false;
140 }
141 }
142
143 if (LocVT == MVT::f64) {
144 static const MCPhysReg RegList5[] = {
145 SystemZ::F0D, SystemZ::F2D, SystemZ::F4D, SystemZ::F6D
146 };
147 if (MCRegister Reg = State.AllocateReg(Regs: RegList5)) {
148 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
149 return false;
150 }
151 }
152
153 if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().hasVector()) {
154 if (LocVT == MVT::v16i8 ||
155 LocVT == MVT::v8i16 ||
156 LocVT == MVT::v4i32 ||
157 LocVT == MVT::v2i64 ||
158 LocVT == MVT::v8f16 ||
159 LocVT == MVT::v4f32 ||
160 LocVT == MVT::v2f64) {
161 if (!ArgFlags.isVarArg()) {
162 static const MCPhysReg RegList6[] = {
163 SystemZ::V24, SystemZ::V26, SystemZ::V28, SystemZ::V30, SystemZ::V25, SystemZ::V27, SystemZ::V29, SystemZ::V31
164 };
165 if (MCRegister Reg = State.AllocateReg(Regs: RegList6)) {
166 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
167 return false;
168 }
169 }
170 }
171 }
172
173 if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().hasVector()) {
174 if (LocVT == MVT::v16i8 ||
175 LocVT == MVT::v8i16 ||
176 LocVT == MVT::v4i32 ||
177 LocVT == MVT::v2i64 ||
178 LocVT == MVT::v8f16 ||
179 LocVT == MVT::v4f32 ||
180 LocVT == MVT::v2f64) {
181 if (OrigTy->isVectorTy() && OrigTy->getPrimitiveSizeInBits() <= 64) {
182 LocVT = MVT::i64;
183 LocInfo = CCValAssign::BCvt;
184 }
185 }
186 }
187
188 if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().hasVector()) {
189 if (LocVT == MVT::v16i8 ||
190 LocVT == MVT::v8i16 ||
191 LocVT == MVT::v4i32 ||
192 LocVT == MVT::v2i64 ||
193 LocVT == MVT::v8f16 ||
194 LocVT == MVT::v4f32 ||
195 LocVT == MVT::v2f64) {
196 int64_t Offset7 = State.AllocateStack(Size: 16, Alignment: Align(8));
197 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset7, LocVT, HTP: LocInfo));
198 return false;
199 }
200 }
201
202 if (LocVT == MVT::i32 ||
203 LocVT == MVT::i64 ||
204 LocVT == MVT::f16 ||
205 LocVT == MVT::f32 ||
206 LocVT == MVT::f64) {
207 int64_t Offset8 = State.AllocateStack(Size: 8, Alignment: Align(8));
208 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset8, LocVT, HTP: LocInfo));
209 return false;
210 }
211
212 return true; // CC didn't match.
213}
214
215
216static bool CC_SystemZ_GHC(unsigned ValNo, MVT ValVT,
217 MVT LocVT, CCValAssign::LocInfo LocInfo,
218 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
219
220 if (LocVT == MVT::i64) {
221 static const MCPhysReg RegList1[] = {
222 SystemZ::R7D, SystemZ::R8D, SystemZ::R10D, SystemZ::R11D, SystemZ::R12D, SystemZ::R13D, SystemZ::R6D, SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, SystemZ::R9D
223 };
224 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
225 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
226 return false;
227 }
228 }
229
230 if (LocVT == MVT::f32) {
231 static const MCPhysReg RegList2[] = {
232 SystemZ::F8S, SystemZ::F9S, SystemZ::F10S, SystemZ::F11S, SystemZ::F0S, SystemZ::F1S
233 };
234 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
235 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
236 return false;
237 }
238 }
239
240 if (LocVT == MVT::f64) {
241 static const MCPhysReg RegList3[] = {
242 SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D, SystemZ::F2D, SystemZ::F3D
243 };
244 if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) {
245 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
246 return false;
247 }
248 }
249
250 if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().hasVector()) {
251 if (LocVT == MVT::v16i8 ||
252 LocVT == MVT::v8i16 ||
253 LocVT == MVT::v4i32 ||
254 LocVT == MVT::v2i64 ||
255 LocVT == MVT::v4f32 ||
256 LocVT == MVT::v2f64) {
257 if (!ArgFlags.isVarArg()) {
258 static const MCPhysReg RegList4[] = {
259 SystemZ::V16, SystemZ::V17, SystemZ::V18, SystemZ::V19, SystemZ::V20, SystemZ::V21
260 };
261 if (MCRegister Reg = State.AllocateReg(Regs: RegList4)) {
262 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
263 return false;
264 }
265 }
266 }
267 }
268
269 if (CC_SystemZ_GHC_Error(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
270 return false;
271
272 return true; // CC didn't match.
273}
274
275
276static bool CC_SystemZ_XPLINK64(unsigned ValNo, MVT ValVT,
277 MVT LocVT, CCValAssign::LocInfo LocInfo,
278 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
279
280 if (LocVT == MVT::i32) {
281 if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
282 LocVT = MVT::i64;
283 if (ArgFlags.isSExt())
284 LocInfo = CCValAssign::SExt;
285 else if (ArgFlags.isZExt())
286 LocInfo = CCValAssign::ZExt;
287 else
288 LocInfo = CCValAssign::AExt;
289 }
290 }
291
292 if (LocVT == MVT::f32 ||
293 LocVT == MVT::f64) {
294 if (ArgFlags.isVarArg()) {
295 LocVT = MVT::i64;
296 LocInfo = CCValAssign::BCvt;
297 }
298 }
299
300 if (ArgFlags.isPointer()) {
301 if (CC_XPLINK64_Pointer(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
302 return false;
303 }
304
305 if (LocVT == MVT::f128) {
306 if (ArgFlags.isVarArg()) {
307 if (CC_XPLINK64_Allocate128BitVararg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
308 return false;
309 }
310 }
311
312 if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().hasVector()) {
313 if (LocVT == MVT::v16i8 ||
314 LocVT == MVT::v8i16 ||
315 LocVT == MVT::v4i32 ||
316 LocVT == MVT::v2i64 ||
317 LocVT == MVT::v4f32 ||
318 LocVT == MVT::v2f64) {
319 if (ArgFlags.isVarArg()) {
320 if (CC_XPLINK64_Allocate128BitVararg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
321 return false;
322 }
323 }
324 }
325
326 if (ArgFlags.isSwiftSelf()) {
327 if (LocVT == MVT::i64) {
328 if (MCRegister Reg = State.AllocateReg(Reg: SystemZ::R10D)) {
329 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
330 return false;
331 }
332 }
333 }
334
335 if (ArgFlags.isSwiftError()) {
336 if (LocVT == MVT::i64) {
337 if (MCRegister Reg = State.AllocateReg(Reg: SystemZ::R0D)) {
338 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
339 return false;
340 }
341 }
342 }
343
344 if (LocVT == MVT::i128) {
345 LocVT = MVT::i64;
346 LocInfo = CCValAssign::Indirect;
347 }
348
349 if (LocVT == MVT::i64) {
350 if (CC_SystemZ_I128Indirect(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
351 return false;
352 }
353
354 if (LocVT == MVT::i64) {
355 static const MCPhysReg RegList1[] = {
356 SystemZ::R1D, SystemZ::R2D, SystemZ::R3D
357 };
358 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
359 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
360 (void)State.AllocateStack(Size: 8, Alignment: Align(8));
361 return false;
362 }
363 }
364
365 if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().hasVector()) {
366 if (LocVT == MVT::v16i8 ||
367 LocVT == MVT::v8i16 ||
368 LocVT == MVT::v4i32 ||
369 LocVT == MVT::v2i64 ||
370 LocVT == MVT::v4f32 ||
371 LocVT == MVT::v2f64) {
372 if (!ArgFlags.isVarArg()) {
373 if (CC_XPLINK64_Shadow_Reg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
374 return false;
375 }
376 }
377 }
378
379 if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().hasVector()) {
380 if (LocVT == MVT::v16i8 ||
381 LocVT == MVT::v8i16 ||
382 LocVT == MVT::v4i32 ||
383 LocVT == MVT::v2i64 ||
384 LocVT == MVT::v4f32 ||
385 LocVT == MVT::v2f64) {
386 if (!ArgFlags.isVarArg()) {
387 static const MCPhysReg RegList2[] = {
388 SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27, SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31
389 };
390 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
391 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
392 (void)State.AllocateStack(Size: 16, Alignment: Align(8));
393 return false;
394 }
395 }
396 }
397 }
398
399 if (LocVT == MVT::f32 ||
400 LocVT == MVT::f64) {
401 if (!ArgFlags.isVarArg()) {
402 if (CC_XPLINK64_Shadow_Reg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
403 return false;
404 }
405 }
406
407 if (LocVT == MVT::f32) {
408 if (!ArgFlags.isVarArg()) {
409 static const MCPhysReg RegList3[] = {
410 SystemZ::F0S, SystemZ::F2S, SystemZ::F4S, SystemZ::F6S
411 };
412 if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) {
413 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
414 (void)State.AllocateStack(Size: 4, Alignment: Align(8));
415 return false;
416 }
417 }
418 }
419
420 if (LocVT == MVT::f64) {
421 if (!ArgFlags.isVarArg()) {
422 static const MCPhysReg RegList4[] = {
423 SystemZ::F0D, SystemZ::F2D, SystemZ::F4D, SystemZ::F6D
424 };
425 if (MCRegister Reg = State.AllocateReg(Regs: RegList4)) {
426 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
427 (void)State.AllocateStack(Size: 8, Alignment: Align(8));
428 return false;
429 }
430 }
431 }
432
433 if (LocVT == MVT::f128) {
434 if (!ArgFlags.isVarArg()) {
435 if (CC_XPLINK64_Shadow_Reg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
436 return false;
437 }
438 }
439
440 if (LocVT == MVT::f128) {
441 if (!ArgFlags.isVarArg()) {
442 static const MCPhysReg RegList5[] = {
443 SystemZ::F0Q, SystemZ::F4Q
444 };
445 if (MCRegister Reg = State.AllocateReg(Regs: RegList5)) {
446 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
447 (void)State.AllocateStack(Size: 16, Alignment: Align(8));
448 return false;
449 }
450 }
451 }
452
453 if (LocVT == MVT::i32 ||
454 LocVT == MVT::i64 ||
455 LocVT == MVT::f32 ||
456 LocVT == MVT::f64) {
457 int64_t Offset6 = State.AllocateStack(Size: 8, Alignment: Align(8));
458 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset6, LocVT, HTP: LocInfo));
459 return false;
460 }
461
462 if (LocVT == MVT::f128) {
463 int64_t Offset7 = State.AllocateStack(Size: 16, Alignment: Align(8));
464 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset7, LocVT, HTP: LocInfo));
465 return false;
466 }
467
468 if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().hasVector()) {
469 if (LocVT == MVT::v16i8 ||
470 LocVT == MVT::v8i16 ||
471 LocVT == MVT::v4i32 ||
472 LocVT == MVT::v2i64 ||
473 LocVT == MVT::v4f32 ||
474 LocVT == MVT::v2f64) {
475 int64_t Offset8 = State.AllocateStack(Size: 16, Alignment: Align(8));
476 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset8, LocVT, HTP: LocInfo));
477 return false;
478 }
479 }
480
481 return true; // CC didn't match.
482}
483
484
485static bool RetCC_SystemZ(unsigned ValNo, MVT ValVT,
486 MVT LocVT, CCValAssign::LocInfo LocInfo,
487 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
488
489 if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().isTargetXPLINK64()) {
490 if (!RetCC_SystemZ_XPLINK64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
491 return false;
492 }
493
494 if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().isTargetELF()) {
495 if (!RetCC_SystemZ_ELF(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
496 return false;
497 }
498
499 return true; // CC didn't match.
500}
501
502
503static bool RetCC_SystemZ_ELF(unsigned ValNo, MVT ValVT,
504 MVT LocVT, CCValAssign::LocInfo LocInfo,
505 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
506
507 if (LocVT == MVT::i32) {
508 if (ArgFlags.isSExt() || ArgFlags.isZExt()) {
509 LocVT = MVT::i64;
510 if (ArgFlags.isSExt())
511 LocInfo = CCValAssign::SExt;
512 else if (ArgFlags.isZExt())
513 LocInfo = CCValAssign::ZExt;
514 else
515 LocInfo = CCValAssign::AExt;
516 }
517 }
518
519 if (ArgFlags.isSwiftError()) {
520 if (LocVT == MVT::i64) {
521 if (MCRegister Reg = State.AllocateReg(Reg: SystemZ::R9D)) {
522 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
523 return false;
524 }
525 }
526 }
527
528 if (LocVT == MVT::i32) {
529 static const MCPhysReg RegList1[] = {
530 SystemZ::R2L, SystemZ::R3L, SystemZ::R4L, SystemZ::R5L
531 };
532 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
533 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
534 return false;
535 }
536 }
537
538 if (LocVT == MVT::i64) {
539 static const MCPhysReg RegList2[] = {
540 SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D
541 };
542 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
543 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
544 return false;
545 }
546 }
547
548 if (LocVT == MVT::f16) {
549 static const MCPhysReg RegList3[] = {
550 SystemZ::F0H, SystemZ::F2H, SystemZ::F4H, SystemZ::F6H
551 };
552 if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) {
553 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
554 return false;
555 }
556 }
557
558 if (LocVT == MVT::f32) {
559 static const MCPhysReg RegList4[] = {
560 SystemZ::F0S, SystemZ::F2S, SystemZ::F4S, SystemZ::F6S
561 };
562 if (MCRegister Reg = State.AllocateReg(Regs: RegList4)) {
563 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
564 return false;
565 }
566 }
567
568 if (LocVT == MVT::f64) {
569 static const MCPhysReg RegList5[] = {
570 SystemZ::F0D, SystemZ::F2D, SystemZ::F4D, SystemZ::F6D
571 };
572 if (MCRegister Reg = State.AllocateReg(Regs: RegList5)) {
573 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
574 return false;
575 }
576 }
577
578 if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().hasVector()) {
579 if (LocVT == MVT::v16i8 ||
580 LocVT == MVT::v8i16 ||
581 LocVT == MVT::v4i32 ||
582 LocVT == MVT::v2i64 ||
583 LocVT == MVT::v8f16 ||
584 LocVT == MVT::v4f32 ||
585 LocVT == MVT::v2f64) {
586 static const MCPhysReg RegList6[] = {
587 SystemZ::V24, SystemZ::V26, SystemZ::V28, SystemZ::V30, SystemZ::V25, SystemZ::V27, SystemZ::V29, SystemZ::V31
588 };
589 if (MCRegister Reg = State.AllocateReg(Regs: RegList6)) {
590 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
591 return false;
592 }
593 }
594 }
595
596 return true; // CC didn't match.
597}
598
599
600static bool RetCC_SystemZ_XPLINK64(unsigned ValNo, MVT ValVT,
601 MVT LocVT, CCValAssign::LocInfo LocInfo,
602 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
603
604 if (LocVT == MVT::i32) {
605 LocVT = MVT::i64;
606 if (ArgFlags.isSExt())
607 LocInfo = CCValAssign::SExt;
608 else if (ArgFlags.isZExt())
609 LocInfo = CCValAssign::ZExt;
610 else
611 LocInfo = CCValAssign::AExt;
612 }
613
614 if (LocVT == MVT::i64) {
615 if (ArgFlags.isInReg()) {
616 static const MCPhysReg RegList1[] = {
617 SystemZ::R1D, SystemZ::R2D, SystemZ::R3D
618 };
619 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
620 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
621 return false;
622 }
623 }
624 }
625
626 if (LocVT == MVT::i64) {
627 static const MCPhysReg RegList2[] = {
628 SystemZ::R3D, SystemZ::R2D, SystemZ::R1D
629 };
630 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
631 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
632 return false;
633 }
634 }
635
636 if (LocVT == MVT::f32) {
637 static const MCPhysReg RegList3[] = {
638 SystemZ::F0S, SystemZ::F2S, SystemZ::F4S, SystemZ::F6S
639 };
640 if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) {
641 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
642 return false;
643 }
644 }
645
646 if (LocVT == MVT::f64) {
647 static const MCPhysReg RegList4[] = {
648 SystemZ::F0D, SystemZ::F2D, SystemZ::F4D, SystemZ::F6D
649 };
650 if (MCRegister Reg = State.AllocateReg(Regs: RegList4)) {
651 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
652 return false;
653 }
654 }
655
656 if (LocVT == MVT::f128) {
657 static const MCPhysReg RegList5[] = {
658 SystemZ::F0Q, SystemZ::F4Q
659 };
660 if (MCRegister Reg = State.AllocateReg(Regs: RegList5)) {
661 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
662 return false;
663 }
664 }
665
666 if (State.getMachineFunction().getSubtarget<SystemZSubtarget>().hasVector()) {
667 if (LocVT == MVT::v16i8 ||
668 LocVT == MVT::v8i16 ||
669 LocVT == MVT::v4i32 ||
670 LocVT == MVT::v2i64 ||
671 LocVT == MVT::v4f32 ||
672 LocVT == MVT::v2f64) {
673 static const MCPhysReg RegList6[] = {
674 SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27, SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31
675 };
676 if (MCRegister Reg = State.AllocateReg(Regs: RegList6)) {
677 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
678 return false;
679 }
680 }
681 }
682
683 return true; // CC didn't match.
684}
685
686#endif // GET_CALLING_CONV_IMPL
687
688#ifdef GET_CC_REGISTER_LISTS
689#undef GET_CC_REGISTER_LISTS
690
691const MCRegister CC_SystemZ_ArgRegs[] = { 0 };
692const MCRegister CC_SystemZ_ELF_ArgRegs[] = { SystemZ::F0D, SystemZ::F0H, SystemZ::F0S, SystemZ::F2D, SystemZ::F2H, SystemZ::F2S, SystemZ::F4D, SystemZ::F4H, SystemZ::F4S, SystemZ::F6D, SystemZ::F6H, SystemZ::F6S, SystemZ::R2D, SystemZ::R2L, SystemZ::R3D, SystemZ::R3L, SystemZ::R4D, SystemZ::R4L, SystemZ::R5D, SystemZ::R5L, SystemZ::R6D, SystemZ::R6L, SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27, SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31 };
693const MCRegister CC_SystemZ_GHC_ArgRegs[] = { SystemZ::F0S, SystemZ::F10S, SystemZ::F11S, SystemZ::F12D, SystemZ::F13D, SystemZ::F14D, SystemZ::F15D, SystemZ::F1S, SystemZ::F2D, SystemZ::F3D, SystemZ::F8S, SystemZ::F9S, SystemZ::R10D, SystemZ::R11D, SystemZ::R12D, SystemZ::R13D, SystemZ::R2D, SystemZ::R3D, SystemZ::R4D, SystemZ::R5D, SystemZ::R6D, SystemZ::R7D, SystemZ::R8D, SystemZ::R9D, SystemZ::V16, SystemZ::V17, SystemZ::V18, SystemZ::V19, SystemZ::V20, SystemZ::V21 };
694const MCRegister CC_SystemZ_XPLINK64_ArgRegs[] = { SystemZ::F0D, SystemZ::F0Q, SystemZ::F0S, SystemZ::F2D, SystemZ::F2S, SystemZ::F4D, SystemZ::F4Q, SystemZ::F4S, SystemZ::F6D, SystemZ::F6S, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27, SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31 };
695const MCRegister RetCC_SystemZ_ArgRegs[] = { 0 };
696const MCRegister RetCC_SystemZ_ELF_ArgRegs[] = { SystemZ::F0D, SystemZ::F0H, SystemZ::F0S, SystemZ::F2D, SystemZ::F2H, SystemZ::F2S, SystemZ::F4D, SystemZ::F4H, SystemZ::F4S, SystemZ::F6D, SystemZ::F6H, SystemZ::F6S, SystemZ::R2D, SystemZ::R2L, SystemZ::R3D, SystemZ::R3L, SystemZ::R4D, SystemZ::R4L, SystemZ::R5D, SystemZ::R5L, SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27, SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31 };
697const MCRegister RetCC_SystemZ_XPLINK64_ArgRegs[] = { SystemZ::F0D, SystemZ::F0Q, SystemZ::F0S, SystemZ::F2D, SystemZ::F2S, SystemZ::F4D, SystemZ::F4Q, SystemZ::F4S, SystemZ::F6D, SystemZ::F6S, SystemZ::R1D, SystemZ::R2D, SystemZ::R3D, SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27, SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31 };
698
699// Registers used by Swift.
700const MCRegister CC_SystemZ_ELF_Swift_ArgRegs[] = { SystemZ::R10D, SystemZ::R9D };
701const MCRegister CC_SystemZ_XPLINK64_Swift_ArgRegs[] = { SystemZ::R0D, SystemZ::R10D };
702const MCRegister RetCC_SystemZ_ELF_Swift_ArgRegs[] = { SystemZ::R9D };
703
704#endif // GET_CC_REGISTER_LISTS
705
706