| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 2 | |* *| |
| 3 | |* Option Parsing Definitions *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* *| |
| 7 | \*===----------------------------------------------------------------------===*/ |
| 8 | |
| 9 | ///////// |
| 10 | // Tables |
| 11 | |
| 12 | #if defined(OPTTABLE_CODE) || defined(OPTIONS_STRUCT_DEFS) |
| 13 | static llvm::opt::OptTable::Tables optionTables() { |
| 14 | using llvm::opt::DefaultVis, llvm::opt::HelpHidden, |
| 15 | llvm::opt::RenderAsInput, llvm::opt::RenderJoined, |
| 16 | llvm::opt::RenderSeparate; |
| 17 | |
| 18 | #ifdef __GNUC__ |
| 19 | #pragma GCC diagnostic push |
| 20 | #pragma GCC diagnostic ignored "-Woverlength-strings" |
| 21 | #endif |
| 22 | static constexpr char OptionStrTableStorage[] = |
| 23 | "\0" |
| 24 | "-\0" |
| 25 | "--\0" |
| 26 | "<input>\0" |
| 27 | "<unknown>\0" |
| 28 | "-branch-hint-probability-threshold\0" |
| 29 | "The probability threshold of enabling branch hint\0" |
| 30 | "-disable-spill-fusing\0" |
| 31 | "Disable fusing of spill code into instructions\0" |
| 32 | "-disable-x86-domain-reassignment\0" |
| 33 | "X86: Disable Virtual Register Reassignment\0" |
| 34 | "-disable-x86-lea-opt\0" |
| 35 | "X86: Disable LEA optimizations\0" |
| 36 | "-enable-branch-hint\0" |
| 37 | "Enable branch hint\0" |
| 38 | "-enable-x86-scalar-amx\0" |
| 39 | "X86: enable AMX scalarizition\0" |
| 40 | "-fixup-byte-word-insts\0" |
| 41 | "Change byte and word instructions to larger sizes\0" |
| 42 | "-no-x86-call-frame-opt\0" |
| 43 | "Avoid optimizing x86 call frames for size\0" |
| 44 | "-partial-reg-update-clearance\0" |
| 45 | "Clearance between two register writes for inserting XOR to avoid partial register update\0" |
| 46 | "-print-failed-fuse-candidates\0" |
| 47 | "Print instructions that the allocator wants to fuse, but the X86 backend currently can't\0" |
| 48 | "-remat-pic-stub-load\0" |
| 49 | "Re-materialize load from stub in PIC mode\0" |
| 50 | "-undef-reg-clearance\0" |
| 51 | "How many idle instructions we would like before certain undef register reads\0" |
| 52 | "-x86-and-imm-shrink\0" |
| 53 | "Enable setting constant bits to reduce size of mask immediates\0" |
| 54 | "-x86-br-merging-base-cost\0" |
| 55 | "Sets the cost threshold for when multiple conditionals will be merged into one branch versus be split in multiple branches. Merging conditionals saves branches at the cost of additional instructions. This value sets the instruction cost limit, below which conditionals will be merged, and above which conditionals will be split. Set to -1 to never merge branches\0" |
| 56 | "-x86-br-merging-ccmp-bias\0" |
| 57 | "Increases 'x86-br-merging-base-cost' in cases that the target supports conditional compare instructions\0" |
| 58 | "-x86-br-merging-likely-bias\0" |
| 59 | "Increases 'x86-br-merging-base-cost' in cases that it is likely that all conditionals will be executed. For example for merging the conditionals (a == b && c > d), if its known that a == b is likely, then it is likely that if the conditionals are split both sides will be executed, so it may be desirable to increase the instruction cost threshold. Set to -1 to never merge likely branches\0" |
| 60 | "-x86-br-merging-unlikely-bias\0" |
| 61 | "Decreases 'x86-br-merging-base-cost' in cases that it is unlikely that all conditionals will be executed. For example for merging the conditionals (a == b && c > d), if its known that a == b is unlikely, then it is unlikely that if the conditionals are split both sides will be executed, so it may be desirable to decrease the instruction cost threshold. Set to -1 to never merge unlikely branches\0" |
| 62 | "-x86-cmov-converter-force-all\0" |
| 63 | "Convert all cmovs to branches\0" |
| 64 | "-x86-cmov-converter-force-mem-operand\0" |
| 65 | "Convert cmovs to branches whenever they have memory operands\0" |
| 66 | "-x86-cmov-converter-threshold\0" |
| 67 | "Minimum gain per loop (in cycles) threshold\0" |
| 68 | "-x86-cmov-converter\0" |
| 69 | "Enable the X86 cmov-to-branch optimization\0" |
| 70 | "-x86-disable-avoid-SFB\0" |
| 71 | "X86: Disable Store Forwarding Blocks fixup\0" |
| 72 | "-x86-disable-regalloc-hints-for-ndd\0" |
| 73 | "Disable two address hints for register allocation\0" |
| 74 | "-x86-early-ifcvt\0" |
| 75 | "Enable early if-conversion on X86\0" |
| 76 | "-x86-enable-apx-for-relocation\0" |
| 77 | "Enable APX features (EGPR, NDD and NF) for instructions with relocations on x86-64 ELF\0" |
| 78 | "-x86-experimental-pref-innermost-loop-alignment\0" |
| 79 | "Sets the preferable loop alignment for experiments (as log2 bytes) for innermost loops only. If specified, this option overrides alignment set by x86-experimental-pref-loop-alignment\0" |
| 80 | "-x86-indirect-branch-tracking\0" |
| 81 | "Enable X86 indirect branch tracking pass\0" |
| 82 | "-x86-lvi-load-dot-only\0" |
| 83 | "For each function, emit a dot graph depicting potential LVI gadgets, and do not insert any fences\0" |
| 84 | "-x86-lvi-load-dot-verify\0" |
| 85 | "For each function, emit a dot graph to stdout depicting potential LVI gadgets, used for testing purposes only\0" |
| 86 | "-x86-lvi-load-dot\0" |
| 87 | "For each function, emit a dot graph depicting potential LVI gadgets\0" |
| 88 | "-x86-lvi-load-no-cbranch\0" |
| 89 | "Don't treat conditional branches as disclosure gadgets. This may improve performance, at the cost of security\0" |
| 90 | "-x86-lvi-load-opt-plugin\0" |
| 91 | "Specify a plugin to optimize LFENCE insertion\0" |
| 92 | "-x86-machine-combiner\0" |
| 93 | "Enable the machine combiner pass\0" |
| 94 | "-x86-max-nf-conversions-for-cmp-reuse\0" |
| 95 | "Maximum number of NF conversions allowed to reuse EFLAGS from a producer dominating a multi-predecessor block\0" |
| 96 | "-x86-promote-anyext-load\0" |
| 97 | "Enable promoting aligned anyext load to wider load\0" |
| 98 | "-x86-seses-enable-without-lvi-cfi\0" |
| 99 | "Force enable speculative execution side effect suppression. (Note: User must pass -mlvi-cfi in order to mitigate indirect branches and returns.)\0" |
| 100 | "-x86-seses-omit-branch-lfences\0" |
| 101 | "Omit all lfences before branch instructions\0" |
| 102 | "-x86-seses-one-lfence-per-bb\0" |
| 103 | "Omit all lfences other than the first to be placed in a basic block\0" |
| 104 | "-x86-seses-only-lfence-non-const\0" |
| 105 | "Only lfence before groups of terminators where at least one branch instruction has an input to the addressing mode that is a register other than %rip\0" |
| 106 | "-x86-setjmp-csr-warning-threshold\0" |
| 107 | "Basic block count threshold for emitting a warning about callee-saved registers reserved due to setjmp\0" |
| 108 | "-x86-sfb-inspection-limit\0" |
| 109 | "X86: Number of instructions backward to inspect for store forwarding blocks\0" |
| 110 | "-x86-slh-fence-call-and-ret\0" |
| 111 | "Use a full speculation fence to harden both call and ret edges rather than a lighter weight mitigation\0" |
| 112 | "-x86-slh-indirect\0" |
| 113 | "Harden indirect calls and jumps against using speculatively stored attacker controlled addresses. This is designed to mitigate Spectre v1.2 style attacks\0" |
| 114 | "-x86-slh-ip\0" |
| 115 | "Harden interprocedurally by passing our state in and out of functions in the high bits of the stack pointer\0" |
| 116 | "-x86-slh-lfence\0" |
| 117 | "Use LFENCE along each conditional edge to harden against speculative loads rather than conditional movs and poisoned pointers\0" |
| 118 | "-x86-slh-loads\0" |
| 119 | "Sanitize loads from memory. When disable, no significant security is provided\0" |
| 120 | "-x86-slh-post-load\0" |
| 121 | "Harden the value loaded *after* it is loaded by flushing the loaded bits to 1. This is hard to do in general but can be done easily for GPRs\0" |
| 122 | "-x86-speculative-load-hardening\0" |
| 123 | "Force enable speculative load hardening\0" |
| 124 | "-x86-tile-ra\0" |
| 125 | "Enable the tile register allocation pass\0" |
| 126 | "-x86-use-base-pointer\0" |
| 127 | "Enable use of a base pointer for complex stack frames\0" |
| 128 | "-x86-use-fsrm-for-memcpy\0" |
| 129 | "Use fast short rep mov in memcpy lowering\0" |
| 130 | "-x86-use-vzeroupper\0" |
| 131 | "Minimize AVX to SSE transition penalty\0" |
| 132 | "-x86-wineh-unwindv2-force-mode\0" |
| 133 | "Overwrites the Unwind v2 mode for testing purposes\0" |
| 134 | "-x86-wineh-unwindv2-instruction-count-threshold\0" |
| 135 | "Maximum number of (approximate) instructions before splitting into a new unwind info\0" |
| 136 | "-x86-wineh-unwindv2-unwind-codes-threshold\0" |
| 137 | "Maximum number of unwind codes before splitting into a new unwind info\0" |
| 138 | "-x86-wineh-unwindv3-instr-avg-size\0" |
| 139 | "Average size of an instruction. This value is used in determining split points for chained unwinder info\0" |
| 140 | ; |
| 141 | #ifdef __GNUC__ |
| 142 | #pragma GCC diagnostic pop |
| 143 | #endif |
| 144 | |
| 145 | static constexpr llvm::StringTable |
| 146 | OptionStrTable = OptionStrTableStorage; |
| 147 | |
| 148 | static constexpr llvm::StringTable::Offset OptionPrefixesTable[] = { |
| 149 | 0 /* prefixes */, |
| 150 | 2 /* prefixes */, 1 /* '-' */, 3 /* '--' */ |
| 151 | }; |
| 152 | |
| 153 | static constexpr llvm::opt::OptTable::HelpTextVariant OptionHelpTextVariantsTable[] = { |
| 154 | {0, 0}, |
| 155 | }; |
| 156 | |
| 157 | static constexpr unsigned OptionSubCommandIDsTable[] = { |
| 158 | 0 /* subcommands */ |
| 159 | }; |
| 160 | |
| 161 | static constexpr llvm::opt::OptTable::InfoExtra OptionInfoExtrasTable[] = { |
| 162 | {0, 0, 0, 0, 0, 0, 0, 0}, |
| 163 | {0, 0, 0, 0, static_cast<unsigned>(DefaultVis), 0, 0, 0}, |
| 164 | }; |
| 165 | |
| 166 | static constexpr llvm::opt::OptTable::Info OptionInfoTable[] = { |
| 167 | {6 /* <input> */, 0, 0, 0, 1, 0, llvm::opt::Option::InputClass}, |
| 168 | {14 /* <unknown> */, 0, 0, 0, 1, 0, llvm::opt::Option::UnknownClass}, |
| 169 | {24 /* -branch-hint-probability-threshold */, 59, 0, 0, 1, 1, llvm::opt::Option::SeparateOrEqClass}, |
| 170 | {109 /* -disable-spill-fusing */, 131, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 171 | {178 /* -disable-x86-domain-reassignment */, 211, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 172 | {254 /* -disable-x86-lea-opt */, 275, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 173 | {306 /* -enable-branch-hint */, 326, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 174 | {345 /* -enable-x86-scalar-amx */, 368, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 175 | {398 /* -fixup-byte-word-insts */, 421, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 176 | {471 /* -no-x86-call-frame-opt */, 494, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 177 | {536 /* -partial-reg-update-clearance */, 566, 0, 0, 1, 1, llvm::opt::Option::SeparateOrEqClass}, |
| 178 | {655 /* -print-failed-fuse-candidates */, 685, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 179 | {774 /* -remat-pic-stub-load */, 795, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 180 | {837 /* -undef-reg-clearance */, 858, 0, 0, 1, 1, llvm::opt::Option::SeparateOrEqClass}, |
| 181 | {935 /* -x86-and-imm-shrink */, 955, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 182 | {1018 /* -x86-br-merging-base-cost */, 1044, 0, 0, 1, 1, llvm::opt::Option::SeparateOrEqClass}, |
| 183 | {1407 /* -x86-br-merging-ccmp-bias */, 1433, 0, 0, 1, 1, llvm::opt::Option::SeparateOrEqClass}, |
| 184 | {1537 /* -x86-br-merging-likely-bias */, 1565, 0, 0, 1, 1, llvm::opt::Option::SeparateOrEqClass}, |
| 185 | {1955 /* -x86-br-merging-unlikely-bias */, 1985, 0, 0, 1, 1, llvm::opt::Option::SeparateOrEqClass}, |
| 186 | {2383 /* -x86-cmov-converter-force-all */, 2413, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 187 | {2443 /* -x86-cmov-converter-force-mem-operand */, 2481, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 188 | {2542 /* -x86-cmov-converter-threshold */, 2572, 0, 0, 1, 1, llvm::opt::Option::SeparateOrEqClass}, |
| 189 | {2616 /* -x86-cmov-converter */, 2636, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 190 | {2679 /* -x86-disable-avoid-SFB */, 2702, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 191 | {2745 /* -x86-disable-regalloc-hints-for-ndd */, 2781, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 192 | {2831 /* -x86-early-ifcvt */, 2848, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 193 | {2882 /* -x86-enable-apx-for-relocation */, 2913, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 194 | {3000 /* -x86-experimental-pref-innermost-loop-alignment */, 3048, 0, 0, 1, 1, llvm::opt::Option::SeparateOrEqClass}, |
| 195 | {3231 /* -x86-indirect-branch-tracking */, 3261, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 196 | {3302 /* -x86-lvi-load-dot-only */, 3325, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 197 | {3423 /* -x86-lvi-load-dot-verify */, 3448, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 198 | {3558 /* -x86-lvi-load-dot */, 3576, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 199 | {3644 /* -x86-lvi-load-no-cbranch */, 3669, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 200 | {3779 /* -x86-lvi-load-opt-plugin */, 3804, 0, 0, 1, 1, llvm::opt::Option::SeparateOrEqClass}, |
| 201 | {3850 /* -x86-machine-combiner */, 3872, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 202 | {3905 /* -x86-max-nf-conversions-for-cmp-reuse */, 3943, 0, 0, 1, 1, llvm::opt::Option::SeparateOrEqClass}, |
| 203 | {4053 /* -x86-promote-anyext-load */, 4078, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 204 | {4129 /* -x86-seses-enable-without-lvi-cfi */, 4163, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 205 | {4308 /* -x86-seses-omit-branch-lfences */, 4339, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 206 | {4383 /* -x86-seses-one-lfence-per-bb */, 4412, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 207 | {4480 /* -x86-seses-only-lfence-non-const */, 4513, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 208 | {4663 /* -x86-setjmp-csr-warning-threshold */, 4697, 0, 0, 1, 1, llvm::opt::Option::SeparateOrEqClass}, |
| 209 | {4800 /* -x86-sfb-inspection-limit */, 4826, 0, 0, 1, 1, llvm::opt::Option::SeparateOrEqClass}, |
| 210 | {4902 /* -x86-slh-fence-call-and-ret */, 4930, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 211 | {5033 /* -x86-slh-indirect */, 5051, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 212 | {5205 /* -x86-slh-ip */, 5217, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 213 | {5325 /* -x86-slh-lfence */, 5341, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 214 | {5467 /* -x86-slh-loads */, 5482, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 215 | {5560 /* -x86-slh-post-load */, 5579, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 216 | {5720 /* -x86-speculative-load-hardening */, 5752, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 217 | {5792 /* -x86-tile-ra */, 5805, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 218 | {5846 /* -x86-use-base-pointer */, 5868, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 219 | {5922 /* -x86-use-fsrm-for-memcpy */, 5947, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 220 | {5989 /* -x86-use-vzeroupper */, 6009, 0, 0, 1, 1, llvm::opt::Option::FlagOrEqClass}, |
| 221 | {6048 /* -x86-wineh-unwindv2-force-mode */, 6079, 0, 0, 1, 1, llvm::opt::Option::SeparateOrEqClass}, |
| 222 | {6130 /* -x86-wineh-unwindv2-instruction-count-threshold */, 6178, 0, 0, 1, 1, llvm::opt::Option::SeparateOrEqClass}, |
| 223 | {6263 /* -x86-wineh-unwindv2-unwind-codes-threshold */, 6306, 0, 0, 1, 1, llvm::opt::Option::SeparateOrEqClass}, |
| 224 | {6377 /* -x86-wineh-unwindv3-instr-avg-size */, 6412, 0, 0, 1, 1, llvm::opt::Option::SeparateOrEqClass}, |
| 225 | }; |
| 226 | |
| 227 | return {OptionStrTable, OptionPrefixesTable, |
| 228 | OptionInfoTable, OptionInfoExtrasTable, OptionHelpTextVariantsTable, {}, OptionSubCommandIDsTable}; |
| 229 | } |
| 230 | #undef OPTTABLE_CODE |
| 231 | #endif // OPTTABLE_CODE || OPTIONS_STRUCT_DEFS |
| 232 | |
| 233 | |
| 234 | #ifdef OPTIONS_STRUCT_DECL |
| 235 | #undef OPTIONS_STRUCT_DECL |
| 236 | #include "llvm/ADT/ArrayRef.h" |
| 237 | #include "llvm/ADT/BoolOrDefault.h" |
| 238 | #include "llvm/ADT/StringRef.h" |
| 239 | #include "llvm/Support/Allocator.h" |
| 240 | |
| 241 | namespace llvm { |
| 242 | namespace opt { |
| 243 | class Arg; |
| 244 | class OptTable; |
| 245 | } // namespace opt |
| 246 | } // namespace llvm |
| 247 | |
| 248 | namespace llvm { |
| 249 | struct X86Options { |
| 250 | bool disable_avoid_SFB{false}; |
| 251 | unsigned sfb_inspection_limit{20}; |
| 252 | bool no_x86_call_frame_opt{false}; |
| 253 | bool cmov_converter{true}; |
| 254 | bool cmov_converter_force_all{false}; |
| 255 | bool cmov_converter_force_mem_operand{true}; |
| 256 | unsigned cmov_converter_threshold{4}; |
| 257 | bool disable_x86_domain_reassignment{false}; |
| 258 | bool fixup_byte_word_insts{true}; |
| 259 | bool and_imm_shrink{true}; |
| 260 | bool promote_anyext_load{true}; |
| 261 | int br_merging_base_cost{2}; |
| 262 | int br_merging_ccmp_bias{6}; |
| 263 | int br_merging_likely_bias{0}; |
| 264 | int br_merging_unlikely_bias{-1}; |
| 265 | std::optional<int> experimental_pref_innermost_loop_alignment{std::nullopt}; |
| 266 | bool indirect_branch_tracking{false}; |
| 267 | bool use_vzeroupper{true}; |
| 268 | bool disable_spill_fusing{false}; |
| 269 | unsigned max_nf_conversions_for_cmp_reuse{6}; |
| 270 | unsigned partial_reg_update_clearance{64}; |
| 271 | bool print_failed_fuse_candidates{false}; |
| 272 | bool remat_pic_stub_load{false}; |
| 273 | unsigned undef_reg_clearance{128}; |
| 274 | bool lvi_load_dot{false}; |
| 275 | bool lvi_load_dot_only{false}; |
| 276 | bool lvi_load_dot_verify{false}; |
| 277 | bool lvi_load_no_cbranch{false}; |
| 278 | StringRef lvi_load_opt_plugin{}; |
| 279 | bool enable_x86_scalar_amx{false}; |
| 280 | unsigned branch_hint_probability_threshold{50}; |
| 281 | bool enable_branch_hint{false}; |
| 282 | bool disable_x86_lea_opt{false}; |
| 283 | bool disable_regalloc_hints_for_ndd{false}; |
| 284 | unsigned setjmp_csr_warning_threshold{50}; |
| 285 | bool use_base_pointer{true}; |
| 286 | bool use_fsrm_for_memcpy{false}; |
| 287 | bool seses_enable_without_lvi_cfi{false}; |
| 288 | bool seses_omit_branch_lfences{false}; |
| 289 | bool seses_one_lfence_per_bb{false}; |
| 290 | bool seses_only_lfence_non_const{false}; |
| 291 | bool slh_fence_call_and_ret{false}; |
| 292 | bool slh_indirect{true}; |
| 293 | bool slh_ip{true}; |
| 294 | bool slh_lfence{false}; |
| 295 | bool slh_loads{true}; |
| 296 | bool slh_post_load{true}; |
| 297 | bool speculative_load_hardening{false}; |
| 298 | bool early_ifcvt{false}; |
| 299 | bool enable_apx_for_relocation{false}; |
| 300 | bool machine_combiner{true}; |
| 301 | bool tile_ra{true}; |
| 302 | std::optional<unsigned> wineh_unwindv2_force_mode{std::nullopt}; |
| 303 | unsigned wineh_unwindv2_instruction_count_threshold{600}; |
| 304 | unsigned wineh_unwindv2_unwind_codes_threshold{UINT8_MAX}; |
| 305 | unsigned wineh_unwindv3_instr_avg_size{7}; |
| 306 | |
| 307 | /// The instance cl::ParseCommandLineOptions sets. |
| 308 | static X86Options Global; |
| 309 | |
| 310 | static const llvm::opt::OptTable &optTable(); |
| 311 | /// Sets the member that \p A names, allocating a list from \p Alloc. |
| 312 | /// Returns false if the value is invalid. |
| 313 | bool apply(const llvm::opt::Arg &A, llvm::BumpPtrAllocator &Alloc); |
| 314 | }; |
| 315 | } // namespace llvm |
| 316 | #endif // OPTIONS_STRUCT_DECL |
| 317 | |
| 318 | #ifdef OPTIONS_STRUCT_DEFS |
| 319 | #undef OPTIONS_STRUCT_DEFS |
| 320 | llvm::X86Options llvm::X86Options::Global; |
| 321 | |
| 322 | namespace { |
| 323 | enum ID : unsigned { |
| 324 | OPT_INVALID = 0, |
| 325 | OPT_INPUT, |
| 326 | OPT_UNKNOWN, |
| 327 | OPT_branch_hint_probability_threshold, |
| 328 | OPT_disable_spill_fusing, |
| 329 | OPT_disable_x86_domain_reassignment, |
| 330 | OPT_disable_x86_lea_opt, |
| 331 | OPT_enable_branch_hint, |
| 332 | OPT_enable_x86_scalar_amx, |
| 333 | OPT_fixup_byte_word_insts, |
| 334 | OPT_no_x86_call_frame_opt, |
| 335 | OPT_partial_reg_update_clearance, |
| 336 | OPT_print_failed_fuse_candidates, |
| 337 | OPT_remat_pic_stub_load, |
| 338 | OPT_undef_reg_clearance, |
| 339 | OPT_x86_and_imm_shrink, |
| 340 | OPT_x86_br_merging_base_cost, |
| 341 | OPT_x86_br_merging_ccmp_bias, |
| 342 | OPT_x86_br_merging_likely_bias, |
| 343 | OPT_x86_br_merging_unlikely_bias, |
| 344 | OPT_x86_cmov_converter_force_all, |
| 345 | OPT_x86_cmov_converter_force_mem_operand, |
| 346 | OPT_x86_cmov_converter_threshold, |
| 347 | OPT_x86_cmov_converter, |
| 348 | OPT_x86_disable_avoid_SFB, |
| 349 | OPT_x86_disable_regalloc_hints_for_ndd, |
| 350 | OPT_x86_early_ifcvt, |
| 351 | OPT_x86_enable_apx_for_relocation, |
| 352 | OPT_x86_experimental_pref_innermost_loop_alignment, |
| 353 | OPT_x86_indirect_branch_tracking, |
| 354 | OPT_x86_lvi_load_dot_only, |
| 355 | OPT_x86_lvi_load_dot_verify, |
| 356 | OPT_x86_lvi_load_dot, |
| 357 | OPT_x86_lvi_load_no_cbranch, |
| 358 | OPT_x86_lvi_load_opt_plugin, |
| 359 | OPT_x86_machine_combiner, |
| 360 | OPT_x86_max_nf_conversions_for_cmp_reuse, |
| 361 | OPT_x86_promote_anyext_load, |
| 362 | OPT_x86_seses_enable_without_lvi_cfi, |
| 363 | OPT_x86_seses_omit_branch_lfences, |
| 364 | OPT_x86_seses_one_lfence_per_bb, |
| 365 | OPT_x86_seses_only_lfence_non_const, |
| 366 | OPT_x86_setjmp_csr_warning_threshold, |
| 367 | OPT_x86_sfb_inspection_limit, |
| 368 | OPT_x86_slh_fence_call_and_ret, |
| 369 | OPT_x86_slh_indirect, |
| 370 | OPT_x86_slh_ip, |
| 371 | OPT_x86_slh_lfence, |
| 372 | OPT_x86_slh_loads, |
| 373 | OPT_x86_slh_post_load, |
| 374 | OPT_x86_speculative_load_hardening, |
| 375 | OPT_x86_tile_ra, |
| 376 | OPT_x86_use_base_pointer, |
| 377 | OPT_x86_use_fsrm_for_memcpy, |
| 378 | OPT_x86_use_vzeroupper, |
| 379 | OPT_x86_wineh_unwindv2_force_mode, |
| 380 | OPT_x86_wineh_unwindv2_instruction_count_threshold, |
| 381 | OPT_x86_wineh_unwindv2_unwind_codes_threshold, |
| 382 | OPT_x86_wineh_unwindv3_instr_avg_size, |
| 383 | }; |
| 384 | } // namespace |
| 385 | |
| 386 | const llvm::opt::OptTable &llvm::X86Options::optTable() { |
| 387 | static const llvm::opt::LibraryOptTable T(optionTables()); |
| 388 | return T; |
| 389 | } |
| 390 | |
| 391 | bool llvm::X86Options::apply(const llvm::opt::Arg &A, llvm::BumpPtrAllocator &Alloc) { |
| 392 | switch (A.getOption().getID()) { |
| 393 | case OPT_branch_hint_probability_threshold: |
| 394 | return llvm::opt::parseArgValue(A.getValue(), branch_hint_probability_threshold, Alloc); |
| 395 | case OPT_disable_spill_fusing: |
| 396 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , disable_spill_fusing, Alloc); |
| 397 | case OPT_disable_x86_domain_reassignment: |
| 398 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , disable_x86_domain_reassignment, Alloc); |
| 399 | case OPT_disable_x86_lea_opt: |
| 400 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , disable_x86_lea_opt, Alloc); |
| 401 | case OPT_enable_branch_hint: |
| 402 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , enable_branch_hint, Alloc); |
| 403 | case OPT_enable_x86_scalar_amx: |
| 404 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , enable_x86_scalar_amx, Alloc); |
| 405 | case OPT_fixup_byte_word_insts: |
| 406 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , fixup_byte_word_insts, Alloc); |
| 407 | case OPT_no_x86_call_frame_opt: |
| 408 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , no_x86_call_frame_opt, Alloc); |
| 409 | case OPT_partial_reg_update_clearance: |
| 410 | return llvm::opt::parseArgValue(A.getValue(), partial_reg_update_clearance, Alloc); |
| 411 | case OPT_print_failed_fuse_candidates: |
| 412 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , print_failed_fuse_candidates, Alloc); |
| 413 | case OPT_remat_pic_stub_load: |
| 414 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , remat_pic_stub_load, Alloc); |
| 415 | case OPT_undef_reg_clearance: |
| 416 | return llvm::opt::parseArgValue(A.getValue(), undef_reg_clearance, Alloc); |
| 417 | case OPT_x86_and_imm_shrink: |
| 418 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , and_imm_shrink, Alloc); |
| 419 | case OPT_x86_br_merging_base_cost: |
| 420 | return llvm::opt::parseArgValue(A.getValue(), br_merging_base_cost, Alloc); |
| 421 | case OPT_x86_br_merging_ccmp_bias: |
| 422 | return llvm::opt::parseArgValue(A.getValue(), br_merging_ccmp_bias, Alloc); |
| 423 | case OPT_x86_br_merging_likely_bias: |
| 424 | return llvm::opt::parseArgValue(A.getValue(), br_merging_likely_bias, Alloc); |
| 425 | case OPT_x86_br_merging_unlikely_bias: |
| 426 | return llvm::opt::parseArgValue(A.getValue(), br_merging_unlikely_bias, Alloc); |
| 427 | case OPT_x86_cmov_converter_force_all: |
| 428 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , cmov_converter_force_all, Alloc); |
| 429 | case OPT_x86_cmov_converter_force_mem_operand: |
| 430 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , cmov_converter_force_mem_operand, Alloc); |
| 431 | case OPT_x86_cmov_converter_threshold: |
| 432 | return llvm::opt::parseArgValue(A.getValue(), cmov_converter_threshold, Alloc); |
| 433 | case OPT_x86_cmov_converter: |
| 434 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , cmov_converter, Alloc); |
| 435 | case OPT_x86_disable_avoid_SFB: |
| 436 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , disable_avoid_SFB, Alloc); |
| 437 | case OPT_x86_disable_regalloc_hints_for_ndd: |
| 438 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , disable_regalloc_hints_for_ndd, Alloc); |
| 439 | case OPT_x86_early_ifcvt: |
| 440 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , early_ifcvt, Alloc); |
| 441 | case OPT_x86_enable_apx_for_relocation: |
| 442 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , enable_apx_for_relocation, Alloc); |
| 443 | case OPT_x86_experimental_pref_innermost_loop_alignment: |
| 444 | return llvm::opt::parseArgValue(A.getValue(), experimental_pref_innermost_loop_alignment, Alloc); |
| 445 | case OPT_x86_indirect_branch_tracking: |
| 446 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , indirect_branch_tracking, Alloc); |
| 447 | case OPT_x86_lvi_load_dot_only: |
| 448 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , lvi_load_dot_only, Alloc); |
| 449 | case OPT_x86_lvi_load_dot_verify: |
| 450 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , lvi_load_dot_verify, Alloc); |
| 451 | case OPT_x86_lvi_load_dot: |
| 452 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , lvi_load_dot, Alloc); |
| 453 | case OPT_x86_lvi_load_no_cbranch: |
| 454 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , lvi_load_no_cbranch, Alloc); |
| 455 | case OPT_x86_lvi_load_opt_plugin: |
| 456 | return llvm::opt::parseArgValue(A.getValue(), lvi_load_opt_plugin, Alloc); |
| 457 | case OPT_x86_machine_combiner: |
| 458 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , machine_combiner, Alloc); |
| 459 | case OPT_x86_max_nf_conversions_for_cmp_reuse: |
| 460 | return llvm::opt::parseArgValue(A.getValue(), max_nf_conversions_for_cmp_reuse, Alloc); |
| 461 | case OPT_x86_promote_anyext_load: |
| 462 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , promote_anyext_load, Alloc); |
| 463 | case OPT_x86_seses_enable_without_lvi_cfi: |
| 464 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , seses_enable_without_lvi_cfi, Alloc); |
| 465 | case OPT_x86_seses_omit_branch_lfences: |
| 466 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , seses_omit_branch_lfences, Alloc); |
| 467 | case OPT_x86_seses_one_lfence_per_bb: |
| 468 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , seses_one_lfence_per_bb, Alloc); |
| 469 | case OPT_x86_seses_only_lfence_non_const: |
| 470 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , seses_only_lfence_non_const, Alloc); |
| 471 | case OPT_x86_setjmp_csr_warning_threshold: |
| 472 | return llvm::opt::parseArgValue(A.getValue(), setjmp_csr_warning_threshold, Alloc); |
| 473 | case OPT_x86_sfb_inspection_limit: |
| 474 | return llvm::opt::parseArgValue(A.getValue(), sfb_inspection_limit, Alloc); |
| 475 | case OPT_x86_slh_fence_call_and_ret: |
| 476 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , slh_fence_call_and_ret, Alloc); |
| 477 | case OPT_x86_slh_indirect: |
| 478 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , slh_indirect, Alloc); |
| 479 | case OPT_x86_slh_ip: |
| 480 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , slh_ip, Alloc); |
| 481 | case OPT_x86_slh_lfence: |
| 482 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , slh_lfence, Alloc); |
| 483 | case OPT_x86_slh_loads: |
| 484 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , slh_loads, Alloc); |
| 485 | case OPT_x86_slh_post_load: |
| 486 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , slh_post_load, Alloc); |
| 487 | case OPT_x86_speculative_load_hardening: |
| 488 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , speculative_load_hardening, Alloc); |
| 489 | case OPT_x86_tile_ra: |
| 490 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , tile_ra, Alloc); |
| 491 | case OPT_x86_use_base_pointer: |
| 492 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , use_base_pointer, Alloc); |
| 493 | case OPT_x86_use_fsrm_for_memcpy: |
| 494 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , use_fsrm_for_memcpy, Alloc); |
| 495 | case OPT_x86_use_vzeroupper: |
| 496 | return llvm::opt::parseArgValue(A.getNumValues() ? A.getValue() : "true" , use_vzeroupper, Alloc); |
| 497 | case OPT_x86_wineh_unwindv2_force_mode: |
| 498 | return llvm::opt::parseArgValue(A.getValue(), wineh_unwindv2_force_mode, Alloc); |
| 499 | case OPT_x86_wineh_unwindv2_instruction_count_threshold: |
| 500 | return llvm::opt::parseArgValue(A.getValue(), wineh_unwindv2_instruction_count_threshold, Alloc); |
| 501 | case OPT_x86_wineh_unwindv2_unwind_codes_threshold: |
| 502 | return llvm::opt::parseArgValue(A.getValue(), wineh_unwindv2_unwind_codes_threshold, Alloc); |
| 503 | case OPT_x86_wineh_unwindv3_instr_avg_size: |
| 504 | return llvm::opt::parseArgValue(A.getValue(), wineh_unwindv3_instr_avg_size, Alloc); |
| 505 | } |
| 506 | llvm_unreachable("option without a member" ); |
| 507 | } |
| 508 | #endif // OPTIONS_STRUCT_DEFS |
| 509 | ///////// |
| 510 | // ValuesCode |
| 511 | |
| 512 | #ifdef OPTTABLE_VALUES_CODE |
| 513 | static llvm::StringRef getOptionValuesCode(unsigned ID) { |
| 514 | switch (ID) { |
| 515 | } |
| 516 | return {}; |
| 517 | } |
| 518 | #undef OPTTABLE_VALUES_CODE |
| 519 | #endif // OPTTABLE_VALUES_CODE |
| 520 | ///////// |
| 521 | // Groups |
| 522 | |
| 523 | #ifdef OPTION |
| 524 | |
| 525 | ////////// |
| 526 | // Options |
| 527 | |
| 528 | OPTION(0, 6 /* <input> */, INPUT, Input, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 0, 0, 0, 0, 0) |
| 529 | OPTION(0, 14 /* <unknown> */, UNKNOWN, Unknown, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 0, 0, 0, 0, 0) |
| 530 | OPTION(1, 24 /* -branch-hint-probability-threshold */, anonymous_30, SeparateOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 59, 0, 0, 0, 0) |
| 531 | OPTION(1, 109 /* -disable-spill-fusing */, anonymous_18, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 131, 0, 0, 0, 0) |
| 532 | OPTION(1, 178 /* -disable-x86-domain-reassignment */, anonymous_7, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 211, 0, 0, 0, 0) |
| 533 | OPTION(1, 254 /* -disable-x86-lea-opt */, anonymous_32, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 275, 0, 0, 0, 0) |
| 534 | OPTION(1, 306 /* -enable-branch-hint */, anonymous_31, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 326, 0, 0, 0, 0) |
| 535 | OPTION(1, 345 /* -enable-x86-scalar-amx */, anonymous_29, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 368, 0, 0, 0, 0) |
| 536 | OPTION(1, 398 /* -fixup-byte-word-insts */, anonymous_8, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 421, 0, 0, 0, 0) |
| 537 | OPTION(1, 471 /* -no-x86-call-frame-opt */, anonymous_2, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 494, 0, 0, 0, 0) |
| 538 | OPTION(1, 536 /* -partial-reg-update-clearance */, anonymous_20, SeparateOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 566, 0, 0, 0, 0) |
| 539 | OPTION(1, 655 /* -print-failed-fuse-candidates */, anonymous_21, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 685, 0, 0, 0, 0) |
| 540 | OPTION(1, 774 /* -remat-pic-stub-load */, anonymous_22, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 795, 0, 0, 0, 0) |
| 541 | OPTION(1, 837 /* -undef-reg-clearance */, anonymous_23, SeparateOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 858, 0, 0, 0, 0) |
| 542 | OPTION(1, 935 /* -x86-and-imm-shrink */, anonymous_9, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 955, 0, 0, 0, 0) |
| 543 | OPTION(1, 1018 /* -x86-br-merging-base-cost */, anonymous_11, SeparateOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 1044, 0, 0, 0, 0) |
| 544 | OPTION(1, 1407 /* -x86-br-merging-ccmp-bias */, anonymous_12, SeparateOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 1433, 0, 0, 0, 0) |
| 545 | OPTION(1, 1537 /* -x86-br-merging-likely-bias */, anonymous_13, SeparateOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 1565, 0, 0, 0, 0) |
| 546 | OPTION(1, 1955 /* -x86-br-merging-unlikely-bias */, anonymous_14, SeparateOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 1985, 0, 0, 0, 0) |
| 547 | OPTION(1, 2383 /* -x86-cmov-converter-force-all */, anonymous_4, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 2413, 0, 0, 0, 0) |
| 548 | OPTION(1, 2443 /* -x86-cmov-converter-force-mem-operand */, anonymous_5, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 2481, 0, 0, 0, 0) |
| 549 | OPTION(1, 2542 /* -x86-cmov-converter-threshold */, anonymous_6, SeparateOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 2572, 0, 0, 0, 0) |
| 550 | OPTION(1, 2616 /* -x86-cmov-converter */, anonymous_3, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 2636, 0, 0, 0, 0) |
| 551 | OPTION(1, 2679 /* -x86-disable-avoid-SFB */, anonymous_0, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 2702, 0, 0, 0, 0) |
| 552 | OPTION(1, 2745 /* -x86-disable-regalloc-hints-for-ndd */, anonymous_33, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 2781, 0, 0, 0, 0) |
| 553 | OPTION(1, 2831 /* -x86-early-ifcvt */, anonymous_48, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 2848, 0, 0, 0, 0) |
| 554 | OPTION(1, 2882 /* -x86-enable-apx-for-relocation */, anonymous_49, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 2913, 0, 0, 0, 0) |
| 555 | OPTION(1, 3000 /* -x86-experimental-pref-innermost-loop-alignment */, anonymous_15, SeparateOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 3048, 0, 0, 0, 0) |
| 556 | OPTION(1, 3231 /* -x86-indirect-branch-tracking */, anonymous_16, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 3261, 0, 0, 0, 0) |
| 557 | OPTION(1, 3302 /* -x86-lvi-load-dot-only */, anonymous_25, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 3325, 0, 0, 0, 0) |
| 558 | OPTION(1, 3423 /* -x86-lvi-load-dot-verify */, anonymous_26, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 3448, 0, 0, 0, 0) |
| 559 | OPTION(1, 3558 /* -x86-lvi-load-dot */, anonymous_24, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 3576, 0, 0, 0, 0) |
| 560 | OPTION(1, 3644 /* -x86-lvi-load-no-cbranch */, anonymous_27, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 3669, 0, 0, 0, 0) |
| 561 | OPTION(1, 3779 /* -x86-lvi-load-opt-plugin */, anonymous_28, SeparateOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 3804, 0, 0, 0, 0) |
| 562 | OPTION(1, 3850 /* -x86-machine-combiner */, anonymous_50, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 3872, 0, 0, 0, 0) |
| 563 | OPTION(1, 3905 /* -x86-max-nf-conversions-for-cmp-reuse */, anonymous_19, SeparateOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 3943, 0, 0, 0, 0) |
| 564 | OPTION(1, 4053 /* -x86-promote-anyext-load */, anonymous_10, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 4078, 0, 0, 0, 0) |
| 565 | OPTION(1, 4129 /* -x86-seses-enable-without-lvi-cfi */, anonymous_37, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 4163, 0, 0, 0, 0) |
| 566 | OPTION(1, 4308 /* -x86-seses-omit-branch-lfences */, anonymous_38, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 4339, 0, 0, 0, 0) |
| 567 | OPTION(1, 4383 /* -x86-seses-one-lfence-per-bb */, anonymous_39, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 4412, 0, 0, 0, 0) |
| 568 | OPTION(1, 4480 /* -x86-seses-only-lfence-non-const */, anonymous_40, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 4513, 0, 0, 0, 0) |
| 569 | OPTION(1, 4663 /* -x86-setjmp-csr-warning-threshold */, anonymous_34, SeparateOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 4697, 0, 0, 0, 0) |
| 570 | OPTION(1, 4800 /* -x86-sfb-inspection-limit */, anonymous_1, SeparateOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 4826, 0, 0, 0, 0) |
| 571 | OPTION(1, 4902 /* -x86-slh-fence-call-and-ret */, anonymous_41, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 4930, 0, 0, 0, 0) |
| 572 | OPTION(1, 5033 /* -x86-slh-indirect */, anonymous_42, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 5051, 0, 0, 0, 0) |
| 573 | OPTION(1, 5205 /* -x86-slh-ip */, anonymous_43, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 5217, 0, 0, 0, 0) |
| 574 | OPTION(1, 5325 /* -x86-slh-lfence */, anonymous_44, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 5341, 0, 0, 0, 0) |
| 575 | OPTION(1, 5467 /* -x86-slh-loads */, anonymous_45, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 5482, 0, 0, 0, 0) |
| 576 | OPTION(1, 5560 /* -x86-slh-post-load */, anonymous_46, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 5579, 0, 0, 0, 0) |
| 577 | OPTION(1, 5720 /* -x86-speculative-load-hardening */, anonymous_47, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 5752, 0, 0, 0, 0) |
| 578 | OPTION(1, 5792 /* -x86-tile-ra */, anonymous_51, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 5805, 0, 0, 0, 0) |
| 579 | OPTION(1, 5846 /* -x86-use-base-pointer */, anonymous_35, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 5868, 0, 0, 0, 0) |
| 580 | OPTION(1, 5922 /* -x86-use-fsrm-for-memcpy */, anonymous_36, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 5947, 0, 0, 0, 0) |
| 581 | OPTION(1, 5989 /* -x86-use-vzeroupper */, anonymous_17, FlagOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 6009, 0, 0, 0, 0) |
| 582 | OPTION(1, 6048 /* -x86-wineh-unwindv2-force-mode */, anonymous_52, SeparateOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 6079, 0, 0, 0, 0) |
| 583 | OPTION(1, 6130 /* -x86-wineh-unwindv2-instruction-count-threshold */, anonymous_53, SeparateOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 6178, 0, 0, 0, 0) |
| 584 | OPTION(1, 6263 /* -x86-wineh-unwindv2-unwind-codes-threshold */, anonymous_54, SeparateOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 6306, 0, 0, 0, 0) |
| 585 | OPTION(1, 6377 /* -x86-wineh-unwindv3-instr-avg-size */, anonymous_55, SeparateOrEq, INVALID, INVALID, 0, 0, static_cast<unsigned>(DefaultVis), 0, 6412, 0, 0, 0, 0) |
| 586 | #endif // OPTION |
| 587 | |
| 588 | #ifdef SIMPLE_ENUM_VALUE_TABLE |
| 589 | |
| 590 | struct SimpleEnumValue { |
| 591 | const char *Name; |
| 592 | unsigned Value; |
| 593 | }; |
| 594 | |
| 595 | struct SimpleEnumValueTable { |
| 596 | const SimpleEnumValue *Table; |
| 597 | unsigned Size; |
| 598 | }; |
| 599 | static const SimpleEnumValueTable SimpleEnumValueTables[] = {}; |
| 600 | static const unsigned SimpleEnumValueTablesSize = std::size(SimpleEnumValueTables); |
| 601 | #endif // SIMPLE_ENUM_VALUE_TABLE |
| 602 | |