1//===- PPC.cpp ------------------------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "InputFiles.h"
10#include "OutputSections.h"
11#include "RelocScan.h"
12#include "Symbols.h"
13#include "SyntheticSections.h"
14#include "Target.h"
15#include "Thunks.h"
16
17using namespace llvm;
18using namespace llvm::support::endian;
19using namespace llvm::ELF;
20using namespace lld;
21using namespace lld::elf;
22
23// Undefine the macro predefined by GCC powerpc32.
24#undef PPC
25
26namespace {
27class PPC final : public TargetInfo {
28public:
29 PPC(Ctx &);
30 void initTargetSpecificSections() override;
31 RelExpr getRelExpr(RelType type, const Symbol &s,
32 const uint8_t *loc) const override;
33 RelType getDynRel(RelType type) const override;
34 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override;
35 void writeGotHeader(uint8_t *buf) const override;
36 void writePltHeader(uint8_t *buf) const override {
37 llvm_unreachable("should call writePPC32GlinkSection() instead");
38 }
39 void writePlt(uint8_t *buf, const Symbol &sym,
40 uint64_t pltEntryAddr) const override {
41 llvm_unreachable("should call writePPC32GlinkSection() instead");
42 }
43 void writeIplt(uint8_t *buf, const Symbol &sym,
44 uint64_t pltEntryAddr) const override;
45 void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
46 template <class ELFT, class RelTy>
47 void scanSectionImpl(InputSectionBase &, Relocs<RelTy>);
48 void scanSection(InputSectionBase &) override;
49 bool needsThunk(RelExpr expr, RelType relocType, const InputFile *file,
50 uint64_t branchAddr, const Symbol &s,
51 int64_t a) const override;
52 uint32_t getThunkSectionSpacing() const override;
53 bool inBranchRange(RelType type, uint64_t src, uint64_t dst) const override;
54 void relocate(uint8_t *loc, const Relocation &rel,
55 uint64_t val) const override;
56private:
57 void relaxTlsGdToIe(uint8_t *loc, const Relocation &rel, uint64_t val) const;
58 void relaxTlsGdToLe(uint8_t *loc, const Relocation &rel, uint64_t val) const;
59 void relaxTlsLdToLe(uint8_t *loc, const Relocation &rel, uint64_t val) const;
60 void relaxTlsIeToLe(uint8_t *loc, const Relocation &rel, uint64_t val) const;
61};
62
63// Used to compute outSecOff of .got2 in each object file. This is needed to
64// synthesize PLT entries for PPC32 Secure PLT ABI.
65struct Got2Section : SyntheticSection {
66 Got2Section(Ctx &ctx)
67 : SyntheticSection(ctx, ".got2", SHT_PROGBITS, SHF_ALLOC | SHF_WRITE, 4) {
68 }
69 bool isNeeded() const override;
70 size_t getSize() const override { return 0; }
71 void writeTo(uint8_t *buf) override {}
72 void finalizeContents() override;
73};
74} // namespace
75
76static uint16_t lo(uint32_t v) { return v; }
77static uint16_t ha(uint32_t v) { return (v + 0x8000) >> 16; }
78
79static uint32_t readFromHalf16(Ctx &ctx, const uint8_t *loc) {
80 return read32(ctx, p: ctx.arg.isLE ? loc : loc - 2);
81}
82
83static void writeFromHalf16(Ctx &ctx, uint8_t *loc, uint32_t insn) {
84 write32(ctx, p: ctx.arg.isLE ? loc : loc - 2, v: insn);
85}
86
87void elf::writePPC32GlinkSection(Ctx &ctx, uint8_t *buf, size_t numEntries) {
88 // Create canonical PLT entries for non-PIE code. Compilers don't generate
89 // non-GOT-non-PLT relocations referencing external functions for -fpie/-fPIE.
90 uint32_t glink = ctx.in.plt->getVA(); // VA of .glink
91 if (!ctx.arg.isPic) {
92 for (const Symbol *sym :
93 cast<PPC32GlinkSection>(Val&: *ctx.in.plt).canonical_plts) {
94 writePPC32PltCallStub(ctx, buf, gotPltVA: sym->getGotPltVA(ctx), file: nullptr, addend: 0);
95 buf += 16;
96 glink += 16;
97 }
98 }
99
100 // On PPC Secure PLT ABI, bl foo@plt jumps to a call stub, which loads an
101 // absolute address from a specific .plt slot (usually called .got.plt on
102 // other targets) and jumps there.
103 //
104 // a) With immediate binding (BIND_NOW), the .plt entry is resolved at load
105 // time. The .glink section is not used.
106 // b) With lazy binding, the .plt entry points to a `b PLTresolve`
107 // instruction in .glink, filled in by PPC::writeGotPlt().
108
109 // Write N `b PLTresolve` first.
110 for (size_t i = 0; i != numEntries; ++i)
111 write32(ctx, p: buf + 4 * i, v: 0x48000000 | 4 * (numEntries - i));
112 buf += 4 * numEntries;
113
114 // Then write PLTresolve(), which has two forms: PIC and non-PIC. PLTresolve()
115 // computes the PLT index (by computing the distance from the landing b to
116 // itself) and calls _dl_runtime_resolve() (in glibc).
117 uint32_t got = ctx.in.got->getVA();
118 const uint8_t *end = buf + 64;
119 if (ctx.arg.isPic) {
120 uint32_t afterBcl = 4 * ctx.in.plt->getNumEntries() + 12;
121 uint32_t gotBcl = got + 4 - (glink + afterBcl);
122 write32(ctx, p: buf + 0,
123 v: 0x3d6b0000 | ha(v: afterBcl)); // addis r11,r11,1f-glink@ha
124 write32(ctx, p: buf + 4, v: 0x7c0802a6); // mflr r0
125 write32(ctx, p: buf + 8, v: 0x429f0005); // bcl 20,30,.+4
126 write32(ctx, p: buf + 12,
127 v: 0x396b0000 | lo(v: afterBcl)); // 1: addi r11,r11,1b-glink@l
128 write32(ctx, p: buf + 16, v: 0x7d8802a6); // mflr r12
129 write32(ctx, p: buf + 20, v: 0x7c0803a6); // mtlr r0
130 write32(ctx, p: buf + 24, v: 0x7d6c5850); // sub r11,r11,r12
131 write32(ctx, p: buf + 28, v: 0x3d8c0000 | ha(v: gotBcl)); // addis 12,12,GOT+4-1b@ha
132 if (ha(v: gotBcl) == ha(v: gotBcl + 4)) {
133 write32(ctx, p: buf + 32,
134 v: 0x800c0000 | lo(v: gotBcl)); // lwz r0,r12,GOT+4-1b@l(r12)
135 write32(ctx, p: buf + 36,
136 v: 0x818c0000 | lo(v: gotBcl + 4)); // lwz r12,r12,GOT+8-1b@l(r12)
137 } else {
138 write32(ctx, p: buf + 32,
139 v: 0x840c0000 | lo(v: gotBcl)); // lwzu r0,r12,GOT+4-1b@l(r12)
140 write32(ctx, p: buf + 36, v: 0x818c0000 | 4); // lwz r12,r12,4(r12)
141 }
142 write32(ctx, p: buf + 40, v: 0x7c0903a6); // mtctr 0
143 write32(ctx, p: buf + 44, v: 0x7c0b5a14); // add r0,11,11
144 write32(ctx, p: buf + 48, v: 0x7d605a14); // add r11,0,11
145 write32(ctx, p: buf + 52, v: 0x4e800420); // bctr
146 buf += 56;
147 } else {
148 write32(ctx, p: buf + 0, v: 0x3d800000 | ha(v: got + 4)); // lis r12,GOT+4@ha
149 write32(ctx, p: buf + 4, v: 0x3d6b0000 | ha(v: -glink)); // addis r11,r11,-glink@ha
150 if (ha(v: got + 4) == ha(v: got + 8))
151 write32(ctx, p: buf + 8, v: 0x800c0000 | lo(v: got + 4)); // lwz r0,GOT+4@l(r12)
152 else
153 write32(ctx, p: buf + 8, v: 0x840c0000 | lo(v: got + 4)); // lwzu r0,GOT+4@l(r12)
154 write32(ctx, p: buf + 12, v: 0x396b0000 | lo(v: -glink)); // addi r11,r11,-glink@l
155 write32(ctx, p: buf + 16, v: 0x7c0903a6); // mtctr r0
156 write32(ctx, p: buf + 20, v: 0x7c0b5a14); // add r0,r11,r11
157 if (ha(v: got + 4) == ha(v: got + 8))
158 write32(ctx, p: buf + 24, v: 0x818c0000 | lo(v: got + 8)); // lwz r12,GOT+8@l(r12)
159 else
160 write32(ctx, p: buf + 24, v: 0x818c0000 | 4); // lwz r12,4(r12)
161 write32(ctx, p: buf + 28, v: 0x7d605a14); // add r11,r0,r11
162 write32(ctx, p: buf + 32, v: 0x4e800420); // bctr
163 buf += 36;
164 }
165
166 // Pad with nop. They should not be executed.
167 for (; buf < end; buf += 4)
168 write32(ctx, p: buf, v: 0x60000000);
169}
170
171PPC::PPC(Ctx &ctx) : TargetInfo(ctx) {
172 copyRel = R_PPC_COPY;
173 gotRel = R_PPC_GLOB_DAT;
174 pltRel = R_PPC_JMP_SLOT;
175 relativeRel = R_PPC_RELATIVE;
176 iRelativeRel = R_PPC_IRELATIVE;
177 symbolicRel = R_PPC_ADDR32;
178 gotHeaderEntriesNum = 3;
179 gotPltHeaderEntriesNum = 0;
180 pltHeaderSize = 0;
181 pltEntrySize = 4;
182 ipltEntrySize = 16;
183
184 needsThunks = true;
185
186 tlsModuleIndexRel = R_PPC_DTPMOD32;
187 tlsOffsetRel = R_PPC_DTPREL32;
188 tlsGotRel = R_PPC_TPREL32;
189
190 defaultMaxPageSize = 65536;
191 defaultImageBase = 0x10000000;
192
193 write32(ctx, p: trapInstr.data(), v: 0x7fe00008);
194}
195
196void PPC::initTargetSpecificSections() {
197 ctx.in.ppc32Got2 = std::make_unique<Got2Section>(args&: ctx);
198 ctx.inputSections.push_back(Elt: ctx.in.ppc32Got2.get());
199}
200
201void PPC::writeIplt(uint8_t *buf, const Symbol &sym,
202 uint64_t /*pltEntryAddr*/) const {
203 // In -pie or -shared mode, assume r30 points to .got2+0x8000, and use a
204 // .got2.plt_pic32. thunk.
205 writePPC32PltCallStub(ctx, buf, gotPltVA: sym.getGotPltVA(ctx), file: sym.file, addend: 0x8000);
206}
207
208void PPC::writeGotHeader(uint8_t *buf) const {
209 // _GLOBAL_OFFSET_TABLE_[0] = _DYNAMIC
210 // glibc stores _dl_runtime_resolve in _GLOBAL_OFFSET_TABLE_[1],
211 // link_map in _GLOBAL_OFFSET_TABLE_[2].
212 write32(ctx, p: buf, v: ctx.mainPart->dynamic->getVA());
213}
214
215void PPC::writeGotPlt(uint8_t *buf, const Symbol &s) const {
216 // Address of the symbol resolver stub in .glink .
217 write32(ctx, p: buf,
218 v: ctx.in.plt->getVA() + ctx.in.plt->headerSize + 4 * s.getPltIdx(ctx));
219}
220
221bool PPC::needsThunk(RelExpr expr, RelType type, const InputFile *file,
222 uint64_t branchAddr, const Symbol &s, int64_t a) const {
223 if (type != R_PPC_LOCAL24PC && type != R_PPC_REL24 && type != R_PPC_PLTREL24)
224 return false;
225 if (s.isInPlt(ctx))
226 return true;
227 if (s.isUndefWeak())
228 return false;
229 return !PPC::inBranchRange(type, src: branchAddr, dst: s.getVA(ctx, addend: a));
230}
231
232uint32_t PPC::getThunkSectionSpacing() const { return 0x2000000; }
233
234bool PPC::inBranchRange(RelType type, uint64_t src, uint64_t dst) const {
235 uint64_t offset = dst - src;
236 if (type == R_PPC_LOCAL24PC || type == R_PPC_REL24 || type == R_PPC_PLTREL24)
237 return isInt<26>(x: offset);
238 llvm_unreachable("unsupported relocation type used in branch");
239}
240
241// Only needed to support relocations used by relocateNonAlloc and
242// preprocessRelocs.
243RelExpr PPC::getRelExpr(RelType type, const Symbol &s,
244 const uint8_t *loc) const {
245 switch (type) {
246 case R_PPC_NONE:
247 return R_NONE;
248 case R_PPC_ADDR32:
249 return R_ABS;
250 case R_PPC_DTPREL32:
251 return R_DTPREL;
252 case R_PPC_REL32:
253 return R_PC;
254 default:
255 Err(ctx) << getErrorLoc(ctx, loc) << "unknown relocation (" << type.v
256 << ") against symbol " << &s;
257 return R_NONE;
258 }
259}
260
261RelType PPC::getDynRel(RelType type) const {
262 if (type == R_PPC_ADDR32)
263 return type;
264 return R_PPC_NONE;
265}
266
267int64_t PPC::getImplicitAddend(const uint8_t *buf, RelType type) const {
268 switch (type) {
269 case R_PPC_NONE:
270 case R_PPC_GLOB_DAT:
271 case R_PPC_JMP_SLOT:
272 return 0;
273 case R_PPC_ADDR32:
274 case R_PPC_REL32:
275 case R_PPC_RELATIVE:
276 case R_PPC_IRELATIVE:
277 case R_PPC_DTPMOD32:
278 case R_PPC_DTPREL32:
279 case R_PPC_TPREL32:
280 return SignExtend64<32>(x: read32(ctx, p: buf));
281 default:
282 InternalErr(ctx, buf) << "cannot read addend for relocation " << type;
283 return 0;
284 }
285}
286
287template <class ELFT, class RelTy>
288void PPC::scanSectionImpl(InputSectionBase &sec, Relocs<RelTy> rels) {
289 RelocScan rs(ctx, &sec);
290 sec.relocations.reserve(N: rels.size());
291 for (auto it = rels.begin(); it != rels.end(); ++it) {
292 const RelTy &rel = *it;
293 uint32_t symIdx = rel.getSymbol(false);
294 Symbol &sym = sec.getFile<ELFT>()->getSymbol(symIdx);
295 uint64_t offset = rel.r_offset;
296 RelType type = rel.getType(false);
297 if (sym.isUndefined() && symIdx != 0 &&
298 rs.maybeReportUndefined(sym&: cast<Undefined>(Val&: sym), offset))
299 continue;
300 int64_t addend = rs.getAddend<ELFT>(rel, type);
301 RelExpr expr;
302 // Relocation types that only need a RelExpr set `expr` and break out of
303 // the switch to reach rs.process(). Types that need special handling
304 // (fast-path helpers, TLS) call a handler and use `continue`.
305 switch (type) {
306 case R_PPC_NONE:
307 continue;
308 // Absolute relocations:
309 case R_PPC_ADDR16_HA:
310 case R_PPC_ADDR16_HI:
311 case R_PPC_ADDR16_LO:
312 case R_PPC_ADDR24:
313 case R_PPC_ADDR32:
314 expr = R_ABS;
315 break;
316
317 // PC-relative relocations:
318 case R_PPC_REL14:
319 case R_PPC_REL32:
320 case R_PPC_REL16_LO:
321 case R_PPC_REL16_HI:
322 case R_PPC_REL16_HA:
323 rs.processR_PC(type, offset, addend, sym);
324 continue;
325
326 // GOT-generating relocation:
327 case R_PPC_GOT16:
328 expr = R_GOT_OFF;
329 break;
330
331 // PLT-generating relocations:
332 case R_PPC_LOCAL24PC:
333 case R_PPC_REL24:
334 rs.processR_PLT_PC(type, offset, addend, sym);
335 continue;
336 case R_PPC_PLTREL24:
337 ctx.in.got->hasGotOffRel.store(i: true, m: std::memory_order_relaxed);
338 if (LLVM_UNLIKELY(sym.isGnuIFunc())) {
339 rs.process(expr: RE_PPC32_PLTREL, type, offset, sym, addend);
340 } else if (sym.isPreemptible) {
341 sym.setFlags(NEEDS_PLT);
342 sec.addReloc(r: {.expr: RE_PPC32_PLTREL, .type: type, .offset: offset, .addend: addend, .sym: &sym});
343 } else {
344 // The 0x8000 bit of r_addend selects call stub type; mask it for direct
345 // calls.
346 addend &= ~0x8000;
347 rs.processAux(expr: R_PC, type, offset, sym, addend);
348 }
349 continue;
350
351 // TLS relocations:
352
353 // TLS LE:
354 case R_PPC_TPREL16:
355 case R_PPC_TPREL16_HA:
356 case R_PPC_TPREL16_LO:
357 case R_PPC_TPREL16_HI:
358 if (rs.checkTlsLe(offset, sym, type))
359 continue;
360 expr = R_TPREL;
361 break;
362
363 // TLS IE:
364 case R_PPC_GOT_TPREL16:
365 rs.handleTlsIe(ieExpr: R_GOT_OFF, type, offset, addend, sym);
366 continue;
367 case R_PPC_TLS:
368 if (!ctx.arg.shared && !sym.isPreemptible)
369 sec.addReloc(r: {.expr: R_TPREL, .type: type, .offset: offset, .addend: addend, .sym: &sym});
370 continue;
371
372 // TLS GD:
373 case R_PPC_GOT_TLSGD16:
374 rs.handleTlsGd(sharedExpr: R_TLSGD_GOT, ieExpr: R_GOT_OFF, leExpr: R_TPREL, type, offset, addend,
375 sym);
376 continue;
377 case R_PPC_TLSGD:
378 case R_PPC_TLSLD:
379 if (!ctx.arg.shared) {
380 sec.addReloc(r: {.expr: sym.isPreemptible ? R_GOT_OFF : R_TPREL, .type: type, .offset: offset,
381 .addend: addend, .sym: &sym});
382 ++it; // Skip REL24
383 }
384 continue;
385
386 // TLS LD:
387 case R_PPC_GOT_TLSLD16:
388 rs.handleTlsLd(sharedExpr: R_TLSLD_GOT, type, offset, addend, sym);
389 continue;
390 case R_PPC_DTPREL16:
391 case R_PPC_DTPREL16_HA:
392 case R_PPC_DTPREL16_HI:
393 case R_PPC_DTPREL16_LO:
394 case R_PPC_DTPREL32:
395 sec.addReloc(r: {.expr: R_DTPREL, .type: type, .offset: offset, .addend: addend, .sym: &sym});
396 continue;
397
398 default:
399 Err(ctx) << getErrorLoc(ctx, loc: sec.content().data() + offset)
400 << "unknown relocation (" << type.v << ") against symbol "
401 << &sym;
402 continue;
403 }
404 rs.process(expr, type, offset, sym, addend);
405 }
406}
407
408void PPC::scanSection(InputSectionBase &sec) {
409 if (ctx.arg.isLE)
410 elf::scanSection1<PPC, ELF32LE>(target&: *this, sec);
411 else
412 elf::scanSection1<PPC, ELF32BE>(target&: *this, sec);
413}
414
415static std::pair<RelType, uint64_t> fromDTPREL(RelType type, uint64_t val) {
416 uint64_t dtpBiasedVal = val - 0x8000;
417 switch (type) {
418 case R_PPC_DTPREL16:
419 return {R_PPC64_ADDR16, dtpBiasedVal};
420 case R_PPC_DTPREL16_HA:
421 return {R_PPC_ADDR16_HA, dtpBiasedVal};
422 case R_PPC_DTPREL16_HI:
423 return {R_PPC_ADDR16_HI, dtpBiasedVal};
424 case R_PPC_DTPREL16_LO:
425 return {R_PPC_ADDR16_LO, dtpBiasedVal};
426 case R_PPC_DTPREL32:
427 return {R_PPC_ADDR32, dtpBiasedVal};
428 default:
429 return {type, val};
430 }
431}
432
433void PPC::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
434 RelType newType;
435 std::tie(args&: newType, args&: val) = fromDTPREL(type: rel.type, val);
436 switch (newType) {
437 case R_PPC_ADDR16:
438 checkIntUInt(ctx, loc, v: val, n: 16, rel);
439 write16(ctx, p: loc, v: val);
440 break;
441 case R_PPC_GOT16:
442 case R_PPC_TPREL16:
443 checkInt(ctx, loc, v: val, n: 16, rel);
444 write16(ctx, p: loc, v: val);
445 break;
446 case R_PPC_GOT_TLSGD16:
447 if (rel.expr == R_TPREL)
448 relaxTlsGdToLe(loc, rel, val);
449 else if (rel.expr == R_GOT_OFF)
450 relaxTlsGdToIe(loc, rel, val);
451 else {
452 checkInt(ctx, loc, v: val, n: 16, rel);
453 write16(ctx, p: loc, v: val);
454 }
455 break;
456 case R_PPC_GOT_TLSLD16:
457 if (rel.expr == R_TPREL)
458 relaxTlsLdToLe(loc, rel, val);
459 else {
460 checkInt(ctx, loc, v: val, n: 16, rel);
461 write16(ctx, p: loc, v: val);
462 }
463 break;
464 case R_PPC_GOT_TPREL16:
465 if (rel.expr == R_TPREL)
466 relaxTlsIeToLe(loc, rel, val);
467 else {
468 checkInt(ctx, loc, v: val, n: 16, rel);
469 write16(ctx, p: loc, v: val);
470 }
471 break;
472 case R_PPC_ADDR16_HA:
473 case R_PPC_DTPREL16_HA:
474 case R_PPC_GOT_TLSGD16_HA:
475 case R_PPC_GOT_TLSLD16_HA:
476 case R_PPC_GOT_TPREL16_HA:
477 case R_PPC_REL16_HA:
478 case R_PPC_TPREL16_HA:
479 write16(ctx, p: loc, v: ha(v: val));
480 break;
481 case R_PPC_ADDR16_HI:
482 case R_PPC_DTPREL16_HI:
483 case R_PPC_GOT_TLSGD16_HI:
484 case R_PPC_GOT_TLSLD16_HI:
485 case R_PPC_GOT_TPREL16_HI:
486 case R_PPC_REL16_HI:
487 case R_PPC_TPREL16_HI:
488 write16(ctx, p: loc, v: val >> 16);
489 break;
490 case R_PPC_ADDR16_LO:
491 case R_PPC_DTPREL16_LO:
492 case R_PPC_GOT_TLSGD16_LO:
493 case R_PPC_GOT_TLSLD16_LO:
494 case R_PPC_GOT_TPREL16_LO:
495 case R_PPC_REL16_LO:
496 case R_PPC_TPREL16_LO:
497 write16(ctx, p: loc, v: val);
498 break;
499 case R_PPC_ADDR32:
500 case R_PPC_REL32:
501 write32(ctx, p: loc, v: val);
502 break;
503 case R_PPC_REL14: {
504 uint32_t mask = 0x0000FFFC;
505 checkInt(ctx, loc, v: val, n: 16, rel);
506 checkAlignment(ctx, loc, v: val, n: 4, rel);
507 write32(ctx, p: loc, v: (read32(ctx, p: loc) & ~mask) | (val & mask));
508 break;
509 }
510 case R_PPC_ADDR24:
511 case R_PPC_REL24:
512 case R_PPC_LOCAL24PC:
513 case R_PPC_PLTREL24: {
514 uint32_t mask = 0x03FFFFFC;
515 checkInt(ctx, loc, v: val, n: 26, rel);
516 checkAlignment(ctx, loc, v: val, n: 4, rel);
517 write32(ctx, p: loc, v: (read32(ctx, p: loc) & ~mask) | (val & mask));
518 break;
519 }
520 case R_PPC_TLSGD:
521 if (rel.expr == R_TPREL)
522 relaxTlsGdToLe(loc, rel, val);
523 else if (rel.expr == R_GOT_OFF)
524 relaxTlsGdToIe(loc, rel, val);
525 break;
526 case R_PPC_TLSLD:
527 if (rel.expr == R_TPREL)
528 relaxTlsLdToLe(loc, rel, val);
529 break;
530 case R_PPC_TLS:
531 if (rel.expr == R_TPREL)
532 relaxTlsIeToLe(loc, rel, val);
533 break;
534 default:
535 llvm_unreachable("unknown relocation");
536 }
537}
538
539void PPC::relaxTlsGdToIe(uint8_t *loc, const Relocation &rel,
540 uint64_t val) const {
541 switch (rel.type) {
542 case R_PPC_GOT_TLSGD16: {
543 // addi rT, rA, x@got@tlsgd --> lwz rT, x@got@tprel(rA)
544 uint32_t insn = readFromHalf16(ctx, loc);
545 writeFromHalf16(ctx, loc, insn: 0x80000000 | (insn & 0x03ff0000));
546 relocateNoSym(loc, type: R_PPC_GOT_TPREL16, val);
547 break;
548 }
549 case R_PPC_TLSGD:
550 // bl __tls_get_addr(x@tldgd) --> add r3, r3, r2
551 write32(ctx, p: loc, v: 0x7c631214);
552 break;
553 default:
554 llvm_unreachable("unsupported relocation for TLS GD to IE relaxation");
555 }
556}
557
558void PPC::relaxTlsGdToLe(uint8_t *loc, const Relocation &rel,
559 uint64_t val) const {
560 switch (rel.type) {
561 case R_PPC_GOT_TLSGD16:
562 // addi r3, r31, x@got@tlsgd --> addis r3, r2, x@tprel@ha
563 writeFromHalf16(ctx, loc, insn: 0x3c620000 | ha(v: val));
564 break;
565 case R_PPC_TLSGD:
566 // bl __tls_get_addr(x@tldgd) --> add r3, r3, x@tprel@l
567 write32(ctx, p: loc, v: 0x38630000 | lo(v: val));
568 break;
569 default:
570 llvm_unreachable("unsupported relocation for TLS GD to LE relaxation");
571 }
572}
573
574void PPC::relaxTlsLdToLe(uint8_t *loc, const Relocation &rel,
575 uint64_t val) const {
576 switch (rel.type) {
577 case R_PPC_GOT_TLSLD16:
578 // addi r3, rA, x@got@tlsgd --> addis r3, r2, 0
579 writeFromHalf16(ctx, loc, insn: 0x3c620000);
580 break;
581 case R_PPC_TLSLD:
582 // r3+x@dtprel computes r3+x-0x8000, while we want it to compute r3+x@tprel
583 // = r3+x-0x7000, so add 4096 to r3.
584 // bl __tls_get_addr(x@tlsld) --> addi r3, r3, 4096
585 write32(ctx, p: loc, v: 0x38631000);
586 break;
587 default:
588 llvm_unreachable("unsupported relocation for TLS LD to LE relaxation");
589 }
590}
591
592void PPC::relaxTlsIeToLe(uint8_t *loc, const Relocation &rel,
593 uint64_t val) const {
594 switch (rel.type) {
595 case R_PPC_GOT_TPREL16: {
596 // lwz rT, x@got@tprel(rA) --> addis rT, r2, x@tprel@ha
597 uint32_t rt = readFromHalf16(ctx, loc) & 0x03e00000;
598 writeFromHalf16(ctx, loc, insn: 0x3c020000 | rt | ha(v: val));
599 break;
600 }
601 case R_PPC_TLS: {
602 uint32_t insn = read32(ctx, p: loc);
603 if (insn >> 26 != 31)
604 ErrAlways(ctx) << "unrecognized instruction for IE to LE R_PPC_TLS";
605 // addi rT, rT, x@tls --> addi rT, rT, x@tprel@l
606 unsigned secondaryOp = (read32(ctx, p: loc) & 0x000007fe) >> 1;
607 uint32_t dFormOp = getPPCDFormOp(secondaryOp);
608 if (dFormOp == 0) { // Expecting a DS-Form instruction.
609 dFormOp = getPPCDSFormOp(secondaryOp);
610 if (dFormOp == 0)
611 ErrAlways(ctx) << "unrecognized instruction for IE to LE R_PPC_TLS";
612 }
613 write32(ctx, p: loc, v: (dFormOp | (insn & 0x03ff0000) | lo(v: val)));
614 break;
615 }
616 default:
617 llvm_unreachable("unsupported relocation for TLS IE to LE relaxation");
618 }
619}
620
621void elf::setPPCTargetInfo(Ctx &ctx) { ctx.target.reset(p: new PPC(ctx)); }
622
623bool Got2Section::isNeeded() const {
624 for (SectionCommand *cmd : getParent()->commands)
625 if (auto *isd = dyn_cast<InputSectionDescription>(Val: cmd))
626 for (InputSection *isec : isd->sections)
627 if (isec != this)
628 return true;
629 return false;
630}
631
632void Got2Section::finalizeContents() {
633 // PPC32 may create multiple GOT sections for -fPIC/-fPIE, one per file in
634 // .got2 . This function computes outSecOff of each .got2 to be used in
635 // PPC32PltCallStub::writeTo(). The purpose of this empty synthetic section is
636 // to collect input sections named ".got2".
637 for (SectionCommand *cmd : getParent()->commands)
638 if (auto *isd = dyn_cast<InputSectionDescription>(Val: cmd)) {
639 for (InputSection *isec : isd->sections) {
640 // isec->file may be nullptr for MergeSyntheticSection.
641 if (isec != this && isec->file)
642 isec->file->ppc32Got2 = isec;
643 }
644 }
645}
646