1//===- PPC.cpp ------------------------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "InputFiles.h"
10#include "OutputSections.h"
11#include "RelocScan.h"
12#include "Symbols.h"
13#include "SyntheticSections.h"
14#include "Target.h"
15#include "Thunks.h"
16
17using namespace llvm;
18using namespace llvm::support::endian;
19using namespace llvm::ELF;
20using namespace lld;
21using namespace lld::elf;
22
23// Undefine the macro predefined by GCC powerpc32.
24#undef PPC
25
26namespace {
27class PPC final : public TargetInfo {
28public:
29 PPC(Ctx &);
30 void initTargetSpecificSections() override;
31 RelExpr getRelExpr(RelType type, const Symbol &s,
32 const uint8_t *loc) const override;
33 RelType getDynRel(RelType type) const override;
34 int64_t getImplicitAddend(const uint8_t *buf, RelType type) const override;
35 void writeGotHeader(uint8_t *buf) const override;
36 void writePltHeader(uint8_t *buf) const override {
37 llvm_unreachable("should call writePPC32GlinkSection() instead");
38 }
39 void writePlt(uint8_t *buf, const Symbol &sym,
40 uint64_t pltEntryAddr) const override {
41 llvm_unreachable("should call writePPC32GlinkSection() instead");
42 }
43 void writeIplt(uint8_t *buf, const Symbol &sym,
44 uint64_t pltEntryAddr) const override;
45 void writeGotPlt(uint8_t *buf, const Symbol &s) const override;
46 template <class ELFT, class RelTy>
47 void scanSectionImpl(InputSectionBase &, Relocs<RelTy>, unsigned shard);
48 void scanSection(InputSectionBase &, unsigned shard) override;
49 bool needsThunk(RelExpr expr, RelType relocType, const InputFile *file,
50 uint64_t branchAddr, const Symbol &s,
51 int64_t a) const override;
52 uint32_t getThunkSectionSpacing() const override;
53 bool inBranchRange(RelType type, uint64_t src, uint64_t dst) const override;
54 void relocate(uint8_t *loc, const Relocation &rel,
55 uint64_t val) const override;
56private:
57 void relaxTlsGdToIe(uint8_t *loc, const Relocation &rel, uint64_t val) const;
58 void relaxTlsGdToLe(uint8_t *loc, const Relocation &rel, uint64_t val) const;
59 void relaxTlsLdToLe(uint8_t *loc, const Relocation &rel, uint64_t val) const;
60 void relaxTlsIeToLe(uint8_t *loc, const Relocation &rel, uint64_t val) const;
61};
62
63// Used to compute outSecOff of .got2 in each object file. This is needed to
64// synthesize PLT entries for PPC32 Secure PLT ABI.
65struct Got2Section : SyntheticSection {
66 Got2Section(Ctx &ctx)
67 : SyntheticSection(ctx, ".got2", SHT_PROGBITS, SHF_ALLOC | SHF_WRITE, 4) {
68 }
69 bool isNeeded() const override;
70 size_t getSize() const override { return 0; }
71 void writeTo(uint8_t *buf) override {}
72 void finalizeContents() override;
73};
74} // namespace
75
76static uint16_t lo(uint32_t v) { return v; }
77static uint16_t ha(uint32_t v) { return (v + 0x8000) >> 16; }
78
79static uint32_t readFromHalf16(Ctx &ctx, const uint8_t *loc) {
80 return read32(ctx, p: ctx.arg.isLE ? loc : loc - 2);
81}
82
83static void writeFromHalf16(Ctx &ctx, uint8_t *loc, uint32_t insn) {
84 write32(ctx, p: ctx.arg.isLE ? loc : loc - 2, v: insn);
85}
86
87void elf::writePPC32GlinkSection(Ctx &ctx, uint8_t *buf, size_t numEntries) {
88 // Create canonical PLT entries for non-PIE code. Compilers don't generate
89 // non-GOT-non-PLT relocations referencing external functions for -fpie/-fPIE.
90 uint32_t glink = ctx.in.plt->getVA(); // VA of .glink
91 if (!ctx.arg.isPic) {
92 for (const Symbol *sym :
93 cast<PPC32GlinkSection>(Val&: *ctx.in.plt).canonical_plts) {
94 writePPC32PltCallStub(ctx, buf, p: glink, gotPltVA: sym->getGotPltVA(ctx), file: nullptr, addend: 0);
95 buf += 16;
96 glink += 16;
97 }
98 }
99
100 // On PPC Secure PLT ABI, bl foo@plt jumps to a call stub, which loads an
101 // absolute address from a specific .plt slot (usually called .got.plt on
102 // other targets) and jumps there.
103 //
104 // a) With immediate binding (BIND_NOW), the .plt entry is resolved at load
105 // time. The .glink section is not used.
106 // b) With lazy binding, the .plt entry points to a `b PLTresolve`
107 // instruction in .glink, filled in by PPC::writeGotPlt().
108
109 // Write N `b PLTresolve` first.
110 for (size_t i = 0; i != numEntries; ++i)
111 write32(ctx, p: buf + 4 * i, v: 0x48000000 | 4 * (numEntries - i));
112 buf += 4 * numEntries;
113
114 // Then write PLTresolve(), which has two forms: PIC and non-PIC. PLTresolve()
115 // computes the PLT index (by computing the distance from the landing b to
116 // itself) and calls _dl_runtime_resolve() (in glibc).
117 uint32_t got = ctx.in.got->getVA();
118 const uint8_t *end = buf + 64;
119 if (ctx.arg.isPic) {
120 uint32_t afterBcl = 4 * ctx.in.plt->getNumEntries() + 12;
121 uint32_t gotBcl = got + 4 - (glink + afterBcl);
122 write32(ctx, p: buf + 0,
123 v: 0x3d6b0000 | ha(v: afterBcl)); // addis r11,r11,1f-glink@ha
124 write32(ctx, p: buf + 4, v: 0x7c0802a6); // mflr r0
125 write32(ctx, p: buf + 8, v: 0x429f0005); // bcl 20,30,.+4
126 write32(ctx, p: buf + 12,
127 v: 0x396b0000 | lo(v: afterBcl)); // 1: addi r11,r11,1b-glink@l
128 write32(ctx, p: buf + 16, v: 0x7d8802a6); // mflr r12
129 write32(ctx, p: buf + 20, v: 0x7c0803a6); // mtlr r0
130 write32(ctx, p: buf + 24, v: 0x7d6c5850); // sub r11,r11,r12
131 write32(ctx, p: buf + 28, v: 0x3d8c0000 | ha(v: gotBcl)); // addis 12,12,GOT+4-1b@ha
132 if (ha(v: gotBcl) == ha(v: gotBcl + 4)) {
133 write32(ctx, p: buf + 32,
134 v: 0x800c0000 | lo(v: gotBcl)); // lwz r0,r12,GOT+4-1b@l(r12)
135 write32(ctx, p: buf + 36,
136 v: 0x818c0000 | lo(v: gotBcl + 4)); // lwz r12,r12,GOT+8-1b@l(r12)
137 } else {
138 write32(ctx, p: buf + 32,
139 v: 0x840c0000 | lo(v: gotBcl)); // lwzu r0,r12,GOT+4-1b@l(r12)
140 write32(ctx, p: buf + 36, v: 0x818c0000 | 4); // lwz r12,r12,4(r12)
141 }
142 write32(ctx, p: buf + 40, v: 0x7c0903a6); // mtctr 0
143 write32(ctx, p: buf + 44, v: 0x7c0b5a14); // add r0,11,11
144 write32(ctx, p: buf + 48, v: 0x7d605a14); // add r11,0,11
145 write32(ctx, p: buf + 52, v: 0x4e800420); // bctr
146 buf += 56;
147 } else {
148 write32(ctx, p: buf + 0, v: 0x3d800000 | ha(v: got + 4)); // lis r12,GOT+4@ha
149 write32(ctx, p: buf + 4, v: 0x3d6b0000 | ha(v: -glink)); // addis r11,r11,-glink@ha
150 if (ha(v: got + 4) == ha(v: got + 8))
151 write32(ctx, p: buf + 8, v: 0x800c0000 | lo(v: got + 4)); // lwz r0,GOT+4@l(r12)
152 else
153 write32(ctx, p: buf + 8, v: 0x840c0000 | lo(v: got + 4)); // lwzu r0,GOT+4@l(r12)
154 write32(ctx, p: buf + 12, v: 0x396b0000 | lo(v: -glink)); // addi r11,r11,-glink@l
155 write32(ctx, p: buf + 16, v: 0x7c0903a6); // mtctr r0
156 write32(ctx, p: buf + 20, v: 0x7c0b5a14); // add r0,r11,r11
157 if (ha(v: got + 4) == ha(v: got + 8))
158 write32(ctx, p: buf + 24, v: 0x818c0000 | lo(v: got + 8)); // lwz r12,GOT+8@l(r12)
159 else
160 write32(ctx, p: buf + 24, v: 0x818c0000 | 4); // lwz r12,4(r12)
161 write32(ctx, p: buf + 28, v: 0x7d605a14); // add r11,r0,r11
162 write32(ctx, p: buf + 32, v: 0x4e800420); // bctr
163 buf += 36;
164 }
165
166 // Pad with nop. They should not be executed.
167 for (; buf < end; buf += 4)
168 write32(ctx, p: buf, v: 0x60000000);
169}
170
171PPC::PPC(Ctx &ctx) : TargetInfo(ctx) {
172 copyRel = R_PPC_COPY;
173 gotRel = R_PPC_GLOB_DAT;
174 pltRel = R_PPC_JMP_SLOT;
175 relativeRel = R_PPC_RELATIVE;
176 iRelativeRel = R_PPC_IRELATIVE;
177 symbolicRel = R_PPC_ADDR32;
178 gotHeaderEntriesNum = 3;
179 gotPltHeaderEntriesNum = 0;
180 pltHeaderSize = 0;
181 pltEntrySize = 4;
182 ipltEntrySize = ctx.arg.isPic ? 32 : 16;
183
184 needsThunks = true;
185
186 tlsModuleIndexRel = R_PPC_DTPMOD32;
187 tlsOffsetRel = R_PPC_DTPREL32;
188 tlsGotRel = R_PPC_TPREL32;
189
190 defaultMaxPageSize = 65536;
191 defaultImageBase = 0x10000000;
192
193 write32(ctx, p: trapInstr.data(), v: 0x7fe00008);
194}
195
196void PPC::initTargetSpecificSections() {
197 ctx.in.ppc32Got2 = std::make_unique<Got2Section>(args&: ctx);
198 ctx.inputSections.push_back(Elt: ctx.in.ppc32Got2.get());
199}
200
201void PPC::writeIplt(uint8_t *buf, const Symbol &sym,
202 uint64_t pltEntryAddr) const {
203 // In -pie or -shared mode we can't rely on r30 for indirect calls, nor for
204 // direct calls with a different TOC base to the resolver.
205 writePPC32PltCallStub(ctx, buf, p: pltEntryAddr, gotPltVA: sym.getGotPltVA(ctx), file: sym.file,
206 addend: std::nullopt);
207}
208
209void PPC::writeGotHeader(uint8_t *buf) const {
210 // _GLOBAL_OFFSET_TABLE_[0] = _DYNAMIC
211 // glibc stores _dl_runtime_resolve in _GLOBAL_OFFSET_TABLE_[1],
212 // link_map in _GLOBAL_OFFSET_TABLE_[2].
213 write32(ctx, p: buf, v: ctx.in.dynamic->getVA());
214}
215
216void PPC::writeGotPlt(uint8_t *buf, const Symbol &s) const {
217 // Address of the symbol resolver stub in .glink .
218 write32(ctx, p: buf,
219 v: ctx.in.plt->getVA() + ctx.in.plt->headerSize + 4 * s.getPltIdx(ctx));
220}
221
222bool PPC::needsThunk(RelExpr expr, RelType type, const InputFile *file,
223 uint64_t branchAddr, const Symbol &s, int64_t a) const {
224 if (type != R_PPC_LOCAL24PC && type != R_PPC_REL24 && type != R_PPC_PLTREL24)
225 return false;
226 if (s.isInPlt(ctx))
227 return true;
228 if (s.isUndefWeak())
229 return false;
230 return !PPC::inBranchRange(type, src: branchAddr, dst: s.getVA(ctx, addend: a));
231}
232
233uint32_t PPC::getThunkSectionSpacing() const { return 0x2000000; }
234
235bool PPC::inBranchRange(RelType type, uint64_t src, uint64_t dst) const {
236 uint64_t offset = dst - src;
237 if (type == R_PPC_LOCAL24PC || type == R_PPC_REL24 || type == R_PPC_PLTREL24)
238 return isInt<26>(x: offset);
239 llvm_unreachable("unsupported relocation type used in branch");
240}
241
242// Only needed to support relocations used by relocateNonAlloc and
243// preprocessRelocs.
244RelExpr PPC::getRelExpr(RelType type, const Symbol &s,
245 const uint8_t *loc) const {
246 switch (type) {
247 case R_PPC_NONE:
248 return R_NONE;
249 case R_PPC_ADDR32:
250 return R_ABS;
251 case R_PPC_DTPREL32:
252 return R_DTPREL;
253 case R_PPC_REL32:
254 return R_PC;
255 default:
256 Err(ctx) << getErrorLoc(ctx, loc) << "unknown relocation (" << type.v
257 << ") against symbol " << &s;
258 return R_NONE;
259 }
260}
261
262RelType PPC::getDynRel(RelType type) const {
263 if (type == R_PPC_ADDR32)
264 return type;
265 return R_PPC_NONE;
266}
267
268int64_t PPC::getImplicitAddend(const uint8_t *buf, RelType type) const {
269 switch (type) {
270 case R_PPC_NONE:
271 case R_PPC_GLOB_DAT:
272 case R_PPC_JMP_SLOT:
273 return 0;
274 case R_PPC_ADDR32:
275 case R_PPC_REL32:
276 case R_PPC_RELATIVE:
277 case R_PPC_IRELATIVE:
278 case R_PPC_DTPMOD32:
279 case R_PPC_DTPREL32:
280 case R_PPC_TPREL32:
281 return SignExtend64<32>(x: read32(ctx, p: buf));
282 default:
283 InternalErr(ctx, buf) << "cannot read addend for relocation " << type;
284 return 0;
285 }
286}
287
288template <class ELFT, class RelTy>
289void PPC::scanSectionImpl(InputSectionBase &sec, Relocs<RelTy> rels,
290 unsigned shard) {
291 RelocScan rs(ctx, &sec, shard);
292 sec.relocations.reserve(N: rels.size());
293 for (auto it = rels.begin(); it != rels.end(); ++it) {
294 const RelTy &rel = *it;
295 uint32_t symIdx = rel.getSymbol(false);
296 Symbol &sym = sec.getFile<ELFT>()->getSymbol(symIdx);
297 uint64_t offset = rel.r_offset;
298 RelType type = rel.getType(false);
299 if (sym.isUndefined() && symIdx != 0 &&
300 rs.maybeReportUndefined(sym&: cast<Undefined>(Val&: sym), offset))
301 continue;
302 int64_t addend = rs.getAddend<ELFT>(rel, type);
303 RelExpr expr;
304 // Relocation types that only need a RelExpr set `expr` and break out of
305 // the switch to reach rs.process(). Types that need special handling
306 // (fast-path helpers, TLS) call a handler and use `continue`.
307 switch (type) {
308 case R_PPC_NONE:
309 continue;
310 // Absolute relocations:
311 case R_PPC_ADDR16_HA:
312 case R_PPC_ADDR16_HI:
313 case R_PPC_ADDR16_LO:
314 case R_PPC_ADDR24:
315 case R_PPC_ADDR32:
316 expr = R_ABS;
317 break;
318
319 // PC-relative relocations:
320 case R_PPC_REL14:
321 case R_PPC_REL32:
322 case R_PPC_REL16_LO:
323 case R_PPC_REL16_HI:
324 case R_PPC_REL16_HA:
325 rs.processR_PC(type, offset, addend, sym);
326 continue;
327
328 // GOT-generating relocation:
329 case R_PPC_GOT16:
330 expr = R_GOT_OFF;
331 break;
332
333 // PLT-generating relocations:
334 case R_PPC_LOCAL24PC:
335 case R_PPC_REL24:
336 rs.processR_PLT_PC(type, offset, addend, sym);
337 continue;
338 case R_PPC_PLTREL24:
339 ctx.in.got->hasGotOffRel.store(i: true, m: std::memory_order_relaxed);
340 if (LLVM_UNLIKELY(sym.isGnuIFunc())) {
341 rs.process(expr: RE_PPC32_PLTREL, type, offset, sym, addend);
342 } else if (sym.isPreemptible) {
343 sym.setFlags(NEEDS_PLT);
344 sec.addReloc(r: {.expr: RE_PPC32_PLTREL, .type: type, .offset: offset, .addend: addend, .sym: &sym});
345 } else {
346 // The 0x8000 bit of r_addend selects call stub type; mask it for direct
347 // calls.
348 addend &= ~0x8000;
349 rs.processAux(expr: R_PC, type, offset, sym, addend);
350 }
351 continue;
352
353 // TLS relocations:
354
355 // TLS LE:
356 case R_PPC_TPREL16:
357 case R_PPC_TPREL16_HA:
358 case R_PPC_TPREL16_LO:
359 case R_PPC_TPREL16_HI:
360 if (rs.checkTlsLe(offset, sym, type))
361 continue;
362 expr = R_TPREL;
363 break;
364
365 // TLS IE:
366 case R_PPC_GOT_TPREL16:
367 rs.handleTlsIe(ieExpr: R_GOT_OFF, type, offset, addend, sym);
368 continue;
369 case R_PPC_TLS:
370 if (!ctx.arg.shared && !sym.isPreemptible)
371 sec.addReloc(r: {.expr: R_TPREL, .type: type, .offset: offset, .addend: addend, .sym: &sym});
372 continue;
373
374 // TLS GD:
375 case R_PPC_GOT_TLSGD16:
376 rs.handleTlsGd(sharedExpr: R_TLSGD_GOT, ieExpr: R_GOT_OFF, leExpr: R_TPREL, type, offset, addend,
377 sym);
378 continue;
379 case R_PPC_TLSGD:
380 case R_PPC_TLSLD:
381 if (!ctx.arg.shared) {
382 sec.addReloc(r: {.expr: sym.isPreemptible ? R_GOT_OFF : R_TPREL, .type: type, .offset: offset,
383 .addend: addend, .sym: &sym});
384 ++it; // Skip REL24
385 }
386 continue;
387
388 // TLS LD:
389 case R_PPC_GOT_TLSLD16:
390 rs.handleTlsLd(sharedExpr: R_TLSLD_GOT, type, offset, addend, sym);
391 continue;
392 case R_PPC_DTPREL16:
393 case R_PPC_DTPREL16_HA:
394 case R_PPC_DTPREL16_HI:
395 case R_PPC_DTPREL16_LO:
396 case R_PPC_DTPREL32:
397 sec.addReloc(r: {.expr: R_DTPREL, .type: type, .offset: offset, .addend: addend, .sym: &sym});
398 continue;
399
400 default:
401 Err(ctx) << getErrorLoc(ctx, loc: sec.content().data() + offset)
402 << "unknown relocation (" << type.v << ") against symbol "
403 << &sym;
404 continue;
405 }
406 rs.process(expr, type, offset, sym, addend);
407 }
408}
409
410void PPC::scanSection(InputSectionBase &sec, unsigned shard) {
411 if (ctx.arg.isLE)
412 elf::scanSection1<PPC, ELF32LE>(target&: *this, sec, shard);
413 else
414 elf::scanSection1<PPC, ELF32BE>(target&: *this, sec, shard);
415}
416
417static std::pair<RelType, uint64_t> fromDTPREL(RelType type, uint64_t val) {
418 uint64_t dtpBiasedVal = val - 0x8000;
419 switch (type) {
420 case R_PPC_DTPREL16:
421 return {R_PPC64_ADDR16, dtpBiasedVal};
422 case R_PPC_DTPREL16_HA:
423 return {R_PPC_ADDR16_HA, dtpBiasedVal};
424 case R_PPC_DTPREL16_HI:
425 return {R_PPC_ADDR16_HI, dtpBiasedVal};
426 case R_PPC_DTPREL16_LO:
427 return {R_PPC_ADDR16_LO, dtpBiasedVal};
428 case R_PPC_DTPREL32:
429 return {R_PPC_ADDR32, dtpBiasedVal};
430 default:
431 return {type, val};
432 }
433}
434
435void PPC::relocate(uint8_t *loc, const Relocation &rel, uint64_t val) const {
436 RelType newType;
437 std::tie(args&: newType, args&: val) = fromDTPREL(type: rel.type, val);
438 switch (newType) {
439 case R_PPC_ADDR16:
440 checkIntUInt(ctx, loc, v: val, n: 16, rel);
441 write16(ctx, p: loc, v: val);
442 break;
443 case R_PPC_GOT16:
444 case R_PPC_TPREL16:
445 checkInt(ctx, loc, v: val, n: 16, rel);
446 write16(ctx, p: loc, v: val);
447 break;
448 case R_PPC_GOT_TLSGD16:
449 if (rel.expr == R_TPREL)
450 relaxTlsGdToLe(loc, rel, val);
451 else if (rel.expr == R_GOT_OFF)
452 relaxTlsGdToIe(loc, rel, val);
453 else {
454 checkInt(ctx, loc, v: val, n: 16, rel);
455 write16(ctx, p: loc, v: val);
456 }
457 break;
458 case R_PPC_GOT_TLSLD16:
459 if (rel.expr == R_TPREL)
460 relaxTlsLdToLe(loc, rel, val);
461 else {
462 checkInt(ctx, loc, v: val, n: 16, rel);
463 write16(ctx, p: loc, v: val);
464 }
465 break;
466 case R_PPC_GOT_TPREL16:
467 if (rel.expr == R_TPREL)
468 relaxTlsIeToLe(loc, rel, val);
469 else {
470 checkInt(ctx, loc, v: val, n: 16, rel);
471 write16(ctx, p: loc, v: val);
472 }
473 break;
474 case R_PPC_ADDR16_HA:
475 case R_PPC_DTPREL16_HA:
476 case R_PPC_GOT_TLSGD16_HA:
477 case R_PPC_GOT_TLSLD16_HA:
478 case R_PPC_GOT_TPREL16_HA:
479 case R_PPC_REL16_HA:
480 case R_PPC_TPREL16_HA:
481 write16(ctx, p: loc, v: ha(v: val));
482 break;
483 case R_PPC_ADDR16_HI:
484 case R_PPC_DTPREL16_HI:
485 case R_PPC_GOT_TLSGD16_HI:
486 case R_PPC_GOT_TLSLD16_HI:
487 case R_PPC_GOT_TPREL16_HI:
488 case R_PPC_REL16_HI:
489 case R_PPC_TPREL16_HI:
490 write16(ctx, p: loc, v: val >> 16);
491 break;
492 case R_PPC_ADDR16_LO:
493 case R_PPC_DTPREL16_LO:
494 case R_PPC_GOT_TLSGD16_LO:
495 case R_PPC_GOT_TLSLD16_LO:
496 case R_PPC_GOT_TPREL16_LO:
497 case R_PPC_REL16_LO:
498 case R_PPC_TPREL16_LO:
499 write16(ctx, p: loc, v: val);
500 break;
501 case R_PPC_ADDR32:
502 case R_PPC_REL32:
503 write32(ctx, p: loc, v: val);
504 break;
505 case R_PPC_REL14: {
506 uint32_t mask = 0x0000FFFC;
507 checkInt(ctx, loc, v: val, n: 16, rel);
508 checkAlignment(ctx, loc, v: val, n: 4, rel);
509 write32(ctx, p: loc, v: (read32(ctx, p: loc) & ~mask) | (val & mask));
510 break;
511 }
512 case R_PPC_ADDR24:
513 case R_PPC_REL24:
514 case R_PPC_LOCAL24PC:
515 case R_PPC_PLTREL24: {
516 uint32_t mask = 0x03FFFFFC;
517 checkInt(ctx, loc, v: val, n: 26, rel);
518 checkAlignment(ctx, loc, v: val, n: 4, rel);
519 write32(ctx, p: loc, v: (read32(ctx, p: loc) & ~mask) | (val & mask));
520 break;
521 }
522 case R_PPC_TLSGD:
523 if (rel.expr == R_TPREL)
524 relaxTlsGdToLe(loc, rel, val);
525 else if (rel.expr == R_GOT_OFF)
526 relaxTlsGdToIe(loc, rel, val);
527 break;
528 case R_PPC_TLSLD:
529 if (rel.expr == R_TPREL)
530 relaxTlsLdToLe(loc, rel, val);
531 break;
532 case R_PPC_TLS:
533 if (rel.expr == R_TPREL)
534 relaxTlsIeToLe(loc, rel, val);
535 break;
536 default:
537 llvm_unreachable("unknown relocation");
538 }
539}
540
541void PPC::relaxTlsGdToIe(uint8_t *loc, const Relocation &rel,
542 uint64_t val) const {
543 switch (rel.type) {
544 case R_PPC_GOT_TLSGD16: {
545 // addi rT, rA, x@got@tlsgd --> lwz rT, x@got@tprel(rA)
546 uint32_t insn = readFromHalf16(ctx, loc);
547 writeFromHalf16(ctx, loc, insn: 0x80000000 | (insn & 0x03ff0000));
548 relocateNoSym(loc, type: R_PPC_GOT_TPREL16, val);
549 break;
550 }
551 case R_PPC_TLSGD:
552 // bl __tls_get_addr(x@tldgd) --> add r3, r3, r2
553 write32(ctx, p: loc, v: 0x7c631214);
554 break;
555 default:
556 llvm_unreachable("unsupported relocation for TLS GD to IE relaxation");
557 }
558}
559
560void PPC::relaxTlsGdToLe(uint8_t *loc, const Relocation &rel,
561 uint64_t val) const {
562 switch (rel.type) {
563 case R_PPC_GOT_TLSGD16:
564 // addi r3, r31, x@got@tlsgd --> addis r3, r2, x@tprel@ha
565 writeFromHalf16(ctx, loc, insn: 0x3c620000 | ha(v: val));
566 break;
567 case R_PPC_TLSGD:
568 // bl __tls_get_addr(x@tldgd) --> add r3, r3, x@tprel@l
569 write32(ctx, p: loc, v: 0x38630000 | lo(v: val));
570 break;
571 default:
572 llvm_unreachable("unsupported relocation for TLS GD to LE relaxation");
573 }
574}
575
576void PPC::relaxTlsLdToLe(uint8_t *loc, const Relocation &rel,
577 uint64_t val) const {
578 switch (rel.type) {
579 case R_PPC_GOT_TLSLD16:
580 // addi r3, rA, x@got@tlsgd --> addis r3, r2, 0
581 writeFromHalf16(ctx, loc, insn: 0x3c620000);
582 break;
583 case R_PPC_TLSLD:
584 // r3+x@dtprel computes r3+x-0x8000, while we want it to compute r3+x@tprel
585 // = r3+x-0x7000, so add 4096 to r3.
586 // bl __tls_get_addr(x@tlsld) --> addi r3, r3, 4096
587 write32(ctx, p: loc, v: 0x38631000);
588 break;
589 default:
590 llvm_unreachable("unsupported relocation for TLS LD to LE relaxation");
591 }
592}
593
594void PPC::relaxTlsIeToLe(uint8_t *loc, const Relocation &rel,
595 uint64_t val) const {
596 switch (rel.type) {
597 case R_PPC_GOT_TPREL16: {
598 // lwz rT, x@got@tprel(rA) --> addis rT, r2, x@tprel@ha
599 uint32_t rt = readFromHalf16(ctx, loc) & 0x03e00000;
600 writeFromHalf16(ctx, loc, insn: 0x3c020000 | rt | ha(v: val));
601 break;
602 }
603 case R_PPC_TLS: {
604 uint32_t insn = read32(ctx, p: loc);
605 if (insn >> 26 != 31)
606 ErrAlways(ctx) << "unrecognized instruction for IE to LE R_PPC_TLS";
607 // addi rT, rT, x@tls --> addi rT, rT, x@tprel@l
608 unsigned secondaryOp = (read32(ctx, p: loc) & 0x000007fe) >> 1;
609 uint32_t dFormOp = getPPCDFormOp(secondaryOp);
610 if (dFormOp == 0) { // Expecting a DS-Form instruction.
611 dFormOp = getPPCDSFormOp(secondaryOp);
612 if (dFormOp == 0)
613 ErrAlways(ctx) << "unrecognized instruction for IE to LE R_PPC_TLS";
614 }
615 write32(ctx, p: loc, v: (dFormOp | (insn & 0x03ff0000) | lo(v: val)));
616 break;
617 }
618 default:
619 llvm_unreachable("unsupported relocation for TLS IE to LE relaxation");
620 }
621}
622
623void elf::setPPCTargetInfo(Ctx &ctx) { ctx.target.reset(p: new PPC(ctx)); }
624
625bool Got2Section::isNeeded() const {
626 for (SectionCommand *cmd : getParent()->commands)
627 if (auto *isd = dyn_cast<InputSectionDescription>(Val: cmd))
628 for (InputSection *isec : isd->sections)
629 if (isec != this)
630 return true;
631 return false;
632}
633
634void Got2Section::finalizeContents() {
635 // PPC32 may create multiple GOT sections for -fPIC/-fPIE, one per file in
636 // .got2 . This function computes outSecOff of each .got2 to be used in
637 // PPC32PltCallStub::writeTo(). The purpose of this empty synthetic section is
638 // to collect input sections named ".got2".
639 for (SectionCommand *cmd : getParent()->commands)
640 if (auto *isd = dyn_cast<InputSectionDescription>(Val: cmd)) {
641 for (InputSection *isec : isd->sections) {
642 // isec->file may be nullptr for MergeSyntheticSection.
643 if (isec != this && isec->file)
644 isec->file->ppc32Got2 = isec;
645 }
646 }
647}
648