1//===------------------------------------------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef LLD_ELF_RELOCSCAN_H
10#define LLD_ELF_RELOCSCAN_H
11
12#include "Config.h"
13#include "InputFiles.h"
14#include "InputSection.h"
15#include "Relocations.h"
16#include "SyntheticSections.h"
17#include "Target.h"
18
19using namespace llvm;
20using namespace llvm::ELF;
21using namespace llvm::object;
22
23namespace lld::elf {
24
25// Build a bitmask with one bit set for each 64 subset of RelExpr.
26inline constexpr uint64_t buildMask() { return 0; }
27
28template <typename... Tails>
29inline constexpr uint64_t buildMask(int head, Tails... tails) {
30 return (0 <= head && head < 64 ? uint64_t(1) << head : 0) |
31 buildMask(tails...);
32}
33
34// Return true if `Expr` is one of `Exprs`.
35// There are more than 64 but less than 128 RelExprs, so we divide the set of
36// exprs into [0, 64) and [64, 128) and represent each range as a constant
37// 64-bit mask. Then we decide which mask to test depending on the value of
38// expr and use a simple shift and bitwise-and to test for membership.
39template <RelExpr... Exprs> bool oneof(RelExpr expr) {
40 assert(0 <= expr && (int)expr < 128 &&
41 "RelExpr is too large for 128-bit mask!");
42
43 if (expr >= 64)
44 return (uint64_t(1) << (expr - 64)) & buildMask((Exprs - 64)...);
45 return (uint64_t(1) << expr) & buildMask(Exprs...);
46}
47
48// This class encapsulates states needed to scan relocations for one
49// InputSectionBase.
50class RelocScan {
51public:
52 Ctx &ctx;
53 InputSectionBase *sec;
54 // `relocsVec` shard that discovered dynamic relocations are appended to.
55 unsigned shard;
56
57 RelocScan(Ctx &ctx, InputSectionBase *sec, unsigned shard)
58 : ctx(ctx), sec(sec), shard(shard) {}
59 template <class ELFT, class RelTy>
60 void scan(typename Relocs<RelTy>::const_iterator &i, RelType type,
61 int64_t addend);
62 void scanEhSection(EhInputSection &s);
63
64 template <class ELFT, class RelTy>
65 int64_t getAddend(const RelTy &r, RelType type);
66 bool maybeReportUndefined(Undefined &sym, uint64_t offset);
67 bool checkTlsLe(uint64_t offset, Symbol &sym, RelType type);
68 bool isStaticLinkTimeConstant(RelExpr e, RelType type, const Symbol &sym,
69 uint64_t relOff) const;
70 void process(RelExpr expr, RelType type, uint64_t offset, Symbol &sym,
71 int64_t addend) const;
72 // Process relocation after needsGot/needsPlt flags are already handled.
73 void processAux(RelExpr expr, RelType type, uint64_t offset, Symbol &sym,
74 int64_t addend) const;
75
76 // Process R_PC relocations. These are the most common relocation type, so we
77 // inline the isStaticLinkTimeConstant check.
78 void processR_PC(RelType type, uint64_t offset, int64_t addend, Symbol &sym) {
79 if (LLVM_UNLIKELY(sym.isGnuIFunc()))
80 sym.setFlags(HAS_DIRECT_RELOC);
81 if (sym.isPreemptible || (isAbsolute(sym) && ctx.arg.isPic))
82 processAux(expr: R_PC, type, offset, sym, addend);
83 else
84 sec->addReloc(r: {.expr: R_PC, .type: type, .offset: offset, .addend: addend, .sym: &sym});
85 }
86
87 // Process R_PLT_PC relocations. These are very common (calls), so we inline
88 // the isStaticLinkTimeConstant check. Non-preemptible symbols are optimized
89 // to R_PC (direct call).
90 void processR_PLT_PC(RelType type, uint64_t offset, int64_t addend,
91 Symbol &sym) {
92 if (LLVM_UNLIKELY(sym.isGnuIFunc())) {
93 process(expr: R_PLT_PC, type, offset, sym, addend);
94 return;
95 }
96 if (sym.isPreemptible) {
97 sym.setFlags(NEEDS_PLT);
98 sec->addReloc(r: {.expr: R_PLT_PC, .type: type, .offset: offset, .addend: addend, .sym: &sym});
99 } else if (!(isAbsolute(sym) && ctx.arg.isPic)) {
100 sec->addReloc(r: {.expr: R_PC, .type: type, .offset: offset, .addend: addend, .sym: &sym});
101 } else {
102 processAux(expr: R_PC, type, offset, sym, addend);
103 }
104 }
105
106 // Handle TLS Initial-Exec relocation.
107 template <bool enableIeToLe = true>
108 void handleTlsIe(RelExpr ieExpr, RelType type, uint64_t offset,
109 int64_t addend, Symbol &sym) {
110 if (enableIeToLe && !ctx.arg.shared && !sym.isPreemptible) {
111 // Optimize to Local Exec.
112 sec->addReloc(r: {.expr: R_TPREL, .type: type, .offset: offset, .addend: addend, .sym: &sym});
113 } else {
114 sym.setFlags(NEEDS_TLSIE);
115 // R_GOT (absolute GOT address) needs a RELATIVE dynamic relocation in
116 // PIC when the relocation uses the full address (not just low page bits).
117 if (ieExpr == R_GOT && ctx.arg.isPic &&
118 !ctx.target->usesOnlyLowPageBits(type))
119 ctx.in.relaDyn->addRelativeReloc<true>(dynType: ctx.target->relativeRel, isec&: *sec,
120 offsetInSec: offset, sym, addend, addendRelType: type,
121 expr: ieExpr, shard);
122 else
123 sec->addReloc(r: {.expr: ieExpr, .type: type, .offset: offset, .addend: addend, .sym: &sym});
124 }
125 }
126
127 // Handle TLS Local-Dynamic relocation. Returns true if the __tls_get_addr
128 // call should be skipped (i.e., caller should ++it).
129 bool handleTlsLd(RelExpr sharedExpr, RelType type, uint64_t offset,
130 int64_t addend, Symbol &sym) {
131 if (ctx.arg.shared) {
132 ctx.needsTlsLd.store(i: true, m: std::memory_order_relaxed);
133 sec->addReloc(r: {.expr: sharedExpr, .type: type, .offset: offset, .addend: addend, .sym: &sym});
134 return false;
135 }
136 // Optimize to Local Exec.
137 sec->addReloc(r: {.expr: R_TPREL, .type: type, .offset: offset, .addend: addend, .sym: &sym});
138 return true;
139 }
140
141 // Handle TLS General-Dynamic relocation. Returns true if the __tls_get_addr
142 // call should be skipped (i.e., caller should ++it). Pass R_NONE for
143 // ieExpr/leExpr to disable GD-to-IE/LE optimization (e.g. ARM, RISC-V).
144 bool handleTlsGd(RelExpr sharedExpr, RelExpr ieExpr, RelExpr leExpr,
145 RelType type, uint64_t offset, int64_t addend, Symbol &sym) {
146 if (!ctx.arg.shared && ieExpr != R_NONE) {
147 if (sym.isPreemptible) {
148 // Optimize to Initial Exec.
149 sym.setFlags(NEEDS_TLSIE);
150 sec->addReloc(r: {.expr: ieExpr, .type: type, .offset: offset, .addend: addend, .sym: &sym});
151 } else {
152 // Optimize to Local Exec.
153 sec->addReloc(r: {.expr: leExpr, .type: type, .offset: offset, .addend: addend, .sym: &sym});
154 }
155 return true;
156 }
157 sym.setFlags(NEEDS_TLSGD);
158 sec->addReloc(r: {.expr: sharedExpr, .type: type, .offset: offset, .addend: addend, .sym: &sym});
159 return false;
160 }
161
162 // Handle TLSDESC relocation.
163 void handleTlsDesc(RelExpr sharedExpr, RelExpr ieExpr, RelType type,
164 uint64_t offset, int64_t addend, Symbol &sym) {
165 if (ctx.arg.shared) {
166 // NEEDS_TLSDESC_NONAUTH is a no-op for non-AArch64 targets and detects
167 // incompatibility with NEEDS_TLSDESC_AUTH.
168 sym.setFlags(NEEDS_TLSDESC | NEEDS_TLSDESC_NONAUTH);
169 sec->addReloc(r: {.expr: sharedExpr, .type: type, .offset: offset, .addend: addend, .sym: &sym});
170 } else if (sym.isPreemptible) {
171 // Optimize to Initial Exec.
172 sym.setFlags(NEEDS_TLSIE);
173 sec->addReloc(r: {.expr: ieExpr, .type: type, .offset: offset, .addend: addend, .sym: &sym});
174 } else {
175 // Optimize to Local Exec.
176 sec->addReloc(r: {.expr: R_TPREL, .type: type, .offset: offset, .addend: addend, .sym: &sym});
177 }
178 }
179};
180
181template <class ELFT, class RelTy>
182int64_t RelocScan::getAddend(const RelTy &r, RelType type) {
183 return RelTy::HasAddend ? elf::getAddend<ELFT>(r)
184 : ctx.target->getImplicitAddend(
185 buf: sec->content().data() + r.r_offset, type);
186}
187
188template <class ELFT, class RelTy>
189void RelocScan::scan(typename Relocs<RelTy>::const_iterator &it, RelType type,
190 int64_t addend) {
191 const RelTy &rel = *it;
192 uint32_t symIdx = rel.getSymbol(false);
193 Symbol &sym = sec->getFile<ELFT>()->getSymbol(symIdx);
194 uint64_t offset = rel.r_offset;
195 RelExpr expr =
196 ctx.target->getRelExpr(type, s: sym, loc: sec->content().data() + offset);
197
198 // Error if the target symbol is undefined. Symbol index 0 may be used by
199 // marker relocations, e.g. R_*_NONE and R_ARM_V4BX. Don't error on them.
200 if (sym.isUndefined() && symIdx != 0 &&
201 maybeReportUndefined(sym&: cast<Undefined>(Val&: sym), offset))
202 return;
203
204 process(expr, type, offset, sym, addend);
205}
206
207// Dispatch to target-specific scanSectionImpl based on relocation format.
208template <class Target, class ELFT>
209void scanSection1(Target &target, InputSectionBase &sec, unsigned shard) {
210 const RelsOrRelas<ELFT> rels = sec.template relsOrRelas<ELFT>();
211 if (rels.areRelocsCrel())
212 target.template scanSectionImpl<ELFT>(sec, rels.crels, shard);
213 else if (rels.areRelocsRel())
214 target.template scanSectionImpl<ELFT>(sec, rels.rels, shard);
215 else
216 target.template scanSectionImpl<ELFT>(sec, rels.relas, shard);
217}
218
219} // namespace lld::elf
220
221#endif
222