1//===- BranchFolding.cpp - Fold machine code branch instructions ----------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This pass forwards branches to unconditional branches to make them branch
10// directly to the target block. This pass often results in dead MBB's, which
11// it then removes.
12//
13// Note that this pass must be run after register allocation, it cannot handle
14// SSA form. It also must handle virtual registers for targets that emit virtual
15// ISA (e.g. NVPTX).
16//
17//===----------------------------------------------------------------------===//
18
19#include "BranchFolding.h"
20#include "llvm/ADT/BitVector.h"
21#include "llvm/ADT/STLExtras.h"
22#include "llvm/ADT/SmallSet.h"
23#include "llvm/ADT/SmallVector.h"
24#include "llvm/ADT/Statistic.h"
25#include "llvm/Analysis/ProfileSummaryInfo.h"
26#include "llvm/CodeGen/Analysis.h"
27#include "llvm/CodeGen/BranchFoldingPass.h"
28#include "llvm/CodeGen/MBFIWrapper.h"
29#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
30#include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
31#include "llvm/CodeGen/MachineDominators.h"
32#include "llvm/CodeGen/MachineFunction.h"
33#include "llvm/CodeGen/MachineFunctionPass.h"
34#include "llvm/CodeGen/MachineInstr.h"
35#include "llvm/CodeGen/MachineInstrBuilder.h"
36#include "llvm/CodeGen/MachineJumpTableInfo.h"
37#include "llvm/CodeGen/MachineLoopInfo.h"
38#include "llvm/CodeGen/MachineOperand.h"
39#include "llvm/CodeGen/MachinePostDominators.h"
40#include "llvm/CodeGen/MachineRegisterInfo.h"
41#include "llvm/CodeGen/MachineSizeOpts.h"
42#include "llvm/CodeGen/TargetInstrInfo.h"
43#include "llvm/CodeGen/TargetOpcodes.h"
44#include "llvm/CodeGen/TargetPassConfig.h"
45#include "llvm/CodeGen/TargetRegisterInfo.h"
46#include "llvm/CodeGen/TargetSubtargetInfo.h"
47#include "llvm/Config/llvm-config.h"
48#include "llvm/IR/DebugInfoMetadata.h"
49#include "llvm/IR/DebugLoc.h"
50#include "llvm/IR/Function.h"
51#include "llvm/InitializePasses.h"
52#include "llvm/MC/LaneBitmask.h"
53#include "llvm/MC/MCRegisterInfo.h"
54#include "llvm/Pass.h"
55#include "llvm/Support/BlockFrequency.h"
56#include "llvm/Support/BranchProbability.h"
57#include "llvm/Support/CommandLine.h"
58#include "llvm/Support/Debug.h"
59#include "llvm/Support/ErrorHandling.h"
60#include "llvm/Support/raw_ostream.h"
61#include "llvm/Target/TargetMachine.h"
62#include <cassert>
63#include <cstddef>
64#include <iterator>
65#include <numeric>
66
67using namespace llvm;
68
69#define DEBUG_TYPE "branch-folder"
70
71STATISTIC(NumDeadBlocks, "Number of dead blocks removed");
72STATISTIC(NumBranchOpts, "Number of branches optimized");
73STATISTIC(NumTailMerge , "Number of block tails merged");
74STATISTIC(NumHoist , "Number of times common instructions are hoisted");
75STATISTIC(NumTailCalls, "Number of tail calls optimized");
76
77static cl::opt<cl::boolOrDefault> FlagEnableTailMerge("enable-tail-merge",
78 cl::init(Val: cl::BOU_UNSET), cl::Hidden);
79
80// Throttle for huge numbers of predecessors (compile speed problems)
81static cl::opt<unsigned>
82TailMergeThreshold("tail-merge-threshold",
83 cl::desc("Max number of predecessors to consider tail merging"),
84 cl::init(Val: 150), cl::Hidden);
85
86// Heuristic for tail merging (and, inversely, tail duplication).
87static cl::opt<unsigned>
88TailMergeSize("tail-merge-size",
89 cl::desc("Min number of instructions to consider tail merging"),
90 cl::init(Val: 3), cl::Hidden);
91
92namespace {
93
94 /// BranchFolderPass - Wrap branch folder in a machine function pass.
95class BranchFolderLegacy : public MachineFunctionPass {
96public:
97 static char ID;
98
99 explicit BranchFolderLegacy() : MachineFunctionPass(ID) {}
100
101 bool runOnMachineFunction(MachineFunction &MF) override;
102
103 void getAnalysisUsage(AnalysisUsage &AU) const override {
104 AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
105 AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
106 AU.addRequired<ProfileSummaryInfoWrapperPass>();
107 AU.addRequired<TargetPassConfig>();
108 MachineFunctionPass::getAnalysisUsage(AU);
109 }
110
111 MachineFunctionProperties getRequiredProperties() const override {
112 return MachineFunctionProperties().setNoPHIs();
113 }
114};
115
116} // end anonymous namespace
117
118char BranchFolderLegacy::ID = 0;
119
120char &llvm::BranchFolderPassID = BranchFolderLegacy::ID;
121
122INITIALIZE_PASS(BranchFolderLegacy, DEBUG_TYPE, "Control Flow Optimizer", false,
123 false)
124
125PreservedAnalyses BranchFolderPass::run(MachineFunction &MF,
126 MachineFunctionAnalysisManager &MFAM) {
127 MFPropsModifier _(*this, MF);
128 bool EnableTailMerge =
129 !MF.getTarget().requiresStructuredCFG() && this->EnableTailMerge;
130
131 auto &MBPI = MFAM.getResult<MachineBranchProbabilityAnalysis>(IR&: MF);
132 auto *PSI = MFAM.getResult<ModuleAnalysisManagerMachineFunctionProxy>(IR&: MF)
133 .getCachedResult<ProfileSummaryAnalysis>(
134 IR&: *MF.getFunction().getParent());
135 if (!PSI)
136 report_fatal_error(
137 reason: "ProfileSummaryAnalysis is required for BranchFoldingPass", gen_crash_diag: false);
138
139 auto &MBFI = MFAM.getResult<MachineBlockFrequencyAnalysis>(IR&: MF);
140 auto *MDT = MFAM.getCachedResult<MachineDominatorTreeAnalysis>(IR&: MF);
141 auto *MPDT = MFAM.getCachedResult<MachinePostDominatorTreeAnalysis>(IR&: MF);
142 MBFIWrapper MBBFreqInfo(MBFI);
143 BranchFolder Folder(EnableTailMerge, /*CommonHoist=*/true, MBBFreqInfo, MBPI,
144 PSI);
145 if (Folder.OptimizeFunction(MF, tii: MF.getSubtarget().getInstrInfo(),
146 tri: MF.getSubtarget().getRegisterInfo()))
147 return getMachineFunctionPassPreservedAnalyses();
148
149 if (MDT)
150 MDT->updateBlockNumbers();
151 if (MPDT)
152 MPDT->updateBlockNumbers();
153 return PreservedAnalyses::all();
154}
155
156bool BranchFolderLegacy::runOnMachineFunction(MachineFunction &MF) {
157 if (skipFunction(F: MF.getFunction()))
158 return false;
159
160 TargetPassConfig *PassConfig = &getAnalysis<TargetPassConfig>();
161 // TailMerge can create jump into if branches that make CFG irreducible for
162 // HW that requires structurized CFG.
163 bool EnableTailMerge = !MF.getTarget().requiresStructuredCFG() &&
164 PassConfig->getEnableTailMerge();
165 MBFIWrapper MBBFreqInfo(
166 getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI());
167 BranchFolder Folder(
168 EnableTailMerge, /*CommonHoist=*/true, MBBFreqInfo,
169 getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI(),
170 &getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI());
171 return Folder.OptimizeFunction(MF, tii: MF.getSubtarget().getInstrInfo(),
172 tri: MF.getSubtarget().getRegisterInfo());
173}
174
175BranchFolder::BranchFolder(bool DefaultEnableTailMerge, bool CommonHoist,
176 MBFIWrapper &FreqInfo,
177 const MachineBranchProbabilityInfo &ProbInfo,
178 ProfileSummaryInfo *PSI, unsigned MinTailLength)
179 : EnableHoistCommonCode(CommonHoist), MinCommonTailLength(MinTailLength),
180 MBBFreqInfo(FreqInfo), MBPI(ProbInfo), PSI(PSI) {
181 switch (FlagEnableTailMerge) {
182 case cl::BOU_UNSET:
183 EnableTailMerge = DefaultEnableTailMerge;
184 break;
185 case cl::BOU_TRUE: EnableTailMerge = true; break;
186 case cl::BOU_FALSE: EnableTailMerge = false; break;
187 }
188}
189
190void BranchFolder::RemoveDeadBlock(MachineBasicBlock *MBB) {
191 assert(MBB->pred_empty() && "MBB must be dead!");
192 LLVM_DEBUG(dbgs() << "\nRemoving MBB: " << *MBB);
193
194 MachineFunction *MF = MBB->getParent();
195 // drop all successors.
196 while (!MBB->succ_empty())
197 MBB->removeSuccessor(I: MBB->succ_end()-1);
198
199 // Avoid matching if this pointer gets reused.
200 TriedMerging.erase(Ptr: MBB);
201
202 // Update call info.
203 for (const MachineInstr &MI : *MBB)
204 if (MI.shouldUpdateAdditionalCallInfo())
205 MF->eraseAdditionalCallInfo(MI: &MI);
206
207 // Remove the block.
208 MF->erase(MBBI: MBB);
209 EHScopeMembership.erase(Val: MBB);
210 if (MLI)
211 MLI->removeBlock(BB: MBB);
212}
213
214bool BranchFolder::OptimizeFunction(MachineFunction &MF,
215 const TargetInstrInfo *tii,
216 const TargetRegisterInfo *tri,
217 MachineLoopInfo *mli, bool AfterPlacement) {
218 if (!tii) return false;
219
220 TriedMerging.clear();
221
222 MachineRegisterInfo &MRI = MF.getRegInfo();
223 AfterBlockPlacement = AfterPlacement;
224 TII = tii;
225 TRI = tri;
226 MLI = mli;
227 this->MRI = &MRI;
228
229 if (MinCommonTailLength == 0) {
230 MinCommonTailLength = TailMergeSize.getNumOccurrences() > 0
231 ? TailMergeSize
232 : TII->getTailMergeSize(MF);
233 }
234
235 UpdateLiveIns = MRI.tracksLiveness() && TRI->trackLivenessAfterRegAlloc(MF);
236 if (!UpdateLiveIns)
237 MRI.invalidateLiveness();
238
239 bool MadeChange = false;
240
241 // Recalculate EH scope membership.
242 EHScopeMembership = getEHScopeMembership(MF);
243
244 bool MadeChangeThisIteration = true;
245 while (MadeChangeThisIteration) {
246 MadeChangeThisIteration = TailMergeBlocks(MF);
247 // No need to clean up if tail merging does not change anything after the
248 // block placement.
249 if (!AfterBlockPlacement || MadeChangeThisIteration)
250 MadeChangeThisIteration |= OptimizeBranches(MF);
251 if (EnableHoistCommonCode)
252 MadeChangeThisIteration |= HoistCommonCode(MF);
253 MadeChange |= MadeChangeThisIteration;
254 }
255
256 // See if any jump tables have become dead as the code generator
257 // did its thing.
258 MachineJumpTableInfo *JTI = MF.getJumpTableInfo();
259 if (!JTI)
260 return MadeChange;
261
262 // Walk the function to find jump tables that are live.
263 BitVector JTIsLive(JTI->getJumpTables().size());
264 for (const MachineBasicBlock &BB : MF) {
265 for (const MachineInstr &I : BB)
266 for (const MachineOperand &Op : I.operands()) {
267 if (!Op.isJTI()) continue;
268
269 // Remember that this JT is live.
270 JTIsLive.set(Op.getIndex());
271 }
272 }
273
274 // Finally, remove dead jump tables. This happens when the
275 // indirect jump was unreachable (and thus deleted).
276 for (unsigned i = 0, e = JTIsLive.size(); i != e; ++i)
277 if (!JTIsLive.test(Idx: i)) {
278 JTI->RemoveJumpTable(Idx: i);
279 MadeChange = true;
280 }
281
282 return MadeChange;
283}
284
285//===----------------------------------------------------------------------===//
286// Tail Merging of Blocks
287//===----------------------------------------------------------------------===//
288
289/// HashMachineInstr - Compute a hash value for MI and its operands.
290static unsigned HashMachineInstr(const MachineInstr &MI) {
291 unsigned Hash = MI.getOpcode();
292 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) {
293 const MachineOperand &Op = MI.getOperand(i);
294
295 // Merge in bits from the operand if easy. We can't use MachineOperand's
296 // hash_code here because it's not deterministic and we sort by hash value
297 // later.
298 unsigned OperandHash = 0;
299 switch (Op.getType()) {
300 case MachineOperand::MO_Register:
301 OperandHash = Op.getReg().id();
302 break;
303 case MachineOperand::MO_Immediate:
304 OperandHash = Op.getImm();
305 break;
306 case MachineOperand::MO_MachineBasicBlock:
307 OperandHash = Op.getMBB()->getNumber();
308 break;
309 case MachineOperand::MO_FrameIndex:
310 case MachineOperand::MO_ConstantPoolIndex:
311 case MachineOperand::MO_JumpTableIndex:
312 OperandHash = Op.getIndex();
313 break;
314 case MachineOperand::MO_GlobalAddress:
315 case MachineOperand::MO_ExternalSymbol:
316 // Global address / external symbol are too hard, don't bother, but do
317 // pull in the offset.
318 OperandHash = Op.getOffset();
319 break;
320 default:
321 break;
322 }
323
324 Hash += ((OperandHash << 3) | Op.getType()) << (i & 31);
325 }
326 return Hash;
327}
328
329/// HashEndOfMBB - Hash the last instruction in the MBB.
330static unsigned HashEndOfMBB(const MachineBasicBlock &MBB) {
331 MachineBasicBlock::const_iterator I = MBB.getLastNonDebugInstr(SkipPseudoOp: false);
332 if (I == MBB.end())
333 return 0;
334
335 return HashMachineInstr(MI: *I);
336}
337
338/// Whether MI should be counted as an instruction when calculating common tail.
339static bool countsAsInstruction(const MachineInstr &MI) {
340 return !(MI.isDebugInstr() || MI.isCFIInstruction());
341}
342
343/// Iterate backwards from the given iterator \p I, towards the beginning of the
344/// block. If a MI satisfying 'countsAsInstruction' is found, return an iterator
345/// pointing to that MI. If no such MI is found, return the end iterator.
346static MachineBasicBlock::iterator
347skipBackwardPastNonInstructions(MachineBasicBlock::iterator I,
348 MachineBasicBlock *MBB) {
349 while (I != MBB->begin()) {
350 --I;
351 if (countsAsInstruction(MI: *I))
352 return I;
353 }
354 return MBB->end();
355}
356
357/// Given two machine basic blocks, return the number of instructions they
358/// actually have in common together at their end. If a common tail is found (at
359/// least by one instruction), then iterators for the first shared instruction
360/// in each block are returned as well.
361///
362/// Non-instructions according to countsAsInstruction are ignored.
363static unsigned ComputeCommonTailLength(MachineBasicBlock *MBB1,
364 MachineBasicBlock *MBB2,
365 MachineBasicBlock::iterator &I1,
366 MachineBasicBlock::iterator &I2) {
367 MachineBasicBlock::iterator MBBI1 = MBB1->end();
368 MachineBasicBlock::iterator MBBI2 = MBB2->end();
369
370 unsigned TailLen = 0;
371 while (true) {
372 MBBI1 = skipBackwardPastNonInstructions(I: MBBI1, MBB: MBB1);
373 MBBI2 = skipBackwardPastNonInstructions(I: MBBI2, MBB: MBB2);
374 if (MBBI1 == MBB1->end() || MBBI2 == MBB2->end())
375 break;
376 if (!MBBI1->isIdenticalTo(Other: *MBBI2) ||
377 // FIXME: This check is dubious. It's used to get around a problem where
378 // people incorrectly expect inline asm directives to remain in the same
379 // relative order. This is untenable because normal compiler
380 // optimizations (like this one) may reorder and/or merge these
381 // directives.
382 MBBI1->isInlineAsm()) {
383 break;
384 }
385 if (MBBI1->getFlag(Flag: MachineInstr::NoMerge) ||
386 MBBI2->getFlag(Flag: MachineInstr::NoMerge))
387 break;
388 ++TailLen;
389 I1 = MBBI1;
390 I2 = MBBI2;
391 }
392
393 return TailLen;
394}
395
396void BranchFolder::replaceTailWithBranchTo(MachineBasicBlock::iterator OldInst,
397 MachineBasicBlock &NewDest) {
398 if (UpdateLiveIns) {
399 // OldInst should always point to an instruction.
400 MachineBasicBlock &OldMBB = *OldInst->getParent();
401 LiveRegs.clear();
402 LiveRegs.addLiveOuts(MBB: OldMBB);
403 // Move backward to the place where will insert the jump.
404 MachineBasicBlock::iterator I = OldMBB.end();
405 do {
406 --I;
407 LiveRegs.stepBackward(MI: *I);
408 } while (I != OldInst);
409
410 // Merging the tails may have switched some undef operand to non-undef ones.
411 // Add IMPLICIT_DEFS into OldMBB as necessary to have a definition of the
412 // register.
413 for (MachineBasicBlock::RegisterMaskPair P : NewDest.liveins()) {
414 // We computed the liveins with computeLiveIn earlier and should only see
415 // full registers:
416 assert(P.LaneMask == LaneBitmask::getAll() &&
417 "Can only handle full register.");
418 MCRegister Reg = P.PhysReg;
419 if (!LiveRegs.available(MRI: *MRI, Reg))
420 continue;
421 DebugLoc DL;
422 BuildMI(BB&: OldMBB, I: OldInst, MIMD: DL, MCID: TII->get(Opcode: TargetOpcode::IMPLICIT_DEF), DestReg: Reg);
423 }
424 }
425
426 TII->ReplaceTailWithBranchTo(Tail: OldInst, NewDest: &NewDest);
427 ++NumTailMerge;
428}
429
430MachineBasicBlock *BranchFolder::SplitMBBAt(MachineBasicBlock &CurMBB,
431 MachineBasicBlock::iterator BBI1,
432 const BasicBlock *BB) {
433 if (!TII->isLegalToSplitMBBAt(MBB&: CurMBB, MBBI: BBI1))
434 return nullptr;
435
436 MachineFunction &MF = *CurMBB.getParent();
437
438 // Create the fall-through block.
439 MachineFunction::iterator MBBI = CurMBB.getIterator();
440 MachineBasicBlock *NewMBB = MF.CreateMachineBasicBlock(BB);
441 CurMBB.getParent()->insert(MBBI: ++MBBI, MBB: NewMBB);
442
443 // Move all the successors of this block to the specified block.
444 NewMBB->transferSuccessors(FromMBB: &CurMBB);
445
446 // Add an edge from CurMBB to NewMBB for the fall-through.
447 CurMBB.addSuccessor(Succ: NewMBB);
448
449 // Splice the code over.
450 NewMBB->splice(Where: NewMBB->end(), Other: &CurMBB, From: BBI1, To: CurMBB.end());
451
452 // NewMBB belongs to the same loop as CurMBB.
453 if (MLI)
454 if (MachineLoop *ML = MLI->getLoopFor(BB: &CurMBB))
455 ML->addBasicBlockToLoop(NewBB: NewMBB, LI&: *MLI);
456
457 // NewMBB inherits CurMBB's block frequency.
458 MBBFreqInfo.setBlockFreq(MBB: NewMBB, F: MBBFreqInfo.getBlockFreq(MBB: &CurMBB));
459
460 if (UpdateLiveIns)
461 computeAndAddLiveIns(LiveRegs, MBB&: *NewMBB);
462
463 // Add the new block to the EH scope.
464 const auto &EHScopeI = EHScopeMembership.find(Val: &CurMBB);
465 if (EHScopeI != EHScopeMembership.end()) {
466 auto n = EHScopeI->second;
467 EHScopeMembership[NewMBB] = n;
468 }
469
470 return NewMBB;
471}
472
473/// EstimateRuntime - Make a rough estimate for how long it will take to run
474/// the specified code.
475static unsigned EstimateRuntime(MachineBasicBlock::iterator I,
476 MachineBasicBlock::iterator E) {
477 unsigned Time = 0;
478 for (; I != E; ++I) {
479 if (!countsAsInstruction(MI: *I))
480 continue;
481 if (I->isCall())
482 Time += 10;
483 else if (I->mayLoadOrStore())
484 Time += 2;
485 else
486 ++Time;
487 }
488 return Time;
489}
490
491// CurMBB needs to add an unconditional branch to SuccMBB (we removed these
492// branches temporarily for tail merging). In the case where CurMBB ends
493// with a conditional branch to the next block, optimize by reversing the
494// test and conditionally branching to SuccMBB instead.
495static void FixTail(MachineBasicBlock *CurMBB, MachineBasicBlock *SuccBB,
496 const TargetInstrInfo *TII, const DebugLoc &BranchDL) {
497 MachineFunction *MF = CurMBB->getParent();
498 MachineFunction::iterator I = std::next(x: MachineFunction::iterator(CurMBB));
499 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
500 SmallVector<MachineOperand, 4> Cond;
501 DebugLoc dl = CurMBB->findBranchDebugLoc();
502 if (!dl)
503 dl = BranchDL;
504 if (I != MF->end() && !TII->analyzeBranch(MBB&: *CurMBB, TBB, FBB, Cond, AllowModify: true)) {
505 MachineBasicBlock *NextBB = &*I;
506 if (TBB == NextBB && !Cond.empty() && !FBB) {
507 if (!TII->reverseBranchCondition(Cond)) {
508 TII->removeBranch(MBB&: *CurMBB);
509 TII->insertBranch(MBB&: *CurMBB, TBB: SuccBB, FBB: nullptr, Cond, DL: dl);
510 return;
511 }
512 }
513 }
514 TII->insertBranch(MBB&: *CurMBB, TBB: SuccBB, FBB: nullptr,
515 Cond: SmallVector<MachineOperand, 0>(), DL: dl);
516}
517
518bool
519BranchFolder::MergePotentialsElt::operator<(const MergePotentialsElt &o) const {
520 if (getHash() < o.getHash())
521 return true;
522 if (getHash() > o.getHash())
523 return false;
524 if (getBlock()->getNumber() < o.getBlock()->getNumber())
525 return true;
526 if (getBlock()->getNumber() > o.getBlock()->getNumber())
527 return false;
528 return false;
529}
530
531/// CountTerminators - Count the number of terminators in the given
532/// block and set I to the position of the first non-terminator, if there
533/// is one, or MBB->end() otherwise.
534static unsigned CountTerminators(MachineBasicBlock *MBB,
535 MachineBasicBlock::iterator &I) {
536 I = MBB->end();
537 unsigned NumTerms = 0;
538 while (true) {
539 if (I == MBB->begin()) {
540 I = MBB->end();
541 break;
542 }
543 --I;
544 if (!I->isTerminator()) break;
545 ++NumTerms;
546 }
547 return NumTerms;
548}
549
550/// A no successor, non-return block probably ends in unreachable and is cold.
551/// Also consider a block that ends in an indirect branch to be a return block,
552/// since many targets use plain indirect branches to return.
553static bool blockEndsInUnreachable(const MachineBasicBlock *MBB) {
554 if (!MBB->succ_empty())
555 return false;
556 if (MBB->empty())
557 return true;
558 return !(MBB->back().isReturn() || MBB->back().isIndirectBranch());
559}
560
561/// ProfitableToMerge - Check if two machine basic blocks have a common tail
562/// and decide if it would be profitable to merge those tails. Return the
563/// length of the common tail and iterators to the first common instruction
564/// in each block.
565/// MBB1, MBB2 The blocks to check
566/// MinCommonTailLength Minimum size of tail block to be merged.
567/// CommonTailLen Out parameter to record the size of the shared tail between
568/// MBB1 and MBB2
569/// I1, I2 Iterator references that will be changed to point to the first
570/// instruction in the common tail shared by MBB1,MBB2
571/// SuccBB A common successor of MBB1, MBB2 which are in a canonical form
572/// relative to SuccBB
573/// PredBB The layout predecessor of SuccBB, if any.
574/// EHScopeMembership map from block to EH scope #.
575/// AfterPlacement True if we are merging blocks after layout. Stricter
576/// thresholds apply to prevent undoing tail-duplication.
577static bool
578ProfitableToMerge(MachineBasicBlock *MBB1, MachineBasicBlock *MBB2,
579 unsigned MinCommonTailLength, unsigned &CommonTailLen,
580 MachineBasicBlock::iterator &I1,
581 MachineBasicBlock::iterator &I2, MachineBasicBlock *SuccBB,
582 MachineBasicBlock *PredBB,
583 DenseMap<const MachineBasicBlock *, int> &EHScopeMembership,
584 bool AfterPlacement,
585 MBFIWrapper &MBBFreqInfo,
586 ProfileSummaryInfo *PSI) {
587 // It is never profitable to tail-merge blocks from two different EH scopes.
588 if (!EHScopeMembership.empty()) {
589 auto EHScope1 = EHScopeMembership.find(Val: MBB1);
590 assert(EHScope1 != EHScopeMembership.end());
591 auto EHScope2 = EHScopeMembership.find(Val: MBB2);
592 assert(EHScope2 != EHScopeMembership.end());
593 if (EHScope1->second != EHScope2->second)
594 return false;
595 }
596
597 CommonTailLen = ComputeCommonTailLength(MBB1, MBB2, I1, I2);
598 if (CommonTailLen == 0)
599 return false;
600 LLVM_DEBUG(dbgs() << "Common tail length of " << printMBBReference(*MBB1)
601 << " and " << printMBBReference(*MBB2) << " is "
602 << CommonTailLen << '\n');
603
604 // Move the iterators to the beginning of the MBB if we only got debug
605 // instructions before the tail. This is to avoid splitting a block when we
606 // only got debug instructions before the tail (to be invariant on -g).
607 if (skipDebugInstructionsForward(It: MBB1->begin(), End: MBB1->end(), SkipPseudoOp: false) == I1)
608 I1 = MBB1->begin();
609 if (skipDebugInstructionsForward(It: MBB2->begin(), End: MBB2->end(), SkipPseudoOp: false) == I2)
610 I2 = MBB2->begin();
611
612 bool FullBlockTail1 = I1 == MBB1->begin();
613 bool FullBlockTail2 = I2 == MBB2->begin();
614
615 // It's almost always profitable to merge any number of non-terminator
616 // instructions with the block that falls through into the common successor.
617 // This is true only for a single successor. For multiple successors, we are
618 // trading a conditional branch for an unconditional one.
619 // TODO: Re-visit successor size for non-layout tail merging.
620 if ((MBB1 == PredBB || MBB2 == PredBB) &&
621 (!AfterPlacement || MBB1->succ_size() == 1)) {
622 MachineBasicBlock::iterator I;
623 unsigned NumTerms = CountTerminators(MBB: MBB1 == PredBB ? MBB2 : MBB1, I);
624 if (CommonTailLen > NumTerms)
625 return true;
626 }
627
628 // If these are identical non-return blocks with no successors, merge them.
629 // Such blocks are typically cold calls to noreturn functions like abort, and
630 // are unlikely to become a fallthrough target after machine block placement.
631 // Tail merging these blocks is unlikely to create additional unconditional
632 // branches, and will reduce the size of this cold code.
633 if (FullBlockTail1 && FullBlockTail2 &&
634 blockEndsInUnreachable(MBB: MBB1) && blockEndsInUnreachable(MBB: MBB2))
635 return true;
636
637 // If one of the blocks can be completely merged and happens to be in
638 // a position where the other could fall through into it, merge any number
639 // of instructions, because it can be done without a branch.
640 // TODO: If the blocks are not adjacent, move one of them so that they are?
641 if (MBB1->isLayoutSuccessor(MBB: MBB2) && FullBlockTail2)
642 return true;
643 if (MBB2->isLayoutSuccessor(MBB: MBB1) && FullBlockTail1)
644 return true;
645
646 // If both blocks are identical and end in a branch, merge them unless they
647 // both have a fallthrough predecessor and successor.
648 // We can only do this after block placement because it depends on whether
649 // there are fallthroughs, and we don't know until after layout.
650 if (AfterPlacement && FullBlockTail1 && FullBlockTail2) {
651 auto BothFallThrough = [](MachineBasicBlock *MBB) {
652 if (!MBB->succ_empty() && !MBB->canFallThrough())
653 return false;
654 MachineFunction::iterator I(MBB);
655 MachineFunction *MF = MBB->getParent();
656 return (MBB != &*MF->begin()) && std::prev(x: I)->canFallThrough();
657 };
658 if (!BothFallThrough(MBB1) || !BothFallThrough(MBB2))
659 return true;
660 }
661
662 // If both blocks have an unconditional branch temporarily stripped out,
663 // count that as an additional common instruction for the following
664 // heuristics. This heuristic is only accurate for single-succ blocks, so to
665 // make sure that during layout merging and duplicating don't crash, we check
666 // for that when merging during layout.
667 unsigned EffectiveTailLen = CommonTailLen;
668 if (SuccBB && MBB1 != PredBB && MBB2 != PredBB &&
669 (MBB1->succ_size() == 1 || !AfterPlacement) &&
670 !MBB1->back().isBarrier() &&
671 !MBB2->back().isBarrier())
672 ++EffectiveTailLen;
673
674 // Check if the common tail is long enough to be worthwhile.
675 if (EffectiveTailLen >= MinCommonTailLength)
676 return true;
677
678 // If we are optimizing for code size, 2 instructions in common is enough if
679 // we don't have to split a block. At worst we will be introducing 1 new
680 // branch instruction, which is likely to be smaller than the 2
681 // instructions that would be deleted in the merge.
682 bool OptForSize = llvm::shouldOptimizeForSize(MBB: MBB1, PSI, MBFIWrapper: &MBBFreqInfo) &&
683 llvm::shouldOptimizeForSize(MBB: MBB2, PSI, MBFIWrapper: &MBBFreqInfo);
684 return EffectiveTailLen >= 2 && OptForSize &&
685 (FullBlockTail1 || FullBlockTail2);
686}
687
688unsigned BranchFolder::ComputeSameTails(unsigned CurHash,
689 unsigned MinCommonTailLength,
690 MachineBasicBlock *SuccBB,
691 MachineBasicBlock *PredBB) {
692 unsigned maxCommonTailLength = 0U;
693 SameTails.clear();
694 MachineBasicBlock::iterator TrialBBI1, TrialBBI2;
695 MPIterator HighestMPIter = std::prev(x: MergePotentials.end());
696 for (MPIterator CurMPIter = std::prev(x: MergePotentials.end()),
697 B = MergePotentials.begin();
698 CurMPIter != B && CurMPIter->getHash() == CurHash; --CurMPIter) {
699 for (MPIterator I = std::prev(x: CurMPIter); I->getHash() == CurHash; --I) {
700 unsigned CommonTailLen;
701 if (ProfitableToMerge(MBB1: CurMPIter->getBlock(), MBB2: I->getBlock(),
702 MinCommonTailLength,
703 CommonTailLen, I1&: TrialBBI1, I2&: TrialBBI2,
704 SuccBB, PredBB,
705 EHScopeMembership,
706 AfterPlacement: AfterBlockPlacement, MBBFreqInfo, PSI)) {
707 if (CommonTailLen > maxCommonTailLength) {
708 SameTails.clear();
709 maxCommonTailLength = CommonTailLen;
710 HighestMPIter = CurMPIter;
711 SameTails.push_back(x: SameTailElt(CurMPIter, TrialBBI1));
712 }
713 if (HighestMPIter == CurMPIter &&
714 CommonTailLen == maxCommonTailLength)
715 SameTails.push_back(x: SameTailElt(I, TrialBBI2));
716 }
717 if (I == B)
718 break;
719 }
720 }
721 return maxCommonTailLength;
722}
723
724void BranchFolder::RemoveBlocksWithHash(unsigned CurHash,
725 MachineBasicBlock *SuccBB,
726 MachineBasicBlock *PredBB,
727 const DebugLoc &BranchDL) {
728 MPIterator CurMPIter, B;
729 for (CurMPIter = std::prev(x: MergePotentials.end()),
730 B = MergePotentials.begin();
731 CurMPIter->getHash() == CurHash; --CurMPIter) {
732 // Put the unconditional branch back, if we need one.
733 MachineBasicBlock *CurMBB = CurMPIter->getBlock();
734 if (SuccBB && CurMBB != PredBB)
735 FixTail(CurMBB, SuccBB, TII, BranchDL);
736 if (CurMPIter == B)
737 break;
738 }
739 if (CurMPIter->getHash() != CurHash)
740 CurMPIter++;
741 MergePotentials.erase(first: CurMPIter, last: MergePotentials.end());
742}
743
744bool BranchFolder::CreateCommonTailOnlyBlock(MachineBasicBlock *&PredBB,
745 MachineBasicBlock *SuccBB,
746 unsigned maxCommonTailLength,
747 unsigned &commonTailIndex) {
748 commonTailIndex = 0;
749 unsigned TimeEstimate = ~0U;
750 for (unsigned i = 0, e = SameTails.size(); i != e; ++i) {
751 // Use PredBB if possible; that doesn't require a new branch.
752 if (SameTails[i].getBlock() == PredBB) {
753 commonTailIndex = i;
754 break;
755 }
756 // Otherwise, make a (fairly bogus) choice based on estimate of
757 // how long it will take the various blocks to execute.
758 unsigned t = EstimateRuntime(I: SameTails[i].getBlock()->begin(),
759 E: SameTails[i].getTailStartPos());
760 if (t <= TimeEstimate) {
761 TimeEstimate = t;
762 commonTailIndex = i;
763 }
764 }
765
766 MachineBasicBlock::iterator BBI =
767 SameTails[commonTailIndex].getTailStartPos();
768 MachineBasicBlock *MBB = SameTails[commonTailIndex].getBlock();
769
770 LLVM_DEBUG(dbgs() << "\nSplitting " << printMBBReference(*MBB) << ", size "
771 << maxCommonTailLength);
772
773 // If the split block unconditionally falls-thru to SuccBB, it will be
774 // merged. In control flow terms it should then take SuccBB's name. e.g. If
775 // SuccBB is an inner loop, the common tail is still part of the inner loop.
776 const BasicBlock *BB = (SuccBB && MBB->succ_size() == 1) ?
777 SuccBB->getBasicBlock() : MBB->getBasicBlock();
778 MachineBasicBlock *newMBB = SplitMBBAt(CurMBB&: *MBB, BBI1: BBI, BB);
779 if (!newMBB) {
780 LLVM_DEBUG(dbgs() << "... failed!");
781 return false;
782 }
783
784 SameTails[commonTailIndex].setBlock(newMBB);
785 SameTails[commonTailIndex].setTailStartPos(newMBB->begin());
786
787 // If we split PredBB, newMBB is the new predecessor.
788 if (PredBB == MBB)
789 PredBB = newMBB;
790
791 return true;
792}
793
794static void
795mergeOperations(MachineBasicBlock::iterator MBBIStartPos,
796 MachineBasicBlock &MBBCommon) {
797 MachineBasicBlock *MBB = MBBIStartPos->getParent();
798 // Note CommonTailLen does not necessarily matches the size of
799 // the common BB nor all its instructions because of debug
800 // instructions differences.
801 unsigned CommonTailLen = 0;
802 for (auto E = MBB->end(); MBBIStartPos != E; ++MBBIStartPos)
803 ++CommonTailLen;
804
805 MachineBasicBlock::reverse_iterator MBBI = MBB->rbegin();
806 MachineBasicBlock::reverse_iterator MBBIE = MBB->rend();
807 MachineBasicBlock::reverse_iterator MBBICommon = MBBCommon.rbegin();
808 MachineBasicBlock::reverse_iterator MBBIECommon = MBBCommon.rend();
809
810 while (CommonTailLen--) {
811 assert(MBBI != MBBIE && "Reached BB end within common tail length!");
812 (void)MBBIE;
813
814 if (!countsAsInstruction(MI: *MBBI)) {
815 ++MBBI;
816 continue;
817 }
818
819 while ((MBBICommon != MBBIECommon) && !countsAsInstruction(MI: *MBBICommon))
820 ++MBBICommon;
821
822 assert(MBBICommon != MBBIECommon &&
823 "Reached BB end within common tail length!");
824 assert(MBBICommon->isIdenticalTo(*MBBI) && "Expected matching MIIs!");
825
826 // Merge MMOs from memory operations in the common block.
827 if (MBBICommon->mayLoadOrStore())
828 MBBICommon->cloneMergedMemRefs(MF&: *MBB->getParent(), MIs: {&*MBBICommon, &*MBBI});
829 // Drop undef flags if they aren't present in all merged instructions.
830 for (unsigned I = 0, E = MBBICommon->getNumOperands(); I != E; ++I) {
831 MachineOperand &MO = MBBICommon->getOperand(i: I);
832 if (MO.isReg() && MO.isUndef()) {
833 const MachineOperand &OtherMO = MBBI->getOperand(i: I);
834 if (!OtherMO.isUndef())
835 MO.setIsUndef(false);
836 }
837 }
838
839 ++MBBI;
840 ++MBBICommon;
841 }
842}
843
844void BranchFolder::mergeCommonTails(unsigned commonTailIndex) {
845 MachineBasicBlock *MBB = SameTails[commonTailIndex].getBlock();
846
847 std::vector<MachineBasicBlock::iterator> NextCommonInsts(SameTails.size());
848 for (unsigned int i = 0 ; i != SameTails.size() ; ++i) {
849 if (i != commonTailIndex) {
850 NextCommonInsts[i] = SameTails[i].getTailStartPos();
851 mergeOperations(MBBIStartPos: SameTails[i].getTailStartPos(), MBBCommon&: *MBB);
852 } else {
853 assert(SameTails[i].getTailStartPos() == MBB->begin() &&
854 "MBB is not a common tail only block");
855 }
856 }
857
858 for (auto &MI : *MBB) {
859 if (!countsAsInstruction(MI))
860 continue;
861 DebugLoc DL = MI.getDebugLoc();
862 for (unsigned int i = 0 ; i < NextCommonInsts.size() ; i++) {
863 if (i == commonTailIndex)
864 continue;
865
866 auto &Pos = NextCommonInsts[i];
867 assert(Pos != SameTails[i].getBlock()->end() &&
868 "Reached BB end within common tail");
869 while (!countsAsInstruction(MI: *Pos)) {
870 ++Pos;
871 assert(Pos != SameTails[i].getBlock()->end() &&
872 "Reached BB end within common tail");
873 }
874 assert(MI.isIdenticalTo(*Pos) && "Expected matching MIIs!");
875 DL = DebugLoc::getMergedLocation(LocA: DL, LocB: Pos->getDebugLoc());
876 NextCommonInsts[i] = ++Pos;
877 }
878 MI.setDebugLoc(DL);
879 }
880
881 if (UpdateLiveIns) {
882 LivePhysRegs NewLiveIns(*TRI);
883 computeLiveIns(LiveRegs&: NewLiveIns, MBB: *MBB);
884 LiveRegs.init(TRI: *TRI);
885
886 // The flag merging may lead to some register uses no longer using the
887 // <undef> flag, add IMPLICIT_DEFs in the predecessors as necessary.
888 for (MachineBasicBlock *Pred : MBB->predecessors()) {
889 LiveRegs.clear();
890 LiveRegs.addLiveOuts(MBB: *Pred);
891 MachineBasicBlock::iterator InsertBefore = Pred->getFirstTerminator();
892 for (Register Reg : NewLiveIns) {
893 if (!LiveRegs.available(MRI: *MRI, Reg))
894 continue;
895
896 // Skip the register if we are about to add one of its super registers.
897 // TODO: Common this up with the same logic in addLineIns().
898 if (any_of(Range: TRI->superregs(Reg), P: [&](MCPhysReg SReg) {
899 return NewLiveIns.contains(Reg: SReg) && !MRI->isReserved(PhysReg: SReg);
900 }))
901 continue;
902
903 DebugLoc DL;
904 BuildMI(BB&: *Pred, I: InsertBefore, MIMD: DL, MCID: TII->get(Opcode: TargetOpcode::IMPLICIT_DEF),
905 DestReg: Reg);
906 }
907 }
908
909 MBB->clearLiveIns();
910 addLiveIns(MBB&: *MBB, LiveRegs: NewLiveIns);
911 }
912}
913
914// See if any of the blocks in MergePotentials (which all have SuccBB as a
915// successor, or all have no successor if it is null) can be tail-merged.
916// If there is a successor, any blocks in MergePotentials that are not
917// tail-merged and are not immediately before Succ must have an unconditional
918// branch to Succ added (but the predecessor/successor lists need no
919// adjustment). The lone predecessor of Succ that falls through into Succ,
920// if any, is given in PredBB.
921// MinCommonTailLength - Except for the special cases below, tail-merge if
922// there are at least this many instructions in common.
923bool BranchFolder::TryTailMergeBlocks(MachineBasicBlock *SuccBB,
924 MachineBasicBlock *PredBB,
925 unsigned MinCommonTailLength) {
926 bool MadeChange = false;
927
928 LLVM_DEBUG({
929 dbgs() << "\nTryTailMergeBlocks: ";
930 for (unsigned i = 0, e = MergePotentials.size(); i != e; ++i)
931 dbgs() << printMBBReference(*MergePotentials[i].getBlock())
932 << (i == e - 1 ? "" : ", ");
933 dbgs() << "\n";
934 if (SuccBB) {
935 dbgs() << " with successor " << printMBBReference(*SuccBB) << '\n';
936 if (PredBB)
937 dbgs() << " which has fall-through from " << printMBBReference(*PredBB)
938 << "\n";
939 }
940 dbgs() << "Looking for common tails of at least " << MinCommonTailLength
941 << " instruction" << (MinCommonTailLength == 1 ? "" : "s") << '\n';
942 });
943
944 // Sort by hash value so that blocks with identical end sequences sort
945 // together.
946#if LLVM_ENABLE_DEBUGLOC_TRACKING_ORIGIN
947 // If origin-tracking is enabled then MergePotentialElt is no longer a POD
948 // type, so we need std::sort instead.
949 std::sort(MergePotentials.begin(), MergePotentials.end());
950#else
951 array_pod_sort(Start: MergePotentials.begin(), End: MergePotentials.end());
952#endif
953
954 // Walk through equivalence sets looking for actual exact matches.
955 while (MergePotentials.size() > 1) {
956 unsigned CurHash = MergePotentials.back().getHash();
957 const DebugLoc &BranchDL = MergePotentials.back().getBranchDebugLoc();
958
959 // Build SameTails, identifying the set of blocks with this hash code
960 // and with the maximum number of instructions in common.
961 unsigned maxCommonTailLength = ComputeSameTails(CurHash,
962 MinCommonTailLength,
963 SuccBB, PredBB);
964
965 // If we didn't find any pair that has at least MinCommonTailLength
966 // instructions in common, remove all blocks with this hash code and retry.
967 if (SameTails.empty()) {
968 RemoveBlocksWithHash(CurHash, SuccBB, PredBB, BranchDL);
969 continue;
970 }
971
972 // If one of the blocks is the entire common tail (and is not the entry
973 // block/an EH pad, which we can't jump to), we can treat all blocks with
974 // this same tail at once. Use PredBB if that is one of the possibilities,
975 // as that will not introduce any extra branches.
976 MachineBasicBlock *EntryBB =
977 &MergePotentials.front().getBlock()->getParent()->front();
978 unsigned commonTailIndex = SameTails.size();
979 // If there are two blocks, check to see if one can be made to fall through
980 // into the other.
981 if (SameTails.size() == 2 &&
982 SameTails[0].getBlock()->isLayoutSuccessor(MBB: SameTails[1].getBlock()) &&
983 SameTails[1].tailIsWholeBlock() && !SameTails[1].getBlock()->isEHPad())
984 commonTailIndex = 1;
985 else if (SameTails.size() == 2 &&
986 SameTails[1].getBlock()->isLayoutSuccessor(
987 MBB: SameTails[0].getBlock()) &&
988 SameTails[0].tailIsWholeBlock() &&
989 !SameTails[0].getBlock()->isEHPad())
990 commonTailIndex = 0;
991 else {
992 // Otherwise just pick one, favoring the fall-through predecessor if
993 // there is one.
994 for (unsigned i = 0, e = SameTails.size(); i != e; ++i) {
995 MachineBasicBlock *MBB = SameTails[i].getBlock();
996 if ((MBB == EntryBB || MBB->isEHPad()) &&
997 SameTails[i].tailIsWholeBlock())
998 continue;
999 if (MBB == PredBB) {
1000 commonTailIndex = i;
1001 break;
1002 }
1003 if (SameTails[i].tailIsWholeBlock())
1004 commonTailIndex = i;
1005 }
1006 }
1007
1008 if (commonTailIndex == SameTails.size() ||
1009 (SameTails[commonTailIndex].getBlock() == PredBB &&
1010 !SameTails[commonTailIndex].tailIsWholeBlock())) {
1011 // None of the blocks consist entirely of the common tail.
1012 // Split a block so that one does.
1013 if (!CreateCommonTailOnlyBlock(PredBB, SuccBB,
1014 maxCommonTailLength, commonTailIndex)) {
1015 RemoveBlocksWithHash(CurHash, SuccBB, PredBB, BranchDL);
1016 continue;
1017 }
1018 }
1019
1020 MachineBasicBlock *MBB = SameTails[commonTailIndex].getBlock();
1021
1022 // Recompute common tail MBB's edge weights and block frequency.
1023 setCommonTailEdgeWeights(*MBB);
1024
1025 // Merge debug locations, MMOs and undef flags across identical instructions
1026 // for common tail.
1027 mergeCommonTails(commonTailIndex);
1028
1029 // MBB is common tail. Adjust all other BB's to jump to this one.
1030 // Traversal must be forwards so erases work.
1031 LLVM_DEBUG(dbgs() << "\nUsing common tail in " << printMBBReference(*MBB)
1032 << " for ");
1033 for (unsigned int i=0, e = SameTails.size(); i != e; ++i) {
1034 if (commonTailIndex == i)
1035 continue;
1036 LLVM_DEBUG(dbgs() << printMBBReference(*SameTails[i].getBlock())
1037 << (i == e - 1 ? "" : ", "));
1038 // Hack the end off BB i, making it jump to BB commonTailIndex instead.
1039 replaceTailWithBranchTo(OldInst: SameTails[i].getTailStartPos(), NewDest&: *MBB);
1040 // BB i is no longer a predecessor of SuccBB; remove it from the worklist.
1041 MergePotentials.erase(position: SameTails[i].getMPIter());
1042 }
1043 LLVM_DEBUG(dbgs() << "\n");
1044 // We leave commonTailIndex in the worklist in case there are other blocks
1045 // that match it with a smaller number of instructions.
1046 MadeChange = true;
1047 }
1048 return MadeChange;
1049}
1050
1051bool BranchFolder::TailMergeBlocks(MachineFunction &MF) {
1052 bool MadeChange = false;
1053 if (!EnableTailMerge)
1054 return MadeChange;
1055
1056 // First find blocks with no successors.
1057 // Block placement may create new tail merging opportunities for these blocks.
1058 MergePotentials.clear();
1059 for (MachineBasicBlock &MBB : MF) {
1060 if (MergePotentials.size() == TailMergeThreshold)
1061 break;
1062 if (!TriedMerging.count(Ptr: &MBB) && MBB.succ_empty())
1063 MergePotentials.push_back(x: MergePotentialsElt(HashEndOfMBB(MBB), &MBB,
1064 MBB.findBranchDebugLoc()));
1065 }
1066
1067 // If this is a large problem, avoid visiting the same basic blocks
1068 // multiple times.
1069 if (MergePotentials.size() == TailMergeThreshold)
1070 for (const MergePotentialsElt &Elt : MergePotentials)
1071 TriedMerging.insert(Ptr: Elt.getBlock());
1072
1073 // See if we can do any tail merging on those.
1074 if (MergePotentials.size() >= 2)
1075 MadeChange |= TryTailMergeBlocks(SuccBB: nullptr, PredBB: nullptr, MinCommonTailLength);
1076
1077 // Look at blocks (IBB) with multiple predecessors (PBB).
1078 // We change each predecessor to a canonical form, by
1079 // (1) temporarily removing any unconditional branch from the predecessor
1080 // to IBB, and
1081 // (2) alter conditional branches so they branch to the other block
1082 // not IBB; this may require adding back an unconditional branch to IBB
1083 // later, where there wasn't one coming in. E.g.
1084 // Bcc IBB
1085 // fallthrough to QBB
1086 // here becomes
1087 // Bncc QBB
1088 // with a conceptual B to IBB after that, which never actually exists.
1089 // With those changes, we see whether the predecessors' tails match,
1090 // and merge them if so. We change things out of canonical form and
1091 // back to the way they were later in the process. (OptimizeBranches
1092 // would undo some of this, but we can't use it, because we'd get into
1093 // a compile-time infinite loop repeatedly doing and undoing the same
1094 // transformations.)
1095
1096 for (MachineFunction::iterator I = std::next(x: MF.begin()), E = MF.end();
1097 I != E; ++I) {
1098 if (I->pred_size() < 2) continue;
1099 SmallPtrSet<MachineBasicBlock *, 8> UniquePreds;
1100 MachineBasicBlock *IBB = &*I;
1101 MachineBasicBlock *PredBB = &*std::prev(x: I);
1102 MergePotentials.clear();
1103 MachineLoop *ML;
1104
1105 // Bail if merging after placement and IBB is the loop header because
1106 // -- If merging predecessors that belong to the same loop as IBB, the
1107 // common tail of merged predecessors may become the loop top if block
1108 // placement is called again and the predecessors may branch to this common
1109 // tail and require more branches. This can be relaxed if
1110 // MachineBlockPlacement::findBestLoopTop is more flexible.
1111 // --If merging predecessors that do not belong to the same loop as IBB, the
1112 // loop info of IBB's loop and the other loops may be affected. Calling the
1113 // block placement again may make big change to the layout and eliminate the
1114 // reason to do tail merging here.
1115 if (AfterBlockPlacement && MLI) {
1116 ML = MLI->getLoopFor(BB: IBB);
1117 if (ML && IBB == ML->getHeader())
1118 continue;
1119 }
1120
1121 for (MachineBasicBlock *PBB : I->predecessors()) {
1122 if (MergePotentials.size() == TailMergeThreshold)
1123 break;
1124
1125 if (TriedMerging.count(Ptr: PBB))
1126 continue;
1127
1128 // Skip blocks that loop to themselves, can't tail merge these.
1129 if (PBB == IBB)
1130 continue;
1131
1132 // Visit each predecessor only once.
1133 if (!UniquePreds.insert(Ptr: PBB).second)
1134 continue;
1135
1136 // Skip blocks which may jump to a landing pad or jump from an asm blob.
1137 // Can't tail merge these.
1138 if (PBB->hasEHPadSuccessor() || PBB->mayHaveInlineAsmBr())
1139 continue;
1140
1141 // After block placement, only consider predecessors that belong to the
1142 // same loop as IBB. The reason is the same as above when skipping loop
1143 // header.
1144 if (AfterBlockPlacement && MLI)
1145 if (ML != MLI->getLoopFor(BB: PBB))
1146 continue;
1147
1148 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
1149 SmallVector<MachineOperand, 4> Cond;
1150 if (!TII->analyzeBranch(MBB&: *PBB, TBB, FBB, Cond, AllowModify: true)) {
1151 // Failing case: IBB is the target of a cbr, and we cannot reverse the
1152 // branch.
1153 SmallVector<MachineOperand, 4> NewCond(Cond);
1154 if (!Cond.empty() && TBB == IBB) {
1155 if (TII->reverseBranchCondition(Cond&: NewCond))
1156 continue;
1157 // This is the QBB case described above
1158 if (!FBB) {
1159 auto Next = ++PBB->getIterator();
1160 if (Next != MF.end())
1161 FBB = &*Next;
1162 }
1163 }
1164
1165 // Remove the unconditional branch at the end, if any.
1166 DebugLoc dl = PBB->findBranchDebugLoc();
1167 if (TBB && (Cond.empty() || FBB)) {
1168 TII->removeBranch(MBB&: *PBB);
1169 if (!Cond.empty())
1170 // reinsert conditional branch only, for now
1171 TII->insertBranch(MBB&: *PBB, TBB: (TBB == IBB) ? FBB : TBB, FBB: nullptr,
1172 Cond: NewCond, DL: dl);
1173 }
1174
1175 MergePotentials.push_back(
1176 x: MergePotentialsElt(HashEndOfMBB(MBB: *PBB), PBB, dl));
1177 }
1178 }
1179
1180 // If this is a large problem, avoid visiting the same basic blocks multiple
1181 // times.
1182 if (MergePotentials.size() == TailMergeThreshold)
1183 for (MergePotentialsElt &Elt : MergePotentials)
1184 TriedMerging.insert(Ptr: Elt.getBlock());
1185
1186 if (MergePotentials.size() >= 2)
1187 MadeChange |= TryTailMergeBlocks(SuccBB: IBB, PredBB, MinCommonTailLength);
1188
1189 // Reinsert an unconditional branch if needed. The 1 below can occur as a
1190 // result of removing blocks in TryTailMergeBlocks.
1191 PredBB = &*std::prev(x: I); // this may have been changed in TryTailMergeBlocks
1192 if (MergePotentials.size() == 1 &&
1193 MergePotentials.begin()->getBlock() != PredBB)
1194 FixTail(CurMBB: MergePotentials.begin()->getBlock(), SuccBB: IBB, TII,
1195 BranchDL: MergePotentials.begin()->getBranchDebugLoc());
1196 }
1197
1198 return MadeChange;
1199}
1200
1201void BranchFolder::setCommonTailEdgeWeights(MachineBasicBlock &TailMBB) {
1202 SmallVector<BlockFrequency, 2> EdgeFreqLs(TailMBB.succ_size());
1203 BlockFrequency AccumulatedMBBFreq;
1204
1205 // Aggregate edge frequency of successor edge j:
1206 // edgeFreq(j) = sum (freq(bb) * edgeProb(bb, j)),
1207 // where bb is a basic block that is in SameTails.
1208 for (const auto &Src : SameTails) {
1209 const MachineBasicBlock *SrcMBB = Src.getBlock();
1210 BlockFrequency BlockFreq = MBBFreqInfo.getBlockFreq(MBB: SrcMBB);
1211 AccumulatedMBBFreq += BlockFreq;
1212
1213 // It is not necessary to recompute edge weights if TailBB has less than two
1214 // successors.
1215 if (TailMBB.succ_size() <= 1)
1216 continue;
1217
1218 auto EdgeFreq = EdgeFreqLs.begin();
1219
1220 for (auto SuccI = TailMBB.succ_begin(), SuccE = TailMBB.succ_end();
1221 SuccI != SuccE; ++SuccI, ++EdgeFreq)
1222 *EdgeFreq += BlockFreq * MBPI.getEdgeProbability(Src: SrcMBB, Dst: *SuccI);
1223 }
1224
1225 MBBFreqInfo.setBlockFreq(MBB: &TailMBB, F: AccumulatedMBBFreq);
1226
1227 if (TailMBB.succ_size() <= 1)
1228 return;
1229
1230 auto SumEdgeFreq =
1231 std::accumulate(first: EdgeFreqLs.begin(), last: EdgeFreqLs.end(), init: BlockFrequency(0))
1232 .getFrequency();
1233 auto EdgeFreq = EdgeFreqLs.begin();
1234
1235 if (SumEdgeFreq > 0) {
1236 for (auto SuccI = TailMBB.succ_begin(), SuccE = TailMBB.succ_end();
1237 SuccI != SuccE; ++SuccI, ++EdgeFreq) {
1238 auto Prob = BranchProbability::getBranchProbability(
1239 Numerator: EdgeFreq->getFrequency(), Denominator: SumEdgeFreq);
1240 TailMBB.setSuccProbability(I: SuccI, Prob);
1241 }
1242 }
1243}
1244
1245//===----------------------------------------------------------------------===//
1246// Branch Optimization
1247//===----------------------------------------------------------------------===//
1248
1249bool BranchFolder::OptimizeBranches(MachineFunction &MF) {
1250 bool MadeChange = false;
1251
1252 // Make sure blocks are numbered in order
1253 MF.RenumberBlocks();
1254 // Renumbering blocks alters EH scope membership, recalculate it.
1255 EHScopeMembership = getEHScopeMembership(MF);
1256
1257 for (MachineBasicBlock &MBB :
1258 llvm::make_early_inc_range(Range: llvm::drop_begin(RangeOrContainer&: MF))) {
1259 MadeChange |= OptimizeBlock(MBB: &MBB);
1260
1261 // If it is dead, remove it.
1262 if (MBB.pred_empty() && !MBB.isMachineBlockAddressTaken() &&
1263 !MBB.isEHPad()) {
1264 RemoveDeadBlock(MBB: &MBB);
1265 MadeChange = true;
1266 ++NumDeadBlocks;
1267 }
1268 }
1269
1270 return MadeChange;
1271}
1272
1273// Blocks should be considered empty if they contain only debug info;
1274// else the debug info would affect codegen.
1275static bool IsEmptyBlock(MachineBasicBlock *MBB) {
1276 return MBB->getFirstNonDebugInstr(SkipPseudoOp: true) == MBB->end();
1277}
1278
1279// Blocks with only debug info and branches should be considered the same
1280// as blocks with only branches.
1281static bool IsBranchOnlyBlock(MachineBasicBlock *MBB) {
1282 MachineBasicBlock::iterator I = MBB->getFirstNonDebugInstr();
1283 assert(I != MBB->end() && "empty block!");
1284 return I->isBranch();
1285}
1286
1287/// IsBetterFallthrough - Return true if it would be clearly better to
1288/// fall-through to MBB1 than to fall through into MBB2. This has to return
1289/// a strict ordering, returning true for both (MBB1,MBB2) and (MBB2,MBB1) will
1290/// result in infinite loops.
1291static bool IsBetterFallthrough(MachineBasicBlock *MBB1,
1292 MachineBasicBlock *MBB2) {
1293 assert(MBB1 && MBB2 && "Unknown MachineBasicBlock");
1294
1295 // Right now, we use a simple heuristic. If MBB2 ends with a call, and
1296 // MBB1 doesn't, we prefer to fall through into MBB1. This allows us to
1297 // optimize branches that branch to either a return block or an assert block
1298 // into a fallthrough to the return.
1299 MachineBasicBlock::iterator MBB1I = MBB1->getLastNonDebugInstr();
1300 MachineBasicBlock::iterator MBB2I = MBB2->getLastNonDebugInstr();
1301 if (MBB1I == MBB1->end() || MBB2I == MBB2->end())
1302 return false;
1303
1304 // If there is a clear successor ordering we make sure that one block
1305 // will fall through to the next
1306 if (MBB1->isSuccessor(MBB: MBB2)) return true;
1307 if (MBB2->isSuccessor(MBB: MBB1)) return false;
1308
1309 return MBB2I->isCall() && !MBB1I->isCall();
1310}
1311
1312static void copyDebugInfoToPredecessor(const TargetInstrInfo *TII,
1313 MachineBasicBlock &MBB,
1314 MachineBasicBlock &PredMBB) {
1315 auto InsertBefore = PredMBB.getFirstTerminator();
1316 for (MachineInstr &MI : MBB.instrs())
1317 if (MI.isDebugInstr()) {
1318 TII->duplicate(MBB&: PredMBB, InsertBefore, Orig: MI);
1319 LLVM_DEBUG(dbgs() << "Copied debug entity from empty block to pred: "
1320 << MI);
1321 }
1322}
1323
1324static void copyDebugInfoToSuccessor(const TargetInstrInfo *TII,
1325 MachineBasicBlock &MBB,
1326 MachineBasicBlock &SuccMBB) {
1327 auto InsertBefore = SuccMBB.SkipPHIsAndLabels(I: SuccMBB.begin());
1328 for (MachineInstr &MI : MBB.instrs())
1329 if (MI.isDebugInstr()) {
1330 TII->duplicate(MBB&: SuccMBB, InsertBefore, Orig: MI);
1331 LLVM_DEBUG(dbgs() << "Copied debug entity from empty block to succ: "
1332 << MI);
1333 }
1334}
1335
1336// Try to salvage DBG_VALUE instructions from an otherwise empty block. If such
1337// a basic block is removed we would lose the debug information unless we have
1338// copied the information to a predecessor/successor.
1339//
1340// TODO: This function only handles some simple cases. An alternative would be
1341// to run a heavier analysis, such as the LiveDebugValues pass, before we do
1342// branch folding.
1343static void salvageDebugInfoFromEmptyBlock(const TargetInstrInfo *TII,
1344 MachineBasicBlock &MBB) {
1345 assert(IsEmptyBlock(&MBB) && "Expected an empty block (except debug info).");
1346 // If this MBB is the only predecessor of a successor it is legal to copy
1347 // DBG_VALUE instructions to the beginning of the successor.
1348 for (MachineBasicBlock *SuccBB : MBB.successors())
1349 if (SuccBB->pred_size() == 1)
1350 copyDebugInfoToSuccessor(TII, MBB, SuccMBB&: *SuccBB);
1351 // If this MBB is the only successor of a predecessor it is legal to copy the
1352 // DBG_VALUE instructions to the end of the predecessor (just before the
1353 // terminators, assuming that the terminator isn't affecting the DBG_VALUE).
1354 for (MachineBasicBlock *PredBB : MBB.predecessors())
1355 if (PredBB->succ_size() == 1)
1356 copyDebugInfoToPredecessor(TII, MBB, PredMBB&: *PredBB);
1357}
1358
1359bool BranchFolder::OptimizeBlock(MachineBasicBlock *MBB) {
1360 bool MadeChange = false;
1361 MachineFunction &MF = *MBB->getParent();
1362ReoptimizeBlock:
1363
1364 MachineFunction::iterator FallThrough = MBB->getIterator();
1365 ++FallThrough;
1366
1367 // Make sure MBB and FallThrough belong to the same EH scope.
1368 bool SameEHScope = true;
1369 if (!EHScopeMembership.empty() && FallThrough != MF.end()) {
1370 auto MBBEHScope = EHScopeMembership.find(Val: MBB);
1371 assert(MBBEHScope != EHScopeMembership.end());
1372 auto FallThroughEHScope = EHScopeMembership.find(Val: &*FallThrough);
1373 assert(FallThroughEHScope != EHScopeMembership.end());
1374 SameEHScope = MBBEHScope->second == FallThroughEHScope->second;
1375 }
1376
1377 // Analyze the branch in the current block. As a side-effect, this may cause
1378 // the block to become empty.
1379 MachineBasicBlock *CurTBB = nullptr, *CurFBB = nullptr;
1380 SmallVector<MachineOperand, 4> CurCond;
1381 bool CurUnAnalyzable =
1382 TII->analyzeBranch(MBB&: *MBB, TBB&: CurTBB, FBB&: CurFBB, Cond&: CurCond, AllowModify: true);
1383
1384 // If this block is empty, make everyone use its fall-through, not the block
1385 // explicitly. Landing pads should not do this since the landing-pad table
1386 // points to this block. Blocks with their addresses taken shouldn't be
1387 // optimized away.
1388 if (IsEmptyBlock(MBB) && !MBB->isEHPad() && !MBB->hasAddressTaken() &&
1389 SameEHScope) {
1390 salvageDebugInfoFromEmptyBlock(TII, MBB&: *MBB);
1391 // Dead block? Leave for cleanup later.
1392 if (MBB->pred_empty()) return MadeChange;
1393
1394 if (FallThrough == MF.end()) {
1395 // TODO: Simplify preds to not branch here if possible!
1396 } else if (FallThrough->isEHPad()) {
1397 // Don't rewrite to a landing pad fallthough. That could lead to the case
1398 // where a BB jumps to more than one landing pad.
1399 // TODO: Is it ever worth rewriting predecessors which don't already
1400 // jump to a landing pad, and so can safely jump to the fallthrough?
1401 } else if (MBB->isSuccessor(MBB: &*FallThrough)) {
1402 // Rewrite all predecessors of the old block to go to the fallthrough
1403 // instead.
1404 while (!MBB->pred_empty()) {
1405 MachineBasicBlock *Pred = *(MBB->pred_end()-1);
1406 Pred->ReplaceUsesOfBlockWith(Old: MBB, New: &*FallThrough);
1407 }
1408 // Add rest successors of MBB to successors of FallThrough. Those
1409 // successors are not directly reachable via MBB, so it should be
1410 // landing-pad.
1411 for (auto SI = MBB->succ_begin(), SE = MBB->succ_end(); SI != SE; ++SI)
1412 if (*SI != &*FallThrough && !FallThrough->isSuccessor(MBB: *SI)) {
1413 assert((*SI)->isEHPad() && "Bad CFG");
1414 FallThrough->copySuccessor(Orig: MBB, I: SI);
1415 }
1416 // If MBB was the target of a jump table, update jump tables to go to the
1417 // fallthrough instead.
1418 if (MachineJumpTableInfo *MJTI = MF.getJumpTableInfo())
1419 MJTI->ReplaceMBBInJumpTables(Old: MBB, New: &*FallThrough);
1420 MadeChange = true;
1421 }
1422 return MadeChange;
1423 }
1424
1425 // Check to see if we can simplify the terminator of the block before this
1426 // one.
1427 MachineBasicBlock &PrevBB = *std::prev(x: MachineFunction::iterator(MBB));
1428
1429 MachineBasicBlock *PriorTBB = nullptr, *PriorFBB = nullptr;
1430 SmallVector<MachineOperand, 4> PriorCond;
1431 bool PriorUnAnalyzable =
1432 TII->analyzeBranch(MBB&: PrevBB, TBB&: PriorTBB, FBB&: PriorFBB, Cond&: PriorCond, AllowModify: true);
1433 if (!PriorUnAnalyzable) {
1434 // If the previous branch is conditional and both conditions go to the same
1435 // destination, remove the branch, replacing it with an unconditional one or
1436 // a fall-through.
1437 if (PriorTBB && PriorTBB == PriorFBB) {
1438 DebugLoc Dl = PrevBB.findBranchDebugLoc();
1439 TII->removeBranch(MBB&: PrevBB);
1440 PriorCond.clear();
1441 if (PriorTBB != MBB)
1442 TII->insertBranch(MBB&: PrevBB, TBB: PriorTBB, FBB: nullptr, Cond: PriorCond, DL: Dl);
1443 MadeChange = true;
1444 ++NumBranchOpts;
1445 goto ReoptimizeBlock;
1446 }
1447
1448 // If the previous block unconditionally falls through to this block and
1449 // this block has no other predecessors, move the contents of this block
1450 // into the prior block. This doesn't usually happen when SimplifyCFG
1451 // has been used, but it can happen if tail merging splits a fall-through
1452 // predecessor of a block.
1453 // This has to check PrevBB->succ_size() because EH edges are ignored by
1454 // analyzeBranch.
1455 if (PriorCond.empty() && !PriorTBB && MBB->pred_size() == 1 &&
1456 PrevBB.succ_size() == 1 && PrevBB.isSuccessor(MBB) &&
1457 !MBB->hasAddressTaken() && !MBB->isEHPad()) {
1458 LLVM_DEBUG(dbgs() << "\nMerging into block: " << PrevBB
1459 << "From MBB: " << *MBB);
1460 // Remove redundant DBG_VALUEs first.
1461 if (!PrevBB.empty()) {
1462 MachineBasicBlock::iterator PrevBBIter = PrevBB.end();
1463 --PrevBBIter;
1464 MachineBasicBlock::iterator MBBIter = MBB->begin();
1465 // Check if DBG_VALUE at the end of PrevBB is identical to the
1466 // DBG_VALUE at the beginning of MBB.
1467 while (PrevBBIter != PrevBB.begin() && MBBIter != MBB->end()
1468 && PrevBBIter->isDebugInstr() && MBBIter->isDebugInstr()) {
1469 if (!MBBIter->isIdenticalTo(Other: *PrevBBIter))
1470 break;
1471 MachineInstr &DuplicateDbg = *MBBIter;
1472 ++MBBIter; -- PrevBBIter;
1473 DuplicateDbg.eraseFromParent();
1474 }
1475 }
1476 PrevBB.splice(Where: PrevBB.end(), Other: MBB, From: MBB->begin(), To: MBB->end());
1477 PrevBB.removeSuccessor(I: PrevBB.succ_begin());
1478 assert(PrevBB.succ_empty());
1479 PrevBB.transferSuccessors(FromMBB: MBB);
1480 MadeChange = true;
1481 return MadeChange;
1482 }
1483
1484 // If the previous branch *only* branches to *this* block (conditional or
1485 // not) remove the branch.
1486 if (PriorTBB == MBB && !PriorFBB) {
1487 TII->removeBranch(MBB&: PrevBB);
1488 MadeChange = true;
1489 ++NumBranchOpts;
1490 goto ReoptimizeBlock;
1491 }
1492
1493 // If the prior block branches somewhere else on the condition and here if
1494 // the condition is false, remove the uncond second branch.
1495 if (PriorFBB == MBB) {
1496 DebugLoc Dl = PrevBB.findBranchDebugLoc();
1497 TII->removeBranch(MBB&: PrevBB);
1498 TII->insertBranch(MBB&: PrevBB, TBB: PriorTBB, FBB: nullptr, Cond: PriorCond, DL: Dl);
1499 MadeChange = true;
1500 ++NumBranchOpts;
1501 goto ReoptimizeBlock;
1502 }
1503
1504 // If the prior block branches here on true and somewhere else on false, and
1505 // if the branch condition is reversible, reverse the branch to create a
1506 // fall-through.
1507 if (PriorTBB == MBB) {
1508 SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
1509 if (!TII->reverseBranchCondition(Cond&: NewPriorCond)) {
1510 DebugLoc Dl = PrevBB.findBranchDebugLoc();
1511 TII->removeBranch(MBB&: PrevBB);
1512 TII->insertBranch(MBB&: PrevBB, TBB: PriorFBB, FBB: nullptr, Cond: NewPriorCond, DL: Dl);
1513 MadeChange = true;
1514 ++NumBranchOpts;
1515 goto ReoptimizeBlock;
1516 }
1517 }
1518
1519 // If this block has no successors (e.g. it is a return block or ends with
1520 // a call to a no-return function like abort or __cxa_throw) and if the pred
1521 // falls through into this block, and if it would otherwise fall through
1522 // into the block after this, move this block to the end of the function.
1523 //
1524 // We consider it more likely that execution will stay in the function (e.g.
1525 // due to loops) than it is to exit it. This asserts in loops etc, moving
1526 // the assert condition out of the loop body.
1527 if (MBB->succ_empty() && !PriorCond.empty() && !PriorFBB &&
1528 MachineFunction::iterator(PriorTBB) == FallThrough &&
1529 !MBB->canFallThrough()) {
1530 bool DoTransform = true;
1531
1532 // We have to be careful that the succs of PredBB aren't both no-successor
1533 // blocks. If neither have successors and if PredBB is the second from
1534 // last block in the function, we'd just keep swapping the two blocks for
1535 // last. Only do the swap if one is clearly better to fall through than
1536 // the other.
1537 if (FallThrough == --MF.end() &&
1538 !IsBetterFallthrough(MBB1: PriorTBB, MBB2: MBB))
1539 DoTransform = false;
1540
1541 if (DoTransform) {
1542 // Reverse the branch so we will fall through on the previous true cond.
1543 SmallVector<MachineOperand, 4> NewPriorCond(PriorCond);
1544 if (!TII->reverseBranchCondition(Cond&: NewPriorCond)) {
1545 LLVM_DEBUG(dbgs() << "\nMoving MBB: " << *MBB
1546 << "To make fallthrough to: " << *PriorTBB << "\n");
1547
1548 DebugLoc Dl = PrevBB.findBranchDebugLoc();
1549 TII->removeBranch(MBB&: PrevBB);
1550 TII->insertBranch(MBB&: PrevBB, TBB: MBB, FBB: nullptr, Cond: NewPriorCond, DL: Dl);
1551
1552 // Move this block to the end of the function.
1553 MBB->moveAfter(NewBefore: &MF.back());
1554 MadeChange = true;
1555 ++NumBranchOpts;
1556 return MadeChange;
1557 }
1558 }
1559 }
1560 }
1561
1562 if (!IsEmptyBlock(MBB)) {
1563 MachineInstr &TailCall = *MBB->getFirstNonDebugInstr();
1564 if (TII->isUnconditionalTailCall(MI: TailCall)) {
1565 SmallVector<MachineBasicBlock *> PredsChanged;
1566 for (auto &Pred : MBB->predecessors()) {
1567 MachineBasicBlock *PredTBB = nullptr, *PredFBB = nullptr;
1568 SmallVector<MachineOperand, 4> PredCond;
1569 bool PredAnalyzable =
1570 !TII->analyzeBranch(MBB&: *Pred, TBB&: PredTBB, FBB&: PredFBB, Cond&: PredCond, AllowModify: true);
1571
1572 // Only eliminate if MBB == TBB (Taken Basic Block)
1573 if (PredAnalyzable && !PredCond.empty() && PredTBB == MBB &&
1574 PredTBB != PredFBB) {
1575 // The predecessor has a conditional branch to this block which
1576 // consists of only a tail call. Try to fold the tail call into the
1577 // conditional branch.
1578 if (TII->canMakeTailCallConditional(Cond&: PredCond, TailCall)) {
1579 // TODO: It would be nice if analyzeBranch() could provide a pointer
1580 // to the branch instruction so replaceBranchWithTailCall() doesn't
1581 // have to search for it.
1582 TII->replaceBranchWithTailCall(MBB&: *Pred, Cond&: PredCond, TailCall);
1583 PredsChanged.push_back(Elt: Pred);
1584 }
1585 }
1586 // If the predecessor is falling through to this block, we could reverse
1587 // the branch condition and fold the tail call into that. However, after
1588 // that we might have to re-arrange the CFG to fall through to the other
1589 // block and there is a high risk of regressing code size rather than
1590 // improving it.
1591 }
1592 if (!PredsChanged.empty()) {
1593 NumTailCalls += PredsChanged.size();
1594 for (auto &Pred : PredsChanged)
1595 Pred->removeSuccessor(Succ: MBB);
1596
1597 return true;
1598 }
1599 }
1600 }
1601
1602 if (!CurUnAnalyzable) {
1603 // If this is a two-way branch, and the FBB branches to this block, reverse
1604 // the condition so the single-basic-block loop is faster. Instead of:
1605 // Loop: xxx; jcc Out; jmp Loop
1606 // we want:
1607 // Loop: xxx; jncc Loop; jmp Out
1608 if (CurTBB && CurFBB && CurFBB == MBB && CurTBB != MBB) {
1609 SmallVector<MachineOperand, 4> NewCond(CurCond);
1610 if (!TII->reverseBranchCondition(Cond&: NewCond)) {
1611 DebugLoc Dl = MBB->findBranchDebugLoc();
1612 TII->removeBranch(MBB&: *MBB);
1613 TII->insertBranch(MBB&: *MBB, TBB: CurFBB, FBB: CurTBB, Cond: NewCond, DL: Dl);
1614 MadeChange = true;
1615 ++NumBranchOpts;
1616 goto ReoptimizeBlock;
1617 }
1618 }
1619
1620 // If this branch is the only thing in its block, see if we can forward
1621 // other blocks across it.
1622 if (CurTBB && CurCond.empty() && !CurFBB &&
1623 IsBranchOnlyBlock(MBB) && CurTBB != MBB &&
1624 !MBB->hasAddressTaken() && !MBB->isEHPad()) {
1625 DebugLoc Dl = MBB->findBranchDebugLoc();
1626 // This block may contain just an unconditional branch. Because there can
1627 // be 'non-branch terminators' in the block, try removing the branch and
1628 // then seeing if the block is empty.
1629 TII->removeBranch(MBB&: *MBB);
1630 // If the only things remaining in the block are debug info, remove these
1631 // as well, so this will behave the same as an empty block in non-debug
1632 // mode.
1633 if (IsEmptyBlock(MBB)) {
1634 // Make the block empty, losing the debug info (we could probably
1635 // improve this in some cases.)
1636 MBB->erase(I: MBB->begin(), E: MBB->end());
1637 }
1638 // If this block is just an unconditional branch to CurTBB, we can
1639 // usually completely eliminate the block. The only case we cannot
1640 // completely eliminate the block is when the block before this one
1641 // falls through into MBB and we can't understand the prior block's branch
1642 // condition.
1643 if (MBB->empty()) {
1644 bool PredHasNoFallThrough = !PrevBB.canFallThrough();
1645 if (PredHasNoFallThrough || !PriorUnAnalyzable ||
1646 !PrevBB.isSuccessor(MBB)) {
1647 // If the prior block falls through into us, turn it into an
1648 // explicit branch to us to make updates simpler.
1649 if (!PredHasNoFallThrough && PrevBB.isSuccessor(MBB) &&
1650 PriorTBB != MBB && PriorFBB != MBB) {
1651 if (!PriorTBB) {
1652 assert(PriorCond.empty() && !PriorFBB &&
1653 "Bad branch analysis");
1654 PriorTBB = MBB;
1655 } else {
1656 assert(!PriorFBB && "Machine CFG out of date!");
1657 PriorFBB = MBB;
1658 }
1659 DebugLoc PrevDl = PrevBB.findBranchDebugLoc();
1660 TII->removeBranch(MBB&: PrevBB);
1661 TII->insertBranch(MBB&: PrevBB, TBB: PriorTBB, FBB: PriorFBB, Cond: PriorCond, DL: PrevDl);
1662 }
1663
1664 // Iterate through all the predecessors, revectoring each in-turn.
1665 size_t PI = 0;
1666 bool DidChange = false;
1667 bool HasBranchToSelf = false;
1668 while(PI != MBB->pred_size()) {
1669 MachineBasicBlock *PMBB = *(MBB->pred_begin() + PI);
1670 if (PMBB == MBB) {
1671 // If this block has an uncond branch to itself, leave it.
1672 ++PI;
1673 HasBranchToSelf = true;
1674 } else {
1675 DidChange = true;
1676 PMBB->ReplaceUsesOfBlockWith(Old: MBB, New: CurTBB);
1677 // Add rest successors of MBB to successors of CurTBB. Those
1678 // successors are not directly reachable via MBB, so it should be
1679 // landing-pad.
1680 for (auto SI = MBB->succ_begin(), SE = MBB->succ_end(); SI != SE;
1681 ++SI)
1682 if (*SI != CurTBB && !CurTBB->isSuccessor(MBB: *SI)) {
1683 assert((*SI)->isEHPad() && "Bad CFG");
1684 CurTBB->copySuccessor(Orig: MBB, I: SI);
1685 }
1686 // If this change resulted in PMBB ending in a conditional
1687 // branch where both conditions go to the same destination,
1688 // change this to an unconditional branch.
1689 MachineBasicBlock *NewCurTBB = nullptr, *NewCurFBB = nullptr;
1690 SmallVector<MachineOperand, 4> NewCurCond;
1691 bool NewCurUnAnalyzable = TII->analyzeBranch(
1692 MBB&: *PMBB, TBB&: NewCurTBB, FBB&: NewCurFBB, Cond&: NewCurCond, AllowModify: true);
1693 if (!NewCurUnAnalyzable && NewCurTBB && NewCurTBB == NewCurFBB) {
1694 DebugLoc PrevDl = PMBB->findBranchDebugLoc();
1695 TII->removeBranch(MBB&: *PMBB);
1696 NewCurCond.clear();
1697 TII->insertBranch(MBB&: *PMBB, TBB: NewCurTBB, FBB: nullptr, Cond: NewCurCond,
1698 DL: PrevDl);
1699 MadeChange = true;
1700 ++NumBranchOpts;
1701 }
1702 }
1703 }
1704
1705 // Change any jumptables to go to the new MBB.
1706 if (MachineJumpTableInfo *MJTI = MF.getJumpTableInfo())
1707 MJTI->ReplaceMBBInJumpTables(Old: MBB, New: CurTBB);
1708 if (DidChange) {
1709 ++NumBranchOpts;
1710 MadeChange = true;
1711 if (!HasBranchToSelf) return MadeChange;
1712 }
1713 }
1714 }
1715
1716 // Add the branch back if the block is more than just an uncond branch.
1717 TII->insertBranch(MBB&: *MBB, TBB: CurTBB, FBB: nullptr, Cond: CurCond, DL: Dl);
1718 }
1719 }
1720
1721 // If the prior block doesn't fall through into this block, and if this
1722 // block doesn't fall through into some other block, see if we can find a
1723 // place to move this block where a fall-through will happen.
1724 if (!PrevBB.canFallThrough()) {
1725 // Now we know that there was no fall-through into this block, check to
1726 // see if it has a fall-through into its successor.
1727 bool CurFallsThru = MBB->canFallThrough();
1728
1729 if (!MBB->isEHPad()) {
1730 // Check all the predecessors of this block. If one of them has no fall
1731 // throughs, and analyzeBranch thinks it _could_ fallthrough to this
1732 // block, move this block right after it.
1733 for (MachineBasicBlock *PredBB : MBB->predecessors()) {
1734 // Analyze the branch at the end of the pred.
1735 MachineBasicBlock *PredTBB = nullptr, *PredFBB = nullptr;
1736 SmallVector<MachineOperand, 4> PredCond;
1737 if (PredBB != MBB && !PredBB->canFallThrough() &&
1738 !TII->analyzeBranch(MBB&: *PredBB, TBB&: PredTBB, FBB&: PredFBB, Cond&: PredCond, AllowModify: true) &&
1739 (PredTBB == MBB || PredFBB == MBB) &&
1740 (!CurFallsThru || !CurTBB || !CurFBB) &&
1741 (!CurFallsThru || MBB->getNumber() >= PredBB->getNumber())) {
1742 // If the current block doesn't fall through, just move it.
1743 // If the current block can fall through and does not end with a
1744 // conditional branch, we need to append an unconditional jump to
1745 // the (current) next block. To avoid a possible compile-time
1746 // infinite loop, move blocks only backward in this case.
1747 // Also, if there are already 2 branches here, we cannot add a third;
1748 // this means we have the case
1749 // Bcc next
1750 // B elsewhere
1751 // next:
1752 if (CurFallsThru) {
1753 MachineBasicBlock *NextBB = &*std::next(x: MBB->getIterator());
1754 CurCond.clear();
1755 TII->insertBranch(MBB&: *MBB, TBB: NextBB, FBB: nullptr, Cond: CurCond, DL: DebugLoc());
1756 }
1757 MBB->moveAfter(NewBefore: PredBB);
1758 MadeChange = true;
1759 goto ReoptimizeBlock;
1760 }
1761 }
1762 }
1763
1764 if (!CurFallsThru) {
1765 // Check analyzable branch-successors to see if we can move this block
1766 // before one.
1767 if (!CurUnAnalyzable) {
1768 for (MachineBasicBlock *SuccBB : {CurFBB, CurTBB}) {
1769 if (!SuccBB)
1770 continue;
1771 // Analyze the branch at the end of the block before the succ.
1772 MachineFunction::iterator SuccPrev = --SuccBB->getIterator();
1773
1774 // If this block doesn't already fall-through to that successor, and
1775 // if the succ doesn't already have a block that can fall through into
1776 // it, we can arrange for the fallthrough to happen.
1777 if (SuccBB != MBB && &*SuccPrev != MBB &&
1778 !SuccPrev->canFallThrough()) {
1779 MBB->moveBefore(NewAfter: SuccBB);
1780 MadeChange = true;
1781 goto ReoptimizeBlock;
1782 }
1783 }
1784 }
1785
1786 // Okay, there is no really great place to put this block. If, however,
1787 // the block before this one would be a fall-through if this block were
1788 // removed, move this block to the end of the function. There is no real
1789 // advantage in "falling through" to an EH block, so we don't want to
1790 // perform this transformation for that case.
1791 //
1792 // Also, Windows EH introduced the possibility of an arbitrary number of
1793 // successors to a given block. The analyzeBranch call does not consider
1794 // exception handling and so we can get in a state where a block
1795 // containing a call is followed by multiple EH blocks that would be
1796 // rotated infinitely at the end of the function if the transformation
1797 // below were performed for EH "FallThrough" blocks. Therefore, even if
1798 // that appears not to be happening anymore, we should assume that it is
1799 // possible and not remove the "!FallThrough()->isEHPad" condition below.
1800 //
1801 // Similarly, the analyzeBranch call does not consider callbr, which also
1802 // introduces the possibility of infinite rotation, as there may be
1803 // multiple successors of PrevBB. Thus we check such case by
1804 // FallThrough->isInlineAsmBrIndirectTarget().
1805 // NOTE: Checking if PrevBB contains callbr is more precise, but much
1806 // more expensive.
1807 MachineBasicBlock *PrevTBB = nullptr, *PrevFBB = nullptr;
1808 SmallVector<MachineOperand, 4> PrevCond;
1809
1810 if (FallThrough != MF.end() && !FallThrough->isEHPad() &&
1811 !FallThrough->isInlineAsmBrIndirectTarget() &&
1812 !TII->analyzeBranch(MBB&: PrevBB, TBB&: PrevTBB, FBB&: PrevFBB, Cond&: PrevCond, AllowModify: true) &&
1813 PrevBB.isSuccessor(MBB: &*FallThrough)) {
1814 MBB->moveAfter(NewBefore: &MF.back());
1815 MadeChange = true;
1816 return MadeChange;
1817 }
1818 }
1819 }
1820
1821 return MadeChange;
1822}
1823
1824//===----------------------------------------------------------------------===//
1825// Hoist Common Code
1826//===----------------------------------------------------------------------===//
1827
1828bool BranchFolder::HoistCommonCode(MachineFunction &MF) {
1829 bool MadeChange = false;
1830 for (MachineBasicBlock &MBB : llvm::make_early_inc_range(Range&: MF))
1831 MadeChange |= HoistCommonCodeInSuccs(MBB: &MBB);
1832
1833 return MadeChange;
1834}
1835
1836/// findFalseBlock - BB has a fallthrough. Find its 'false' successor given
1837/// its 'true' successor.
1838static MachineBasicBlock *findFalseBlock(MachineBasicBlock *BB,
1839 MachineBasicBlock *TrueBB) {
1840 for (MachineBasicBlock *SuccBB : BB->successors())
1841 if (SuccBB != TrueBB)
1842 return SuccBB;
1843 return nullptr;
1844}
1845
1846template <class Container>
1847static void addRegAndItsAliases(Register Reg, const TargetRegisterInfo *TRI,
1848 Container &Set) {
1849 if (Reg.isPhysical()) {
1850 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
1851 Set.insert(*AI);
1852 } else {
1853 Set.insert(Reg);
1854 }
1855}
1856
1857/// findHoistingInsertPosAndDeps - Find the location to move common instructions
1858/// in successors to. The location is usually just before the terminator,
1859/// however if the terminator is a conditional branch and its previous
1860/// instruction is the flag setting instruction, the previous instruction is
1861/// the preferred location. This function also gathers uses and defs of the
1862/// instructions from the insertion point to the end of the block. The data is
1863/// used by HoistCommonCodeInSuccs to ensure safety.
1864static
1865MachineBasicBlock::iterator findHoistingInsertPosAndDeps(MachineBasicBlock *MBB,
1866 const TargetInstrInfo *TII,
1867 const TargetRegisterInfo *TRI,
1868 SmallSet<Register, 4> &Uses,
1869 SmallSet<Register, 4> &Defs) {
1870 MachineBasicBlock::iterator Loc = MBB->getFirstTerminator();
1871 if (!TII->isUnpredicatedTerminator(MI: *Loc))
1872 return MBB->end();
1873
1874 for (const MachineOperand &MO : Loc->operands()) {
1875 if (!MO.isReg())
1876 continue;
1877 Register Reg = MO.getReg();
1878 if (!Reg)
1879 continue;
1880 if (MO.isUse()) {
1881 addRegAndItsAliases(Reg, TRI, Set&: Uses);
1882 } else {
1883 if (!MO.isDead())
1884 // Don't try to hoist code in the rare case the terminator defines a
1885 // register that is later used.
1886 return MBB->end();
1887
1888 // If the terminator defines a register, make sure we don't hoist
1889 // the instruction whose def might be clobbered by the terminator.
1890 addRegAndItsAliases(Reg, TRI, Set&: Defs);
1891 }
1892 }
1893
1894 if (Uses.empty())
1895 return Loc;
1896 // If the terminator is the only instruction in the block and Uses is not
1897 // empty (or we would have returned above), we can still safely hoist
1898 // instructions just before the terminator as long as the Defs/Uses are not
1899 // violated (which is checked in HoistCommonCodeInSuccs).
1900 if (Loc == MBB->begin())
1901 return Loc;
1902
1903 // The terminator is probably a conditional branch, try not to separate the
1904 // branch from condition setting instruction.
1905 MachineBasicBlock::iterator PI = prev_nodbg(It: Loc, Begin: MBB->begin());
1906
1907 bool IsDef = false;
1908 for (const MachineOperand &MO : PI->operands()) {
1909 // If PI has a regmask operand, it is probably a call. Separate away.
1910 if (MO.isRegMask())
1911 return Loc;
1912 if (!MO.isReg() || MO.isUse())
1913 continue;
1914 Register Reg = MO.getReg();
1915 if (!Reg)
1916 continue;
1917 if (Uses.count(V: Reg)) {
1918 IsDef = true;
1919 break;
1920 }
1921 }
1922 if (!IsDef)
1923 // The condition setting instruction is not just before the conditional
1924 // branch.
1925 return Loc;
1926
1927 // Be conservative, don't insert instruction above something that may have
1928 // side-effects. And since it's potentially bad to separate flag setting
1929 // instruction from the conditional branch, just abort the optimization
1930 // completely.
1931 // Also avoid moving code above predicated instruction since it's hard to
1932 // reason about register liveness with predicated instruction.
1933 bool DontMoveAcrossStore = true;
1934 if (!PI->isSafeToMove(SawStore&: DontMoveAcrossStore) || TII->isPredicated(MI: *PI))
1935 return MBB->end();
1936
1937 // Find out what registers are live. Note this routine is ignoring other live
1938 // registers which are only used by instructions in successor blocks.
1939 for (const MachineOperand &MO : PI->operands()) {
1940 if (!MO.isReg())
1941 continue;
1942 Register Reg = MO.getReg();
1943 if (!Reg)
1944 continue;
1945 if (MO.isUse()) {
1946 addRegAndItsAliases(Reg, TRI, Set&: Uses);
1947 } else {
1948 if (Uses.erase(V: Reg)) {
1949 if (Reg.isPhysical()) {
1950 for (MCPhysReg SubReg : TRI->subregs(Reg))
1951 Uses.erase(V: SubReg); // Use sub-registers to be conservative
1952 }
1953 }
1954 addRegAndItsAliases(Reg, TRI, Set&: Defs);
1955 }
1956 }
1957
1958 return PI;
1959}
1960
1961bool BranchFolder::HoistCommonCodeInSuccs(MachineBasicBlock *MBB) {
1962 MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
1963 SmallVector<MachineOperand, 4> Cond;
1964 if (TII->analyzeBranch(MBB&: *MBB, TBB, FBB, Cond, AllowModify: true) || !TBB || Cond.empty())
1965 return false;
1966
1967 if (!FBB) FBB = findFalseBlock(BB: MBB, TrueBB: TBB);
1968 if (!FBB)
1969 // Malformed bcc? True and false blocks are the same?
1970 return false;
1971
1972 // Restrict the optimization to cases where MBB is the only predecessor,
1973 // it is an obvious win.
1974 if (TBB->pred_size() > 1 || FBB->pred_size() > 1)
1975 return false;
1976
1977 // Find a suitable position to hoist the common instructions to. Also figure
1978 // out which registers are used or defined by instructions from the insertion
1979 // point to the end of the block.
1980 SmallSet<Register, 4> Uses, Defs;
1981 MachineBasicBlock::iterator Loc =
1982 findHoistingInsertPosAndDeps(MBB, TII, TRI, Uses, Defs);
1983 if (Loc == MBB->end())
1984 return false;
1985
1986 bool HasDups = false;
1987 SmallSet<Register, 4> ActiveDefsSet, AllDefsSet;
1988 MachineBasicBlock::iterator TIB = TBB->begin();
1989 MachineBasicBlock::iterator FIB = FBB->begin();
1990 MachineBasicBlock::iterator TIE = TBB->end();
1991 MachineBasicBlock::iterator FIE = FBB->end();
1992 MachineFunction &MF = *TBB->getParent();
1993 while (TIB != TIE && FIB != FIE) {
1994 // Skip dbg_value instructions. These do not count.
1995 TIB = skipDebugInstructionsForward(It: TIB, End: TIE, SkipPseudoOp: false);
1996 FIB = skipDebugInstructionsForward(It: FIB, End: FIE, SkipPseudoOp: false);
1997 if (TIB == TIE || FIB == FIE)
1998 break;
1999
2000 if (!TIB->isIdenticalTo(Other: *FIB, Check: MachineInstr::CheckKillDead))
2001 break;
2002
2003 if (TII->isPredicated(MI: *TIB))
2004 // Hard to reason about register liveness with predicated instruction.
2005 break;
2006
2007 if (!TII->isSafeToMove(MI: *TIB, MBB: TBB, MF))
2008 // Don't hoist the instruction if it isn't safe to move.
2009 break;
2010
2011 bool IsSafe = true;
2012 for (MachineOperand &MO : TIB->operands()) {
2013 // Don't attempt to hoist instructions with register masks.
2014 if (MO.isRegMask()) {
2015 IsSafe = false;
2016 break;
2017 }
2018 if (!MO.isReg())
2019 continue;
2020 Register Reg = MO.getReg();
2021 if (!Reg)
2022 continue;
2023 if (MO.isDef()) {
2024 if (Uses.count(V: Reg)) {
2025 // Avoid clobbering a register that's used by the instruction at
2026 // the point of insertion.
2027 IsSafe = false;
2028 break;
2029 }
2030
2031 if (Defs.count(V: Reg) && !MO.isDead()) {
2032 // Don't hoist the instruction if the def would be clobber by the
2033 // instruction at the point insertion. FIXME: This is overly
2034 // conservative. It should be possible to hoist the instructions
2035 // in BB2 in the following example:
2036 // BB1:
2037 // r1, eflag = op1 r2, r3
2038 // brcc eflag
2039 //
2040 // BB2:
2041 // r1 = op2, ...
2042 // = op3, killed r1
2043 IsSafe = false;
2044 break;
2045 }
2046 } else if (!ActiveDefsSet.count(V: Reg)) {
2047 if (Defs.count(V: Reg)) {
2048 // Use is defined by the instruction at the point of insertion.
2049 IsSafe = false;
2050 break;
2051 }
2052
2053 if (MO.isKill() && Uses.count(V: Reg))
2054 // Kills a register that's read by the instruction at the point of
2055 // insertion. Remove the kill marker.
2056 MO.setIsKill(false);
2057 }
2058 }
2059 if (!IsSafe)
2060 break;
2061
2062 bool DontMoveAcrossStore = true;
2063 if (!TIB->isSafeToMove(SawStore&: DontMoveAcrossStore))
2064 break;
2065
2066 // Remove kills from ActiveDefsSet, these registers had short live ranges.
2067 for (const MachineOperand &MO : TIB->all_uses()) {
2068 if (!MO.isKill())
2069 continue;
2070 Register Reg = MO.getReg();
2071 if (!Reg)
2072 continue;
2073 if (!AllDefsSet.count(V: Reg)) {
2074 continue;
2075 }
2076 if (Reg.isPhysical()) {
2077 for (MCRegAliasIterator AI(Reg, TRI, true); AI.isValid(); ++AI)
2078 ActiveDefsSet.erase(V: *AI);
2079 } else {
2080 ActiveDefsSet.erase(V: Reg);
2081 }
2082 }
2083
2084 // Track local defs so we can update liveins.
2085 for (const MachineOperand &MO : TIB->all_defs()) {
2086 if (MO.isDead())
2087 continue;
2088 Register Reg = MO.getReg();
2089 if (!Reg || Reg.isVirtual())
2090 continue;
2091 addRegAndItsAliases(Reg, TRI, Set&: ActiveDefsSet);
2092 addRegAndItsAliases(Reg, TRI, Set&: AllDefsSet);
2093 }
2094
2095 HasDups = true;
2096 ++TIB;
2097 ++FIB;
2098 }
2099
2100 if (!HasDups)
2101 return false;
2102
2103 // Hoist the instructions from [T.begin, TIB) and then delete [F.begin, FIB).
2104 // If we're hoisting from a single block then just splice. Else step through
2105 // and merge the debug locations.
2106 if (TBB == FBB) {
2107 MBB->splice(Where: Loc, Other: TBB, From: TBB->begin(), To: TIB);
2108 } else {
2109 // Merge the debug locations, and hoist and kill the debug instructions from
2110 // both branches. FIXME: We could probably try harder to preserve some debug
2111 // instructions (but at least this isn't producing wrong locations).
2112 MachineInstrBuilder MIRBuilder(*MBB->getParent(), Loc);
2113 auto HoistAndKillDbgInstr = [MBB, Loc](MachineBasicBlock::iterator DI) {
2114 assert(DI->isDebugInstr() && "Expected a debug instruction");
2115 if (DI->isDebugRef()) {
2116 const TargetInstrInfo *TII =
2117 MBB->getParent()->getSubtarget().getInstrInfo();
2118 const MCInstrDesc &DBGV = TII->get(Opcode: TargetOpcode::DBG_VALUE);
2119 DI = BuildMI(MF&: *MBB->getParent(), DL: DI->getDebugLoc(), MCID: DBGV, IsIndirect: false, Reg: 0,
2120 Variable: DI->getDebugVariable(), Expr: DI->getDebugExpression());
2121 MBB->insert(I: Loc, MI: &*DI);
2122 return;
2123 }
2124 // Deleting a DBG_PHI results in an undef at the referenced DBG_INSTR_REF.
2125 if (DI->isDebugPHI()) {
2126 DI->eraseFromParent();
2127 return;
2128 }
2129 // Move DBG_LABELs without modifying them. Set DBG_VALUEs undef.
2130 if (!DI->isDebugLabel())
2131 DI->setDebugValueUndef();
2132 DI->moveBefore(MovePos: &*Loc);
2133 };
2134
2135 // TIB and FIB point to the end of the regions to hoist/merge in TBB and
2136 // FBB.
2137 MachineBasicBlock::iterator FE = FIB;
2138 MachineBasicBlock::iterator FI = FBB->begin();
2139 for (MachineBasicBlock::iterator TI :
2140 make_early_inc_range(Range: make_range(x: TBB->begin(), y: TIB))) {
2141 // Hoist and kill debug instructions from FBB. After this loop FI points
2142 // to the next non-debug instruction to hoist (checked in assert after the
2143 // TBB debug instruction handling code).
2144 while (FI != FE && FI->isDebugInstr())
2145 HoistAndKillDbgInstr(FI++);
2146
2147 // Kill debug instructions before moving.
2148 if (TI->isDebugInstr()) {
2149 HoistAndKillDbgInstr(TI);
2150 continue;
2151 }
2152
2153 // FI and TI now point to identical non-debug instructions.
2154 assert(FI != FE && "Unexpected end of FBB range");
2155 // Pseudo probes are excluded from the range when identifying foldable
2156 // instructions, so we don't expect to see one now.
2157 assert(!TI->isPseudoProbe() && "Unexpected pseudo probe in range");
2158 // NOTE: The loop above checks CheckKillDead but we can't do that here as
2159 // it modifies some kill markers after the check.
2160 assert(TI->isIdenticalTo(*FI, MachineInstr::CheckDefs) &&
2161 "Expected non-debug lockstep");
2162
2163 // Merge debug locs on hoisted instructions.
2164 TI->setDebugLoc(
2165 DILocation::getMergedLocation(LocA: TI->getDebugLoc(), LocB: FI->getDebugLoc()));
2166 TI->moveBefore(MovePos: &*Loc);
2167 ++FI;
2168 }
2169 }
2170
2171 FBB->erase(I: FBB->begin(), E: FIB);
2172
2173 if (UpdateLiveIns)
2174 fullyRecomputeLiveIns(MBBs: {TBB, FBB});
2175
2176 ++NumHoist;
2177 return true;
2178}
2179