1//===-- AMDGPUTargetMachine.h - AMDGPU TargetMachine Interface --*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// The AMDGPU TargetMachine interface definition for hw codegen targets.
11//
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
15#define LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
16
17#include "GCNSubtarget.h"
18#include "llvm/CodeGen/CodeGenTargetMachineImpl.h"
19#include "llvm/CodeGen/TargetPassConfig.h"
20#include "llvm/MC/MCStreamer.h"
21#include <optional>
22#include <utility>
23
24namespace llvm {
25
26//===----------------------------------------------------------------------===//
27// AMDGPU Target Machine (R600+)
28//===----------------------------------------------------------------------===//
29
30class AMDGPUTargetMachine : public CodeGenTargetMachineImpl {
31protected:
32 std::unique_ptr<TargetLoweringObjectFile> TLOF;
33
34 StringRef getGPUName(const Function &F) const;
35 StringRef getFeatureString(const Function &F) const;
36
37public:
38 static bool EnableFunctionCalls;
39 static bool EnableLowerModuleLDS;
40
41 AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
42 StringRef FS, const TargetOptions &Options,
43 std::optional<Reloc::Model> RM,
44 std::optional<CodeModel::Model> CM, CodeGenOptLevel OL);
45 ~AMDGPUTargetMachine() override;
46
47 const TargetSubtargetInfo *getSubtargetImpl() const;
48 const TargetSubtargetInfo *
49 getSubtargetImpl(const Function &) const override = 0;
50
51 TargetLoweringObjectFile *getObjFileLowering() const override {
52 return TLOF.get();
53 }
54
55 void registerPassBuilderCallbacks(PassBuilder &PB) override;
56 void registerDefaultAliasAnalyses(AAManager &) override;
57
58 /// Get the integer value of a null pointer in the given address space.
59 static int64_t getNullPointerValue(unsigned AddrSpace);
60
61 bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override;
62
63 unsigned getAssumedAddrSpace(const Value *V) const override;
64
65 std::pair<const Value *, unsigned>
66 getPredicatedAddrSpace(const Value *V) const override;
67
68 unsigned getAddressSpaceForPseudoSourceKind(unsigned Kind) const override;
69
70 bool splitModule(Module &M, unsigned NumParts,
71 function_ref<void(std::unique_ptr<Module> MPart)>
72 ModuleCallback) override;
73 ScheduleDAGInstrs *
74 createMachineScheduler(MachineSchedContext *C) const override;
75};
76
77//===----------------------------------------------------------------------===//
78// GCN Target Machine (SI+)
79//===----------------------------------------------------------------------===//
80
81class GCNTargetMachine final : public AMDGPUTargetMachine {
82private:
83 mutable StringMap<std::unique_ptr<GCNSubtarget>> SubtargetMap;
84
85public:
86 GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
87 StringRef FS, const TargetOptions &Options,
88 std::optional<Reloc::Model> RM,
89 std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
90 bool JIT);
91
92 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
93
94 const TargetSubtargetInfo *getSubtargetImpl(const Function &) const override;
95
96 TargetTransformInfo getTargetTransformInfo(const Function &F) const override;
97
98 bool useIPRA() const override { return true; }
99
100 Error buildCodeGenPipeline(ModulePassManager &MPM, raw_pwrite_stream &Out,
101 raw_pwrite_stream *DwoOut,
102 CodeGenFileType FileType,
103 const CGPassBuilderOption &Opts,
104 PassInstrumentationCallbacks *PIC) override;
105
106 void registerMachineRegisterInfoCallback(MachineFunction &MF) const override;
107
108 MachineFunctionInfo *
109 createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F,
110 const TargetSubtargetInfo *STI) const override;
111
112 yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const override;
113 yaml::MachineFunctionInfo *
114 convertFuncInfoToYAML(const MachineFunction &MF) const override;
115 bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &,
116 PerFunctionMIParsingState &PFS,
117 SMDiagnostic &Error,
118 SMRange &SourceRange) const override;
119 ScheduleDAGInstrs *
120 createMachineScheduler(MachineSchedContext *C) const override;
121 ScheduleDAGInstrs *
122 createPostMachineScheduler(MachineSchedContext *C) const override;
123};
124
125//===----------------------------------------------------------------------===//
126// AMDGPU Pass Setup - For Legacy Pass Manager.
127//===----------------------------------------------------------------------===//
128
129class AMDGPUPassConfig : public TargetPassConfig {
130public:
131 AMDGPUPassConfig(TargetMachine &TM, PassManagerBase &PM);
132
133 AMDGPUTargetMachine &getAMDGPUTargetMachine() const {
134 return getTM<AMDGPUTargetMachine>();
135 }
136 void addEarlyCSEOrGVNPass();
137 void addStraightLineScalarOptimizationPasses();
138 void addIRPasses() override;
139 void addCodeGenPrepare() override;
140 bool addPreISel() override;
141 bool addInstSelector() override;
142 bool addGCPasses() override;
143
144 std::unique_ptr<CSEConfigBase> getCSEConfig() const override;
145
146 /// Check if a pass is enabled given \p Opt option. The option always
147 /// overrides defaults if explicitly used. Otherwise its default will
148 /// be used given that a pass shall work at an optimization \p Level
149 /// minimum.
150 bool isPassEnabled(const cl::opt<bool> &Opt,
151 CodeGenOptLevel Level = CodeGenOptLevel::Default) const {
152 if (Opt.getNumOccurrences())
153 return Opt;
154 if (TM->getOptLevel() < Level)
155 return false;
156 return Opt;
157 }
158};
159
160} // end namespace llvm
161
162#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETMACHINE_H
163