| 1 | //===--- HexagonAggressiveRDFCopy.h -----------------------------*- C++ -*-===// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | |
| 9 | #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGON_AGGRESSIVE_RDFCOPY_H |
| 10 | #define LLVM_LIB_TARGET_HEXAGON_HEXAGON_AGGRESSIVE_RDFCOPY_H |
| 11 | |
| 12 | #include "HexagonSubtarget.h" |
| 13 | #include "RDFCopyBase.h" |
| 14 | #include "llvm/ADT/DenseMap.h" |
| 15 | #include "llvm/CodeGen/MachineFunction.h" |
| 16 | #include "llvm/CodeGen/RDFGraph.h" |
| 17 | #include "llvm/CodeGen/RDFLiveness.h" |
| 18 | #include "llvm/CodeGen/RDFRegisters.h" |
| 19 | #include <vector> |
| 20 | |
| 21 | namespace llvm { |
| 22 | class HexagonRegisterInfo; |
| 23 | namespace rdf { |
| 24 | |
| 25 | struct AggressiveCopyPropagation : CopyPropagationBase { |
| 26 | AggressiveCopyPropagation(DataFlowGraph &dfg) |
| 27 | : CopyPropagationBase(dfg), PRI(dfg.getPRI()), TRI(dfg.getTRI()), |
| 28 | HRI(*dfg.getMF().getSubtarget<HexagonSubtarget>().getRegisterInfo()) {} |
| 29 | |
| 30 | virtual ~AggressiveCopyPropagation() = default; |
| 31 | |
| 32 | bool run(); |
| 33 | virtual bool interpretAsCopy(const MachineInstr *MI, EqualityMap &EM); |
| 34 | |
| 35 | private: |
| 36 | const PhysicalRegisterInfo &PRI; |
| 37 | const TargetRegisterInfo &TRI; |
| 38 | const HexagonRegisterInfo &HRI; |
| 39 | |
| 40 | // map: reached use node id -> (copy def node, source reg used in copy) |
| 41 | // Maps each use reached by a copy to the copy's def node and source register. |
| 42 | // We might only want to propagate a sub register of the source register. |
| 43 | using CopyPair = std::pair<NodeAddr<DefNode *>, RegisterRef>; |
| 44 | DenseMap<NodeId, CopyPair> ReachedUseToCopyMap; |
| 45 | |
| 46 | // Copy propagation can be applied to uses found in this vector |
| 47 | // Vector of pairs, where each pair: |
| 48 | // Use Node -> vector of refs that are to be added as Use Nodes |
| 49 | // in the updated instruction |
| 50 | using RegRefList = SmallVector<RegisterRef, 4>; |
| 51 | using ReplacableUse = std::pair<NodeAddr<UseNode *>, RegRefList>; |
| 52 | SmallVector<ReplacableUse, 16> ReplacableUses; |
| 53 | |
| 54 | void recordCopy(NodeAddr<StmtNode *> SA, EqualityMap &EM); |
| 55 | void recordReplacableUses(NodeAddr<InstrNode *> IA); |
| 56 | void scanBlock(MachineBasicBlock *B); |
| 57 | }; |
| 58 | |
| 59 | } // end namespace rdf |
| 60 | } // end namespace llvm |
| 61 | |
| 62 | #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGON_AGGRESSIVE_RDFCOPY_H |
| 63 | |