1//===- MipsRegisterInfo.h - Mips Register Information Impl ------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the Mips implementation of the TargetRegisterInfo class.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
14#define LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
15
16#include "Mips.h"
17#include "llvm/CodeGen/MachineBasicBlock.h"
18#include <cstdint>
19
20#define GET_REGINFO_HEADER
21#include "MipsGenRegisterInfo.inc"
22
23namespace llvm {
24
25class MCRegisterClass;
26using TargetRegisterClass = MCRegisterClass;
27
28class MipsRegisterInfo : public MipsGenRegisterInfo {
29private:
30 const bool ArePtrs64bit;
31
32public:
33 explicit MipsRegisterInfo(const MipsSubtarget &STI);
34
35 /// Get PIC indirect call register
36 static unsigned getPICCallReg();
37
38 /// Code Generation virtual methods...
39 const TargetRegisterClass *getPointerRegClass(unsigned Kind) const override;
40
41 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
42 MachineFunction &MF) const override;
43 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
44 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
45 CallingConv::ID) const override;
46 static const uint32_t *getMips16RetHelperMask();
47
48 BitVector getReservedRegs(const MachineFunction &MF) const override;
49
50 /// Stack Frame Processing Methods
51 bool eliminateFrameIndex(MachineBasicBlock::iterator II,
52 int SPAdj, unsigned FIOperandNum,
53 RegScavenger *RS = nullptr) const override;
54
55 // Stack realignment queries.
56 bool canRealignStack(const MachineFunction &MF) const override;
57
58 /// Debug information queries.
59 Register getFrameRegister(const MachineFunction &MF) const override;
60
61 /// Return GPR register class.
62 virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0;
63
64private:
65 virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
66 int FrameIndex, uint64_t StackSize,
67 int64_t SPOffset) const = 0;
68};
69
70} // end namespace llvm
71
72#endif // LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
73