1//===- MipsRegisterInfo.h - Mips Register Information Impl ------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the Mips implementation of the TargetRegisterInfo class.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
14#define LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
15
16#include "Mips.h"
17#include "llvm/CodeGen/MachineBasicBlock.h"
18#include <cstdint>
19
20#define GET_REGINFO_HEADER
21#include "MipsGenRegisterInfo.inc"
22
23namespace llvm {
24
25class TargetRegisterClass;
26
27class MipsRegisterInfo : public MipsGenRegisterInfo {
28private:
29 const bool ArePtrs64bit;
30
31public:
32 explicit MipsRegisterInfo(const MipsSubtarget &STI);
33
34 /// Get PIC indirect call register
35 static unsigned getPICCallReg();
36
37 /// Code Generation virtual methods...
38 const TargetRegisterClass *getPointerRegClass(unsigned Kind) const override;
39
40 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
41 MachineFunction &MF) const override;
42 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
43 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
44 CallingConv::ID) const override;
45 static const uint32_t *getMips16RetHelperMask();
46
47 BitVector getReservedRegs(const MachineFunction &MF) const override;
48
49 /// Stack Frame Processing Methods
50 bool eliminateFrameIndex(MachineBasicBlock::iterator II,
51 int SPAdj, unsigned FIOperandNum,
52 RegScavenger *RS = nullptr) const override;
53
54 // Stack realignment queries.
55 bool canRealignStack(const MachineFunction &MF) const override;
56
57 /// Debug information queries.
58 Register getFrameRegister(const MachineFunction &MF) const override;
59
60 /// Return GPR register class.
61 virtual const TargetRegisterClass *intRegClass(unsigned Size) const = 0;
62
63private:
64 virtual void eliminateFI(MachineBasicBlock::iterator II, unsigned OpNo,
65 int FrameIndex, uint64_t StackSize,
66 int64_t SPOffset) const = 0;
67};
68
69} // end namespace llvm
70
71#endif // LLVM_LIB_TARGET_MIPS_MIPSREGISTERINFO_H
72