1//===-- RISCVTargetStreamer.cpp - RISC-V Target Streamer Methods ----------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file provides RISC-V specific target streamer methods.
10//
11//===----------------------------------------------------------------------===//
12
13#include "RISCVTargetStreamer.h"
14#include "RISCVBaseInfo.h"
15#include "RISCVMCTargetDesc.h"
16#include "llvm/MC/MCContext.h"
17#include "llvm/MC/MCExpr.h"
18#include "llvm/MC/MCStreamer.h"
19#include "llvm/MC/MCSymbol.h"
20#include "llvm/Support/ErrorHandling.h"
21#include "llvm/Support/FormattedStream.h"
22#include "llvm/Support/RISCVAttributes.h"
23#include "llvm/TargetParser/RISCVISAInfo.h"
24
25using namespace llvm;
26
27RISCVTargetStreamer::RISCVTargetStreamer(MCStreamer &S)
28 : MCTargetStreamer(S),
29 CLOpts(RISCV_MC::getCLOpts(Options: S.getContext().getTargetOptions())) {}
30
31void RISCVTargetStreamer::finish() { finishAttributeSection(); }
32void RISCVTargetStreamer::reset() {}
33
34void RISCVTargetStreamer::emitDirectiveOptionArch(
35 ArrayRef<RISCVOptionArchArg> Args) {}
36void RISCVTargetStreamer::emitDirectiveOptionExact() {}
37void RISCVTargetStreamer::emitDirectiveOptionNoExact() {}
38void RISCVTargetStreamer::emitDirectiveOptionPIC() {}
39void RISCVTargetStreamer::emitDirectiveOptionNoPIC() {}
40void RISCVTargetStreamer::emitDirectiveOptionPop() {}
41void RISCVTargetStreamer::emitDirectiveOptionPush() {}
42void RISCVTargetStreamer::emitDirectiveOptionRelax() {}
43void RISCVTargetStreamer::emitDirectiveOptionNoRelax() {}
44void RISCVTargetStreamer::emitDirectiveOptionRVC() {}
45void RISCVTargetStreamer::emitDirectiveOptionNoRVC() {}
46void RISCVTargetStreamer::emitDirectiveVariantCC(MCSymbol &Symbol) {}
47void RISCVTargetStreamer::emitAttribute(unsigned Attribute, unsigned Value) {}
48void RISCVTargetStreamer::finishAttributeSection() {}
49void RISCVTargetStreamer::emitTextAttribute(unsigned Attribute,
50 StringRef String) {}
51void RISCVTargetStreamer::emitIntTextAttribute(unsigned Attribute,
52 unsigned IntValue,
53 StringRef StringValue) {}
54
55void RISCVTargetStreamer::setTargetABI(RISCVABI::ABI ABI) {
56 assert(ABI != RISCVABI::ABI_Unknown && "Improperly initialized target ABI");
57 TargetABI = ABI;
58}
59
60void RISCVTargetStreamer::setFlagsFromFeatures(const MCSubtargetInfo &STI) {
61 HasRVC = STI.hasFeature(Feature: RISCV::FeatureStdExtZca);
62 HasTSO = STI.hasFeature(Feature: RISCV::FeatureStdExtZtso);
63}
64
65void RISCVTargetStreamer::emitTargetAttributes(const MCSubtargetInfo &STI,
66 bool EmitStackAlign) {
67 if (EmitStackAlign) {
68 unsigned StackAlign;
69 if (TargetABI == RISCVABI::ABI_ILP32E)
70 StackAlign = 4;
71 else if (TargetABI == RISCVABI::ABI_LP64E)
72 StackAlign = 8;
73 else
74 StackAlign = 16;
75 emitAttribute(Attribute: RISCVAttrs::STACK_ALIGN, Value: StackAlign);
76 }
77
78 auto ParseResult = RISCVFeatures::parseFeatureBits(STI);
79 if (!ParseResult) {
80 report_fatal_error(Err: ParseResult.takeError());
81 } else {
82 auto &ISAInfo = *ParseResult;
83 std::string Arch = ISAInfo->toString();
84 emitTextAttribute(Attribute: RISCVAttrs::ARCH, String: Arch);
85 setArchString(Arch);
86 }
87
88 if (CLOpts.abi_attributes && STI.hasFeature(Feature: RISCV::FeatureStdExtA)) {
89 unsigned AtomicABITag;
90 if (STI.hasFeature(Feature: RISCV::FeatureStdExtZalasr))
91 AtomicABITag = static_cast<unsigned>(RISCVAttrs::RISCVAtomicAbiTag::A7);
92 else if (STI.hasFeature(Feature: RISCV::FeatureNoTrailingSeqCstFence))
93 AtomicABITag = static_cast<unsigned>(RISCVAttrs::RISCVAtomicAbiTag::A6C);
94 else
95 AtomicABITag = static_cast<unsigned>(RISCVAttrs::RISCVAtomicAbiTag::A6S);
96 emitAttribute(Attribute: RISCVAttrs::ATOMIC_ABI, Value: AtomicABITag);
97 }
98}
99
100// This part is for ascii assembly output
101RISCVTargetAsmStreamer::RISCVTargetAsmStreamer(MCStreamer &S,
102 formatted_raw_ostream &OS)
103 : RISCVTargetStreamer(S), OS(OS) {}
104
105void RISCVTargetAsmStreamer::emitDirectiveOptionPush() {
106 OS << "\t.option\tpush\n";
107}
108
109void RISCVTargetAsmStreamer::emitDirectiveOptionPop() {
110 OS << "\t.option\tpop\n";
111}
112
113void RISCVTargetAsmStreamer::emitDirectiveOptionPIC() {
114 OS << "\t.option\tpic\n";
115}
116
117void RISCVTargetAsmStreamer::emitDirectiveOptionNoPIC() {
118 OS << "\t.option\tnopic\n";
119}
120
121void RISCVTargetAsmStreamer::emitDirectiveOptionRVC() {
122 OS << "\t.option\trvc\n";
123}
124
125void RISCVTargetAsmStreamer::emitDirectiveOptionNoRVC() {
126 OS << "\t.option\tnorvc\n";
127}
128
129void RISCVTargetAsmStreamer::emitDirectiveOptionExact() {
130 OS << "\t.option\texact\n";
131}
132
133void RISCVTargetAsmStreamer::emitDirectiveOptionNoExact() {
134 OS << "\t.option\tnoexact\n";
135}
136
137void RISCVTargetAsmStreamer::emitDirectiveOptionRelax() {
138 OS << "\t.option\trelax\n";
139}
140
141void RISCVTargetAsmStreamer::emitDirectiveOptionNoRelax() {
142 OS << "\t.option\tnorelax\n";
143}
144
145void RISCVTargetAsmStreamer::emitDirectiveOptionArch(
146 ArrayRef<RISCVOptionArchArg> Args) {
147 OS << "\t.option\tarch";
148 for (const auto &Arg : Args) {
149 OS << ", ";
150 switch (Arg.Type) {
151 case RISCVOptionArchArgType::Full:
152 break;
153 case RISCVOptionArchArgType::Plus:
154 OS << "+";
155 break;
156 case RISCVOptionArchArgType::Minus:
157 OS << "-";
158 break;
159 }
160 OS << Arg.Value;
161 }
162 OS << "\n";
163}
164
165void RISCVTargetAsmStreamer::emitDirectiveVariantCC(MCSymbol &Symbol) {
166 OS << "\t.variant_cc\t" << Symbol.getName() << "\n";
167}
168
169void RISCVTargetAsmStreamer::emitAttribute(unsigned Attribute, unsigned Value) {
170 OS << "\t.attribute\t" << Attribute << ", " << Twine(Value) << "\n";
171}
172
173void RISCVTargetAsmStreamer::emitTextAttribute(unsigned Attribute,
174 StringRef String) {
175 OS << "\t.attribute\t" << Attribute << ", \"" << String << "\"\n";
176}
177
178void RISCVTargetAsmStreamer::emitIntTextAttribute(unsigned Attribute,
179 unsigned IntValue,
180 StringRef StringValue) {}
181
182void RISCVTargetAsmStreamer::finishAttributeSection() {}
183