1//===-- RISCVTargetMachine.h - Define TargetMachine for RISC-V --*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file declares the RISC-V specific subclass of TargetMachine.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_TARGET_RISCV_RISCVTARGETMACHINE_H
14#define LLVM_LIB_TARGET_RISCV_RISCVTARGETMACHINE_H
15
16#include "MCTargetDesc/RISCVMCTargetDesc.h"
17#include "RISCVSubtarget.h"
18#include "llvm/CodeGen/CodeGenTargetMachineImpl.h"
19#include "llvm/IR/DataLayout.h"
20#include <optional>
21
22namespace llvm {
23class RISCVTargetMachine : public CodeGenTargetMachineImpl {
24 const RISCVOptions &CLOpts;
25 std::unique_ptr<TargetLoweringObjectFile> TLOF;
26 mutable StringMap<std::unique_ptr<RISCVSubtarget>> SubtargetMap;
27
28public:
29 RISCVTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
30 StringRef FS, const TargetOptions &Options,
31 std::optional<Reloc::Model> RM,
32 std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
33 bool JIT);
34
35 const RISCVOptions &getCLOpts() const { return CLOpts; }
36 const RISCVSubtarget *getSubtargetImpl(const Function &F) const override;
37 // DO NOT IMPLEMENT: There is no such thing as a valid default subtarget,
38 // subtargets are per-function entities based on the target-specific
39 // attributes of each function.
40 const RISCVSubtarget *getSubtargetImpl() const = delete;
41
42 TargetPassConfig *createPassConfig(PassManagerBase &PM) override;
43
44 TargetLoweringObjectFile *getObjFileLowering() const override {
45 return TLOF.get();
46 }
47
48 MachineFunctionInfo *
49 createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F,
50 const TargetSubtargetInfo *STI) const override;
51
52 TargetTransformInfo getTargetTransformInfo(const Function &F) const override;
53
54 bool isNoopAddrSpaceCast(const DataLayout &DL, unsigned SrcAS,
55 unsigned DstAS) const override;
56
57 yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const override;
58 yaml::MachineFunctionInfo *
59 convertFuncInfoToYAML(const MachineFunction &MF) const override;
60 bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &,
61 PerFunctionMIParsingState &PFS,
62 SMDiagnostic &Error,
63 SMRange &SourceRange) const override;
64 void registerPassBuilderCallbacks(PassBuilder &PB) override;
65 Error buildCodeGenPipeline(ModulePassManager &MPM, ModuleAnalysisManager &MAM,
66 raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut,
67 CodeGenFileType FileType,
68 const CGPassBuilderOption &Opt, MCContext &Ctx,
69 PassInstrumentationCallbacks *PIC) override;
70 ScheduleDAGInstrs *
71 createMachineScheduler(MachineSchedContext *C) const override;
72 ScheduleDAGInstrs *
73 createPostMachineScheduler(MachineSchedContext *C) const override;
74};
75
76std::unique_ptr<ScheduleDAGMutation>
77createRISCVVectorMaskDAGMutation(const TargetRegisterInfo *TRI);
78
79} // namespace llvm
80
81#endif
82