1//===----- RISCVZacasABIFix.cpp -------------------------------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This pass implements a fence insertion for an atomic cmpxchg in a case that
10// isn't easy to do with the current AtomicExpandPass hooks API.
11//
12//===----------------------------------------------------------------------===//
13
14#include "RISCV.h"
15#include "RISCVTargetMachine.h"
16#include "llvm/ADT/Statistic.h"
17#include "llvm/Analysis/ValueTracking.h"
18#include "llvm/CodeGen/TargetPassConfig.h"
19#include "llvm/IR/Dominators.h"
20#include "llvm/IR/IRBuilder.h"
21#include "llvm/IR/InstVisitor.h"
22#include "llvm/IR/Intrinsics.h"
23#include "llvm/InitializePasses.h"
24#include "llvm/Pass.h"
25
26using namespace llvm;
27
28#define DEBUG_TYPE "riscv-zacas-abi-fix"
29#define PASS_NAME "RISC-V Zacas ABI fix"
30
31namespace {
32class RISCVZacasABIFixImpl : public InstVisitor<RISCVZacasABIFixImpl, bool> {
33 const RISCVSubtarget *ST;
34
35public:
36 RISCVZacasABIFixImpl(const RISCVSubtarget *ST) : ST(ST) {}
37 bool run(Function &F);
38 bool visitInstruction(Instruction &I) { return false; }
39 bool visitAtomicCmpXchgInst(AtomicCmpXchgInst &I);
40};
41} // namespace
42
43namespace {
44class RISCVZacasABIFixLegacy : public FunctionPass {
45public:
46 static char ID;
47
48 RISCVZacasABIFixLegacy() : FunctionPass(ID) {}
49
50 bool runOnFunction(Function &F) override;
51
52 StringRef getPassName() const override { return PASS_NAME; }
53
54 void getAnalysisUsage(AnalysisUsage &AU) const override {
55 AU.setPreservesCFG();
56 AU.addRequired<TargetPassConfig>();
57 }
58};
59} // namespace
60
61// Insert a leading fence (needed for broadest atomics ABI compatibility)
62// only if the Zacas extension is enabled and the AtomicCmpXchgInst has a
63// SequentiallyConsistent failure ordering.
64bool RISCVZacasABIFixImpl::visitAtomicCmpXchgInst(AtomicCmpXchgInst &I) {
65 assert(ST->hasStdExtZacas() && "only necessary to run in presence of zacas");
66 IRBuilder<> Builder(&I);
67 if (I.getFailureOrdering() != AtomicOrdering::SequentiallyConsistent)
68 return false;
69
70 Builder.CreateFence(Ordering: AtomicOrdering::SequentiallyConsistent);
71 return true;
72}
73
74bool RISCVZacasABIFixImpl::run(Function &F) {
75 if (!ST->hasStdExtZacas())
76 return false;
77
78 bool MadeChange = false;
79 for (auto &BB : F)
80 for (Instruction &I : llvm::make_early_inc_range(Range&: BB))
81 MadeChange |= visit(I);
82
83 return MadeChange;
84}
85
86bool RISCVZacasABIFixLegacy::runOnFunction(Function &F) {
87 auto &TPC = getAnalysis<TargetPassConfig>();
88 auto &TM = TPC.getTM<RISCVTargetMachine>();
89 auto *ST = &TM.getSubtarget<RISCVSubtarget>(F);
90
91 if (skipFunction(F))
92 return false;
93
94 return RISCVZacasABIFixImpl(ST).run(F);
95}
96
97INITIALIZE_PASS_BEGIN(RISCVZacasABIFixLegacy, DEBUG_TYPE, PASS_NAME, false,
98 false)
99INITIALIZE_PASS_DEPENDENCY(TargetPassConfig)
100INITIALIZE_PASS_END(RISCVZacasABIFixLegacy, DEBUG_TYPE, PASS_NAME, false, false)
101
102char RISCVZacasABIFixLegacy::ID = 0;
103
104FunctionPass *llvm::createRISCVZacasABIFixLegacyPass() {
105 return new RISCVZacasABIFixLegacy();
106}
107
108PreservedAnalyses RISCVZacasABIFixPass::run(Function &F,
109 FunctionAnalysisManager &FAM) {
110 auto *ST = &TM->getSubtarget<RISCVSubtarget>(F);
111
112 bool Changed = RISCVZacasABIFixImpl(ST).run(F);
113 if (!Changed)
114 return PreservedAnalyses::all();
115
116 return PreservedAnalyses::allInSet<CFGAnalyses>();
117}
118