1//==- WebAssemblyMCTargetDesc.h - WebAssembly Target Descriptions -*- C++ -*-=//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file provides WebAssembly-specific target descriptions.
11///
12//===----------------------------------------------------------------------===//
13
14#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCTARGETDESC_H
15#define LLVM_LIB_TARGET_WEBASSEMBLY_MCTARGETDESC_WEBASSEMBLYMCTARGETDESC_H
16
17#include "llvm/BinaryFormat/Wasm.h"
18#include "llvm/MC/MCContext.h"
19#include "llvm/MC/MCInstrDesc.h"
20#include "llvm/Support/CommandLine.h"
21#include "llvm/Support/DataTypes.h"
22#include <memory>
23
24namespace llvm {
25
26class MCAsmBackend;
27class MCCodeEmitter;
28class MCInstrInfo;
29class MCObjectTargetWriter;
30class Triple;
31
32MCCodeEmitter *createWebAssemblyMCCodeEmitter(const MCInstrInfo &MCII,
33 MCContext &Ctx);
34
35MCAsmBackend *createWebAssemblyAsmBackend(const Triple &TT);
36
37std::unique_ptr<MCObjectTargetWriter>
38createWebAssemblyWasmObjectWriter(bool Is64Bit, bool IsEmscripten);
39
40namespace WebAssembly {
41
42enum OperandType {
43 /// Basic block label in a branch construct.
44 OPERAND_BASIC_BLOCK = MCOI::OPERAND_FIRST_TARGET,
45 /// Local index.
46 OPERAND_LOCAL,
47 /// Global index.
48 OPERAND_GLOBAL,
49 /// 32-bit integer immediates.
50 OPERAND_I32IMM,
51 /// 64-bit integer immediates.
52 OPERAND_I64IMM,
53 /// 32-bit floating-point immediates.
54 OPERAND_F32IMM,
55 /// 64-bit floating-point immediates.
56 OPERAND_F64IMM,
57 /// 8-bit vector lane immediate
58 OPERAND_VEC_I8IMM,
59 /// 16-bit vector lane immediate
60 OPERAND_VEC_I16IMM,
61 /// 32-bit vector lane immediate
62 OPERAND_VEC_I32IMM,
63 /// 64-bit vector lane immediate
64 OPERAND_VEC_I64IMM,
65 /// 32-bit unsigned function indices.
66 OPERAND_FUNCTION32,
67 /// 32-bit unsigned memory offsets.
68 OPERAND_OFFSET32,
69 /// 64-bit unsigned memory offsets.
70 OPERAND_OFFSET64,
71 /// p2align immediate for load and store address alignment.
72 OPERAND_P2ALIGN,
73 /// signature immediate for block/loop.
74 OPERAND_SIGNATURE,
75 /// type signature immediate for call_indirect.
76 OPERAND_TYPEINDEX,
77 /// Tag index.
78 OPERAND_TAG,
79 /// A list of branch targets for br_list.
80 OPERAND_BRLIST,
81 /// 32-bit unsigned table number.
82 OPERAND_TABLE,
83 /// A list of catch clauses for try_table.
84 OPERAND_CATCH_LIST,
85 /// Memory ordering immediate for atomic instructions.
86 OPERAND_MEMORDER,
87 /// A vector of value types for select t*.
88 OPERAND_VALTYPE_LIST,
89};
90} // end namespace WebAssembly
91
92namespace WebAssemblyII {
93
94/// Target Operand Flag enum.
95enum TOF {
96 MO_NO_FLAG = 0,
97
98 // On a symbol operand this indicates that the immediate is a wasm global
99 // index. The value of the wasm global will be set to the symbol address at
100 // runtime. This adds a level of indirection similar to the GOT on native
101 // platforms.
102 MO_GOT,
103
104 // Same as MO_GOT but the address stored in the global is a TLS address.
105 MO_GOT_TLS,
106
107 // On a symbol operand this indicates that the immediate is the symbol
108 // address relative the __memory_base wasm global.
109 // Only applicable to data symbols.
110 MO_MEMORY_BASE_REL,
111
112 // On a symbol operand this indicates that the immediate is the symbol
113 // address relative to the TLS base. This is retrieved through
114 // __wasm_get_tls_base() when using libcall thread context, and the __tls_base
115 // global otherwise. Only applicable to data symbols.
116 MO_TLS_BASE_REL,
117
118 // On a symbol operand this indicates that the immediate is the symbol
119 // address relative the __table_base wasm global.
120 // Only applicable to function symbols.
121 MO_TABLE_BASE_REL,
122
123 // On a block signature operand this indicates that this is a destination
124 // block of a (catch_ref) clause in try_table.
125 MO_CATCH_BLOCK_SIG,
126};
127
128} // end namespace WebAssemblyII
129
130} // end namespace llvm
131
132// Defines symbolic names for WebAssembly registers. This defines a mapping from
133// register name to register number.
134//
135#define GET_REGINFO_ENUM
136#include "WebAssemblyGenRegisterInfo.inc"
137
138// Defines symbolic names for the WebAssembly instructions.
139//
140#define GET_INSTRINFO_ENUM
141#define GET_INSTRINFO_MC_HELPER_DECLS
142#include "WebAssemblyGenInstrInfo.inc"
143
144namespace llvm {
145namespace WebAssembly {
146
147/// Instruction opcodes emitted via means other than CodeGen.
148static const unsigned Nop = 0x01;
149static const unsigned End = 0x0b;
150
151/// Return the default p2align value for a load or store with the given opcode.
152inline unsigned GetDefaultP2AlignAny(unsigned Opc) {
153 switch (Opc) {
154#define WASM_LOAD_STORE(NAME) \
155 case WebAssembly::NAME##_A32: \
156 case WebAssembly::NAME##_A64: \
157 case WebAssembly::NAME##_A32_S: \
158 case WebAssembly::NAME##_A64_S:
159 WASM_LOAD_STORE(LOAD8_S_I32)
160 WASM_LOAD_STORE(LOAD8_U_I32)
161 WASM_LOAD_STORE(LOAD8_S_I64)
162 WASM_LOAD_STORE(LOAD8_U_I64)
163 WASM_LOAD_STORE(ATOMIC_LOAD8_U_I32)
164 WASM_LOAD_STORE(ATOMIC_LOAD8_U_I64)
165 WASM_LOAD_STORE(STORE8_I32)
166 WASM_LOAD_STORE(STORE8_I64)
167 WASM_LOAD_STORE(ATOMIC_STORE8_I32)
168 WASM_LOAD_STORE(ATOMIC_STORE8_I64)
169 WASM_LOAD_STORE(ATOMIC_RMW8_U_ADD_I32)
170 WASM_LOAD_STORE(ATOMIC_RMW8_U_ADD_I64)
171 WASM_LOAD_STORE(ATOMIC_RMW8_U_SUB_I32)
172 WASM_LOAD_STORE(ATOMIC_RMW8_U_SUB_I64)
173 WASM_LOAD_STORE(ATOMIC_RMW8_U_AND_I32)
174 WASM_LOAD_STORE(ATOMIC_RMW8_U_AND_I64)
175 WASM_LOAD_STORE(ATOMIC_RMW8_U_OR_I32)
176 WASM_LOAD_STORE(ATOMIC_RMW8_U_OR_I64)
177 WASM_LOAD_STORE(ATOMIC_RMW8_U_XOR_I32)
178 WASM_LOAD_STORE(ATOMIC_RMW8_U_XOR_I64)
179 WASM_LOAD_STORE(ATOMIC_RMW8_U_XCHG_I32)
180 WASM_LOAD_STORE(ATOMIC_RMW8_U_XCHG_I64)
181 WASM_LOAD_STORE(ATOMIC_RMW8_U_CMPXCHG_I32)
182 WASM_LOAD_STORE(ATOMIC_RMW8_U_CMPXCHG_I64)
183 WASM_LOAD_STORE(LOAD8_SPLAT)
184 WASM_LOAD_STORE(LOAD_LANE_8)
185 WASM_LOAD_STORE(STORE_LANE_I8x16)
186 return 0;
187 WASM_LOAD_STORE(LOAD16_S_I32)
188 WASM_LOAD_STORE(LOAD16_U_I32)
189 WASM_LOAD_STORE(LOAD16_S_I64)
190 WASM_LOAD_STORE(LOAD16_U_I64)
191 WASM_LOAD_STORE(ATOMIC_LOAD16_U_I32)
192 WASM_LOAD_STORE(ATOMIC_LOAD16_U_I64)
193 WASM_LOAD_STORE(STORE16_I32)
194 WASM_LOAD_STORE(STORE16_I64)
195 WASM_LOAD_STORE(ATOMIC_STORE16_I32)
196 WASM_LOAD_STORE(ATOMIC_STORE16_I64)
197 WASM_LOAD_STORE(ATOMIC_RMW16_U_ADD_I32)
198 WASM_LOAD_STORE(ATOMIC_RMW16_U_ADD_I64)
199 WASM_LOAD_STORE(ATOMIC_RMW16_U_SUB_I32)
200 WASM_LOAD_STORE(ATOMIC_RMW16_U_SUB_I64)
201 WASM_LOAD_STORE(ATOMIC_RMW16_U_AND_I32)
202 WASM_LOAD_STORE(ATOMIC_RMW16_U_AND_I64)
203 WASM_LOAD_STORE(ATOMIC_RMW16_U_OR_I32)
204 WASM_LOAD_STORE(ATOMIC_RMW16_U_OR_I64)
205 WASM_LOAD_STORE(ATOMIC_RMW16_U_XOR_I32)
206 WASM_LOAD_STORE(ATOMIC_RMW16_U_XOR_I64)
207 WASM_LOAD_STORE(ATOMIC_RMW16_U_XCHG_I32)
208 WASM_LOAD_STORE(ATOMIC_RMW16_U_XCHG_I64)
209 WASM_LOAD_STORE(ATOMIC_RMW16_U_CMPXCHG_I32)
210 WASM_LOAD_STORE(ATOMIC_RMW16_U_CMPXCHG_I64)
211 WASM_LOAD_STORE(LOAD16_SPLAT)
212 WASM_LOAD_STORE(LOAD_LANE_16)
213 WASM_LOAD_STORE(STORE_LANE_I16x8)
214 WASM_LOAD_STORE(LOAD_F16_F32)
215 WASM_LOAD_STORE(STORE_F16_F32)
216 return 1;
217 WASM_LOAD_STORE(LOAD_I32)
218 WASM_LOAD_STORE(LOAD_F32)
219 WASM_LOAD_STORE(STORE_I32)
220 WASM_LOAD_STORE(STORE_F32)
221 WASM_LOAD_STORE(LOAD32_S_I64)
222 WASM_LOAD_STORE(LOAD32_U_I64)
223 WASM_LOAD_STORE(STORE32_I64)
224 WASM_LOAD_STORE(ATOMIC_LOAD_I32)
225 WASM_LOAD_STORE(ATOMIC_LOAD32_U_I64)
226 WASM_LOAD_STORE(ATOMIC_STORE_I32)
227 WASM_LOAD_STORE(ATOMIC_STORE32_I64)
228 WASM_LOAD_STORE(ATOMIC_RMW_ADD_I32)
229 WASM_LOAD_STORE(ATOMIC_RMW32_U_ADD_I64)
230 WASM_LOAD_STORE(ATOMIC_RMW_SUB_I32)
231 WASM_LOAD_STORE(ATOMIC_RMW32_U_SUB_I64)
232 WASM_LOAD_STORE(ATOMIC_RMW_AND_I32)
233 WASM_LOAD_STORE(ATOMIC_RMW32_U_AND_I64)
234 WASM_LOAD_STORE(ATOMIC_RMW_OR_I32)
235 WASM_LOAD_STORE(ATOMIC_RMW32_U_OR_I64)
236 WASM_LOAD_STORE(ATOMIC_RMW_XOR_I32)
237 WASM_LOAD_STORE(ATOMIC_RMW32_U_XOR_I64)
238 WASM_LOAD_STORE(ATOMIC_RMW_XCHG_I32)
239 WASM_LOAD_STORE(ATOMIC_RMW32_U_XCHG_I64)
240 WASM_LOAD_STORE(ATOMIC_RMW_CMPXCHG_I32)
241 WASM_LOAD_STORE(ATOMIC_RMW32_U_CMPXCHG_I64)
242 WASM_LOAD_STORE(MEMORY_ATOMIC_NOTIFY)
243 WASM_LOAD_STORE(MEMORY_ATOMIC_WAIT32)
244 WASM_LOAD_STORE(LOAD32_SPLAT)
245 WASM_LOAD_STORE(LOAD_ZERO_32)
246 WASM_LOAD_STORE(LOAD_LANE_32)
247 WASM_LOAD_STORE(STORE_LANE_I32x4)
248 return 2;
249 WASM_LOAD_STORE(LOAD_I64)
250 WASM_LOAD_STORE(LOAD_F64)
251 WASM_LOAD_STORE(STORE_I64)
252 WASM_LOAD_STORE(STORE_F64)
253 WASM_LOAD_STORE(ATOMIC_LOAD_I64)
254 WASM_LOAD_STORE(ATOMIC_STORE_I64)
255 WASM_LOAD_STORE(ATOMIC_RMW_ADD_I64)
256 WASM_LOAD_STORE(ATOMIC_RMW_SUB_I64)
257 WASM_LOAD_STORE(ATOMIC_RMW_AND_I64)
258 WASM_LOAD_STORE(ATOMIC_RMW_OR_I64)
259 WASM_LOAD_STORE(ATOMIC_RMW_XOR_I64)
260 WASM_LOAD_STORE(ATOMIC_RMW_XCHG_I64)
261 WASM_LOAD_STORE(ATOMIC_RMW_CMPXCHG_I64)
262 WASM_LOAD_STORE(MEMORY_ATOMIC_WAIT64)
263 WASM_LOAD_STORE(LOAD64_SPLAT)
264 WASM_LOAD_STORE(LOAD_EXTEND_S_I16x8)
265 WASM_LOAD_STORE(LOAD_EXTEND_U_I16x8)
266 WASM_LOAD_STORE(LOAD_EXTEND_S_I32x4)
267 WASM_LOAD_STORE(LOAD_EXTEND_U_I32x4)
268 WASM_LOAD_STORE(LOAD_EXTEND_S_I64x2)
269 WASM_LOAD_STORE(LOAD_EXTEND_U_I64x2)
270 WASM_LOAD_STORE(LOAD_ZERO_64)
271 WASM_LOAD_STORE(LOAD_LANE_64)
272 WASM_LOAD_STORE(STORE_LANE_I64x2)
273 return 3;
274 WASM_LOAD_STORE(LOAD_V128)
275 WASM_LOAD_STORE(STORE_V128)
276 return 4;
277 default:
278 return -1;
279 }
280#undef WASM_LOAD_STORE
281}
282
283inline unsigned GetDefaultP2Align(unsigned Opc) {
284 auto Align = GetDefaultP2AlignAny(Opc);
285 if (Align == -1U) {
286 llvm_unreachable("Only loads and stores have p2align values");
287 }
288 return Align;
289}
290
291inline bool isConst(unsigned Opc) {
292 switch (Opc) {
293 case WebAssembly::CONST_I32:
294 case WebAssembly::CONST_I32_S:
295 case WebAssembly::CONST_I64:
296 case WebAssembly::CONST_I64_S:
297 case WebAssembly::CONST_F32:
298 case WebAssembly::CONST_F32_S:
299 case WebAssembly::CONST_F64:
300 case WebAssembly::CONST_F64_S:
301 case WebAssembly::CONST_V128_I8x16:
302 case WebAssembly::CONST_V128_I8x16_S:
303 case WebAssembly::CONST_V128_I16x8:
304 case WebAssembly::CONST_V128_I16x8_S:
305 case WebAssembly::CONST_V128_I32x4:
306 case WebAssembly::CONST_V128_I32x4_S:
307 case WebAssembly::CONST_V128_I64x2:
308 case WebAssembly::CONST_V128_I64x2_S:
309 case WebAssembly::CONST_V128_F32x4:
310 case WebAssembly::CONST_V128_F32x4_S:
311 case WebAssembly::CONST_V128_F64x2:
312 case WebAssembly::CONST_V128_F64x2_S:
313 return true;
314 default:
315 return false;
316 }
317}
318
319inline bool isScalarConst(unsigned Opc) {
320 switch (Opc) {
321 case WebAssembly::CONST_I32:
322 case WebAssembly::CONST_I32_S:
323 case WebAssembly::CONST_I64:
324 case WebAssembly::CONST_I64_S:
325 case WebAssembly::CONST_F32:
326 case WebAssembly::CONST_F32_S:
327 case WebAssembly::CONST_F64:
328 case WebAssembly::CONST_F64_S:
329 return true;
330 default:
331 return false;
332 }
333}
334
335inline bool isArgument(unsigned Opc) {
336 switch (Opc) {
337 case WebAssembly::ARGUMENT_i32:
338 case WebAssembly::ARGUMENT_i32_S:
339 case WebAssembly::ARGUMENT_i64:
340 case WebAssembly::ARGUMENT_i64_S:
341 case WebAssembly::ARGUMENT_f32:
342 case WebAssembly::ARGUMENT_f32_S:
343 case WebAssembly::ARGUMENT_f64:
344 case WebAssembly::ARGUMENT_f64_S:
345 case WebAssembly::ARGUMENT_v16i8:
346 case WebAssembly::ARGUMENT_v16i8_S:
347 case WebAssembly::ARGUMENT_v8i16:
348 case WebAssembly::ARGUMENT_v8i16_S:
349 case WebAssembly::ARGUMENT_v4i32:
350 case WebAssembly::ARGUMENT_v4i32_S:
351 case WebAssembly::ARGUMENT_v2i64:
352 case WebAssembly::ARGUMENT_v2i64_S:
353 case WebAssembly::ARGUMENT_v8f16:
354 case WebAssembly::ARGUMENT_v8f16_S:
355 case WebAssembly::ARGUMENT_v4f32:
356 case WebAssembly::ARGUMENT_v4f32_S:
357 case WebAssembly::ARGUMENT_v2f64:
358 case WebAssembly::ARGUMENT_v2f64_S:
359 case WebAssembly::ARGUMENT_funcref:
360 case WebAssembly::ARGUMENT_funcref_S:
361 case WebAssembly::ARGUMENT_externref:
362 case WebAssembly::ARGUMENT_externref_S:
363 case WebAssembly::ARGUMENT_exnref:
364 case WebAssembly::ARGUMENT_exnref_S:
365 return true;
366 default:
367 return false;
368 }
369}
370
371inline bool isCopy(unsigned Opc) {
372 switch (Opc) {
373 case WebAssembly::COPY_I32:
374 case WebAssembly::COPY_I32_S:
375 case WebAssembly::COPY_I64:
376 case WebAssembly::COPY_I64_S:
377 case WebAssembly::COPY_F32:
378 case WebAssembly::COPY_F32_S:
379 case WebAssembly::COPY_F64:
380 case WebAssembly::COPY_F64_S:
381 case WebAssembly::COPY_V128:
382 case WebAssembly::COPY_V128_S:
383 case WebAssembly::COPY_FUNCREF:
384 case WebAssembly::COPY_FUNCREF_S:
385 case WebAssembly::COPY_EXTERNREF:
386 case WebAssembly::COPY_EXTERNREF_S:
387 case WebAssembly::COPY_EXNREF:
388 case WebAssembly::COPY_EXNREF_S:
389 return true;
390 default:
391 return false;
392 }
393}
394
395inline bool isTee(unsigned Opc) {
396 switch (Opc) {
397 case WebAssembly::TEE_I32:
398 case WebAssembly::TEE_I32_S:
399 case WebAssembly::TEE_I64:
400 case WebAssembly::TEE_I64_S:
401 case WebAssembly::TEE_F32:
402 case WebAssembly::TEE_F32_S:
403 case WebAssembly::TEE_F64:
404 case WebAssembly::TEE_F64_S:
405 case WebAssembly::TEE_V128:
406 case WebAssembly::TEE_V128_S:
407 case WebAssembly::TEE_FUNCREF:
408 case WebAssembly::TEE_FUNCREF_S:
409 case WebAssembly::TEE_EXTERNREF:
410 case WebAssembly::TEE_EXTERNREF_S:
411 case WebAssembly::TEE_EXNREF:
412 case WebAssembly::TEE_EXNREF_S:
413 return true;
414 default:
415 return false;
416 }
417}
418
419inline bool isCallDirect(unsigned Opc) {
420 switch (Opc) {
421 case WebAssembly::CALL:
422 case WebAssembly::CALL_S:
423 case WebAssembly::RET_CALL:
424 case WebAssembly::RET_CALL_S:
425 return true;
426 default:
427 return false;
428 }
429}
430
431inline bool isCallIndirect(unsigned Opc) {
432 switch (Opc) {
433 case WebAssembly::CALL_INDIRECT:
434 case WebAssembly::CALL_INDIRECT_S:
435 case WebAssembly::RET_CALL_INDIRECT:
436 case WebAssembly::RET_CALL_INDIRECT_S:
437 return true;
438 default:
439 return false;
440 }
441}
442
443inline bool isBrTable(unsigned Opc) {
444 switch (Opc) {
445 case WebAssembly::BR_TABLE_I32:
446 case WebAssembly::BR_TABLE_I32_S:
447 case WebAssembly::BR_TABLE_I64:
448 case WebAssembly::BR_TABLE_I64_S:
449 return true;
450 default:
451 return false;
452 }
453}
454
455inline bool isMarker(unsigned Opc) {
456 switch (Opc) {
457 case WebAssembly::BLOCK:
458 case WebAssembly::BLOCK_S:
459 case WebAssembly::END_BLOCK:
460 case WebAssembly::END_BLOCK_S:
461 case WebAssembly::LOOP:
462 case WebAssembly::LOOP_S:
463 case WebAssembly::END_LOOP:
464 case WebAssembly::END_LOOP_S:
465 case WebAssembly::TRY:
466 case WebAssembly::TRY_S:
467 case WebAssembly::END_TRY:
468 case WebAssembly::END_TRY_S:
469 case WebAssembly::TRY_TABLE:
470 case WebAssembly::TRY_TABLE_S:
471 case WebAssembly::END_TRY_TABLE:
472 case WebAssembly::END_TRY_TABLE_S:
473 return true;
474 default:
475 return false;
476 }
477}
478
479inline bool isEndMarker(unsigned Opc) {
480 switch (Opc) {
481 case WebAssembly::END_BLOCK:
482 case WebAssembly::END_BLOCK_S:
483 case WebAssembly::END_LOOP:
484 case WebAssembly::END_LOOP_S:
485 case WebAssembly::END_TRY:
486 case WebAssembly::END_TRY_S:
487 case WebAssembly::END_TRY_TABLE:
488 case WebAssembly::END_TRY_TABLE_S:
489 return true;
490 default:
491 return false;
492 }
493}
494
495inline bool isTry(unsigned Opc) {
496 switch (Opc) {
497 case WebAssembly::TRY:
498 case WebAssembly::TRY_S:
499 case WebAssembly::TRY_TABLE:
500 case WebAssembly::TRY_TABLE_S:
501 return true;
502 default:
503 return false;
504 }
505}
506
507inline bool isCatch(unsigned Opc) {
508 switch (Opc) {
509 case WebAssembly::CATCH_LEGACY:
510 case WebAssembly::CATCH_LEGACY_S:
511 case WebAssembly::CATCH_ALL_LEGACY:
512 case WebAssembly::CATCH_ALL_LEGACY_S:
513 case WebAssembly::CATCH:
514 case WebAssembly::CATCH_S:
515 case WebAssembly::CATCH_REF:
516 case WebAssembly::CATCH_REF_S:
517 case WebAssembly::CATCH_ALL:
518 case WebAssembly::CATCH_ALL_S:
519 case WebAssembly::CATCH_ALL_REF:
520 case WebAssembly::CATCH_ALL_REF_S:
521 return true;
522 default:
523 return false;
524 }
525}
526
527inline bool isCatchAll(unsigned Opc) {
528 switch (Opc) {
529 case WebAssembly::CATCH_ALL_LEGACY:
530 case WebAssembly::CATCH_ALL_LEGACY_S:
531 case WebAssembly::CATCH_ALL:
532 case WebAssembly::CATCH_ALL_S:
533 case WebAssembly::CATCH_ALL_REF:
534 case WebAssembly::CATCH_ALL_REF_S:
535 return true;
536 default:
537 return false;
538 }
539}
540
541inline bool isLocalGet(unsigned Opc) {
542 switch (Opc) {
543 case WebAssembly::LOCAL_GET_I32:
544 case WebAssembly::LOCAL_GET_I32_S:
545 case WebAssembly::LOCAL_GET_I64:
546 case WebAssembly::LOCAL_GET_I64_S:
547 case WebAssembly::LOCAL_GET_F32:
548 case WebAssembly::LOCAL_GET_F32_S:
549 case WebAssembly::LOCAL_GET_F64:
550 case WebAssembly::LOCAL_GET_F64_S:
551 case WebAssembly::LOCAL_GET_V128:
552 case WebAssembly::LOCAL_GET_V128_S:
553 case WebAssembly::LOCAL_GET_FUNCREF:
554 case WebAssembly::LOCAL_GET_FUNCREF_S:
555 case WebAssembly::LOCAL_GET_EXTERNREF:
556 case WebAssembly::LOCAL_GET_EXTERNREF_S:
557 case WebAssembly::LOCAL_GET_EXNREF:
558 case WebAssembly::LOCAL_GET_EXNREF_S:
559 return true;
560 default:
561 return false;
562 }
563}
564
565inline bool isLocalSet(unsigned Opc) {
566 switch (Opc) {
567 case WebAssembly::LOCAL_SET_I32:
568 case WebAssembly::LOCAL_SET_I32_S:
569 case WebAssembly::LOCAL_SET_I64:
570 case WebAssembly::LOCAL_SET_I64_S:
571 case WebAssembly::LOCAL_SET_F32:
572 case WebAssembly::LOCAL_SET_F32_S:
573 case WebAssembly::LOCAL_SET_F64:
574 case WebAssembly::LOCAL_SET_F64_S:
575 case WebAssembly::LOCAL_SET_V128:
576 case WebAssembly::LOCAL_SET_V128_S:
577 case WebAssembly::LOCAL_SET_FUNCREF:
578 case WebAssembly::LOCAL_SET_FUNCREF_S:
579 case WebAssembly::LOCAL_SET_EXTERNREF:
580 case WebAssembly::LOCAL_SET_EXTERNREF_S:
581 case WebAssembly::LOCAL_SET_EXNREF:
582 case WebAssembly::LOCAL_SET_EXNREF_S:
583 return true;
584 default:
585 return false;
586 }
587}
588
589inline bool isLocalTee(unsigned Opc) {
590 switch (Opc) {
591 case WebAssembly::LOCAL_TEE_I32:
592 case WebAssembly::LOCAL_TEE_I32_S:
593 case WebAssembly::LOCAL_TEE_I64:
594 case WebAssembly::LOCAL_TEE_I64_S:
595 case WebAssembly::LOCAL_TEE_F32:
596 case WebAssembly::LOCAL_TEE_F32_S:
597 case WebAssembly::LOCAL_TEE_F64:
598 case WebAssembly::LOCAL_TEE_F64_S:
599 case WebAssembly::LOCAL_TEE_V128:
600 case WebAssembly::LOCAL_TEE_V128_S:
601 case WebAssembly::LOCAL_TEE_FUNCREF:
602 case WebAssembly::LOCAL_TEE_FUNCREF_S:
603 case WebAssembly::LOCAL_TEE_EXTERNREF:
604 case WebAssembly::LOCAL_TEE_EXTERNREF_S:
605 case WebAssembly::LOCAL_TEE_EXNREF:
606 case WebAssembly::LOCAL_TEE_EXNREF_S:
607 return true;
608 default:
609 return false;
610 }
611}
612
613static const unsigned UnusedReg = -1u;
614
615// For a given stackified WAReg, return the id number to print with push/pop.
616unsigned inline getWARegStackId(MCRegister Reg) {
617 assert(Reg.id() & INT32_MIN);
618 return Reg.id() & INT32_MAX;
619}
620
621} // end namespace WebAssembly
622} // end namespace llvm
623
624#define GET_SUBTARGETINFO_ENUM
625#include "WebAssemblyGenSubtargetInfo.inc"
626
627#endif
628