1//==- WebAssemblyTargetTransformInfo.h - WebAssembly-specific TTI -*- C++ -*-=//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file a TargetTransformInfoImplBase conforming object specific
11/// to the WebAssembly target machine.
12///
13/// It uses the target's detailed information to provide more precise answers to
14/// certain TTI queries, while letting the target independent and default TTI
15/// implementations handle the rest.
16///
17//===----------------------------------------------------------------------===//
18
19#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYTARGETTRANSFORMINFO_H
20#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYTARGETTRANSFORMINFO_H
21
22#include "WebAssemblyTargetMachine.h"
23#include "llvm/CodeGen/BasicTTIImpl.h"
24
25namespace llvm {
26
27class WebAssemblyTTIImpl final : public BasicTTIImplBase<WebAssemblyTTIImpl> {
28 typedef BasicTTIImplBase<WebAssemblyTTIImpl> BaseT;
29 typedef TargetTransformInfo TTI;
30 friend BaseT;
31
32 const WebAssemblySubtarget *ST;
33 const WebAssemblyTargetLowering *TLI;
34
35 const WebAssemblySubtarget *getST() const { return ST; }
36 const WebAssemblyTargetLowering *getTLI() const { return TLI; }
37
38public:
39 WebAssemblyTTIImpl(const WebAssemblyTargetMachine *TM, const Function &F)
40 : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)),
41 TLI(ST->getTargetLowering()) {}
42
43 /// \name Scalar TTI Implementations
44 /// @{
45
46 // TODO: Implement more Scalar TTI for WebAssembly
47
48 TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth) const override;
49
50 void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
51 TTI::UnrollingPreferences &UP,
52 OptimizationRemarkEmitter *ORE) const override;
53
54 /// @}
55
56 /// \name Vector TTI Implementations
57 /// @{
58
59 bool enableInterleavedAccessVectorization() const override { return true; }
60
61 unsigned getNumberOfRegisters(unsigned ClassID) const override;
62 unsigned getMinVectorRegisterBitWidth() const override { return 32; }
63 TypeSize
64 getRegisterBitWidth(TargetTransformInfo::RegisterKind K) const override;
65 InstructionCost getArithmeticInstrCost(
66 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
67 TTI::OperandValueInfo Op1Info = {.Kind: TTI::OK_AnyValue, .Properties: TTI::OP_None},
68 TTI::OperandValueInfo Op2Info = {.Kind: TTI::OK_AnyValue, .Properties: TTI::OP_None},
69 ArrayRef<const Value *> Args = {},
70 const Instruction *CxtI = nullptr) const override;
71
72 InstructionCost
73 getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
74 TTI::CastContextHint CCH, TTI::TargetCostKind CostKind,
75 const Instruction *I = nullptr) const override;
76
77 TTI::MemCmpExpansionOptions
78 enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const override;
79
80 InstructionCost getMemoryOpCost(
81 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
82 TTI::TargetCostKind CostKind,
83 TTI::OperandValueInfo OpInfo = {.Kind: TTI::OK_AnyValue, .Properties: TTI::OP_None},
84 const Instruction *I = nullptr) const override;
85 InstructionCost getInterleavedMemoryOpCost(
86 unsigned Opcode, Type *Ty, unsigned Factor, ArrayRef<unsigned> Indices,
87 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
88 bool UseMaskForCond, bool UseMaskForGaps) const override;
89 InstructionCost
90 getShuffleCost(TTI::ShuffleKind Kind, VectorType *DstTy, VectorType *SrcTy,
91 ArrayRef<int> Mask, TTI::TargetCostKind CostKind, int Index,
92 VectorType *SubTp, ArrayRef<const Value *> Args = {},
93 const Instruction *CxtI = nullptr) const override;
94
95 using BaseT::getVectorInstrCost;
96 InstructionCost
97 getVectorInstrCost(unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind,
98 unsigned Index, const Value *Op0, const Value *Op1,
99 TTI::VectorInstrContext VIC =
100 TTI::VectorInstrContext::None) const override;
101 InstructionCost getPartialReductionCost(
102 unsigned Opcode, Type *InputTypeA, Type *InputTypeB, Type *AccumType,
103 ElementCount VF, TTI::PartialReductionExtendKind OpAExtend,
104 TTI::PartialReductionExtendKind OpBExtend, std::optional<unsigned> BinOp,
105 TTI::TargetCostKind CostKind,
106 std::optional<FastMathFlags> FMF) const override;
107
108 TTI::ReductionShuffle
109 getPreferredExpandedReductionShuffle(const IntrinsicInst *II) const override;
110
111 bool supportsTailCalls() const override;
112
113 bool isProfitableToSinkOperands(Instruction *I,
114 SmallVectorImpl<Use *> &Ops) const override;
115
116 std::optional<Instruction *>
117 instCombineIntrinsic(InstCombiner &IC, IntrinsicInst &II) const override;
118
119 /// @}
120};
121
122} // end namespace llvm
123
124#endif
125