1//===- WebAssemblyTargetMachine.cpp - Define TargetMachine for WebAssembly -==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This file defines the WebAssembly-specific subclass of TargetMachine.
11///
12//===----------------------------------------------------------------------===//
13
14#include "WebAssemblyTargetMachine.h"
15#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
16#include "TargetInfo/WebAssemblyTargetInfo.h"
17#include "WebAssembly.h"
18#include "WebAssemblyISelLowering.h"
19#include "WebAssemblyMachineFunctionInfo.h"
20#include "WebAssemblyTargetObjectFile.h"
21#include "WebAssemblyTargetTransformInfo.h"
22#include "WebAssemblyUtilities.h"
23#include "llvm/CodeGen/GlobalISel/IRTranslator.h"
24#include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
25#include "llvm/CodeGen/GlobalISel/Legalizer.h"
26#include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
27#include "llvm/CodeGen/MIRParser/MIParser.h"
28#include "llvm/CodeGen/Passes.h"
29#include "llvm/CodeGen/RegAllocRegistry.h"
30#include "llvm/CodeGen/TargetPassConfig.h"
31#include "llvm/IR/Function.h"
32#include "llvm/InitializePasses.h"
33#include "llvm/MC/TargetRegistry.h"
34#include "llvm/Support/Compiler.h"
35#include "llvm/Target/TargetOptions.h"
36#include "llvm/Transforms/Scalar.h"
37#include "llvm/Transforms/Utils.h"
38#include <optional>
39using namespace llvm;
40
41#define DEBUG_TYPE "wasm"
42
43// A command-line option to keep implicit locals
44// for the purpose of testing with lit/llc ONLY.
45// This produces output which is not valid WebAssembly, and is not supported
46// by assemblers/disassemblers and other MC based tools.
47cl::opt<bool> WebAssembly::WasmDisableExplicitLocals(
48 "wasm-disable-explicit-locals", cl::Hidden,
49 cl::desc("WebAssembly: output implicit locals in"
50 " instruction output for test purposes only."),
51 cl::init(Val: false));
52
53// Exception handling & setjmp-longjmp handling related options.
54
55// Emscripten's asm.js-style setjmp/longjmp handling
56cl::opt<bool> WebAssembly::WasmEnableEmSjLj(
57 "enable-emscripten-sjlj",
58 cl::desc("WebAssembly Emscripten-style setjmp/longjmp handling"),
59 cl::init(Val: false));
60// Exception handling using wasm EH instructions
61cl::opt<bool>
62 WebAssembly::WasmEnableEH("wasm-enable-eh",
63 cl::desc("WebAssembly exception handling"));
64// setjmp/longjmp handling using wasm EH instructions
65cl::opt<bool> WebAssembly::WasmEnableSjLj(
66 "wasm-enable-sjlj", cl::desc("WebAssembly setjmp/longjmp handling"));
67// If true, use the legacy Wasm EH proposal:
68// https://github.com/WebAssembly/exception-handling/blob/main/proposals/exception-handling/legacy/Exceptions.md
69// And if false, use the standardized Wasm EH proposal:
70// https://github.com/WebAssembly/exception-handling/blob/main/proposals/exception-handling/Exceptions.md
71// Currently set to true by default because not all major web browsers turn on
72// the new standard proposal by default, but will later change to false.
73cl::opt<bool> WebAssembly::WasmUseLegacyEH(
74 "wasm-use-legacy-eh", cl::desc("WebAssembly exception handling (legacy)"),
75 cl::init(Val: true));
76
77extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void
78LLVMInitializeWebAssemblyTarget() {
79 // Register the target.
80 RegisterTargetMachine<WebAssemblyTargetMachine> X(
81 getTheWebAssemblyTarget32());
82 RegisterTargetMachine<WebAssemblyTargetMachine> Y(
83 getTheWebAssemblyTarget64());
84
85 // Register backend passes
86 auto &PR = *PassRegistry::getPassRegistry();
87 initializeGlobalISel(PR);
88 initializeWebAssemblyPreLegalizerCombinerLegacyPass(PR);
89 initializeWebAssemblyPostLegalizerCombinerLegacyPass(PR);
90 initializeWebAssemblyAddMissingPrototypesLegacyPass(PR);
91 initializeWebAssemblyLowerEmscriptenEHSjLjLegacyPass(PR);
92 initializeLowerGlobalDtorsLegacyPassPass(PR);
93 initializeWebAssemblyFixFunctionBitcastsLegacyPass(PR);
94 initializeWebAssemblyOptimizeReturnedLegacyPass(PR);
95 initializeWebAssemblyRefTypeMem2LocalLegacyPass(PR);
96 initializeWebAssemblyArgumentMoveLegacyPass(PR);
97 initializeWebAssemblyAsmPrinterPass(PR);
98 initializeWebAssemblySetP2AlignOperandsLegacyPass(PR);
99 initializeWebAssemblyReplacePhysRegsLegacyPass(PR);
100 initializeWebAssemblyOptimizeLiveIntervalsLegacyPass(PR);
101 initializeWebAssemblyMemIntrinsicResultsLegacyPass(PR);
102 initializeWebAssemblyRegStackifyLegacyPass(PR);
103 initializeWebAssemblyRegColoringLegacyPass(PR);
104 initializeWebAssemblyNullifyDebugValueListsLegacyPass(PR);
105 initializeWebAssemblyFixIrreducibleControlFlowLegacyPass(PR);
106 initializeWebAssemblyLateEHPrepareLegacyPass(PR);
107 initializeWebAssemblyExceptionInfoWrapperPassPass(PR);
108 initializeWebAssemblyCFGSortLegacyPass(PR);
109 initializeWebAssemblyCFGStackifyLegacyPass(PR);
110 initializeWebAssemblyExplicitLocalsLegacyPass(PR);
111 initializeWebAssemblyLowerBrUnlessLegacyPass(PR);
112 initializeWebAssemblyRegNumberingLegacyPass(PR);
113 initializeWebAssemblyDebugFixupLegacyPass(PR);
114 initializeWebAssemblyPeepholeLegacyPass(PR);
115 initializeWebAssemblyMCLowerPreLegacyPass(PR);
116 initializeWebAssemblyFixBrTableDefaultsLegacyPass(PR);
117 initializeWebAssemblyDAGToDAGISelLegacyPass(PR);
118}
119
120//===----------------------------------------------------------------------===//
121// WebAssembly Lowering public interface.
122//===----------------------------------------------------------------------===//
123
124static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM) {
125 // Default to static relocation model. This should always be more optimal
126 // than PIC since the static linker can determine all global addresses and
127 // assume direct function calls.
128 return RM.value_or(u: Reloc::Static);
129}
130
131using WebAssembly::WasmDisableExplicitLocals;
132using WebAssembly::WasmEnableEH;
133using WebAssembly::WasmEnableEmSjLj;
134using WebAssembly::WasmEnableSjLj;
135
136static void basicCheckForEHAndSjLj(TargetMachine *TM) {
137
138 bool EnableEmEH = TM->Options.ExceptionModel == ExceptionHandling::Emscripten;
139
140 // You can't enable two modes of EH at the same time
141 if (EnableEmEH && WasmEnableEH)
142 report_fatal_error(
143 reason: "-exception-model=emscripten not allowed with -wasm-enable-eh");
144 // You can't enable two modes of SjLj at the same time
145 if (WasmEnableEmSjLj && WasmEnableSjLj)
146 report_fatal_error(
147 reason: "-enable-emscripten-sjlj not allowed with -wasm-enable-sjlj");
148 // You can't mix Emscripten EH with Wasm SjLj.
149 if (EnableEmEH && WasmEnableSjLj)
150 report_fatal_error(
151 reason: "-exception-model=emscripten not allowed with -wasm-enable-sjlj");
152
153 if (TM->Options.ExceptionModel == ExceptionHandling::Default) {
154 // FIXME: These flags should be removed in favor of directly using the
155 // generically configured ExceptionsType
156 if (WebAssembly::WasmEnableEH || WebAssembly::WasmEnableSjLj)
157 TM->Options.ExceptionModel = ExceptionHandling::Wasm;
158 }
159
160 // Basic Correctness checking related to -exception-model
161 if (TM->Options.ExceptionModel != ExceptionHandling::Default &&
162 TM->Options.ExceptionModel != ExceptionHandling::None &&
163 TM->Options.ExceptionModel != ExceptionHandling::Wasm &&
164 TM->Options.ExceptionModel != ExceptionHandling::Emscripten)
165 report_fatal_error(
166 reason: "-exception-model should be either 'none', 'wasm', or 'emscripten'");
167 if (WasmEnableEH && TM->Options.ExceptionModel != ExceptionHandling::Wasm)
168 report_fatal_error(
169 reason: "-wasm-enable-eh only allowed with -exception-model=wasm");
170 if (WasmEnableSjLj && TM->Options.ExceptionModel != ExceptionHandling::Wasm)
171 report_fatal_error(
172 reason: "-wasm-enable-sjlj only allowed with -exception-model=wasm");
173 if ((!WasmEnableEH && !WasmEnableSjLj) &&
174 TM->Options.ExceptionModel == ExceptionHandling::Wasm)
175 report_fatal_error(
176 reason: "-exception-model=wasm only allowed with at least one of "
177 "-wasm-enable-eh or -wasm-enable-sjlj");
178
179 // Currently it is allowed to mix Wasm EH with Emscripten SjLj as an interim
180 // measure, but some code will error out at compile time in this combination.
181 // See WebAssemblyLowerEmscriptenEHSjLj pass for details.
182}
183
184/// Create an WebAssembly architecture model.
185///
186WebAssemblyTargetMachine::WebAssemblyTargetMachine(
187 const Target &T, const Triple &TT, StringRef CPU, StringRef FS,
188 const TargetOptions &Options, std::optional<Reloc::Model> RM,
189 std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, bool JIT)
190 : CodeGenTargetMachineImpl(T, TT.computeDataLayout(), TT, CPU, FS, Options,
191 getEffectiveRelocModel(RM),
192 getEffectiveCodeModel(CM, Default: CodeModel::Large), OL),
193 TLOF(new WebAssemblyTargetObjectFile()),
194 UsesMultivalueABI(Options.MCOptions.getABIName() == "experimental-mv") {
195 // WebAssembly type-checks instructions, but a noreturn function with a return
196 // type that doesn't match the context will cause a check failure. So we lower
197 // LLVM 'unreachable' to ISD::TRAP and then lower that to WebAssembly's
198 // 'unreachable' instructions which is meant for that case. Formerly, we also
199 // needed to add checks to SP failure emission in the instruction selection
200 // backends, but this has since been tied to TrapUnreachable and is no longer
201 // necessary.
202 this->Options.TrapUnreachable = true;
203 this->Options.NoTrapAfterNoreturn = false;
204
205 // WebAssembly treats each function as an independent unit. Force
206 // -ffunction-sections, effectively, so that we can emit them independently.
207 this->Options.FunctionSections = true;
208 this->Options.DataSections = true;
209 this->Options.UniqueSectionNames = true;
210
211 basicCheckForEHAndSjLj(TM: this);
212 initAsmInfo();
213
214 LLT::setUseExtended(true);
215
216 // Note that we don't use setRequiresStructuredCFG(true). It disables
217 // optimizations than we're ok with, and want, such as critical edge
218 // splitting and tail merging.
219}
220
221WebAssemblyTargetMachine::~WebAssemblyTargetMachine() = default; // anchor.
222
223const WebAssemblySubtarget *
224WebAssemblyTargetMachine::getSubtargetImpl(StringRef CPU, StringRef FS) const {
225 auto &I = SubtargetMap[CPU.str() + FS.str()];
226 if (!I) {
227 I = std::make_unique<WebAssemblySubtarget>(args: TargetTriple, args&: CPU, args&: FS, args: *this);
228 }
229 return I.get();
230}
231
232const WebAssemblySubtarget *
233WebAssemblyTargetMachine::getSubtargetImpl(const Function &F) const {
234 Attribute CPUAttr = F.getFnAttribute(Kind: "target-cpu");
235 Attribute FSAttr = F.getFnAttribute(Kind: "target-features");
236
237 StringRef CPU = CPUAttr.isValid() ? CPUAttr.getValueAsString() : TargetCPU;
238 StringRef FS = FSAttr.isValid() ? FSAttr.getValueAsString() : TargetFS;
239
240 return getSubtargetImpl(CPU, FS);
241}
242
243namespace {
244
245/// WebAssembly Code Generator Pass Configuration Options.
246class WebAssemblyPassConfig final : public TargetPassConfig {
247public:
248 WebAssemblyPassConfig(WebAssemblyTargetMachine &TM, PassManagerBase &PM)
249 : TargetPassConfig(TM, PM) {}
250
251 WebAssemblyTargetMachine &getWebAssemblyTargetMachine() const {
252 return getTM<WebAssemblyTargetMachine>();
253 }
254
255 FunctionPass *createTargetRegisterAllocator(bool) override;
256
257 void addIRPasses() override;
258 void addISelPrepare() override;
259 bool addInstSelector() override;
260 void addOptimizedRegAlloc() override;
261 void addPostRegAlloc() override;
262 bool addGCPasses() override { return false; }
263 void addPreEmitPass() override;
264 bool addPreISel() override;
265
266 // No reg alloc
267 bool addRegAssignAndRewriteFast() override { return false; }
268
269 // No reg alloc
270 bool addRegAssignAndRewriteOptimized() override { return false; }
271
272 bool addIRTranslator() override;
273 void addPreLegalizeMachineIR() override;
274 bool addLegalizeMachineIR() override;
275 void addPreRegBankSelect() override;
276 bool addRegBankSelect() override;
277 bool addGlobalInstructionSelect() override;
278};
279} // end anonymous namespace
280
281MachineFunctionInfo *WebAssemblyTargetMachine::createMachineFunctionInfo(
282 BumpPtrAllocator &Allocator, const Function &F,
283 const TargetSubtargetInfo *STI) const {
284 return WebAssemblyFunctionInfo::create<WebAssemblyFunctionInfo>(Allocator, F,
285 STI);
286}
287
288TargetTransformInfo
289WebAssemblyTargetMachine::getTargetTransformInfo(const Function &F) const {
290 return TargetTransformInfo(std::make_unique<WebAssemblyTTIImpl>(args: this, args: F));
291}
292
293TargetPassConfig *
294WebAssemblyTargetMachine::createPassConfig(PassManagerBase &PM) {
295 return new WebAssemblyPassConfig(*this, PM);
296}
297
298FunctionPass *WebAssemblyPassConfig::createTargetRegisterAllocator(bool) {
299 return nullptr; // No reg alloc
300}
301
302//===----------------------------------------------------------------------===//
303// The following functions are called from lib/CodeGen/Passes.cpp to modify
304// the CodeGen pass sequence.
305//===----------------------------------------------------------------------===//
306
307void WebAssemblyPassConfig::addIRPasses() {
308 // Add signatures to prototype-less function declarations
309 addPass(P: createWebAssemblyAddMissingPrototypesLegacyPass());
310
311 // Lower .llvm.global_dtors into .llvm.global_ctors with __cxa_atexit calls.
312 addPass(P: createLowerGlobalDtorsLegacyPass());
313
314 // Fix function bitcasts, as WebAssembly requires caller and callee signatures
315 // to match.
316 addPass(P: createWebAssemblyFixFunctionBitcastsLegacyPass());
317
318 // Optimize "returned" function attributes.
319 if (getOptLevel() != CodeGenOptLevel::None)
320 addPass(P: createWebAssemblyOptimizeReturnedLegacyPass());
321
322 // If exception handling is not enabled and setjmp/longjmp handling is
323 // enabled, we lower invokes into calls and delete unreachable landingpad
324 // blocks. Lowering invokes when there is no EH support is done in
325 // TargetPassConfig::addPassesToHandleExceptions, but that runs after these IR
326 // passes and Emscripten SjLj handling expects all invokes to be lowered
327 // before.
328 bool EnableEmEH = TM->Options.ExceptionModel == ExceptionHandling::Emscripten;
329 if (!EnableEmEH && !WasmEnableEH) {
330 addPass(P: createLowerInvokePass());
331 // The lower invoke pass may create unreachable code. Remove it in order not
332 // to process dead blocks in setjmp/longjmp handling.
333 addPass(P: createUnreachableBlockEliminationPass());
334 }
335
336 // Handle exceptions and setjmp/longjmp if enabled. Unlike Wasm EH preparation
337 // done in WasmEHPrepare pass, Wasm SjLj preparation shares libraries and
338 // transformation algorithms with Emscripten SjLj, so we run
339 // LowerEmscriptenEHSjLj pass also when Wasm SjLj is enabled.
340 if (EnableEmEH || WasmEnableEmSjLj || WasmEnableSjLj)
341 addPass(P: createWebAssemblyLowerEmscriptenEHSjLjLegacyPass(EnableEmEH));
342
343 // Expand indirectbr instructions to switches.
344 addPass(P: createIndirectBrExpandPass());
345
346 // Try to expand `vecreduce_{and, or}` into `{any, all}_true`.
347 addPass(P: createWebAssemblyReduceToAnyAllTrueLegacyPass(
348 TM&: getWebAssemblyTargetMachine()));
349
350 TargetPassConfig::addIRPasses();
351}
352
353void WebAssemblyPassConfig::addISelPrepare() {
354 // We need to move reference type allocas to WASM_ADDRESS_SPACE_VAR so that
355 // loads and stores are promoted to local.gets/local.sets.
356 addPass(P: createWebAssemblyRefTypeMem2LocalLegacyPass());
357 // Lower atomics and TLS if necessary
358 addPass(P: createWebAssemblyCoalesceFeaturesAndStripAtomicsLegacyPass(
359 TM&: getWebAssemblyTargetMachine()));
360
361 // This is a no-op if atomics are not used in the module
362 addPass(P: createAtomicExpandLegacyPass());
363
364 TargetPassConfig::addISelPrepare();
365}
366
367bool WebAssemblyPassConfig::addInstSelector() {
368 (void)TargetPassConfig::addInstSelector();
369 addPass(P: createWebAssemblyISelDagLegacyPass(TM&: getWebAssemblyTargetMachine(),
370 OptLevel: getOptLevel()));
371 // Run the argument-move pass immediately after the ScheduleDAG scheduler
372 // so that we can fix up the ARGUMENT instructions before anything else
373 // sees them in the wrong place.
374 addPass(P: createWebAssemblyArgumentMoveLegacyPass());
375 // Set the p2align operands. This information is present during ISel, however
376 // it's inconvenient to collect. Collect it now, and update the immediate
377 // operands.
378 addPass(P: createWebAssemblySetP2AlignOperandsLegacyPass());
379
380 // Eliminate range checks and add default targets to br_table instructions.
381 addPass(P: createWebAssemblyFixBrTableDefaultsLegacyPass());
382
383 // unreachable is terminator, non-terminator instruction after it is not
384 // allowed.
385 addPass(P: createWebAssemblyCleanCodeAfterTrapLegacyPass());
386
387 return false;
388}
389
390void WebAssemblyPassConfig::addOptimizedRegAlloc() {
391 // Currently RegisterCoalesce degrades wasm debug info quality by a
392 // significant margin. As a quick fix, disable this for -O1, which is often
393 // used for debugging large applications. Disabling this increases code size
394 // of Emscripten core benchmarks by ~5%, which is acceptable for -O1, which is
395 // usually not used for production builds.
396 // TODO Investigate why RegisterCoalesce degrades debug info quality and fix
397 // it properly
398 if (getOptLevel() == CodeGenOptLevel::Less)
399 disablePass(PassID: &RegisterCoalescerID);
400 TargetPassConfig::addOptimizedRegAlloc();
401}
402
403void WebAssemblyPassConfig::addPostRegAlloc() {
404 // TODO: The following CodeGen passes don't currently support code containing
405 // virtual registers. Consider removing their restrictions and re-enabling
406 // them.
407
408 // These functions all require the NoVRegs property.
409 disablePass(PassID: &MachineLateInstrsCleanupID);
410 disablePass(PassID: &MachineCopyPropagationID);
411 disablePass(PassID: &PostRAMachineSinkingID);
412 disablePass(PassID: &PostRASchedulerID);
413 disablePass(PassID: &FuncletLayoutID);
414 disablePass(PassID: &StackMapLivenessID);
415 disablePass(PassID: &PatchableFunctionID);
416 disablePass(PassID: &ShrinkWrapID);
417 disablePass(PassID: &RemoveLoadsIntoFakeUsesID);
418
419 // This pass hurts code size for wasm because it can generate irreducible
420 // control flow.
421 disablePass(PassID: &MachineBlockPlacementID);
422
423 TargetPassConfig::addPostRegAlloc();
424}
425
426void WebAssemblyPassConfig::addPreEmitPass() {
427 TargetPassConfig::addPreEmitPass();
428
429 // Nullify DBG_VALUE_LISTs that we cannot handle.
430 addPass(P: createWebAssemblyNullifyDebugValueListsLegacyPass());
431
432 // Remove any unreachable blocks that may be left floating around.
433 // Rare, but possible. Needed for WebAssemblyFixIrreducibleControlFlow.
434 addPass(PassID: &UnreachableMachineBlockElimID);
435
436 // Eliminate multiple-entry loops.
437 addPass(P: createWebAssemblyFixIrreducibleControlFlowLegacyPass());
438
439 // Do various transformations for exception handling.
440 // Every CFG-changing optimizations should come before this.
441 if (TM->Options.ExceptionModel == ExceptionHandling::Wasm)
442 addPass(P: createWebAssemblyLateEHPrepareLegacyPass());
443
444 // Now that we have a prologue and epilogue and all frame indices are
445 // rewritten, eliminate SP and FP. This allows them to be stackified,
446 // colored, and numbered with the rest of the registers.
447 addPass(P: createWebAssemblyReplacePhysRegsLegacyPass());
448
449 // Preparations and optimizations related to register stackification.
450 if (getOptLevel() != CodeGenOptLevel::None) {
451 // Depend on LiveIntervals and perform some optimizations on it.
452 addPass(P: createWebAssemblyOptimizeLiveIntervalsLegacyPass());
453
454 // Prepare memory intrinsic calls for register stackifying.
455 addPass(P: createWebAssemblyMemIntrinsicResultsLegacyPass());
456 }
457
458 // Mark registers as representing wasm's value stack. This is a key
459 // code-compression technique in WebAssembly. We run this pass (and
460 // MemIntrinsicResults above) very late, so that it sees as much code as
461 // possible, including code emitted by PEI and expanded by late tail
462 // duplication.
463 addPass(P: createWebAssemblyRegStackifyLegacyPass(OptLevel: getOptLevel()));
464
465 if (getOptLevel() != CodeGenOptLevel::None) {
466 // Run the register coloring pass to reduce the total number of registers.
467 // This runs after stackification so that it doesn't consider registers
468 // that become stackified.
469 addPass(P: createWebAssemblyRegColoringLegacyPass());
470 }
471
472 // Sort the blocks of the CFG into topological order, a prerequisite for
473 // BLOCK and LOOP markers.
474 addPass(P: createWebAssemblyCFGSortLegacyPass());
475
476 // Insert BLOCK and LOOP markers.
477 addPass(P: createWebAssemblyCFGStackifyLegacyPass());
478
479 // Insert explicit local.get and local.set operators.
480 if (!WasmDisableExplicitLocals)
481 addPass(P: createWebAssemblyExplicitLocalsLegacyPass());
482
483 // Lower br_unless into br_if.
484 addPass(P: createWebAssemblyLowerBrUnlessLegacyPass());
485
486 // Perform the very last peephole optimizations on the code.
487 if (getOptLevel() != CodeGenOptLevel::None)
488 addPass(P: createWebAssemblyPeepholeLegacyPass());
489
490 // Create a mapping from LLVM CodeGen virtual registers to wasm registers.
491 addPass(P: createWebAssemblyRegNumberingLegacyPass());
492
493 // Fix debug_values whose defs have been stackified.
494 if (!WasmDisableExplicitLocals)
495 addPass(P: createWebAssemblyDebugFixupLegacyPass());
496
497 // Collect information to prepare for MC lowering / asm printing.
498 addPass(P: createWebAssemblyMCLowerPreLegacyPass());
499}
500
501bool WebAssemblyPassConfig::addPreISel() {
502 TargetPassConfig::addPreISel();
503 return false;
504}
505
506bool WebAssemblyPassConfig::addIRTranslator() {
507 addPass(P: new IRTranslatorLegacy());
508 return false;
509}
510
511void WebAssemblyPassConfig::addPreLegalizeMachineIR() {
512 if (getOptLevel() != CodeGenOptLevel::None) {
513 addPass(P: createWebAssemblyPreLegalizerCombinerLegacyPass());
514 }
515}
516bool WebAssemblyPassConfig::addLegalizeMachineIR() {
517 addPass(P: new LegalizerLegacy());
518 return false;
519}
520
521void WebAssemblyPassConfig::addPreRegBankSelect() {
522 if (getOptLevel() != CodeGenOptLevel::None) {
523 addPass(P: createWebAssemblyPostLegalizerCombinerLegacyPass());
524 }
525}
526
527bool WebAssemblyPassConfig::addRegBankSelect() {
528 addPass(P: new RegBankSelectLegacy());
529 return false;
530}
531
532bool WebAssemblyPassConfig::addGlobalInstructionSelect() {
533 addPass(P: new InstructionSelectLegacy(getOptLevel()));
534
535 // We insert only if ISelDAG won't insert these at a later point.
536 if (isGlobalISelAbortEnabled()) {
537 addPass(P: createWebAssemblyArgumentMoveLegacyPass());
538 addPass(P: createWebAssemblySetP2AlignOperandsLegacyPass());
539 addPass(P: createWebAssemblyFixBrTableDefaultsLegacyPass());
540 addPass(P: createWebAssemblyCleanCodeAfterTrapLegacyPass());
541 }
542
543 return false;
544}
545
546yaml::MachineFunctionInfo *
547WebAssemblyTargetMachine::createDefaultFuncInfoYAML() const {
548 return new yaml::WebAssemblyFunctionInfo();
549}
550
551yaml::MachineFunctionInfo *WebAssemblyTargetMachine::convertFuncInfoToYAML(
552 const MachineFunction &MF) const {
553 const auto *MFI = MF.getInfo<WebAssemblyFunctionInfo>();
554 return new yaml::WebAssemblyFunctionInfo(MF, *MFI);
555}
556
557bool WebAssemblyTargetMachine::parseMachineFunctionInfo(
558 const yaml::MachineFunctionInfo &MFI, PerFunctionMIParsingState &PFS,
559 SMDiagnostic &Error, SMRange &SourceRange) const {
560 const auto &YamlMFI = static_cast<const yaml::WebAssemblyFunctionInfo &>(MFI);
561 MachineFunction &MF = PFS.MF;
562 MF.getInfo<WebAssemblyFunctionInfo>()->initializeBaseYamlFields(MF, YamlMFI);
563 return false;
564}
565