1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
2 | |* *| |
3 | |* Machine Code Emitter *| |
4 | |* *| |
5 | |* Automatically generated file, do not edit! *| |
6 | |* *| |
7 | \*===----------------------------------------------------------------------===*/ |
8 | |
9 | uint64_t BPFMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI, |
10 | SmallVectorImpl<MCFixup> &Fixups, |
11 | const MCSubtargetInfo &STI) const { |
12 | static const uint64_t InstBits[] = { |
13 | UINT64_C(0), |
14 | UINT64_C(0), |
15 | UINT64_C(0), |
16 | UINT64_C(0), |
17 | UINT64_C(0), |
18 | UINT64_C(0), |
19 | UINT64_C(0), |
20 | UINT64_C(0), |
21 | UINT64_C(0), |
22 | UINT64_C(0), |
23 | UINT64_C(0), |
24 | UINT64_C(0), |
25 | UINT64_C(0), |
26 | UINT64_C(0), |
27 | UINT64_C(0), |
28 | UINT64_C(0), |
29 | UINT64_C(0), |
30 | UINT64_C(0), |
31 | UINT64_C(0), |
32 | UINT64_C(0), |
33 | UINT64_C(0), |
34 | UINT64_C(0), |
35 | UINT64_C(0), |
36 | UINT64_C(0), |
37 | UINT64_C(0), |
38 | UINT64_C(0), |
39 | UINT64_C(0), |
40 | UINT64_C(0), |
41 | UINT64_C(0), |
42 | UINT64_C(0), |
43 | UINT64_C(0), |
44 | UINT64_C(0), |
45 | UINT64_C(0), |
46 | UINT64_C(0), |
47 | UINT64_C(0), |
48 | UINT64_C(0), |
49 | UINT64_C(0), |
50 | UINT64_C(0), |
51 | UINT64_C(0), |
52 | UINT64_C(0), |
53 | UINT64_C(0), |
54 | UINT64_C(0), |
55 | UINT64_C(0), |
56 | UINT64_C(0), |
57 | UINT64_C(0), |
58 | UINT64_C(0), |
59 | UINT64_C(0), |
60 | UINT64_C(0), |
61 | UINT64_C(0), |
62 | UINT64_C(0), |
63 | UINT64_C(0), |
64 | UINT64_C(0), |
65 | UINT64_C(0), |
66 | UINT64_C(0), |
67 | UINT64_C(0), |
68 | UINT64_C(0), |
69 | UINT64_C(0), |
70 | UINT64_C(0), |
71 | UINT64_C(0), |
72 | UINT64_C(0), |
73 | UINT64_C(0), |
74 | UINT64_C(0), |
75 | UINT64_C(0), |
76 | UINT64_C(0), |
77 | UINT64_C(0), |
78 | UINT64_C(0), |
79 | UINT64_C(0), |
80 | UINT64_C(0), |
81 | UINT64_C(0), |
82 | UINT64_C(0), |
83 | UINT64_C(0), |
84 | UINT64_C(0), |
85 | UINT64_C(0), |
86 | UINT64_C(0), |
87 | UINT64_C(0), |
88 | UINT64_C(0), |
89 | UINT64_C(0), |
90 | UINT64_C(0), |
91 | UINT64_C(0), |
92 | UINT64_C(0), |
93 | UINT64_C(0), |
94 | UINT64_C(0), |
95 | UINT64_C(0), |
96 | UINT64_C(0), |
97 | UINT64_C(0), |
98 | UINT64_C(0), |
99 | UINT64_C(0), |
100 | UINT64_C(0), |
101 | UINT64_C(0), |
102 | UINT64_C(0), |
103 | UINT64_C(0), |
104 | UINT64_C(0), |
105 | UINT64_C(0), |
106 | UINT64_C(0), |
107 | UINT64_C(0), |
108 | UINT64_C(0), |
109 | UINT64_C(0), |
110 | UINT64_C(0), |
111 | UINT64_C(0), |
112 | UINT64_C(0), |
113 | UINT64_C(0), |
114 | UINT64_C(0), |
115 | UINT64_C(0), |
116 | UINT64_C(0), |
117 | UINT64_C(0), |
118 | UINT64_C(0), |
119 | UINT64_C(0), |
120 | UINT64_C(0), |
121 | UINT64_C(0), |
122 | UINT64_C(0), |
123 | UINT64_C(0), |
124 | UINT64_C(0), |
125 | UINT64_C(0), |
126 | UINT64_C(0), |
127 | UINT64_C(0), |
128 | UINT64_C(0), |
129 | UINT64_C(0), |
130 | UINT64_C(0), |
131 | UINT64_C(0), |
132 | UINT64_C(0), |
133 | UINT64_C(0), |
134 | UINT64_C(0), |
135 | UINT64_C(0), |
136 | UINT64_C(0), |
137 | UINT64_C(0), |
138 | UINT64_C(0), |
139 | UINT64_C(0), |
140 | UINT64_C(0), |
141 | UINT64_C(0), |
142 | UINT64_C(0), |
143 | UINT64_C(0), |
144 | UINT64_C(0), |
145 | UINT64_C(0), |
146 | UINT64_C(0), |
147 | UINT64_C(0), |
148 | UINT64_C(0), |
149 | UINT64_C(0), |
150 | UINT64_C(0), |
151 | UINT64_C(0), |
152 | UINT64_C(0), |
153 | UINT64_C(0), |
154 | UINT64_C(0), |
155 | UINT64_C(0), |
156 | UINT64_C(0), |
157 | UINT64_C(0), |
158 | UINT64_C(0), |
159 | UINT64_C(0), |
160 | UINT64_C(0), |
161 | UINT64_C(0), |
162 | UINT64_C(0), |
163 | UINT64_C(0), |
164 | UINT64_C(0), |
165 | UINT64_C(0), |
166 | UINT64_C(0), |
167 | UINT64_C(0), |
168 | UINT64_C(0), |
169 | UINT64_C(0), |
170 | UINT64_C(0), |
171 | UINT64_C(0), |
172 | UINT64_C(0), |
173 | UINT64_C(0), |
174 | UINT64_C(0), |
175 | UINT64_C(0), |
176 | UINT64_C(0), |
177 | UINT64_C(0), |
178 | UINT64_C(0), |
179 | UINT64_C(0), |
180 | UINT64_C(0), |
181 | UINT64_C(0), |
182 | UINT64_C(0), |
183 | UINT64_C(0), |
184 | UINT64_C(0), |
185 | UINT64_C(0), |
186 | UINT64_C(0), |
187 | UINT64_C(0), |
188 | UINT64_C(0), |
189 | UINT64_C(0), |
190 | UINT64_C(0), |
191 | UINT64_C(0), |
192 | UINT64_C(0), |
193 | UINT64_C(0), |
194 | UINT64_C(0), |
195 | UINT64_C(0), |
196 | UINT64_C(0), |
197 | UINT64_C(0), |
198 | UINT64_C(0), |
199 | UINT64_C(0), |
200 | UINT64_C(0), |
201 | UINT64_C(0), |
202 | UINT64_C(0), |
203 | UINT64_C(0), |
204 | UINT64_C(0), |
205 | UINT64_C(0), |
206 | UINT64_C(0), |
207 | UINT64_C(0), |
208 | UINT64_C(0), |
209 | UINT64_C(0), |
210 | UINT64_C(0), |
211 | UINT64_C(0), |
212 | UINT64_C(0), |
213 | UINT64_C(0), |
214 | UINT64_C(0), |
215 | UINT64_C(0), |
216 | UINT64_C(0), |
217 | UINT64_C(0), |
218 | UINT64_C(0), |
219 | UINT64_C(0), |
220 | UINT64_C(0), |
221 | UINT64_C(0), |
222 | UINT64_C(0), |
223 | UINT64_C(0), |
224 | UINT64_C(0), |
225 | UINT64_C(0), |
226 | UINT64_C(0), |
227 | UINT64_C(0), |
228 | UINT64_C(0), |
229 | UINT64_C(0), |
230 | UINT64_C(0), |
231 | UINT64_C(0), |
232 | UINT64_C(0), |
233 | UINT64_C(0), |
234 | UINT64_C(0), |
235 | UINT64_C(0), |
236 | UINT64_C(0), |
237 | UINT64_C(0), |
238 | UINT64_C(0), |
239 | UINT64_C(0), |
240 | UINT64_C(0), |
241 | UINT64_C(0), |
242 | UINT64_C(0), |
243 | UINT64_C(0), |
244 | UINT64_C(0), |
245 | UINT64_C(0), |
246 | UINT64_C(0), |
247 | UINT64_C(0), |
248 | UINT64_C(0), |
249 | UINT64_C(0), |
250 | UINT64_C(0), |
251 | UINT64_C(0), |
252 | UINT64_C(0), |
253 | UINT64_C(0), |
254 | UINT64_C(0), |
255 | UINT64_C(0), |
256 | UINT64_C(0), |
257 | UINT64_C(0), |
258 | UINT64_C(0), |
259 | UINT64_C(0), |
260 | UINT64_C(0), |
261 | UINT64_C(0), |
262 | UINT64_C(0), |
263 | UINT64_C(0), |
264 | UINT64_C(0), |
265 | UINT64_C(0), |
266 | UINT64_C(0), |
267 | UINT64_C(0), |
268 | UINT64_C(0), |
269 | UINT64_C(0), |
270 | UINT64_C(0), |
271 | UINT64_C(0), |
272 | UINT64_C(0), |
273 | UINT64_C(0), |
274 | UINT64_C(0), |
275 | UINT64_C(0), |
276 | UINT64_C(0), |
277 | UINT64_C(0), |
278 | UINT64_C(0), |
279 | UINT64_C(0), |
280 | UINT64_C(0), |
281 | UINT64_C(0), |
282 | UINT64_C(0), |
283 | UINT64_C(0), |
284 | UINT64_C(0), |
285 | UINT64_C(0), |
286 | UINT64_C(0), |
287 | UINT64_C(0), |
288 | UINT64_C(0), |
289 | UINT64_C(0), |
290 | UINT64_C(0), |
291 | UINT64_C(0), |
292 | UINT64_C(0), |
293 | UINT64_C(0), |
294 | UINT64_C(0), |
295 | UINT64_C(0), |
296 | UINT64_C(0), |
297 | UINT64_C(0), |
298 | UINT64_C(0), |
299 | UINT64_C(0), |
300 | UINT64_C(0), |
301 | UINT64_C(0), |
302 | UINT64_C(0), |
303 | UINT64_C(0), |
304 | UINT64_C(0), |
305 | UINT64_C(0), |
306 | UINT64_C(0), |
307 | UINT64_C(0), |
308 | UINT64_C(0), |
309 | UINT64_C(0), |
310 | UINT64_C(0), |
311 | UINT64_C(0), |
312 | UINT64_C(0), |
313 | UINT64_C(0), |
314 | UINT64_C(0), |
315 | UINT64_C(0), |
316 | UINT64_C(0), |
317 | UINT64_C(0), |
318 | UINT64_C(0), |
319 | UINT64_C(0), |
320 | UINT64_C(0), |
321 | UINT64_C(0), |
322 | UINT64_C(0), |
323 | UINT64_C(0), |
324 | UINT64_C(0), |
325 | UINT64_C(0), |
326 | UINT64_C(0), |
327 | UINT64_C(0), |
328 | UINT64_C(0), |
329 | UINT64_C(0), |
330 | UINT64_C(0), |
331 | UINT64_C(0), |
332 | UINT64_C(0), |
333 | UINT64_C(0), |
334 | UINT64_C(0), |
335 | UINT64_C(13763000465539203072), // ADDR_SPACE_CAST |
336 | UINT64_C(504403158265495552), // ADD_ri |
337 | UINT64_C(288230376151711744), // ADD_ri_32 |
338 | UINT64_C(1080863910568919040), // ADD_rr |
339 | UINT64_C(864691128455135232), // ADD_rr_32 |
340 | UINT64_C(6269010681299730432), // AND_ri |
341 | UINT64_C(6052837899185946624), // AND_ri_32 |
342 | UINT64_C(6845471433603153920), // AND_rr |
343 | UINT64_C(6629298651489370112), // AND_rr_32 |
344 | UINT64_C(15852670688344145936), // BE16 |
345 | UINT64_C(15852670688344145952), // BE32 |
346 | UINT64_C(15852670688344145984), // BE64 |
347 | UINT64_C(15492382718154506256), // BSWAP16 |
348 | UINT64_C(15492382718154506272), // BSWAP32 |
349 | UINT64_C(15492382718154506304), // BSWAP64 |
350 | UINT64_C(15780613094306218225), // CMPXCHGD |
351 | UINT64_C(14051230837395947761), // CMPXCHGW32 |
352 | UINT64_C(6917529027641081856), // CORE_LD32 |
353 | UINT64_C(6917529027641081856), // CORE_LD64 |
354 | UINT64_C(7998392938210000896), // CORE_SHIFT |
355 | UINT64_C(6917529027641081856), // CORE_ST |
356 | UINT64_C(3963167672086036480), // DIV_ri |
357 | UINT64_C(3746994889972252672), // DIV_ri_32 |
358 | UINT64_C(4539628424389459968), // DIV_rr |
359 | UINT64_C(4323455642275676160), // DIV_rr_32 |
360 | UINT64_C(9583660007044415488), // JAL |
361 | UINT64_C(10160120759347838976), // JALX |
362 | UINT64_C(16501189034685497344), // JCOND |
363 | UINT64_C(1513209474796486656), // JEQ_ri |
364 | UINT64_C(1585267068834414592), // JEQ_ri_32 |
365 | UINT64_C(2089670227099910144), // JEQ_rr |
366 | UINT64_C(2161727821137838080), // JEQ_rr_32 |
367 | UINT64_C(360287970189639680), // JMP |
368 | UINT64_C(432345564227567616), // JMPL |
369 | UINT64_C(6124895493223874560), // JNE_ri |
370 | UINT64_C(6196953087261802496), // JNE_ri_32 |
371 | UINT64_C(6701356245527298048), // JNE_rr |
372 | UINT64_C(6773413839565225984), // JNE_rr_32 |
373 | UINT64_C(4971973988617027584), // JSET_ri |
374 | UINT64_C(5044031582654955520), // JSET_ri_32 |
375 | UINT64_C(5548434740920451072), // JSET_rr |
376 | UINT64_C(5620492334958379008), // JSET_rr_32 |
377 | UINT64_C(8430738502437568512), // JSGE_ri |
378 | UINT64_C(8502796096475496448), // JSGE_ri_32 |
379 | UINT64_C(9007199254740992000), // JSGE_rr |
380 | UINT64_C(9079256848778919936), // JSGE_rr_32 |
381 | UINT64_C(7277816997830721536), // JSGT_ri |
382 | UINT64_C(7349874591868649472), // JSGT_ri_32 |
383 | UINT64_C(7854277750134145024), // JSGT_rr |
384 | UINT64_C(7926335344172072960), // JSGT_rr_32 |
385 | UINT64_C(15348267530078650368), // JSLE_ri |
386 | UINT64_C(15420325124116578304), // JSLE_ri_32 |
387 | UINT64_C(15924728282382073856), // JSLE_rr |
388 | UINT64_C(15996785876420001792), // JSLE_rr_32 |
389 | UINT64_C(14195346025471803392), // JSLT_ri |
390 | UINT64_C(14267403619509731328), // JSLT_ri_32 |
391 | UINT64_C(14771806777775226880), // JSLT_rr |
392 | UINT64_C(14843864371813154816), // JSLT_rr_32 |
393 | UINT64_C(3819052484010180608), // JUGE_ri |
394 | UINT64_C(3891110078048108544), // JUGE_ri_32 |
395 | UINT64_C(4395513236313604096), // JUGE_rr |
396 | UINT64_C(4467570830351532032), // JUGE_rr_32 |
397 | UINT64_C(2666130979403333632), // JUGT_ri |
398 | UINT64_C(2738188573441261568), // JUGT_ri_32 |
399 | UINT64_C(3242591731706757120), // JUGT_rr |
400 | UINT64_C(3314649325744685056), // JUGT_rr_32 |
401 | UINT64_C(13042424520864956416), // JULE_ri |
402 | UINT64_C(13114482114902884352), // JULE_ri_32 |
403 | UINT64_C(13618885273168379904), // JULE_rr |
404 | UINT64_C(13690942867206307840), // JULE_rr_32 |
405 | UINT64_C(11889503016258109440), // JULT_ri |
406 | UINT64_C(11961560610296037376), // JULT_ri_32 |
407 | UINT64_C(12465963768561532928), // JULT_rr |
408 | UINT64_C(12538021362599460864), // JULT_rr_32 |
409 | UINT64_C(8142508126285856768), // LDB |
410 | UINT64_C(8142508126285856768), // LDB32 |
411 | UINT64_C(15204152342002794752), // LDBACQ32 |
412 | UINT64_C(10448351135499550720), // LDBSX |
413 | UINT64_C(8718968878589280256), // LDD |
414 | UINT64_C(15780613094306218240), // LDDACQ |
415 | UINT64_C(7566047373982433280), // LDH |
416 | UINT64_C(7566047373982433280), // LDH32 |
417 | UINT64_C(14627691589699371264), // LDHACQ32 |
418 | UINT64_C(9871890383196127232), // LDHSX |
419 | UINT64_C(6989586621679009792), // LDW |
420 | UINT64_C(6989586621679009792), // LDW32 |
421 | UINT64_C(14051230837395947776), // LDWACQ32 |
422 | UINT64_C(9295429630892703744), // LDWSX |
423 | UINT64_C(3458764513820540928), // LD_ABS_B |
424 | UINT64_C(2882303761517117440), // LD_ABS_H |
425 | UINT64_C(2305843009213693952), // LD_ABS_W |
426 | UINT64_C(5764607523034234880), // LD_IND_B |
427 | UINT64_C(5188146770730811392), // LD_IND_H |
428 | UINT64_C(4611686018427387904), // LD_IND_W |
429 | UINT64_C(1729382256910270464), // LD_imm64 |
430 | UINT64_C(1729382256910270464), // LD_pseudo |
431 | UINT64_C(15276209936040722448), // LE16 |
432 | UINT64_C(15276209936040722464), // LE32 |
433 | UINT64_C(15276209936040722496), // LE64 |
434 | UINT64_C(10880696699727118336), // MOD_ri |
435 | UINT64_C(10664523917613334528), // MOD_ri_32 |
436 | UINT64_C(11457157452030541824), // MOD_rr |
437 | UINT64_C(11240984669916758016), // MOD_rr_32 |
438 | UINT64_C(13763000529963712512), // MOVSX_rr_16 |
439 | UINT64_C(13763000598683189248), // MOVSX_rr_32 |
440 | UINT64_C(13546827747849928704), // MOVSX_rr_32_16 |
441 | UINT64_C(13546827713490190336), // MOVSX_rr_32_8 |
442 | UINT64_C(13763000495603974144), // MOVSX_rr_8 |
443 | UINT64_C(13546827679130451968), // MOV_32_64 |
444 | UINT64_C(13186539708940812288), // MOV_ri |
445 | UINT64_C(12970366926827028480), // MOV_ri_32 |
446 | UINT64_C(13763000461244235776), // MOV_rr |
447 | UINT64_C(13546827679130451968), // MOV_rr_32 |
448 | UINT64_C(2810246167479189504), // MUL_ri |
449 | UINT64_C(2594073385365405696), // MUL_ri_32 |
450 | UINT64_C(3386706919782612992), // MUL_rr |
451 | UINT64_C(3170534137668829184), // MUL_rr_32 |
452 | UINT64_C(9511602413006487552), // NEG_32 |
453 | UINT64_C(9727775195120271360), // NEG_64 |
454 | UINT64_C(13763000461244235776), // NOP |
455 | UINT64_C(5116089176692883456), // OR_ri |
456 | UINT64_C(4899916394579099648), // OR_ri_32 |
457 | UINT64_C(5692549928996306944), // OR_rr |
458 | UINT64_C(5476377146882523136), // OR_rr_32 |
459 | UINT64_C(10736581511651262464), // RET |
460 | UINT64_C(3963167676381003776), // SDIV_ri |
461 | UINT64_C(3746994894267219968), // SDIV_ri_32 |
462 | UINT64_C(4539628428684427264), // SDIV_rr |
463 | UINT64_C(4323455646570643456), // SDIV_rr_32 |
464 | UINT64_C(7421932185906577408), // SLL_ri |
465 | UINT64_C(7205759403792793600), // SLL_ri_32 |
466 | UINT64_C(7998392938210000896), // SLL_rr |
467 | UINT64_C(7782220156096217088), // SLL_rr_32 |
468 | UINT64_C(10880696704022085632), // SMOD_ri |
469 | UINT64_C(10664523921908301824), // SMOD_ri_32 |
470 | UINT64_C(11457157456325509120), // SMOD_rr |
471 | UINT64_C(11240984674211725312), // SMOD_rr_32 |
472 | UINT64_C(14339461213547659264), // SRA_ri |
473 | UINT64_C(14123288431433875456), // SRA_ri_32 |
474 | UINT64_C(14915921965851082752), // SRA_rr |
475 | UINT64_C(14699749183737298944), // SRA_rr_32 |
476 | UINT64_C(8574853690513424384), // SRL_ri |
477 | UINT64_C(8358680908399640576), // SRL_ri_32 |
478 | UINT64_C(9151314442816847872), // SRL_rr |
479 | UINT64_C(8935141660703064064), // SRL_rr_32 |
480 | UINT64_C(8286623314361712640), // STB |
481 | UINT64_C(8286623314361712640), // STB32 |
482 | UINT64_C(15204152342002794768), // STBREL32 |
483 | UINT64_C(8214565720323784704), // STB_imm |
484 | UINT64_C(8863084066665136128), // STD |
485 | UINT64_C(15780613094306218256), // STDREL |
486 | UINT64_C(8791026472627208192), // STD_imm |
487 | UINT64_C(7710162562058289152), // STH |
488 | UINT64_C(7710162562058289152), // STH32 |
489 | UINT64_C(14627691589699371280), // STHREL32 |
490 | UINT64_C(7638104968020361216), // STH_imm |
491 | UINT64_C(7133701809754865664), // STW |
492 | UINT64_C(7133701809754865664), // STW32 |
493 | UINT64_C(14051230837395947792), // STWREL32 |
494 | UINT64_C(7061644215716937728), // STW_imm |
495 | UINT64_C(1657324662872342528), // SUB_ri |
496 | UINT64_C(1441151880758558720), // SUB_ri_32 |
497 | UINT64_C(2233785415175766016), // SUB_rr |
498 | UINT64_C(2017612633061982208), // SUB_rr_32 |
499 | UINT64_C(15780613094306217984), // XADDD |
500 | UINT64_C(14051230837395947520), // XADDW |
501 | UINT64_C(14051230837395947520), // XADDW32 |
502 | UINT64_C(15780613094306218064), // XANDD |
503 | UINT64_C(14051230837395947600), // XANDW32 |
504 | UINT64_C(15780613094306218209), // XCHGD |
505 | UINT64_C(14051230837395947745), // XCHGW32 |
506 | UINT64_C(15780613094306217985), // XFADDD |
507 | UINT64_C(14051230837395947521), // XFADDW32 |
508 | UINT64_C(15780613094306218065), // XFANDD |
509 | UINT64_C(14051230837395947601), // XFANDW32 |
510 | UINT64_C(15780613094306218049), // XFORD |
511 | UINT64_C(14051230837395947585), // XFORW32 |
512 | UINT64_C(15780613094306218145), // XFXORD |
513 | UINT64_C(14051230837395947681), // XFXORW32 |
514 | UINT64_C(15780613094306218048), // XORD |
515 | UINT64_C(14051230837395947584), // XORW32 |
516 | UINT64_C(12033618204333965312), // XOR_ri |
517 | UINT64_C(11817445422220181504), // XOR_ri_32 |
518 | UINT64_C(12610078956637388800), // XOR_rr |
519 | UINT64_C(12393906174523604992), // XOR_rr_32 |
520 | UINT64_C(15780613094306218144), // XXORD |
521 | UINT64_C(14051230837395947680), // XXORW32 |
522 | UINT64_C(0) |
523 | }; |
524 | const unsigned opcode = MI.getOpcode(); |
525 | uint64_t Value = InstBits[opcode]; |
526 | uint64_t op = 0; |
527 | (void)op; // suppress warning |
528 | switch (opcode) { |
529 | case BPF::CORE_LD32: |
530 | case BPF::CORE_LD64: |
531 | case BPF::CORE_ST: |
532 | case BPF::NOP: |
533 | case BPF::RET: { |
534 | break; |
535 | } |
536 | case BPF::JALX: { |
537 | // op: BrDst |
538 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
539 | op &= UINT64_C(15); |
540 | op <<= 48; |
541 | Value |= op; |
542 | break; |
543 | } |
544 | case BPF::JAL: |
545 | case BPF::JMPL: { |
546 | // op: BrDst |
547 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
548 | op &= UINT64_C(4294967295); |
549 | Value |= op; |
550 | break; |
551 | } |
552 | case BPF::JCOND: |
553 | case BPF::JMP: { |
554 | // op: BrDst |
555 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
556 | op &= UINT64_C(65535); |
557 | op <<= 32; |
558 | Value |= op; |
559 | break; |
560 | } |
561 | case BPF::STB_imm: |
562 | case BPF::STD_imm: |
563 | case BPF::STH_imm: |
564 | case BPF::STW_imm: { |
565 | // op: addr |
566 | op = getMemoryOpValue(MI, Op: 1, Fixups, STI); |
567 | op &= UINT64_C(1048575); |
568 | op <<= 32; |
569 | Value |= op; |
570 | // op: imm |
571 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
572 | op &= UINT64_C(4294967295); |
573 | Value |= op; |
574 | break; |
575 | } |
576 | case BPF::BE16: |
577 | case BPF::BE32: |
578 | case BPF::BE64: |
579 | case BPF::BSWAP16: |
580 | case BPF::BSWAP32: |
581 | case BPF::BSWAP64: |
582 | case BPF::LE16: |
583 | case BPF::LE32: |
584 | case BPF::LE64: |
585 | case BPF::NEG_32: |
586 | case BPF::NEG_64: { |
587 | // op: dst |
588 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
589 | op &= UINT64_C(15); |
590 | op <<= 48; |
591 | Value |= op; |
592 | break; |
593 | } |
594 | case BPF::JEQ_ri: |
595 | case BPF::JEQ_ri_32: |
596 | case BPF::JNE_ri: |
597 | case BPF::JNE_ri_32: |
598 | case BPF::JSET_ri: |
599 | case BPF::JSET_ri_32: |
600 | case BPF::JSGE_ri: |
601 | case BPF::JSGE_ri_32: |
602 | case BPF::JSGT_ri: |
603 | case BPF::JSGT_ri_32: |
604 | case BPF::JSLE_ri: |
605 | case BPF::JSLE_ri_32: |
606 | case BPF::JSLT_ri: |
607 | case BPF::JSLT_ri_32: |
608 | case BPF::JUGE_ri: |
609 | case BPF::JUGE_ri_32: |
610 | case BPF::JUGT_ri: |
611 | case BPF::JUGT_ri_32: |
612 | case BPF::JULE_ri: |
613 | case BPF::JULE_ri_32: |
614 | case BPF::JULT_ri: |
615 | case BPF::JULT_ri_32: { |
616 | // op: dst |
617 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
618 | op &= UINT64_C(15); |
619 | op <<= 48; |
620 | Value |= op; |
621 | // op: BrDst |
622 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
623 | op &= UINT64_C(65535); |
624 | op <<= 32; |
625 | Value |= op; |
626 | // op: imm |
627 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
628 | op &= UINT64_C(4294967295); |
629 | Value |= op; |
630 | break; |
631 | } |
632 | case BPF::LDB: |
633 | case BPF::LDB32: |
634 | case BPF::LDBACQ32: |
635 | case BPF::LDBSX: |
636 | case BPF::LDD: |
637 | case BPF::LDDACQ: |
638 | case BPF::LDH: |
639 | case BPF::LDH32: |
640 | case BPF::LDHACQ32: |
641 | case BPF::LDHSX: |
642 | case BPF::LDW: |
643 | case BPF::LDW32: |
644 | case BPF::LDWACQ32: |
645 | case BPF::LDWSX: { |
646 | // op: dst |
647 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
648 | op &= UINT64_C(15); |
649 | op <<= 48; |
650 | Value |= op; |
651 | // op: addr |
652 | op = getMemoryOpValue(MI, Op: 1, Fixups, STI); |
653 | Value |= (op & UINT64_C(983040)) << 36; |
654 | Value |= (op & UINT64_C(65535)) << 32; |
655 | break; |
656 | } |
657 | case BPF::LD_imm64: |
658 | case BPF::MOV_ri: |
659 | case BPF::MOV_ri_32: { |
660 | // op: dst |
661 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
662 | op &= UINT64_C(15); |
663 | op <<= 48; |
664 | Value |= op; |
665 | // op: imm |
666 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
667 | op &= UINT64_C(4294967295); |
668 | Value |= op; |
669 | break; |
670 | } |
671 | case BPF::ADD_ri: |
672 | case BPF::ADD_ri_32: |
673 | case BPF::AND_ri: |
674 | case BPF::AND_ri_32: |
675 | case BPF::DIV_ri: |
676 | case BPF::DIV_ri_32: |
677 | case BPF::MOD_ri: |
678 | case BPF::MOD_ri_32: |
679 | case BPF::MUL_ri: |
680 | case BPF::MUL_ri_32: |
681 | case BPF::OR_ri: |
682 | case BPF::OR_ri_32: |
683 | case BPF::SDIV_ri: |
684 | case BPF::SDIV_ri_32: |
685 | case BPF::SLL_ri: |
686 | case BPF::SLL_ri_32: |
687 | case BPF::SMOD_ri: |
688 | case BPF::SMOD_ri_32: |
689 | case BPF::SRA_ri: |
690 | case BPF::SRA_ri_32: |
691 | case BPF::SRL_ri: |
692 | case BPF::SRL_ri_32: |
693 | case BPF::SUB_ri: |
694 | case BPF::SUB_ri_32: |
695 | case BPF::XOR_ri: |
696 | case BPF::XOR_ri_32: { |
697 | // op: dst |
698 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
699 | op &= UINT64_C(15); |
700 | op <<= 48; |
701 | Value |= op; |
702 | // op: imm |
703 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
704 | op &= UINT64_C(4294967295); |
705 | Value |= op; |
706 | break; |
707 | } |
708 | case BPF::LD_pseudo: { |
709 | // op: dst |
710 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
711 | op &= UINT64_C(15); |
712 | op <<= 48; |
713 | Value |= op; |
714 | // op: imm |
715 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
716 | op &= UINT64_C(4294967295); |
717 | Value |= op; |
718 | // op: pseudo |
719 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
720 | op &= UINT64_C(15); |
721 | op <<= 52; |
722 | Value |= op; |
723 | break; |
724 | } |
725 | case BPF::MOVSX_rr_8: |
726 | case BPF::MOVSX_rr_16: |
727 | case BPF::MOVSX_rr_32: |
728 | case BPF::MOVSX_rr_32_8: |
729 | case BPF::MOVSX_rr_32_16: |
730 | case BPF::MOV_32_64: |
731 | case BPF::MOV_rr: |
732 | case BPF::MOV_rr_32: { |
733 | // op: dst |
734 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
735 | op &= UINT64_C(15); |
736 | op <<= 48; |
737 | Value |= op; |
738 | // op: src |
739 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
740 | op &= UINT64_C(15); |
741 | op <<= 52; |
742 | Value |= op; |
743 | break; |
744 | } |
745 | case BPF::JEQ_rr: |
746 | case BPF::JEQ_rr_32: |
747 | case BPF::JNE_rr: |
748 | case BPF::JNE_rr_32: |
749 | case BPF::JSET_rr: |
750 | case BPF::JSET_rr_32: |
751 | case BPF::JSGE_rr: |
752 | case BPF::JSGE_rr_32: |
753 | case BPF::JSGT_rr: |
754 | case BPF::JSGT_rr_32: |
755 | case BPF::JSLE_rr: |
756 | case BPF::JSLE_rr_32: |
757 | case BPF::JSLT_rr: |
758 | case BPF::JSLT_rr_32: |
759 | case BPF::JUGE_rr: |
760 | case BPF::JUGE_rr_32: |
761 | case BPF::JUGT_rr: |
762 | case BPF::JUGT_rr_32: |
763 | case BPF::JULE_rr: |
764 | case BPF::JULE_rr_32: |
765 | case BPF::JULT_rr: |
766 | case BPF::JULT_rr_32: { |
767 | // op: dst |
768 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
769 | op &= UINT64_C(15); |
770 | op <<= 48; |
771 | Value |= op; |
772 | // op: src |
773 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
774 | op &= UINT64_C(15); |
775 | op <<= 52; |
776 | Value |= op; |
777 | // op: BrDst |
778 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
779 | op &= UINT64_C(65535); |
780 | op <<= 32; |
781 | Value |= op; |
782 | break; |
783 | } |
784 | case BPF::ADDR_SPACE_CAST: { |
785 | // op: dst |
786 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
787 | op &= UINT64_C(15); |
788 | op <<= 48; |
789 | Value |= op; |
790 | // op: src |
791 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
792 | op &= UINT64_C(15); |
793 | op <<= 52; |
794 | Value |= op; |
795 | // op: dst_as |
796 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
797 | op &= UINT64_C(65535); |
798 | op <<= 16; |
799 | Value |= op; |
800 | // op: src_as |
801 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 3), Fixups, STI); |
802 | op &= UINT64_C(65535); |
803 | Value |= op; |
804 | break; |
805 | } |
806 | case BPF::ADD_rr: |
807 | case BPF::ADD_rr_32: |
808 | case BPF::AND_rr: |
809 | case BPF::AND_rr_32: |
810 | case BPF::CORE_SHIFT: |
811 | case BPF::DIV_rr: |
812 | case BPF::DIV_rr_32: |
813 | case BPF::MOD_rr: |
814 | case BPF::MOD_rr_32: |
815 | case BPF::MUL_rr: |
816 | case BPF::MUL_rr_32: |
817 | case BPF::OR_rr: |
818 | case BPF::OR_rr_32: |
819 | case BPF::SDIV_rr: |
820 | case BPF::SDIV_rr_32: |
821 | case BPF::SLL_rr: |
822 | case BPF::SLL_rr_32: |
823 | case BPF::SMOD_rr: |
824 | case BPF::SMOD_rr_32: |
825 | case BPF::SRA_rr: |
826 | case BPF::SRA_rr_32: |
827 | case BPF::SRL_rr: |
828 | case BPF::SRL_rr_32: |
829 | case BPF::SUB_rr: |
830 | case BPF::SUB_rr_32: |
831 | case BPF::XOR_rr: |
832 | case BPF::XOR_rr_32: { |
833 | // op: dst |
834 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
835 | op &= UINT64_C(15); |
836 | op <<= 48; |
837 | Value |= op; |
838 | // op: src |
839 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
840 | op &= UINT64_C(15); |
841 | op <<= 52; |
842 | Value |= op; |
843 | break; |
844 | } |
845 | case BPF::XADDD: |
846 | case BPF::XADDW: |
847 | case BPF::XADDW32: |
848 | case BPF::XANDD: |
849 | case BPF::XANDW32: |
850 | case BPF::XCHGD: |
851 | case BPF::XCHGW32: |
852 | case BPF::XFADDD: |
853 | case BPF::XFADDW32: |
854 | case BPF::XFANDD: |
855 | case BPF::XFANDW32: |
856 | case BPF::XFORD: |
857 | case BPF::XFORW32: |
858 | case BPF::XFXORD: |
859 | case BPF::XFXORW32: |
860 | case BPF::XORD: |
861 | case BPF::XORW32: |
862 | case BPF::XXORD: |
863 | case BPF::XXORW32: { |
864 | // op: dst |
865 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
866 | op &= UINT64_C(15); |
867 | op <<= 52; |
868 | Value |= op; |
869 | // op: addr |
870 | op = getMemoryOpValue(MI, Op: 1, Fixups, STI); |
871 | op &= UINT64_C(1048575); |
872 | op <<= 32; |
873 | Value |= op; |
874 | break; |
875 | } |
876 | case BPF::LD_ABS_B: |
877 | case BPF::LD_ABS_H: |
878 | case BPF::LD_ABS_W: { |
879 | // op: imm |
880 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
881 | op &= UINT64_C(4294967295); |
882 | Value |= op; |
883 | break; |
884 | } |
885 | case BPF::CMPXCHGD: |
886 | case BPF::CMPXCHGW32: { |
887 | // op: new |
888 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 2), Fixups, STI); |
889 | op &= UINT64_C(15); |
890 | op <<= 52; |
891 | Value |= op; |
892 | // op: addr |
893 | op = getMemoryOpValue(MI, Op: 0, Fixups, STI); |
894 | op &= UINT64_C(1048575); |
895 | op <<= 32; |
896 | Value |= op; |
897 | break; |
898 | } |
899 | case BPF::STB: |
900 | case BPF::STB32: |
901 | case BPF::STBREL32: |
902 | case BPF::STD: |
903 | case BPF::STDREL: |
904 | case BPF::STH: |
905 | case BPF::STH32: |
906 | case BPF::STHREL32: |
907 | case BPF::STW: |
908 | case BPF::STW32: |
909 | case BPF::STWREL32: { |
910 | // op: src |
911 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 0), Fixups, STI); |
912 | op &= UINT64_C(15); |
913 | op <<= 52; |
914 | Value |= op; |
915 | // op: addr |
916 | op = getMemoryOpValue(MI, Op: 1, Fixups, STI); |
917 | op &= UINT64_C(1048575); |
918 | op <<= 32; |
919 | Value |= op; |
920 | break; |
921 | } |
922 | case BPF::LD_IND_B: |
923 | case BPF::LD_IND_H: |
924 | case BPF::LD_IND_W: { |
925 | // op: val |
926 | op = getMachineOpValue(MI, MO: MI.getOperand(i: 1), Fixups, STI); |
927 | op &= UINT64_C(15); |
928 | op <<= 52; |
929 | Value |= op; |
930 | break; |
931 | } |
932 | default: |
933 | std::string msg; |
934 | raw_string_ostream Msg(msg); |
935 | Msg << "Not supported instr: " << MI; |
936 | report_fatal_error(reason: Msg.str().c_str()); |
937 | } |
938 | return Value; |
939 | } |
940 | |
941 | #ifdef GET_OPERAND_BIT_OFFSET |
942 | #undef GET_OPERAND_BIT_OFFSET |
943 | |
944 | uint32_t BPFMCCodeEmitter::getOperandBitOffset(const MCInst &MI, |
945 | unsigned OpNum, |
946 | const MCSubtargetInfo &STI) const { |
947 | switch (MI.getOpcode()) { |
948 | case BPF::CORE_LD32: |
949 | case BPF::CORE_LD64: |
950 | case BPF::CORE_ST: |
951 | case BPF::NOP: |
952 | case BPF::RET: { |
953 | break; |
954 | } |
955 | case BPF::JAL: |
956 | case BPF::JMPL: { |
957 | switch (OpNum) { |
958 | case 0: |
959 | // op: BrDst |
960 | return 0; |
961 | } |
962 | break; |
963 | } |
964 | case BPF::JCOND: |
965 | case BPF::JMP: { |
966 | switch (OpNum) { |
967 | case 0: |
968 | // op: BrDst |
969 | return 32; |
970 | } |
971 | break; |
972 | } |
973 | case BPF::JALX: { |
974 | switch (OpNum) { |
975 | case 0: |
976 | // op: BrDst |
977 | return 48; |
978 | } |
979 | break; |
980 | } |
981 | case BPF::LDB: |
982 | case BPF::LDB32: |
983 | case BPF::LDBACQ32: |
984 | case BPF::LDBSX: |
985 | case BPF::LDD: |
986 | case BPF::LDDACQ: |
987 | case BPF::LDH: |
988 | case BPF::LDH32: |
989 | case BPF::LDHACQ32: |
990 | case BPF::LDHSX: |
991 | case BPF::LDW: |
992 | case BPF::LDW32: |
993 | case BPF::LDWACQ32: |
994 | case BPF::LDWSX: { |
995 | switch (OpNum) { |
996 | case 0: |
997 | // op: dst |
998 | return 48; |
999 | case 1: |
1000 | // op: addr |
1001 | return 32; |
1002 | } |
1003 | break; |
1004 | } |
1005 | case BPF::LD_imm64: |
1006 | case BPF::MOV_ri: |
1007 | case BPF::MOV_ri_32: { |
1008 | switch (OpNum) { |
1009 | case 0: |
1010 | // op: dst |
1011 | return 48; |
1012 | case 1: |
1013 | // op: imm |
1014 | return 0; |
1015 | } |
1016 | break; |
1017 | } |
1018 | case BPF::JEQ_rr: |
1019 | case BPF::JEQ_rr_32: |
1020 | case BPF::JNE_rr: |
1021 | case BPF::JNE_rr_32: |
1022 | case BPF::JSET_rr: |
1023 | case BPF::JSET_rr_32: |
1024 | case BPF::JSGE_rr: |
1025 | case BPF::JSGE_rr_32: |
1026 | case BPF::JSGT_rr: |
1027 | case BPF::JSGT_rr_32: |
1028 | case BPF::JSLE_rr: |
1029 | case BPF::JSLE_rr_32: |
1030 | case BPF::JSLT_rr: |
1031 | case BPF::JSLT_rr_32: |
1032 | case BPF::JUGE_rr: |
1033 | case BPF::JUGE_rr_32: |
1034 | case BPF::JUGT_rr: |
1035 | case BPF::JUGT_rr_32: |
1036 | case BPF::JULE_rr: |
1037 | case BPF::JULE_rr_32: |
1038 | case BPF::JULT_rr: |
1039 | case BPF::JULT_rr_32: { |
1040 | switch (OpNum) { |
1041 | case 0: |
1042 | // op: dst |
1043 | return 48; |
1044 | case 1: |
1045 | // op: src |
1046 | return 52; |
1047 | case 2: |
1048 | // op: BrDst |
1049 | return 32; |
1050 | } |
1051 | break; |
1052 | } |
1053 | case BPF::ADDR_SPACE_CAST: { |
1054 | switch (OpNum) { |
1055 | case 0: |
1056 | // op: dst |
1057 | return 48; |
1058 | case 1: |
1059 | // op: src |
1060 | return 52; |
1061 | case 2: |
1062 | // op: dst_as |
1063 | return 16; |
1064 | case 3: |
1065 | // op: src_as |
1066 | return 0; |
1067 | } |
1068 | break; |
1069 | } |
1070 | case BPF::MOVSX_rr_8: |
1071 | case BPF::MOVSX_rr_16: |
1072 | case BPF::MOVSX_rr_32: |
1073 | case BPF::MOVSX_rr_32_8: |
1074 | case BPF::MOVSX_rr_32_16: |
1075 | case BPF::MOV_32_64: |
1076 | case BPF::MOV_rr: |
1077 | case BPF::MOV_rr_32: { |
1078 | switch (OpNum) { |
1079 | case 0: |
1080 | // op: dst |
1081 | return 48; |
1082 | case 1: |
1083 | // op: src |
1084 | return 52; |
1085 | } |
1086 | break; |
1087 | } |
1088 | case BPF::JEQ_ri: |
1089 | case BPF::JEQ_ri_32: |
1090 | case BPF::JNE_ri: |
1091 | case BPF::JNE_ri_32: |
1092 | case BPF::JSET_ri: |
1093 | case BPF::JSET_ri_32: |
1094 | case BPF::JSGE_ri: |
1095 | case BPF::JSGE_ri_32: |
1096 | case BPF::JSGT_ri: |
1097 | case BPF::JSGT_ri_32: |
1098 | case BPF::JSLE_ri: |
1099 | case BPF::JSLE_ri_32: |
1100 | case BPF::JSLT_ri: |
1101 | case BPF::JSLT_ri_32: |
1102 | case BPF::JUGE_ri: |
1103 | case BPF::JUGE_ri_32: |
1104 | case BPF::JUGT_ri: |
1105 | case BPF::JUGT_ri_32: |
1106 | case BPF::JULE_ri: |
1107 | case BPF::JULE_ri_32: |
1108 | case BPF::JULT_ri: |
1109 | case BPF::JULT_ri_32: { |
1110 | switch (OpNum) { |
1111 | case 0: |
1112 | // op: dst |
1113 | return 48; |
1114 | case 2: |
1115 | // op: BrDst |
1116 | return 32; |
1117 | case 1: |
1118 | // op: imm |
1119 | return 0; |
1120 | } |
1121 | break; |
1122 | } |
1123 | case BPF::LD_pseudo: { |
1124 | switch (OpNum) { |
1125 | case 0: |
1126 | // op: dst |
1127 | return 48; |
1128 | case 2: |
1129 | // op: imm |
1130 | return 0; |
1131 | case 1: |
1132 | // op: pseudo |
1133 | return 52; |
1134 | } |
1135 | break; |
1136 | } |
1137 | case BPF::ADD_ri: |
1138 | case BPF::ADD_ri_32: |
1139 | case BPF::AND_ri: |
1140 | case BPF::AND_ri_32: |
1141 | case BPF::DIV_ri: |
1142 | case BPF::DIV_ri_32: |
1143 | case BPF::MOD_ri: |
1144 | case BPF::MOD_ri_32: |
1145 | case BPF::MUL_ri: |
1146 | case BPF::MUL_ri_32: |
1147 | case BPF::OR_ri: |
1148 | case BPF::OR_ri_32: |
1149 | case BPF::SDIV_ri: |
1150 | case BPF::SDIV_ri_32: |
1151 | case BPF::SLL_ri: |
1152 | case BPF::SLL_ri_32: |
1153 | case BPF::SMOD_ri: |
1154 | case BPF::SMOD_ri_32: |
1155 | case BPF::SRA_ri: |
1156 | case BPF::SRA_ri_32: |
1157 | case BPF::SRL_ri: |
1158 | case BPF::SRL_ri_32: |
1159 | case BPF::SUB_ri: |
1160 | case BPF::SUB_ri_32: |
1161 | case BPF::XOR_ri: |
1162 | case BPF::XOR_ri_32: { |
1163 | switch (OpNum) { |
1164 | case 0: |
1165 | // op: dst |
1166 | return 48; |
1167 | case 2: |
1168 | // op: imm |
1169 | return 0; |
1170 | } |
1171 | break; |
1172 | } |
1173 | case BPF::ADD_rr: |
1174 | case BPF::ADD_rr_32: |
1175 | case BPF::AND_rr: |
1176 | case BPF::AND_rr_32: |
1177 | case BPF::CORE_SHIFT: |
1178 | case BPF::DIV_rr: |
1179 | case BPF::DIV_rr_32: |
1180 | case BPF::MOD_rr: |
1181 | case BPF::MOD_rr_32: |
1182 | case BPF::MUL_rr: |
1183 | case BPF::MUL_rr_32: |
1184 | case BPF::OR_rr: |
1185 | case BPF::OR_rr_32: |
1186 | case BPF::SDIV_rr: |
1187 | case BPF::SDIV_rr_32: |
1188 | case BPF::SLL_rr: |
1189 | case BPF::SLL_rr_32: |
1190 | case BPF::SMOD_rr: |
1191 | case BPF::SMOD_rr_32: |
1192 | case BPF::SRA_rr: |
1193 | case BPF::SRA_rr_32: |
1194 | case BPF::SRL_rr: |
1195 | case BPF::SRL_rr_32: |
1196 | case BPF::SUB_rr: |
1197 | case BPF::SUB_rr_32: |
1198 | case BPF::XOR_rr: |
1199 | case BPF::XOR_rr_32: { |
1200 | switch (OpNum) { |
1201 | case 0: |
1202 | // op: dst |
1203 | return 48; |
1204 | case 2: |
1205 | // op: src |
1206 | return 52; |
1207 | } |
1208 | break; |
1209 | } |
1210 | case BPF::BE16: |
1211 | case BPF::BE32: |
1212 | case BPF::BE64: |
1213 | case BPF::BSWAP16: |
1214 | case BPF::BSWAP32: |
1215 | case BPF::BSWAP64: |
1216 | case BPF::LE16: |
1217 | case BPF::LE32: |
1218 | case BPF::LE64: |
1219 | case BPF::NEG_32: |
1220 | case BPF::NEG_64: { |
1221 | switch (OpNum) { |
1222 | case 0: |
1223 | // op: dst |
1224 | return 48; |
1225 | } |
1226 | break; |
1227 | } |
1228 | case BPF::XADDD: |
1229 | case BPF::XADDW: |
1230 | case BPF::XADDW32: |
1231 | case BPF::XANDD: |
1232 | case BPF::XANDW32: |
1233 | case BPF::XCHGD: |
1234 | case BPF::XCHGW32: |
1235 | case BPF::XFADDD: |
1236 | case BPF::XFADDW32: |
1237 | case BPF::XFANDD: |
1238 | case BPF::XFANDW32: |
1239 | case BPF::XFORD: |
1240 | case BPF::XFORW32: |
1241 | case BPF::XFXORD: |
1242 | case BPF::XFXORW32: |
1243 | case BPF::XORD: |
1244 | case BPF::XORW32: |
1245 | case BPF::XXORD: |
1246 | case BPF::XXORW32: { |
1247 | switch (OpNum) { |
1248 | case 0: |
1249 | // op: dst |
1250 | return 52; |
1251 | case 1: |
1252 | // op: addr |
1253 | return 32; |
1254 | } |
1255 | break; |
1256 | } |
1257 | case BPF::STB: |
1258 | case BPF::STB32: |
1259 | case BPF::STBREL32: |
1260 | case BPF::STD: |
1261 | case BPF::STDREL: |
1262 | case BPF::STH: |
1263 | case BPF::STH32: |
1264 | case BPF::STHREL32: |
1265 | case BPF::STW: |
1266 | case BPF::STW32: |
1267 | case BPF::STWREL32: { |
1268 | switch (OpNum) { |
1269 | case 0: |
1270 | // op: src |
1271 | return 52; |
1272 | case 1: |
1273 | // op: addr |
1274 | return 32; |
1275 | } |
1276 | break; |
1277 | } |
1278 | case BPF::STB_imm: |
1279 | case BPF::STD_imm: |
1280 | case BPF::STH_imm: |
1281 | case BPF::STW_imm: { |
1282 | switch (OpNum) { |
1283 | case 1: |
1284 | // op: addr |
1285 | return 32; |
1286 | case 0: |
1287 | // op: imm |
1288 | return 0; |
1289 | } |
1290 | break; |
1291 | } |
1292 | case BPF::LD_ABS_B: |
1293 | case BPF::LD_ABS_H: |
1294 | case BPF::LD_ABS_W: { |
1295 | switch (OpNum) { |
1296 | case 1: |
1297 | // op: imm |
1298 | return 0; |
1299 | } |
1300 | break; |
1301 | } |
1302 | case BPF::LD_IND_B: |
1303 | case BPF::LD_IND_H: |
1304 | case BPF::LD_IND_W: { |
1305 | switch (OpNum) { |
1306 | case 1: |
1307 | // op: val |
1308 | return 52; |
1309 | } |
1310 | break; |
1311 | } |
1312 | case BPF::CMPXCHGD: |
1313 | case BPF::CMPXCHGW32: { |
1314 | switch (OpNum) { |
1315 | case 2: |
1316 | // op: new |
1317 | return 52; |
1318 | case 0: |
1319 | // op: addr |
1320 | return 32; |
1321 | } |
1322 | break; |
1323 | } |
1324 | } |
1325 | std::string msg; |
1326 | raw_string_ostream Msg(msg); |
1327 | Msg << "Not supported instr[opcode]: " << MI << "[" << OpNum << "]" ; |
1328 | report_fatal_error(Msg.str().c_str()); |
1329 | } |
1330 | |
1331 | #endif // GET_OPERAND_BIT_OFFSET |
1332 | |
1333 | |