1//===- InstrEmitter.h - Emit MachineInstrs for the SelectionDAG -*- C++ -*--==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This declares the Emit routines for the SelectionDAG class, which creates
10// MachineInstrs based on the decisions of the SelectionDAG instruction
11// selection.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_INSTREMITTER_H
16#define LLVM_LIB_CODEGEN_SELECTIONDAG_INSTREMITTER_H
17
18#include "llvm/ADT/DenseMap.h"
19#include "llvm/CodeGen/MachineBasicBlock.h"
20#include "llvm/CodeGen/SelectionDAGNodes.h"
21
22namespace llvm {
23
24class MachineInstrBuilder;
25class MCInstrDesc;
26class SDDbgLabel;
27class SDDbgValue;
28class SDDbgOperand;
29class TargetLowering;
30class TargetMachine;
31
32class LLVM_LIBRARY_VISIBILITY InstrEmitter {
33public:
34 using VRBaseMapType = SmallDenseMap<SDValue, Register, 16>;
35
36private:
37 MachineFunction *MF;
38 MachineRegisterInfo *MRI;
39 const TargetInstrInfo *TII;
40 const TargetRegisterInfo *TRI;
41 const TargetLowering *TLI;
42
43 MachineBasicBlock *MBB;
44 MachineBasicBlock::iterator InsertPos;
45
46 /// Should we try to produce DBG_INSTR_REF instructions?
47 bool EmitDebugInstrRefs;
48
49 /// EmitCopyFromReg - Generate machine code for an CopyFromReg node or an
50 /// implicit physical register output.
51 void EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone,
52 Register SrcReg, VRBaseMapType &VRBaseMap);
53
54 void CreateVirtualRegisters(SDNode *Node,
55 MachineInstrBuilder &MIB,
56 const MCInstrDesc &II,
57 bool IsClone, bool IsCloned,
58 VRBaseMapType &VRBaseMap);
59
60 /// getVR - Return the virtual register corresponding to the specified result
61 /// of the specified node.
62 Register getVR(SDValue Op, VRBaseMapType &VRBaseMap);
63
64 /// AddRegisterOperand - Add the specified register as an operand to the
65 /// specified machine instr. Insert register copies if the register is
66 /// not in the required register class.
67 void AddRegisterOperand(MachineInstrBuilder &MIB,
68 SDValue Op,
69 unsigned IIOpNum,
70 const MCInstrDesc *II,
71 VRBaseMapType &VRBaseMap,
72 bool IsDebug, bool IsClone, bool IsCloned);
73
74 /// AddOperand - Add the specified operand to the specified machine instr. II
75 /// specifies the instruction information for the node, and IIOpNum is the
76 /// operand number (in the II) that we are adding. IIOpNum and II are used for
77 /// assertions only.
78 void AddOperand(MachineInstrBuilder &MIB,
79 SDValue Op,
80 unsigned IIOpNum,
81 const MCInstrDesc *II,
82 VRBaseMapType &VRBaseMap,
83 bool IsDebug, bool IsClone, bool IsCloned);
84
85 /// ConstrainForSubReg - Try to constrain VReg to a register class that
86 /// supports SubIdx sub-registers. Emit a copy if that isn't possible.
87 /// Return the virtual register to use.
88 Register ConstrainForSubReg(Register VReg, unsigned SubIdx, MVT VT,
89 bool isDivergent, const DebugLoc &DL);
90
91 /// EmitSubregNode - Generate machine code for subreg nodes.
92 ///
93 void EmitSubregNode(SDNode *Node, VRBaseMapType &VRBaseMap, bool IsClone,
94 bool IsCloned);
95
96 /// EmitCopyToRegClassNode - Generate machine code for COPY_TO_REGCLASS nodes.
97 /// COPY_TO_REGCLASS is just a normal copy, except that the destination
98 /// register is constrained to be in a particular register class.
99 ///
100 void EmitCopyToRegClassNode(SDNode *Node, VRBaseMapType &VRBaseMap);
101
102 /// EmitRegSequence - Generate machine code for REG_SEQUENCE nodes.
103 ///
104 void EmitRegSequence(SDNode *Node, VRBaseMapType &VRBaseMap, bool IsClone,
105 bool IsCloned);
106
107public:
108 /// CountResults - The results of target nodes have register or immediate
109 /// operands first, then an optional chain, and optional flag operands
110 /// (which do not go into the machine instrs.)
111 static unsigned CountResults(SDNode *Node);
112
113 void AddDbgValueLocationOps(MachineInstrBuilder &MIB,
114 const MCInstrDesc &DbgValDesc,
115 ArrayRef<SDDbgOperand> Locations,
116 VRBaseMapType &VRBaseMap);
117
118 /// EmitDbgValue - Generate machine instruction for a dbg_value node.
119 ///
120 MachineInstr *EmitDbgValue(SDDbgValue *SD, VRBaseMapType &VRBaseMap);
121
122 /// Emit a dbg_value as a DBG_INSTR_REF. May produce DBG_VALUE $noreg instead
123 /// if there is no variable location; alternately a half-formed DBG_INSTR_REF
124 /// that refers to a virtual register and is corrected later in isel.
125 MachineInstr *EmitDbgInstrRef(SDDbgValue *SD, VRBaseMapType &VRBaseMap);
126
127 /// Emit a DBG_VALUE $noreg, indicating a variable has no location.
128 MachineInstr *EmitDbgNoLocation(SDDbgValue *SD);
129
130 /// Emit a DBG_VALUE_LIST from the operands to SDDbgValue.
131 MachineInstr *EmitDbgValueList(SDDbgValue *SD, VRBaseMapType &VRBaseMap);
132
133 /// Emit a DBG_VALUE from the operands to SDDbgValue.
134 MachineInstr *EmitDbgValueFromSingleOp(SDDbgValue *SD,
135 VRBaseMapType &VRBaseMap);
136
137 /// Generate machine instruction for a dbg_label node.
138 MachineInstr *EmitDbgLabel(SDDbgLabel *SD);
139
140 /// EmitNode - Generate machine code for a node and needed dependencies.
141 ///
142 void EmitNode(SDNode *Node, bool IsClone, bool IsCloned,
143 VRBaseMapType &VRBaseMap) {
144 if (Node->isMachineOpcode())
145 EmitMachineNode(Node, IsClone, IsCloned, VRBaseMap);
146 else
147 EmitSpecialNode(Node, IsClone, IsCloned, VRBaseMap);
148 }
149
150 /// getBlock - Return the current basic block.
151 MachineBasicBlock *getBlock() { return MBB; }
152
153 /// getInsertPos - Return the current insertion position.
154 MachineBasicBlock::iterator getInsertPos() { return InsertPos; }
155
156 /// InstrEmitter - Construct an InstrEmitter and set it to start inserting
157 /// at the given position in the given block.
158 InstrEmitter(const TargetMachine &TM, MachineBasicBlock *mbb,
159 MachineBasicBlock::iterator insertpos);
160
161private:
162 void EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned,
163 VRBaseMapType &VRBaseMap);
164 void EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned,
165 VRBaseMapType &VRBaseMap);
166};
167} // namespace llvm
168
169#endif
170