1//===---- MipsABIInfo.cpp - Information about MIPS ABI's ------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "MipsABIInfo.h"
10#include "Mips.h"
11#include "llvm/ADT/StringRef.h"
12#include "llvm/MC/MCTargetOptions.h"
13#include "llvm/Support/CommandLine.h"
14
15using namespace llvm;
16
17// Note: this option is defined here to be visible from libLLVMMipsAsmParser
18// and libLLVMMipsCodeGen
19cl::opt<bool>
20EmitJalrReloc("mips-jalr-reloc", cl::Hidden,
21 cl::desc("MIPS: Emit R_{MICRO}MIPS_JALR relocation with jalr"),
22 cl::init(Val: true));
23
24namespace {
25static const MCPhysReg O32IntRegs[4] = {Mips::A0, Mips::A1, Mips::A2, Mips::A3};
26
27static const MCPhysReg Mips64IntRegs[8] = {
28 Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64,
29 Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64};
30}
31
32ArrayRef<MCPhysReg> MipsABIInfo::GetByValArgRegs() const {
33 if (IsO32())
34 return ArrayRef(O32IntRegs);
35 if (IsN32() || IsN64())
36 return ArrayRef(Mips64IntRegs);
37 llvm_unreachable("Unhandled ABI");
38}
39
40ArrayRef<MCPhysReg> MipsABIInfo::getVarArgRegs(bool isGP64bit) const {
41 if (IsO32()) {
42 if (isGP64bit)
43 return ArrayRef(Mips64IntRegs);
44 else
45 return ArrayRef(O32IntRegs);
46 }
47 if (IsN32() || IsN64())
48 return ArrayRef(Mips64IntRegs);
49 llvm_unreachable("Unhandled ABI");
50}
51
52unsigned MipsABIInfo::GetCalleeAllocdArgSizeInBytes(CallingConv::ID CC) const {
53 if (IsO32())
54 return CC != CallingConv::Fast ? 16 : 0;
55 if (IsN32() || IsN64())
56 return 0;
57 llvm_unreachable("Unhandled ABI");
58}
59
60MipsABIInfo MipsABIInfo::computeTargetABI(const Triple &TT, StringRef CPU,
61 const MCTargetOptions &Options) {
62 if (Options.getABIName().starts_with(Prefix: "o32"))
63 return MipsABIInfo::O32();
64 if (Options.getABIName().starts_with(Prefix: "n32"))
65 return MipsABIInfo::N32();
66 if (Options.getABIName().starts_with(Prefix: "n64"))
67 return MipsABIInfo::N64();
68 if (TT.isABIN32())
69 return MipsABIInfo::N32();
70 assert(Options.getABIName().empty() && "Unknown ABI option for MIPS");
71
72 if (TT.isMIPS64())
73 return MipsABIInfo::N64();
74 return MipsABIInfo::O32();
75}
76
77unsigned MipsABIInfo::GetStackPtr() const {
78 return ArePtrs64bit() ? Mips::SP_64 : Mips::SP;
79}
80
81unsigned MipsABIInfo::GetFramePtr() const {
82 return ArePtrs64bit() ? Mips::FP_64 : Mips::FP;
83}
84
85unsigned MipsABIInfo::GetBasePtr() const {
86 return ArePtrs64bit() ? Mips::S7_64 : Mips::S7;
87}
88
89unsigned MipsABIInfo::GetGlobalPtr() const {
90 return ArePtrs64bit() ? Mips::GP_64 : Mips::GP;
91}
92
93unsigned MipsABIInfo::GetNullPtr() const {
94 return ArePtrs64bit() ? Mips::ZERO_64 : Mips::ZERO;
95}
96
97unsigned MipsABIInfo::GetZeroReg() const {
98 return AreGprs64bit() ? Mips::ZERO_64 : Mips::ZERO;
99}
100
101unsigned MipsABIInfo::GetPtrAdduOp() const {
102 return ArePtrs64bit() ? Mips::DADDu : Mips::ADDu;
103}
104
105unsigned MipsABIInfo::GetPtrAddiuOp() const {
106 return ArePtrs64bit() ? Mips::DADDiu : Mips::ADDiu;
107}
108
109unsigned MipsABIInfo::GetPtrSubuOp() const {
110 return ArePtrs64bit() ? Mips::DSUBu : Mips::SUBu;
111}
112
113unsigned MipsABIInfo::GetPtrAndOp() const {
114 return ArePtrs64bit() ? Mips::AND64 : Mips::AND;
115}
116
117unsigned MipsABIInfo::GetGPRMoveOp() const {
118 return ArePtrs64bit() ? Mips::OR64 : Mips::OR;
119}
120
121unsigned MipsABIInfo::GetEhDataReg(unsigned I) const {
122 static const unsigned EhDataReg[] = {
123 Mips::A0, Mips::A1, Mips::A2, Mips::A3
124 };
125 static const unsigned EhDataReg64[] = {
126 Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64
127 };
128
129 return IsN64() ? EhDataReg64[I] : EhDataReg[I];
130}
131