1//===-- PPCBranchSelector.cpp - Emit long conditional branches ------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains a pass that scans a machine function to determine which
10// conditional branches need more than 16 bits of displacement to reach their
11// target basic block. It does this in two passes; a calculation of basic block
12// positions pass, and a branch pseudo op to machine branch opcode pass. This
13// pass should be run last, just before the assembly printer.
14//
15//===----------------------------------------------------------------------===//
16
17#include "MCTargetDesc/PPCPredicates.h"
18#include "PPC.h"
19#include "PPCInstrInfo.h"
20#include "PPCSubtarget.h"
21#include "llvm/ADT/Statistic.h"
22#include "llvm/CodeGen/MachineFunctionPass.h"
23#include "llvm/CodeGen/MachineRegisterInfo.h"
24#include "llvm/CodeGen/TargetSubtargetInfo.h"
25#include "llvm/Support/MathExtras.h"
26#include "llvm/Target/TargetMachine.h"
27#include <algorithm>
28using namespace llvm;
29
30#define DEBUG_TYPE "ppc-branch-select"
31
32STATISTIC(NumExpanded, "Number of branches expanded to long format");
33STATISTIC(NumPrefixed, "Number of prefixed instructions");
34STATISTIC(NumPrefixedAligned,
35 "Number of prefixed instructions that have been aligned");
36
37namespace {
38 struct PPCBSel : public MachineFunctionPass {
39 static char ID;
40 PPCBSel() : MachineFunctionPass(ID) {}
41
42 // The sizes of the basic blocks in the function (the first
43 // element of the pair); the second element of the pair is the amount of the
44 // size that is due to potential padding.
45 std::vector<std::pair<unsigned, unsigned>> BlockSizes;
46
47 // The first block number which has imprecise instruction address.
48 int FirstImpreciseBlock = -1;
49
50 unsigned GetAlignmentAdjustment(MachineBasicBlock &MBB, unsigned Offset);
51 unsigned ComputeBlockSizes(MachineFunction &Fn);
52 void modifyAdjustment(MachineFunction &Fn);
53 int computeBranchSize(MachineFunction &Fn,
54 const MachineBasicBlock *Src,
55 const MachineBasicBlock *Dest,
56 unsigned BrOffset);
57
58 bool runOnMachineFunction(MachineFunction &Fn) override;
59
60 MachineFunctionProperties getRequiredProperties() const override {
61 return MachineFunctionProperties().setNoVRegs();
62 }
63
64 StringRef getPassName() const override { return "PowerPC Branch Selector"; }
65 };
66 char PPCBSel::ID = 0;
67}
68
69INITIALIZE_PASS(PPCBSel, "ppc-branch-select", "PowerPC Branch Selector",
70 false, false)
71
72/// createPPCBranchSelectionPass - returns an instance of the Branch Selection
73/// Pass
74///
75FunctionPass *llvm::createPPCBranchSelectionPass() {
76 return new PPCBSel();
77}
78
79/// In order to make MBB aligned, we need to add an adjustment value to the
80/// original Offset.
81unsigned PPCBSel::GetAlignmentAdjustment(MachineBasicBlock &MBB,
82 unsigned Offset) {
83 const Align Alignment = MBB.getAlignment();
84 if (Alignment == Align(1))
85 return 0;
86
87 const Align ParentAlign = MBB.getParent()->getAlignment();
88
89 if (Alignment <= ParentAlign)
90 return offsetToAlignment(Value: Offset, Alignment);
91
92 // The alignment of this MBB is larger than the function's alignment, so we
93 // can't tell whether or not it will insert nops. Assume that it will.
94 if (FirstImpreciseBlock < 0)
95 FirstImpreciseBlock = MBB.getNumber();
96 return Alignment.value() + offsetToAlignment(Value: Offset, Alignment);
97}
98
99/// We need to be careful about the offset of the first block in the function
100/// because it might not have the function's alignment. This happens because,
101/// under the ELFv2 ABI, for functions which require a TOC pointer, we add a
102/// two-instruction sequence to the start of the function.
103/// Note: This needs to be synchronized with the check in
104/// PPCLinuxAsmPrinter::EmitFunctionBodyStart.
105static inline unsigned GetInitialOffset(MachineFunction &Fn) {
106 unsigned InitialOffset = 0;
107 if (Fn.getSubtarget<PPCSubtarget>().isELFv2ABI() &&
108 !Fn.getRegInfo().use_empty(RegNo: PPC::X2))
109 InitialOffset = 8;
110 return InitialOffset;
111}
112
113/// Measure each MBB and compute a size for the entire function.
114unsigned PPCBSel::ComputeBlockSizes(MachineFunction &Fn) {
115 const PPCInstrInfo *TII =
116 static_cast<const PPCInstrInfo *>(Fn.getSubtarget().getInstrInfo());
117 unsigned FuncSize = GetInitialOffset(Fn);
118
119 for (MachineBasicBlock &MBB : Fn) {
120 // The end of the previous block may have extra nops if this block has an
121 // alignment requirement.
122 if (MBB.getNumber() > 0) {
123 unsigned AlignExtra = GetAlignmentAdjustment(MBB, Offset: FuncSize);
124
125 auto &BS = BlockSizes[MBB.getNumber()-1];
126 BS.first += AlignExtra;
127 BS.second = AlignExtra;
128
129 FuncSize += AlignExtra;
130 }
131
132 unsigned BlockSize = 0;
133 unsigned UnalignedBytesRemaining = 0;
134 for (MachineInstr &MI : MBB) {
135 unsigned MINumBytes = TII->getInstSizeInBytes(MI);
136 if (MI.isInlineAsm() && (FirstImpreciseBlock < 0))
137 FirstImpreciseBlock = MBB.getNumber();
138 if (TII->isPrefixed(Opcode: MI.getOpcode())) {
139 NumPrefixed++;
140
141 // All 8 byte instructions may require alignment. Each 8 byte
142 // instruction may be aligned by another 4 bytes.
143 // This means that an 8 byte instruction may require 12 bytes
144 // (8 for the instruction itself and 4 for the alignment nop).
145 // This will happen if an 8 byte instruction can be aligned to 64 bytes
146 // by only adding a 4 byte nop.
147 // We don't know the alignment at this point in the code so we have to
148 // adopt a more pessimistic approach. If an instruction may need
149 // alignment we assume that it does need alignment and add 4 bytes to
150 // it. As a result we may end up with more long branches than before
151 // but we are in the safe position where if we need a long branch we
152 // have one.
153 // The if statement checks to make sure that two 8 byte instructions
154 // are at least 64 bytes away from each other. It is not possible for
155 // two instructions that both need alignment to be within 64 bytes of
156 // each other.
157 if (!UnalignedBytesRemaining) {
158 BlockSize += 4;
159 UnalignedBytesRemaining = 60;
160 NumPrefixedAligned++;
161 }
162 }
163 UnalignedBytesRemaining -= std::min(a: UnalignedBytesRemaining, b: MINumBytes);
164 BlockSize += MINumBytes;
165 }
166
167 BlockSizes[MBB.getNumber()].first = BlockSize;
168 FuncSize += BlockSize;
169 }
170
171 return FuncSize;
172}
173
174/// Modify the basic block align adjustment.
175void PPCBSel::modifyAdjustment(MachineFunction &Fn) {
176 unsigned Offset = GetInitialOffset(Fn);
177 for (MachineBasicBlock &MBB : Fn) {
178 if (MBB.getNumber() > 0) {
179 auto &BS = BlockSizes[MBB.getNumber()-1];
180 BS.first -= BS.second;
181 Offset -= BS.second;
182
183 unsigned AlignExtra = GetAlignmentAdjustment(MBB, Offset);
184
185 BS.first += AlignExtra;
186 BS.second = AlignExtra;
187
188 Offset += AlignExtra;
189 }
190
191 Offset += BlockSizes[MBB.getNumber()].first;
192 }
193}
194
195/// Determine the offset from the branch in Src block to the Dest block.
196/// BrOffset is the offset of the branch instruction inside Src block.
197int PPCBSel::computeBranchSize(MachineFunction &Fn,
198 const MachineBasicBlock *Src,
199 const MachineBasicBlock *Dest,
200 unsigned BrOffset) {
201 int BranchSize;
202 Align MaxAlign = Align(4);
203 bool NeedExtraAdjustment = false;
204 if (Dest->getNumber() <= Src->getNumber()) {
205 // If this is a backwards branch, the delta is the offset from the
206 // start of this block to this branch, plus the sizes of all blocks
207 // from this block to the dest.
208 BranchSize = BrOffset;
209 MaxAlign = std::max(a: MaxAlign, b: Src->getAlignment());
210
211 int DestBlock = Dest->getNumber();
212 BranchSize += BlockSizes[DestBlock].first;
213 for (unsigned i = DestBlock+1, e = Src->getNumber(); i < e; ++i) {
214 BranchSize += BlockSizes[i].first;
215 MaxAlign = std::max(a: MaxAlign, b: Fn.getBlockNumbered(N: i)->getAlignment());
216 }
217
218 NeedExtraAdjustment = (FirstImpreciseBlock >= 0) &&
219 (DestBlock >= FirstImpreciseBlock);
220 } else {
221 // Otherwise, add the size of the blocks between this block and the
222 // dest to the number of bytes left in this block.
223 unsigned StartBlock = Src->getNumber();
224 BranchSize = BlockSizes[StartBlock].first - BrOffset;
225
226 MaxAlign = std::max(a: MaxAlign, b: Dest->getAlignment());
227 for (unsigned i = StartBlock+1, e = Dest->getNumber(); i != e; ++i) {
228 BranchSize += BlockSizes[i].first;
229 MaxAlign = std::max(a: MaxAlign, b: Fn.getBlockNumbered(N: i)->getAlignment());
230 }
231
232 NeedExtraAdjustment = (FirstImpreciseBlock >= 0) &&
233 (Src->getNumber() >= FirstImpreciseBlock);
234 }
235
236 // We tend to over estimate code size due to large alignment and
237 // inline assembly. Usually it causes larger computed branch offset.
238 // But sometimes it may also causes smaller computed branch offset
239 // than actual branch offset. If the offset is close to the limit of
240 // encoding, it may cause problem at run time.
241 // Following is a simplified example.
242 //
243 // actual estimated
244 // address address
245 // ...
246 // bne Far 100 10c
247 // .p2align 4
248 // Near: 110 110
249 // ...
250 // Far: 8108 8108
251 //
252 // Actual offset: 0x8108 - 0x100 = 0x8008
253 // Computed offset: 0x8108 - 0x10c = 0x7ffc
254 //
255 // This example also shows when we can get the largest gap between
256 // estimated offset and actual offset. If there is an aligned block
257 // ABB between branch and target, assume its alignment is <align>
258 // bits. Now consider the accumulated function size FSIZE till the end
259 // of previous block PBB. If the estimated FSIZE is multiple of
260 // 2^<align>, we don't need any padding for the estimated address of
261 // ABB. If actual FSIZE at the end of PBB is 4 bytes more than
262 // multiple of 2^<align>, then we need (2^<align> - 4) bytes of
263 // padding. It also means the actual branch offset is (2^<align> - 4)
264 // larger than computed offset. Other actual FSIZE needs less padding
265 // bytes, so causes smaller gap between actual and computed offset.
266 //
267 // On the other hand, if the inline asm or large alignment occurs
268 // between the branch block and destination block, the estimated address
269 // can be <delta> larger than actual address. If padding bytes are
270 // needed for a later aligned block, the actual number of padding bytes
271 // is at most <delta> more than estimated padding bytes. So the actual
272 // aligned block address is less than or equal to the estimated aligned
273 // block address. So the actual branch offset is less than or equal to
274 // computed branch offset.
275 //
276 // The computed offset is at most ((1 << alignment) - 4) bytes smaller
277 // than actual offset. So we add this number to the offset for safety.
278 if (NeedExtraAdjustment)
279 BranchSize += MaxAlign.value() - 4;
280
281 return BranchSize;
282}
283
284bool PPCBSel::runOnMachineFunction(MachineFunction &Fn) {
285 const PPCInstrInfo *TII =
286 static_cast<const PPCInstrInfo *>(Fn.getSubtarget().getInstrInfo());
287 // Give the blocks of the function a dense, in-order, numbering.
288 Fn.RenumberBlocks();
289 BlockSizes.resize(new_size: Fn.getNumBlockIDs());
290 FirstImpreciseBlock = -1;
291
292 // Measure each MBB and compute a size for the entire function.
293 unsigned FuncSize = ComputeBlockSizes(Fn);
294
295 // If the entire function is smaller than the displacement of a branch field,
296 // we know we don't need to shrink any branches in this function. This is a
297 // common case.
298 if (FuncSize < (1 << 15)) {
299 BlockSizes.clear();
300 return false;
301 }
302
303 // For each conditional branch, if the offset to its destination is larger
304 // than the offset field allows, transform it into a long branch sequence
305 // like this:
306 // short branch:
307 // bCC MBB
308 // long branch:
309 // b!CC $PC+8
310 // b MBB
311 //
312 bool MadeChange = true;
313 bool EverMadeChange = false;
314 while (MadeChange) {
315 // Iteratively expand branches until we reach a fixed point.
316 MadeChange = false;
317
318 for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
319 ++MFI) {
320 MachineBasicBlock &MBB = *MFI;
321 unsigned MBBStartOffset = 0;
322 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
323 I != E; ++I) {
324 MachineBasicBlock *Dest = nullptr;
325 if (I->getOpcode() == PPC::BCC && !I->getOperand(i: 2).isImm())
326 Dest = I->getOperand(i: 2).getMBB();
327 else if ((I->getOpcode() == PPC::BC || I->getOpcode() == PPC::BCn) &&
328 !I->getOperand(i: 1).isImm())
329 Dest = I->getOperand(i: 1).getMBB();
330 else if ((I->getOpcode() == PPC::BDNZ8 || I->getOpcode() == PPC::BDNZ ||
331 I->getOpcode() == PPC::BDZ8 || I->getOpcode() == PPC::BDZ) &&
332 !I->getOperand(i: 0).isImm())
333 Dest = I->getOperand(i: 0).getMBB();
334
335 if (!Dest) {
336 MBBStartOffset += TII->getInstSizeInBytes(MI: *I);
337 continue;
338 }
339
340 // Determine the offset from the current branch to the destination
341 // block.
342 int BranchSize = computeBranchSize(Fn, Src: &MBB, Dest, BrOffset: MBBStartOffset);
343
344 // If this branch is in range, ignore it.
345 if (isInt<16>(x: BranchSize)) {
346 MBBStartOffset += 4;
347 continue;
348 }
349
350 // Otherwise, we have to expand it to a long branch.
351 MachineInstr &OldBranch = *I;
352 DebugLoc dl = OldBranch.getDebugLoc();
353
354 if (I->getOpcode() == PPC::BCC) {
355 // The BCC operands are:
356 // 0. PPC branch predicate
357 // 1. CR register
358 // 2. Target MBB
359 PPC::Predicate Pred = (PPC::Predicate)I->getOperand(i: 0).getImm();
360 Register CRReg = I->getOperand(i: 1).getReg();
361
362 // Jump over the uncond branch inst (i.e. $PC+8) on opposite condition.
363 BuildMI(BB&: MBB, I, MIMD: dl, MCID: TII->get(Opcode: PPC::BCC))
364 .addImm(Val: PPC::InvertPredicate(Opcode: Pred)).addReg(RegNo: CRReg).addImm(Val: 2);
365 } else if (I->getOpcode() == PPC::BC) {
366 Register CRBit = I->getOperand(i: 0).getReg();
367 BuildMI(BB&: MBB, I, MIMD: dl, MCID: TII->get(Opcode: PPC::BCn)).addReg(RegNo: CRBit).addImm(Val: 2);
368 } else if (I->getOpcode() == PPC::BCn) {
369 Register CRBit = I->getOperand(i: 0).getReg();
370 BuildMI(BB&: MBB, I, MIMD: dl, MCID: TII->get(Opcode: PPC::BC)).addReg(RegNo: CRBit).addImm(Val: 2);
371 } else if (I->getOpcode() == PPC::BDNZ) {
372 BuildMI(BB&: MBB, I, MIMD: dl, MCID: TII->get(Opcode: PPC::BDZ)).addImm(Val: 2);
373 } else if (I->getOpcode() == PPC::BDNZ8) {
374 BuildMI(BB&: MBB, I, MIMD: dl, MCID: TII->get(Opcode: PPC::BDZ8)).addImm(Val: 2);
375 } else if (I->getOpcode() == PPC::BDZ) {
376 BuildMI(BB&: MBB, I, MIMD: dl, MCID: TII->get(Opcode: PPC::BDNZ)).addImm(Val: 2);
377 } else if (I->getOpcode() == PPC::BDZ8) {
378 BuildMI(BB&: MBB, I, MIMD: dl, MCID: TII->get(Opcode: PPC::BDNZ8)).addImm(Val: 2);
379 } else {
380 llvm_unreachable("Unhandled branch type!");
381 }
382
383 // Uncond branch to the real destination.
384 I = BuildMI(BB&: MBB, I, MIMD: dl, MCID: TII->get(Opcode: PPC::B)).addMBB(MBB: Dest);
385
386 // Remove the old branch from the function.
387 OldBranch.eraseFromParent();
388
389 // Remember that this instruction is 8-bytes, increase the size of the
390 // block by 4, remember to iterate.
391 BlockSizes[MBB.getNumber()].first += 4;
392 MBBStartOffset += 8;
393 ++NumExpanded;
394 MadeChange = true;
395 }
396 }
397
398 if (MadeChange) {
399 // If we're going to iterate again, make sure we've updated our
400 // padding-based contributions to the block sizes.
401 modifyAdjustment(Fn);
402 }
403
404 EverMadeChange |= MadeChange;
405 }
406
407 BlockSizes.clear();
408 return EverMadeChange;
409}
410