| 1 | //===-- SPIRVMCTargetDesc.h - SPIR-V Target Descriptions --------*- C++ -*-===// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // This file provides SPIR-V specific target descriptions. |
| 10 | // |
| 11 | //===----------------------------------------------------------------------===// |
| 12 | |
| 13 | #ifndef LLVM_LIB_TARGET_SPIRV_MCTARGETDESC_SPIRVMCTARGETDESC_H |
| 14 | #define LLVM_LIB_TARGET_SPIRV_MCTARGETDESC_SPIRVMCTARGETDESC_H |
| 15 | |
| 16 | #include "llvm/Support/DataTypes.h" |
| 17 | #include <cassert> |
| 18 | #include <memory> |
| 19 | |
| 20 | namespace llvm { |
| 21 | class MCAsmBackend; |
| 22 | class MCCodeEmitter; |
| 23 | class MCContext; |
| 24 | class MCInstrInfo; |
| 25 | class MCObjectTargetWriter; |
| 26 | class MCRegisterInfo; |
| 27 | class MCSubtargetInfo; |
| 28 | class MCTargetOptions; |
| 29 | class Target; |
| 30 | |
| 31 | MCCodeEmitter *createSPIRVMCCodeEmitter(const MCInstrInfo &MCII, |
| 32 | MCContext &Ctx); |
| 33 | |
| 34 | MCAsmBackend *createSPIRVAsmBackend(const Target &T, const MCSubtargetInfo &STI, |
| 35 | const MCRegisterInfo &MRI, |
| 36 | const MCTargetOptions &Options); |
| 37 | } // namespace llvm |
| 38 | |
| 39 | // Defines symbolic names for SPIR-V registers. This defines a mapping from |
| 40 | // register name to register number. |
| 41 | #define GET_REGINFO_ENUM |
| 42 | #include "SPIRVGenRegisterInfo.inc" |
| 43 | |
| 44 | // Defines symbolic names for the SPIR-V instructions. |
| 45 | #define GET_INSTRINFO_ENUM |
| 46 | #define GET_INSTRINFO_MC_HELPER_DECLS |
| 47 | #include "SPIRVGenInstrInfo.inc" |
| 48 | |
| 49 | #define GET_SUBTARGETINFO_ENUM |
| 50 | #include "SPIRVGenSubtargetInfo.inc" |
| 51 | |
| 52 | namespace llvm::SPIRV { |
| 53 | inline unsigned getIDFromRegister(unsigned Reg) { |
| 54 | assert(Reg & (1U << 31)); |
| 55 | return Reg & ~(1U << 31); |
| 56 | } |
| 57 | } // namespace llvm::SPIRV |
| 58 | |
| 59 | #endif // LLVM_LIB_TARGET_SPIRV_MCTARGETDESC_SPIRVMCTARGETDESC_H |
| 60 | |