| 1 | //===-- SparcMCTargetDesc.cpp - Sparc Target Descriptions -----------------===// |
| 2 | // |
| 3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
| 4 | // See https://llvm.org/LICENSE.txt for license information. |
| 5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
| 6 | // |
| 7 | //===----------------------------------------------------------------------===// |
| 8 | // |
| 9 | // This file provides Sparc specific target descriptions. |
| 10 | // |
| 11 | //===----------------------------------------------------------------------===// |
| 12 | |
| 13 | #include "SparcMCTargetDesc.h" |
| 14 | #include "SparcInstPrinter.h" |
| 15 | #include "SparcMCAsmInfo.h" |
| 16 | #include "SparcTargetStreamer.h" |
| 17 | #include "TargetInfo/SparcTargetInfo.h" |
| 18 | #include "llvm/MC/MCInstrInfo.h" |
| 19 | #include "llvm/MC/MCRegisterInfo.h" |
| 20 | #include "llvm/MC/MCSubtargetInfo.h" |
| 21 | #include "llvm/MC/TargetRegistry.h" |
| 22 | #include "llvm/Support/Compiler.h" |
| 23 | #include "llvm/Support/ErrorHandling.h" |
| 24 | |
| 25 | namespace llvm { |
| 26 | namespace SparcASITag { |
| 27 | #define GET_ASITagsList_IMPL |
| 28 | #include "SparcGenSearchableTables.inc" |
| 29 | } // end namespace SparcASITag |
| 30 | |
| 31 | namespace SparcPrefetchTag { |
| 32 | #define GET_PrefetchTagsList_IMPL |
| 33 | #include "SparcGenSearchableTables.inc" |
| 34 | } // end namespace SparcPrefetchTag |
| 35 | } // end namespace llvm |
| 36 | |
| 37 | using namespace llvm; |
| 38 | |
| 39 | #define GET_INSTRINFO_MC_DESC |
| 40 | #define ENABLE_INSTR_PREDICATE_VERIFIER |
| 41 | #include "SparcGenInstrInfo.inc" |
| 42 | |
| 43 | #define GET_SUBTARGETINFO_MC_DESC |
| 44 | #include "SparcGenSubtargetInfo.inc" |
| 45 | |
| 46 | #define GET_REGINFO_MC_DESC |
| 47 | #include "SparcGenRegisterInfo.inc" |
| 48 | |
| 49 | static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI, |
| 50 | const Triple &TT, |
| 51 | const MCTargetOptions &Options) { |
| 52 | MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT); |
| 53 | unsigned Reg = MRI.getDwarfRegNum(RegNum: SP::O6, isEH: true); |
| 54 | MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(L: nullptr, Register: Reg, Offset: 0); |
| 55 | MAI->addInitialFrameState(Inst); |
| 56 | return MAI; |
| 57 | } |
| 58 | |
| 59 | static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI, |
| 60 | const Triple &TT, |
| 61 | const MCTargetOptions &Options) { |
| 62 | MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT); |
| 63 | unsigned Reg = MRI.getDwarfRegNum(RegNum: SP::O6, isEH: true); |
| 64 | MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(L: nullptr, Register: Reg, Offset: 2047); |
| 65 | MAI->addInitialFrameState(Inst); |
| 66 | return MAI; |
| 67 | } |
| 68 | |
| 69 | static MCInstrInfo *createSparcMCInstrInfo() { |
| 70 | MCInstrInfo *X = new MCInstrInfo(); |
| 71 | InitSparcMCInstrInfo(II: X); |
| 72 | return X; |
| 73 | } |
| 74 | |
| 75 | static MCRegisterInfo *createSparcMCRegisterInfo(const Triple &TT) { |
| 76 | MCRegisterInfo *X = new MCRegisterInfo(); |
| 77 | InitSparcMCRegisterInfo(RI: X, RA: SP::O7); |
| 78 | return X; |
| 79 | } |
| 80 | |
| 81 | static MCSubtargetInfo * |
| 82 | createSparcMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) { |
| 83 | if (CPU.empty()) |
| 84 | CPU = (TT.getArch() == Triple::sparcv9) ? "v9" : "v8" ; |
| 85 | return createSparcMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS); |
| 86 | } |
| 87 | |
| 88 | static MCTargetStreamer * |
| 89 | createObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) { |
| 90 | return new SparcTargetELFStreamer(S, STI); |
| 91 | } |
| 92 | |
| 93 | static MCTargetStreamer *createTargetAsmStreamer(MCStreamer &S, |
| 94 | formatted_raw_ostream &OS, |
| 95 | MCInstPrinter *InstPrint) { |
| 96 | return new SparcTargetAsmStreamer(S, OS); |
| 97 | } |
| 98 | |
| 99 | static MCTargetStreamer *createNullTargetStreamer(MCStreamer &S) { |
| 100 | return new SparcTargetStreamer(S); |
| 101 | } |
| 102 | |
| 103 | static MCInstPrinter *createSparcMCInstPrinter(const Triple &T, |
| 104 | unsigned SyntaxVariant, |
| 105 | const MCAsmInfo &MAI, |
| 106 | const MCInstrInfo &MII, |
| 107 | const MCRegisterInfo &MRI) { |
| 108 | return new SparcInstPrinter(MAI, MII, MRI); |
| 109 | } |
| 110 | |
| 111 | extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void |
| 112 | LLVMInitializeSparcTargetMC() { |
| 113 | // Register the MC asm info. |
| 114 | RegisterMCAsmInfoFn X(getTheSparcTarget(), createSparcMCAsmInfo); |
| 115 | RegisterMCAsmInfoFn Y(getTheSparcV9Target(), createSparcV9MCAsmInfo); |
| 116 | RegisterMCAsmInfoFn Z(getTheSparcelTarget(), createSparcMCAsmInfo); |
| 117 | |
| 118 | for (Target *T : |
| 119 | {&getTheSparcTarget(), &getTheSparcV9Target(), &getTheSparcelTarget()}) { |
| 120 | // Register the MC instruction info. |
| 121 | TargetRegistry::RegisterMCInstrInfo(T&: *T, Fn: createSparcMCInstrInfo); |
| 122 | |
| 123 | // Register the MC register info. |
| 124 | TargetRegistry::RegisterMCRegInfo(T&: *T, Fn: createSparcMCRegisterInfo); |
| 125 | |
| 126 | // Register the MC subtarget info. |
| 127 | TargetRegistry::RegisterMCSubtargetInfo(T&: *T, Fn: createSparcMCSubtargetInfo); |
| 128 | |
| 129 | // Register the MC Code Emitter. |
| 130 | TargetRegistry::RegisterMCCodeEmitter(T&: *T, Fn: createSparcMCCodeEmitter); |
| 131 | |
| 132 | // Register the asm backend. |
| 133 | TargetRegistry::RegisterMCAsmBackend(T&: *T, Fn: createSparcAsmBackend); |
| 134 | |
| 135 | // Register the object target streamer. |
| 136 | TargetRegistry::RegisterObjectTargetStreamer(T&: *T, |
| 137 | Fn: createObjectTargetStreamer); |
| 138 | |
| 139 | // Register the asm streamer. |
| 140 | TargetRegistry::RegisterAsmTargetStreamer(T&: *T, Fn: createTargetAsmStreamer); |
| 141 | |
| 142 | // Register the null streamer. |
| 143 | TargetRegistry::RegisterNullTargetStreamer(T&: *T, Fn: createNullTargetStreamer); |
| 144 | |
| 145 | // Register the MCInstPrinter |
| 146 | TargetRegistry::RegisterMCInstPrinter(T&: *T, Fn: createSparcMCInstPrinter); |
| 147 | } |
| 148 | } |
| 149 | |