1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* DAG Instruction Selector for the Lanai target *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9// *** NOTE: This file is #included into the middle of the target
10// *** instruction selector class. These functions are really methods.
11
12// If GET_DAGISEL_DECL is #defined with any value, only function
13// declarations will be included when this file is included.
14// If GET_DAGISEL_BODY is #defined, its value should be the name of
15// the instruction selector class. Function bodies will be emitted
16// and each function's name will be qualified with the name of the
17// class.
18//
19// When neither of the GET_DAGISEL* macros is defined, the functions
20// are emitted inline.
21
22#if defined(GET_DAGISEL_DECL) && defined(GET_DAGISEL_BODY)
23#error GET_DAGISEL_DECL and GET_DAGISEL_BODY cannot be both defined, undef both for inline definitions
24#endif
25
26#ifdef GET_DAGISEL_BODY
27#define LOCAL_DAGISEL_STRINGIZE(X) LOCAL_DAGISEL_STRINGIZE_(X)
28#define LOCAL_DAGISEL_STRINGIZE_(X) #X
29static_assert(sizeof(LOCAL_DAGISEL_STRINGIZE(GET_DAGISEL_BODY)) > 1,
30 "GET_DAGISEL_BODY is empty: it should be defined with the class name");
31#undef LOCAL_DAGISEL_STRINGIZE_
32#undef LOCAL_DAGISEL_STRINGIZE
33#endif
34
35#if !defined(GET_DAGISEL_DECL) && !defined(GET_DAGISEL_BODY)
36#define DAGISEL_INLINE 1
37#else
38#define DAGISEL_INLINE 0
39#endif
40
41#if !DAGISEL_INLINE
42#define DAGISEL_CLASS_COLONCOLON GET_DAGISEL_BODY ::
43#else
44#define DAGISEL_CLASS_COLONCOLON
45#endif
46
47#ifdef GET_DAGISEL_DECL
48void SelectCode(SDNode *N);
49#endif
50#if defined(GET_DAGISEL_BODY) || DAGISEL_INLINE
51void DAGISEL_CLASS_COLONCOLON SelectCode(SDNode *N)
52{
53 // Some target values are emitted as 2 bytes, TARGET_VAL handles
54 // this. Coverage indexes are emitted as 4 bytes,
55 // COVERAGE_IDX_VAL handles this.
56 #define TARGET_VAL(X) X & 255, unsigned(X) >> 8
57 #define COVERAGE_IDX_VAL(X) X & 255, (unsigned(X) >> 8) & 255, (unsigned(X) >> 16) & 255, (unsigned(X) >> 24) & 255
58 static const uint8_t MatcherTable[] = {
59 OPC_SwitchOpcode , 71|128,1, TARGET_VAL(ISD::LOAD),
60 OPC_RecordMemRef,
61 OPC_RecordNode,
62 OPC_RecordChild1,
63 OPC_CheckChild1TypeI32,
64 OPC_CheckPredicate, 12,
65 OPC_CheckTypeI32,
66 OPC_Scope, 26,
67 OPC_CheckPredicate, 9,
68 OPC_Scope, 10,
69 OPC_CheckComplexPat2, /*#*/1,
70 OPC_EmitMergeInputChains1_0,
71 OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDW_RI), 0|OPFL_Chain|OPFL_MemRefs,
72 MVT::i32, 3, 17,
73 10,
74 OPC_CheckComplexPat1, /*#*/1,
75 OPC_EmitMergeInputChains1_0,
76 OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDW_RR), 0|OPFL_Chain|OPFL_MemRefs,
77 MVT::i32, 3, 17,
78 0,
79 40,
80 OPC_CheckPredicate4,
81 OPC_Scope, 12,
82 OPC_CheckPredicate, 13,
83 OPC_CheckComplexPat1, /*#*/1,
84 OPC_EmitMergeInputChains1_0,
85 OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDWz_RR), 0|OPFL_Chain|OPFL_MemRefs,
86 MVT::i32, 3, 17,
87 11,
88 OPC_CheckPredicate3,
89 OPC_CheckComplexPat1, /*#*/1,
90 OPC_EmitMergeInputChains1_0,
91 OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDHz_RR), 0|OPFL_Chain|OPFL_MemRefs,
92 MVT::i32, 3, 17,
93 11,
94 OPC_CheckPredicate2,
95 OPC_CheckComplexPat1, /*#*/1,
96 OPC_EmitMergeInputChains1_0,
97 OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDBz_RR), 0|OPFL_Chain|OPFL_MemRefs,
98 MVT::i32, 3, 17,
99 0,
100 27,
101 OPC_CheckPredicate5,
102 OPC_Scope, 11,
103 OPC_CheckPredicate3,
104 OPC_CheckComplexPat1, /*#*/1,
105 OPC_EmitMergeInputChains1_0,
106 OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDHs_RR), 0|OPFL_Chain|OPFL_MemRefs,
107 MVT::i32, 3, 17,
108 11,
109 OPC_CheckPredicate2,
110 OPC_CheckComplexPat1, /*#*/1,
111 OPC_EmitMergeInputChains1_0,
112 OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDBs_RR), 0|OPFL_Chain|OPFL_MemRefs,
113 MVT::i32, 3, 17,
114 0,
115 12,
116 OPC_CheckPredicate4,
117 OPC_CheckPredicate3,
118 OPC_CheckComplexPat0, /*#*/1,
119 OPC_EmitMergeInputChains1_0,
120 OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDHz_RI), 0|OPFL_Chain|OPFL_MemRefs,
121 MVT::i32, 3, 17,
122 12,
123 OPC_CheckPredicate5,
124 OPC_CheckPredicate3,
125 OPC_CheckComplexPat0, /*#*/1,
126 OPC_EmitMergeInputChains1_0,
127 OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDHs_RI), 0|OPFL_Chain|OPFL_MemRefs,
128 MVT::i32, 3, 17,
129 12,
130 OPC_CheckPredicate4,
131 OPC_CheckPredicate2,
132 OPC_CheckComplexPat0, /*#*/1,
133 OPC_EmitMergeInputChains1_0,
134 OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDBz_RI), 0|OPFL_Chain|OPFL_MemRefs,
135 MVT::i32, 3, 17,
136 12,
137 OPC_CheckPredicate5,
138 OPC_CheckPredicate2,
139 OPC_CheckComplexPat0, /*#*/1,
140 OPC_EmitMergeInputChains1_0,
141 OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDBs_RI), 0|OPFL_Chain|OPFL_MemRefs,
142 MVT::i32, 3, 17,
143 28,
144 OPC_CheckPredicate, 14,
145 OPC_Scope, 11,
146 OPC_CheckPredicate2,
147 OPC_CheckComplexPat0, /*#*/1,
148 OPC_EmitMergeInputChains1_0,
149 OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDBz_RI), 0|OPFL_Chain|OPFL_MemRefs,
150 MVT::i32, 3, 17,
151 11,
152 OPC_CheckPredicate3,
153 OPC_CheckComplexPat0, /*#*/1,
154 OPC_EmitMergeInputChains1_0,
155 OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDHz_RI), 0|OPFL_Chain|OPFL_MemRefs,
156 MVT::i32, 3, 17,
157 0,
158 12,
159 OPC_CheckPredicate, 9,
160 OPC_CheckComplexPat3, /*#*/1,
161 OPC_EmitMergeInputChains1_0,
162 OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDADDR), 0|OPFL_Chain|OPFL_MemRefs,
163 MVT::i32, 1, 5,
164 0,
165 96, TARGET_VAL(ISD::STORE),
166 OPC_RecordMemRef,
167 OPC_RecordNode,
168 OPC_RecordChild1,
169 OPC_CheckChild1TypeI32,
170 OPC_RecordChild2,
171 OPC_CheckChild2TypeI32,
172 OPC_CheckPredicate, 15,
173 OPC_Scope, 24,
174 OPC_CheckPredicate, 10,
175 OPC_Scope, 9,
176 OPC_CheckComplexPat1, /*#*/2,
177 OPC_EmitMergeInputChains1_0,
178 OPC_MorphNodeTo0, TARGET_VAL(Lanai::SW_RR), 0|OPFL_Chain|OPFL_MemRefs,
179 4, 25,
180 9,
181 OPC_CheckComplexPat2, /*#*/2,
182 OPC_EmitMergeInputChains1_0,
183 OPC_MorphNodeTo0, TARGET_VAL(Lanai::SW_RI), 0|OPFL_Chain|OPFL_MemRefs,
184 4, 25,
185 0,
186 48,
187 OPC_CheckPredicate, 16,
188 OPC_Scope, 10,
189 OPC_CheckPredicate3,
190 OPC_CheckComplexPat1, /*#*/2,
191 OPC_EmitMergeInputChains1_0,
192 OPC_MorphNodeTo0, TARGET_VAL(Lanai::STH_RR), 0|OPFL_Chain|OPFL_MemRefs,
193 4, 25,
194 10,
195 OPC_CheckPredicate2,
196 OPC_CheckComplexPat1, /*#*/2,
197 OPC_EmitMergeInputChains1_0,
198 OPC_MorphNodeTo0, TARGET_VAL(Lanai::STB_RR), 0|OPFL_Chain|OPFL_MemRefs,
199 4, 25,
200 10,
201 OPC_CheckPredicate3,
202 OPC_CheckComplexPat0, /*#*/2,
203 OPC_EmitMergeInputChains1_0,
204 OPC_MorphNodeTo0, TARGET_VAL(Lanai::STH_RI), 0|OPFL_Chain|OPFL_MemRefs,
205 4, 25,
206 10,
207 OPC_CheckPredicate2,
208 OPC_CheckComplexPat0, /*#*/2,
209 OPC_EmitMergeInputChains1_0,
210 OPC_MorphNodeTo0, TARGET_VAL(Lanai::STB_RI), 0|OPFL_Chain|OPFL_MemRefs,
211 4, 25,
212 0,
213 11,
214 OPC_CheckPredicate, 10,
215 OPC_CheckComplexPat3, /*#*/2,
216 OPC_EmitMergeInputChains1_0,
217 OPC_MorphNodeTo0, TARGET_VAL(Lanai::STADDR), 0|OPFL_Chain|OPFL_MemRefs,
218 2, 12,
219 0,
220 35, TARGET_VAL(ISD::ATOMIC_LOAD),
221 OPC_RecordMemRef,
222 OPC_RecordNode,
223 OPC_RecordChild1,
224 OPC_CheckChild1TypeI32,
225 OPC_CheckTypeI32,
226 OPC_Scope, 13,
227 OPC_CheckPredicate, 17,
228 OPC_CheckPredicate2,
229 OPC_CheckComplexPat0, /*#*/1,
230 OPC_EmitMergeInputChains1_0,
231 OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDBz_RI), 0|OPFL_Chain|OPFL_MemRefs,
232 MVT::i32, 3, 17,
233 13,
234 OPC_CheckPredicate, 18,
235 OPC_CheckPredicate2,
236 OPC_CheckComplexPat0, /*#*/1,
237 OPC_EmitMergeInputChains1_0,
238 OPC_MorphNodeTo1, TARGET_VAL(Lanai::LDBz_RI), 0|OPFL_Chain|OPFL_MemRefs,
239 MVT::i32, 3, 17,
240 0,
241 20, TARGET_VAL(ISD::CALLSEQ_START),
242 OPC_RecordNode,
243 OPC_RecordChild1,
244 OPC_MoveChild1,
245 OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
246 OPC_MoveSibling2,
247 OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
248 OPC_RecordNode,
249 OPC_MoveParent,
250 OPC_EmitMergeInputChains1_0,
251 OPC_MorphNodeTo1, TARGET_VAL(Lanai::ADJCALLSTACKDOWN), 0|OPFL_Chain|OPFL_GlueOutput,
252 MVT::i32, 2, 7,
253 21, TARGET_VAL(ISD::CALLSEQ_END),
254 OPC_RecordNode,
255 OPC_CaptureGlueInput,
256 OPC_RecordChild1,
257 OPC_MoveChild1,
258 OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
259 OPC_MoveSibling2,
260 OPC_CheckOpcode, TARGET_VAL(ISD::TargetConstant),
261 OPC_RecordNode,
262 OPC_MoveParent,
263 OPC_EmitMergeInputChains1_0,
264 OPC_MorphNodeTo1, TARGET_VAL(Lanai::ADJCALLSTACKUP), 0|OPFL_Chain|OPFL_GlueInput|OPFL_GlueOutput,
265 MVT::i32, 2, 7,
266 56|128,2, TARGET_VAL(ISD::OR),
267 OPC_Scope, 20|128,1,
268 OPC_RecordChild0,
269 OPC_MoveChild1,
270 OPC_SwitchOpcode , 64, TARGET_VAL(LanaiISD::LO),
271 OPC_RecordChild0,
272 OPC_MoveChild0,
273 OPC_SwitchOpcode , 9, TARGET_VAL(ISD::TargetGlobalAddress),
274 OPC_MoveParent,
275 OPC_MoveParent,
276 OPC_CheckTypeI32,
277 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO),
278 MVT::i32, 2, 2,
279 9, TARGET_VAL(ISD::TargetExternalSymbol),
280 OPC_MoveParent,
281 OPC_MoveParent,
282 OPC_CheckTypeI32,
283 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO),
284 MVT::i32, 2, 2,
285 9, TARGET_VAL(ISD::TargetBlockAddress),
286 OPC_MoveParent,
287 OPC_MoveParent,
288 OPC_CheckTypeI32,
289 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO),
290 MVT::i32, 2, 2,
291 9, TARGET_VAL(ISD::TargetJumpTable),
292 OPC_MoveParent,
293 OPC_MoveParent,
294 OPC_CheckTypeI32,
295 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO),
296 MVT::i32, 2, 2,
297 9, TARGET_VAL(ISD::TargetConstantPool),
298 OPC_MoveParent,
299 OPC_MoveParent,
300 OPC_CheckTypeI32,
301 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO),
302 MVT::i32, 2, 2,
303 0,
304 74, TARGET_VAL(LanaiISD::SMALL),
305 OPC_RecordChild0,
306 OPC_MoveChild0,
307 OPC_SwitchOpcode , 11, TARGET_VAL(ISD::TargetGlobalAddress),
308 OPC_MoveParent,
309 OPC_MoveParent,
310 OPC_CheckTypeI32,
311 OPC_EmitCopyToReg0, Lanai::R0,
312 OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SLI),
313 MVT::i32, 1, 3,
314 11, TARGET_VAL(ISD::TargetExternalSymbol),
315 OPC_MoveParent,
316 OPC_MoveParent,
317 OPC_CheckTypeI32,
318 OPC_EmitCopyToReg0, Lanai::R0,
319 OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SLI),
320 MVT::i32, 1, 3,
321 11, TARGET_VAL(ISD::TargetBlockAddress),
322 OPC_MoveParent,
323 OPC_MoveParent,
324 OPC_CheckTypeI32,
325 OPC_EmitCopyToReg0, Lanai::R0,
326 OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SLI),
327 MVT::i32, 1, 3,
328 11, TARGET_VAL(ISD::TargetJumpTable),
329 OPC_MoveParent,
330 OPC_MoveParent,
331 OPC_CheckTypeI32,
332 OPC_EmitCopyToReg0, Lanai::R0,
333 OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SLI),
334 MVT::i32, 1, 3,
335 11, TARGET_VAL(ISD::TargetConstantPool),
336 OPC_MoveParent,
337 OPC_MoveParent,
338 OPC_CheckTypeI32,
339 OPC_EmitCopyToReg0, Lanai::R0,
340 OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SLI),
341 MVT::i32, 1, 3,
342 0,
343 0,
344 73,
345 OPC_MoveChild0,
346 OPC_CheckOpcode, TARGET_VAL(LanaiISD::LO),
347 OPC_RecordChild0,
348 OPC_MoveChild0,
349 OPC_SwitchOpcode , 10, TARGET_VAL(ISD::TargetGlobalAddress),
350 OPC_MoveParent,
351 OPC_MoveParent,
352 OPC_RecordChild1,
353 OPC_CheckTypeI32,
354 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO),
355 MVT::i32, 2, 0,
356 10, TARGET_VAL(ISD::TargetExternalSymbol),
357 OPC_MoveParent,
358 OPC_MoveParent,
359 OPC_RecordChild1,
360 OPC_CheckTypeI32,
361 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO),
362 MVT::i32, 2, 0,
363 10, TARGET_VAL(ISD::TargetBlockAddress),
364 OPC_MoveParent,
365 OPC_MoveParent,
366 OPC_RecordChild1,
367 OPC_CheckTypeI32,
368 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO),
369 MVT::i32, 2, 0,
370 10, TARGET_VAL(ISD::TargetJumpTable),
371 OPC_MoveParent,
372 OPC_MoveParent,
373 OPC_RecordChild1,
374 OPC_CheckTypeI32,
375 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO),
376 MVT::i32, 2, 0,
377 10, TARGET_VAL(ISD::TargetConstantPool),
378 OPC_MoveParent,
379 OPC_MoveParent,
380 OPC_RecordChild1,
381 OPC_CheckTypeI32,
382 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO),
383 MVT::i32, 2, 0,
384 0,
385 85,
386 OPC_RecordChild0,
387 OPC_RecordChild1,
388 OPC_Scope, 60,
389 OPC_MoveChild1,
390 OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
391 OPC_Scope, 12,
392 OPC_CheckPredicate0,
393 OPC_MoveParent,
394 OPC_EmitConvertToTarget1,
395 OPC_EmitNodeXForm, 0, 2,
396 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO),
397 MVT::i32, 2, 9,
398 12,
399 OPC_CheckPredicate1,
400 OPC_MoveParent,
401 OPC_EmitConvertToTarget1,
402 OPC_EmitNodeXForm, 1, 2,
403 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_HI),
404 MVT::i32, 2, 9,
405 13,
406 OPC_CheckPredicate0,
407 OPC_MoveParent,
408 OPC_EmitConvertToTarget1,
409 OPC_EmitNodeXForm, 0, 2,
410 OPC_MorphNodeTo2None, TARGET_VAL(Lanai::OR_F_I_LO),
411 MVT::i32, MVT::i32, 2, 9,
412 13,
413 OPC_CheckPredicate1,
414 OPC_MoveParent,
415 OPC_EmitConvertToTarget1,
416 OPC_EmitNodeXForm, 1, 2,
417 OPC_MorphNodeTo2None, TARGET_VAL(Lanai::OR_F_I_HI),
418 MVT::i32, MVT::i32, 2, 9,
419 0,
420 19,
421 OPC_EmitIntegerI32, 0,
422 OPC_Scope, 6,
423 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_R),
424 MVT::i32, 3, 6,
425 7,
426 OPC_MorphNodeTo2None, TARGET_VAL(Lanai::OR_F_R),
427 MVT::i32, MVT::i32, 3, 6,
428 0,
429 0,
430 0,
431 85, TARGET_VAL(ISD::AND),
432 OPC_RecordChild0,
433 OPC_RecordChild1,
434 OPC_Scope, 60,
435 OPC_MoveChild1,
436 OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
437 OPC_Scope, 12,
438 OPC_CheckPredicate6,
439 OPC_MoveParent,
440 OPC_EmitConvertToTarget1,
441 OPC_EmitNodeXForm, 0, 2,
442 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::AND_I_LO),
443 MVT::i32, 2, 9,
444 12,
445 OPC_CheckPredicate7,
446 OPC_MoveParent,
447 OPC_EmitConvertToTarget1,
448 OPC_EmitNodeXForm, 1, 2,
449 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::AND_I_HI),
450 MVT::i32, 2, 9,
451 13,
452 OPC_CheckPredicate6,
453 OPC_MoveParent,
454 OPC_EmitConvertToTarget1,
455 OPC_EmitNodeXForm, 0, 2,
456 OPC_MorphNodeTo2None, TARGET_VAL(Lanai::AND_F_I_LO),
457 MVT::i32, MVT::i32, 2, 9,
458 13,
459 OPC_CheckPredicate7,
460 OPC_MoveParent,
461 OPC_EmitConvertToTarget1,
462 OPC_EmitNodeXForm, 1, 2,
463 OPC_MorphNodeTo2None, TARGET_VAL(Lanai::AND_F_I_HI),
464 MVT::i32, MVT::i32, 2, 9,
465 0,
466 19,
467 OPC_EmitIntegerI32, 0,
468 OPC_Scope, 6,
469 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::AND_R),
470 MVT::i32, 3, 6,
471 7,
472 OPC_MorphNodeTo2None, TARGET_VAL(Lanai::AND_F_R),
473 MVT::i32, MVT::i32, 3, 6,
474 0,
475 0,
476 85, TARGET_VAL(ISD::XOR),
477 OPC_RecordChild0,
478 OPC_RecordChild1,
479 OPC_Scope, 60,
480 OPC_MoveChild1,
481 OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
482 OPC_Scope, 12,
483 OPC_CheckPredicate0,
484 OPC_MoveParent,
485 OPC_EmitConvertToTarget1,
486 OPC_EmitNodeXForm, 0, 2,
487 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::XOR_I_LO),
488 MVT::i32, 2, 9,
489 12,
490 OPC_CheckPredicate1,
491 OPC_MoveParent,
492 OPC_EmitConvertToTarget1,
493 OPC_EmitNodeXForm, 1, 2,
494 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::XOR_I_HI),
495 MVT::i32, 2, 9,
496 13,
497 OPC_CheckPredicate0,
498 OPC_MoveParent,
499 OPC_EmitConvertToTarget1,
500 OPC_EmitNodeXForm, 0, 2,
501 OPC_MorphNodeTo2None, TARGET_VAL(Lanai::XOR_F_I_LO),
502 MVT::i32, MVT::i32, 2, 9,
503 13,
504 OPC_CheckPredicate1,
505 OPC_MoveParent,
506 OPC_EmitConvertToTarget1,
507 OPC_EmitNodeXForm, 1, 2,
508 OPC_MorphNodeTo2None, TARGET_VAL(Lanai::XOR_F_I_HI),
509 MVT::i32, MVT::i32, 2, 9,
510 0,
511 19,
512 OPC_EmitIntegerI32, 0,
513 OPC_Scope, 6,
514 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::XOR_R),
515 MVT::i32, 3, 6,
516 7,
517 OPC_MorphNodeTo2None, TARGET_VAL(Lanai::XOR_F_R),
518 MVT::i32, MVT::i32, 3, 6,
519 0,
520 0,
521 59, TARGET_VAL(ISD::ADD),
522 OPC_RecordChild0,
523 OPC_RecordChild1,
524 OPC_Scope, 45,
525 OPC_MoveChild1,
526 OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
527 OPC_Scope, 12,
528 OPC_CheckPredicate0,
529 OPC_MoveParent,
530 OPC_EmitConvertToTarget1,
531 OPC_EmitNodeXForm, 0, 2,
532 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::ADD_I_LO),
533 MVT::i32, 2, 9,
534 12,
535 OPC_CheckPredicate1,
536 OPC_MoveParent,
537 OPC_EmitConvertToTarget1,
538 OPC_EmitNodeXForm, 1, 2,
539 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::ADD_I_HI),
540 MVT::i32, 2, 9,
541 12,
542 OPC_CheckPredicate, 11,
543 OPC_MoveParent,
544 OPC_EmitNodeXForm, 2, 1,
545 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SUB_I_LO),
546 MVT::i32, 2, 4,
547 0,
548 8,
549 OPC_EmitIntegerI32, 0,
550 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::ADD_R),
551 MVT::i32, 3, 6,
552 0,
553 59, TARGET_VAL(ISD::SUB),
554 OPC_RecordChild0,
555 OPC_RecordChild1,
556 OPC_Scope, 45,
557 OPC_MoveChild1,
558 OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
559 OPC_Scope, 12,
560 OPC_CheckPredicate0,
561 OPC_MoveParent,
562 OPC_EmitConvertToTarget1,
563 OPC_EmitNodeXForm, 0, 2,
564 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SUB_I_LO),
565 MVT::i32, 2, 9,
566 12,
567 OPC_CheckPredicate1,
568 OPC_MoveParent,
569 OPC_EmitConvertToTarget1,
570 OPC_EmitNodeXForm, 1, 2,
571 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SUB_I_HI),
572 MVT::i32, 2, 9,
573 12,
574 OPC_CheckPredicate, 11,
575 OPC_MoveParent,
576 OPC_EmitNodeXForm, 2, 1,
577 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::ADD_I_LO),
578 MVT::i32, 2, 4,
579 0,
580 8,
581 OPC_EmitIntegerI32, 0,
582 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SUB_R),
583 MVT::i32, 3, 6,
584 0,
585 49, TARGET_VAL(ISD::ADDC),
586 OPC_RecordChild0,
587 OPC_RecordChild1,
588 OPC_Scope, 34,
589 OPC_MoveChild1,
590 OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
591 OPC_Scope, 13,
592 OPC_CheckPredicate0,
593 OPC_MoveParent,
594 OPC_EmitConvertToTarget1,
595 OPC_EmitNodeXForm, 0, 2,
596 OPC_MorphNodeTo2GlueOutput, TARGET_VAL(Lanai::ADD_F_I_LO),
597 MVT::i32, MVT::i32, 2, 9,
598 13,
599 OPC_CheckPredicate1,
600 OPC_MoveParent,
601 OPC_EmitConvertToTarget1,
602 OPC_EmitNodeXForm, 1, 2,
603 OPC_MorphNodeTo2GlueOutput, TARGET_VAL(Lanai::ADD_F_I_HI),
604 MVT::i32, MVT::i32, 2, 9,
605 0,
606 9,
607 OPC_EmitIntegerI32, 0,
608 OPC_MorphNodeTo2GlueOutput, TARGET_VAL(Lanai::ADD_F_R),
609 MVT::i32, MVT::i32, 3, 6,
610 0,
611 49, TARGET_VAL(ISD::SUBC),
612 OPC_RecordChild0,
613 OPC_RecordChild1,
614 OPC_Scope, 34,
615 OPC_MoveChild1,
616 OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
617 OPC_Scope, 13,
618 OPC_CheckPredicate0,
619 OPC_MoveParent,
620 OPC_EmitConvertToTarget1,
621 OPC_EmitNodeXForm, 0, 2,
622 OPC_MorphNodeTo2GlueOutput, TARGET_VAL(Lanai::SUB_F_I_LO),
623 MVT::i32, MVT::i32, 2, 9,
624 13,
625 OPC_CheckPredicate1,
626 OPC_MoveParent,
627 OPC_EmitConvertToTarget1,
628 OPC_EmitNodeXForm, 1, 2,
629 OPC_MorphNodeTo2GlueOutput, TARGET_VAL(Lanai::SUB_F_I_HI),
630 MVT::i32, MVT::i32, 2, 9,
631 0,
632 9,
633 OPC_EmitIntegerI32, 0,
634 OPC_MorphNodeTo2GlueOutput, TARGET_VAL(Lanai::SUB_F_R),
635 MVT::i32, MVT::i32, 3, 6,
636 0,
637 62, TARGET_VAL(ISD::ADDE),
638 OPC_CaptureGlueInput,
639 OPC_RecordChild0,
640 OPC_RecordChild1,
641 OPC_Scope, 34,
642 OPC_MoveChild1,
643 OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
644 OPC_Scope, 13,
645 OPC_CheckPredicate0,
646 OPC_MoveParent,
647 OPC_EmitConvertToTarget1,
648 OPC_EmitNodeXForm, 0, 2,
649 OPC_MorphNodeTo1, TARGET_VAL(Lanai::ADDC_I_LO), 0|OPFL_GlueInput|OPFL_GlueOutput,
650 MVT::i32, 2, 9,
651 13,
652 OPC_CheckPredicate1,
653 OPC_MoveParent,
654 OPC_EmitConvertToTarget1,
655 OPC_EmitNodeXForm, 1, 2,
656 OPC_MorphNodeTo1, TARGET_VAL(Lanai::ADDC_I_HI), 0|OPFL_GlueInput|OPFL_GlueOutput,
657 MVT::i32, 2, 9,
658 0,
659 21,
660 OPC_EmitIntegerI32, 0,
661 OPC_Scope, 7,
662 OPC_MorphNodeTo1, TARGET_VAL(Lanai::ADDC_R), 0|OPFL_GlueInput|OPFL_GlueOutput,
663 MVT::i32, 3, 6,
664 8,
665 OPC_MorphNodeTo2, TARGET_VAL(Lanai::ADDC_F_R), 0|OPFL_GlueInput|OPFL_GlueOutput,
666 MVT::i32, MVT::i32, 3, 6,
667 0,
668 0,
669 62, TARGET_VAL(ISD::SUBE),
670 OPC_CaptureGlueInput,
671 OPC_RecordChild0,
672 OPC_RecordChild1,
673 OPC_Scope, 34,
674 OPC_MoveChild1,
675 OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
676 OPC_Scope, 13,
677 OPC_CheckPredicate0,
678 OPC_MoveParent,
679 OPC_EmitConvertToTarget1,
680 OPC_EmitNodeXForm, 0, 2,
681 OPC_MorphNodeTo1, TARGET_VAL(Lanai::SUBB_I_LO), 0|OPFL_GlueInput|OPFL_GlueOutput,
682 MVT::i32, 2, 9,
683 13,
684 OPC_CheckPredicate1,
685 OPC_MoveParent,
686 OPC_EmitConvertToTarget1,
687 OPC_EmitNodeXForm, 1, 2,
688 OPC_MorphNodeTo1, TARGET_VAL(Lanai::SUBB_I_HI), 0|OPFL_GlueInput|OPFL_GlueOutput,
689 MVT::i32, 2, 9,
690 0,
691 21,
692 OPC_EmitIntegerI32, 0,
693 OPC_Scope, 7,
694 OPC_MorphNodeTo1, TARGET_VAL(Lanai::SUBB_R), 0|OPFL_GlueInput|OPFL_GlueOutput,
695 MVT::i32, 3, 6,
696 8,
697 OPC_MorphNodeTo2, TARGET_VAL(Lanai::SUBB_F_R), 0|OPFL_GlueInput|OPFL_GlueOutput,
698 MVT::i32, MVT::i32, 3, 6,
699 0,
700 0,
701 55, TARGET_VAL(LanaiISD::SUBBF),
702 OPC_CaptureGlueInput,
703 OPC_RecordChild0,
704 OPC_Scope, 37,
705 OPC_RecordChild1,
706 OPC_MoveChild1,
707 OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
708 OPC_Scope, 14,
709 OPC_CheckPredicate0,
710 OPC_MoveParent,
711 OPC_EmitConvertToTarget1,
712 OPC_EmitNodeXForm, 0, 2,
713 OPC_MorphNodeTo2, TARGET_VAL(Lanai::SUBB_F_I_LO), 0|OPFL_GlueInput|OPFL_GlueOutput,
714 MVT::i32, MVT::i32, 2, 9,
715 14,
716 OPC_CheckPredicate1,
717 OPC_MoveParent,
718 OPC_EmitConvertToTarget1,
719 OPC_EmitNodeXForm, 1, 2,
720 OPC_MorphNodeTo2, TARGET_VAL(Lanai::SUBB_F_I_HI), 0|OPFL_GlueInput|OPFL_GlueOutput,
721 MVT::i32, MVT::i32, 2, 9,
722 0,
723 12,
724 OPC_CheckChild0TypeI32,
725 OPC_RecordChild1,
726 OPC_EmitIntegerI32, 0,
727 OPC_MorphNodeTo2, TARGET_VAL(Lanai::SUBB_F_R), 0|OPFL_GlueInput|OPFL_GlueOutput,
728 MVT::i32, MVT::i32, 3, 6,
729 0,
730 28, TARGET_VAL(ISD::SHL),
731 OPC_RecordChild0,
732 OPC_RecordChild1,
733 OPC_Scope, 14,
734 OPC_MoveChild1,
735 OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
736 OPC_CheckPredicate, 8,
737 OPC_MoveParent,
738 OPC_EmitConvertToTarget1,
739 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SL_I),
740 MVT::i32, 2, 4,
741 8,
742 OPC_EmitIntegerI32, 0,
743 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SHL_R),
744 MVT::i32, 3, 6,
745 0,
746 40, TARGET_VAL(ISD::SRL),
747 OPC_RecordChild0,
748 OPC_RecordChild1,
749 OPC_Scope, 16,
750 OPC_MoveChild1,
751 OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
752 OPC_CheckPredicate, 8,
753 OPC_MoveParent,
754 OPC_EmitNodeXForm, 2, 1,
755 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SL_I),
756 MVT::i32, 2, 4,
757 18,
758 OPC_EmitRegisterI32, Lanai::R0,
759 OPC_EmitIntegerI32, 0,
760 OPC_EmitNode1None, TARGET_VAL(Lanai::SUB_R),
761 MVT::i32, 3, 14,
762 OPC_EmitIntegerI32, 0,
763 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SRL_R),
764 MVT::i32, 3, 22,
765 0,
766 40, TARGET_VAL(ISD::SRA),
767 OPC_RecordChild0,
768 OPC_RecordChild1,
769 OPC_Scope, 16,
770 OPC_MoveChild1,
771 OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
772 OPC_CheckPredicate, 8,
773 OPC_MoveParent,
774 OPC_EmitNodeXForm, 2, 1,
775 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SA_I),
776 MVT::i32, 2, 4,
777 18,
778 OPC_EmitRegisterI32, Lanai::R0,
779 OPC_EmitIntegerI32, 0,
780 OPC_EmitNode1None, TARGET_VAL(Lanai::SUB_R),
781 MVT::i32, 3, 14,
782 OPC_EmitIntegerI32, 0,
783 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SRA_R),
784 MVT::i32, 3, 22,
785 0,
786 46, TARGET_VAL(LanaiISD::SET_FLAG),
787 OPC_RecordChild0,
788 OPC_Scope, 33,
789 OPC_RecordChild1,
790 OPC_MoveChild1,
791 OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
792 OPC_Scope, 12,
793 OPC_CheckPredicate0,
794 OPC_MoveParent,
795 OPC_EmitConvertToTarget1,
796 OPC_EmitNodeXForm, 0, 2,
797 OPC_MorphNodeTo1GlueOutput, TARGET_VAL(Lanai::SFSUB_F_RI_LO),
798 MVT::i32, 2, 9,
799 12,
800 OPC_CheckPredicate1,
801 OPC_MoveParent,
802 OPC_EmitConvertToTarget1,
803 OPC_EmitNodeXForm, 1, 2,
804 OPC_MorphNodeTo1GlueOutput, TARGET_VAL(Lanai::SFSUB_F_RI_HI),
805 MVT::i32, 2, 9,
806 0,
807 8,
808 OPC_CheckChild0TypeI32,
809 OPC_RecordChild1,
810 OPC_MorphNodeTo1GlueOutput, TARGET_VAL(Lanai::SFSUB_F_RR),
811 MVT::i32, 2, 2,
812 0,
813 21, TARGET_VAL(LanaiISD::BR_CC),
814 OPC_RecordNode,
815 OPC_CaptureGlueInput,
816 OPC_RecordChild1,
817 OPC_MoveChild1,
818 OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
819 OPC_MoveSibling2,
820 OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
821 OPC_RecordNode,
822 OPC_MoveParent,
823 OPC_EmitMergeInputChains1_0,
824 OPC_EmitConvertToTarget2,
825 OPC_MorphNodeTo0, TARGET_VAL(Lanai::BRCC), 0|OPFL_Chain|OPFL_GlueInput,
826 2, 12,
827 14, TARGET_VAL(LanaiISD::SETCC),
828 OPC_CaptureGlueInput,
829 OPC_RecordChild0,
830 OPC_MoveChild0,
831 OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
832 OPC_MoveParent,
833 OPC_EmitConvertToTarget0,
834 OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SCC),
835 MVT::i32, 1, 3,
836 17, TARGET_VAL(LanaiISD::SELECT_CC),
837 OPC_CaptureGlueInput,
838 OPC_RecordChild0,
839 OPC_RecordChild1,
840 OPC_RecordChild2,
841 OPC_MoveChild2,
842 OPC_CheckOpcode, TARGET_VAL(ISD::Constant),
843 OPC_MoveParent,
844 OPC_CheckTypeI32,
845 OPC_EmitConvertToTarget2,
846 OPC_MorphNodeTo1GlueInput, TARGET_VAL(Lanai::SELECT),
847 MVT::i32, 3, 11,
848 42, TARGET_VAL(LanaiISD::CALL),
849 OPC_RecordNode,
850 OPC_CaptureGlueInput,
851 OPC_RecordChild1,
852 OPC_Scope, 27,
853 OPC_MoveChild1,
854 OPC_SwitchOpcode , 9, TARGET_VAL(ISD::TargetGlobalAddress),
855 OPC_MoveParent,
856 OPC_EmitMergeInputChains1_0,
857 OPC_MorphNodeTo1, TARGET_VAL(Lanai::CALL), 0|OPFL_Chain|OPFL_GlueInput|OPFL_GlueOutput|OPFL_Variadic1,
858 MVT::i32, 1, 3,
859 9, TARGET_VAL(ISD::TargetExternalSymbol),
860 OPC_MoveParent,
861 OPC_EmitMergeInputChains1_0,
862 OPC_MorphNodeTo1, TARGET_VAL(Lanai::CALL), 0|OPFL_Chain|OPFL_GlueInput|OPFL_GlueOutput|OPFL_Variadic1,
863 MVT::i32, 1, 3,
864 0,
865 8,
866 OPC_EmitMergeInputChains1_0,
867 OPC_MorphNodeTo1, TARGET_VAL(Lanai::CALLR), 0|OPFL_Chain|OPFL_GlueInput|OPFL_GlueOutput|OPFL_Variadic1,
868 MVT::i32, 1, 3,
869 0,
870 59, TARGET_VAL(LanaiISD::HI),
871 OPC_RecordChild0,
872 OPC_MoveChild0,
873 OPC_SwitchOpcode , 8, TARGET_VAL(ISD::TargetGlobalAddress),
874 OPC_MoveParent,
875 OPC_CheckTypeI32,
876 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::MOVHI),
877 MVT::i32, 1, 1,
878 8, TARGET_VAL(ISD::TargetExternalSymbol),
879 OPC_MoveParent,
880 OPC_CheckTypeI32,
881 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::MOVHI),
882 MVT::i32, 1, 1,
883 8, TARGET_VAL(ISD::TargetBlockAddress),
884 OPC_MoveParent,
885 OPC_CheckTypeI32,
886 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::MOVHI),
887 MVT::i32, 1, 1,
888 8, TARGET_VAL(ISD::TargetJumpTable),
889 OPC_MoveParent,
890 OPC_CheckTypeI32,
891 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::MOVHI),
892 MVT::i32, 1, 1,
893 8, TARGET_VAL(ISD::TargetConstantPool),
894 OPC_MoveParent,
895 OPC_CheckTypeI32,
896 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::MOVHI),
897 MVT::i32, 1, 1,
898 0,
899 69, TARGET_VAL(LanaiISD::LO),
900 OPC_RecordChild0,
901 OPC_MoveChild0,
902 OPC_SwitchOpcode , 10, TARGET_VAL(ISD::TargetGlobalAddress),
903 OPC_MoveParent,
904 OPC_CheckTypeI32,
905 OPC_EmitRegisterI32, Lanai::R0,
906 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO),
907 MVT::i32, 2, 0,
908 10, TARGET_VAL(ISD::TargetExternalSymbol),
909 OPC_MoveParent,
910 OPC_CheckTypeI32,
911 OPC_EmitRegisterI32, Lanai::R0,
912 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO),
913 MVT::i32, 2, 0,
914 10, TARGET_VAL(ISD::TargetBlockAddress),
915 OPC_MoveParent,
916 OPC_CheckTypeI32,
917 OPC_EmitRegisterI32, Lanai::R0,
918 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO),
919 MVT::i32, 2, 0,
920 10, TARGET_VAL(ISD::TargetJumpTable),
921 OPC_MoveParent,
922 OPC_CheckTypeI32,
923 OPC_EmitRegisterI32, Lanai::R0,
924 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO),
925 MVT::i32, 2, 0,
926 10, TARGET_VAL(ISD::TargetConstantPool),
927 OPC_MoveParent,
928 OPC_CheckTypeI32,
929 OPC_EmitRegisterI32, Lanai::R0,
930 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO),
931 MVT::i32, 2, 0,
932 0,
933 59, TARGET_VAL(LanaiISD::SMALL),
934 OPC_RecordChild0,
935 OPC_MoveChild0,
936 OPC_SwitchOpcode , 8, TARGET_VAL(ISD::TargetGlobalAddress),
937 OPC_MoveParent,
938 OPC_CheckTypeI32,
939 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SLI),
940 MVT::i32, 1, 1,
941 8, TARGET_VAL(ISD::TargetExternalSymbol),
942 OPC_MoveParent,
943 OPC_CheckTypeI32,
944 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SLI),
945 MVT::i32, 1, 1,
946 8, TARGET_VAL(ISD::TargetBlockAddress),
947 OPC_MoveParent,
948 OPC_CheckTypeI32,
949 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SLI),
950 MVT::i32, 1, 1,
951 8, TARGET_VAL(ISD::TargetJumpTable),
952 OPC_MoveParent,
953 OPC_CheckTypeI32,
954 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SLI),
955 MVT::i32, 1, 1,
956 8, TARGET_VAL(ISD::TargetConstantPool),
957 OPC_MoveParent,
958 OPC_CheckTypeI32,
959 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SLI),
960 MVT::i32, 1, 1,
961 0,
962 88, TARGET_VAL(ISD::Constant),
963 OPC_RecordNode,
964 OPC_Scope, 13,
965 OPC_CheckPredicate6,
966 OPC_EmitRegisterI32, Lanai::R1,
967 OPC_EmitConvertToTarget0,
968 OPC_EmitNodeXForm, 0, 2,
969 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::AND_I_LO),
970 MVT::i32, 2, 12,
971 13,
972 OPC_CheckPredicate7,
973 OPC_EmitRegisterI32, Lanai::R1,
974 OPC_EmitConvertToTarget0,
975 OPC_EmitNodeXForm, 1, 2,
976 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::AND_I_HI),
977 MVT::i32, 2, 12,
978 11,
979 OPC_CheckPredicate1,
980 OPC_EmitConvertToTarget0,
981 OPC_EmitNodeXForm, 1, 1,
982 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::MOVHI),
983 MVT::i32, 1, 5,
984 12,
985 OPC_CheckPredicate, 19,
986 OPC_EmitConvertToTarget0,
987 OPC_EmitNodeXForm, 3, 1,
988 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::SLI),
989 MVT::i32, 1, 5,
990 10,
991 OPC_CheckPredicate0,
992 OPC_EmitRegisterI32, Lanai::R0,
993 OPC_EmitConvertToTarget0,
994 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO),
995 MVT::i32, 2, 7,
996 20,
997 OPC_EmitConvertToTarget0,
998 OPC_EmitNodeXForm, 1, 1,
999 OPC_EmitNode1None, TARGET_VAL(Lanai::MOVHI),
1000 MVT::i32, 1, 5,
1001 OPC_EmitConvertToTarget0,
1002 OPC_EmitNodeXForm, 0, 4,
1003 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::OR_I_LO),
1004 MVT::i32, 2, 20,
1005 0,
1006 13, TARGET_VAL(ISD::BR),
1007 OPC_RecordNode,
1008 OPC_RecordChild1,
1009 OPC_MoveChild1,
1010 OPC_CheckOpcode, TARGET_VAL(ISD::BasicBlock),
1011 OPC_MoveParent,
1012 OPC_EmitMergeInputChains1_0,
1013 OPC_MorphNodeTo0Chain, TARGET_VAL(Lanai::BT),
1014 1, 3,
1015 9, TARGET_VAL(ISD::BRIND),
1016 OPC_RecordNode,
1017 OPC_RecordChild1,
1018 OPC_CheckChild1TypeI32,
1019 OPC_EmitMergeInputChains1_0,
1020 OPC_MorphNodeTo0Chain, TARGET_VAL(Lanai::JR),
1021 1, 3,
1022 8, TARGET_VAL(LanaiISD::RET_GLUE),
1023 OPC_RecordNode,
1024 OPC_CaptureGlueInput,
1025 OPC_EmitMergeInputChains1_0,
1026 OPC_MorphNodeTo0, TARGET_VAL(Lanai::RET), 0|OPFL_Chain|OPFL_GlueInput|OPFL_Variadic0,
1027 0,
1028 8, TARGET_VAL(LanaiISD::ADJDYNALLOC),
1029 OPC_RecordChild0,
1030 OPC_MorphNodeTo2None, TARGET_VAL(Lanai::ADJDYNALLOC),
1031 MVT::i32, MVT::i32, 1, 1,
1032 7, TARGET_VAL(ISD::CTPOP),
1033 OPC_RecordChild0,
1034 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::POPC),
1035 MVT::i32, 1, 1,
1036 7, TARGET_VAL(ISD::CTLZ),
1037 OPC_RecordChild0,
1038 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::LEADZ),
1039 MVT::i32, 1, 1,
1040 7, TARGET_VAL(ISD::CTTZ),
1041 OPC_RecordChild0,
1042 OPC_MorphNodeTo1None, TARGET_VAL(Lanai::TRAILZ),
1043 MVT::i32, 1, 1,
1044 0,
1045 }; // Total Array size is 1936 bytes
1046
1047 static const uint8_t OperandLists[] = {
1048 /* 0 */ 1, 0,
1049 /* 2 */ 0, 1,
1050 /* 4 */ 0, 2,
1051 /* 6 */ 0, 1, 2,
1052 /* 9 */ 0, 3,
1053 /* 11 */ 0, 1, 3,
1054 /* 14 */ 2, 1, 3,
1055 /* 17 */ 2, 3, 4,
1056 /* 20 */ 3, 5,
1057 /* 22 */ 0, 4, 5,
1058 /* 25 */ 1, 3, 4, 5,
1059 };
1060
1061 #undef COVERAGE_IDX_VAL
1062 #undef TARGET_VAL
1063 SelectCodeCommon(NodeToMatch: N, MatcherTable, TableSize: sizeof(MatcherTable),
1064 OperandLists);
1065}
1066#endif // GET_DAGISEL_BODY
1067
1068#ifdef GET_DAGISEL_DECL
1069bool CheckNodePredicate(SDValue Op, unsigned PredNo) const override;
1070#endif
1071#if defined(GET_DAGISEL_BODY) || DAGISEL_INLINE
1072bool DAGISEL_CLASS_COLONCOLON CheckNodePredicate(SDValue Op, unsigned PredNo) const
1073#if DAGISEL_INLINE
1074 override
1075#endif
1076{
1077 switch (PredNo) {
1078 default: llvm_unreachable("Invalid predicate in table?");
1079 case 0: {
1080 // Predicate_i32lo16z
1081 auto *N = cast<ConstantSDNode>(Val: Op.getNode());
1082 (void)N;
1083
1084 // i32lo16 predicate - true if the 32-bit immediate has only rightmost 16
1085 // bits set.
1086 return ((N->getZExtValue() & 0xFFFFUL) == N->getZExtValue());
1087 }
1088 case 1: {
1089 // Predicate_i32hi16
1090 auto *N = cast<ConstantSDNode>(Val: Op.getNode());
1091 (void)N;
1092
1093 // i32hi16 predicate - true if the 32-bit immediate has only leftmost 16
1094 // bits set.
1095 return ((N->getZExtValue() & 0xFFFF0000UL) == N->getZExtValue());
1096 }
1097 case 2: {
1098 // Predicate_atomic_load_aext_8
1099 // Predicate_atomic_load_zext_8
1100 // Predicate_extloadi8
1101 // Predicate_sextloadi8
1102 // Predicate_truncstorei8
1103 // Predicate_zextloadi8
1104 SDNode *N = Op.getNode();
1105 (void)N;
1106if (cast<MemSDNode>(Val: N)->getMemoryVT() != MVT::i8) return false;
1107return true;
1108
1109 }
1110 case 3: {
1111 // Predicate_extloadi16
1112 // Predicate_sextloadi16
1113 // Predicate_truncstorei16
1114 // Predicate_zextloadi16
1115 SDNode *N = Op.getNode();
1116 (void)N;
1117if (cast<MemSDNode>(Val: N)->getMemoryVT() != MVT::i16) return false;
1118return true;
1119
1120 }
1121 case 4: {
1122 // Predicate_zextload
1123 SDNode *N = Op.getNode();
1124 (void)N;
1125if (cast<LoadSDNode>(Val: N)->getExtensionType() != ISD::ZEXTLOAD) return false;
1126return true;
1127
1128 }
1129 case 5: {
1130 // Predicate_sextload
1131 SDNode *N = Op.getNode();
1132 (void)N;
1133if (cast<LoadSDNode>(Val: N)->getExtensionType() != ISD::SEXTLOAD) return false;
1134return true;
1135
1136 }
1137 case 6: {
1138 // Predicate_i32lo16and
1139 auto *N = cast<ConstantSDNode>(Val: Op.getNode());
1140 (void)N;
1141
1142 // i32lo16 predicate - true if the 32-bit immediate has the rightmost 16
1143 // bits set and the leftmost 16 bits 1's.
1144 return (N->getZExtValue() >= 0xFFFF0000UL);
1145 }
1146 case 7: {
1147 // Predicate_i32hi16and
1148 auto *N = cast<ConstantSDNode>(Val: Op.getNode());
1149 (void)N;
1150
1151 // i32lo16 predicate - true if the 32-bit immediate has the leftmost 16
1152 // bits set and the rightmost 16 bits 1's.
1153 return ((N->getZExtValue() & 0xFFFFUL) == 0xFFFFUL);
1154 }
1155 case 8: {
1156 // Predicate_immShift
1157 auto *N = cast<ConstantSDNode>(Val: Op.getNode());
1158 (void)N;
1159
1160 int Imm = N->getSExtValue();
1161 return Imm >= -31 && Imm <= 31;
1162 }
1163 case 9: {
1164 // Predicate_load
1165 SDNode *N = Op.getNode();
1166 (void)N;
1167if (cast<LoadSDNode>(Val: N)->getExtensionType() != ISD::NON_EXTLOAD) return false;
1168return true;
1169
1170 }
1171 case 10: {
1172 // Predicate_store
1173 SDNode *N = Op.getNode();
1174 (void)N;
1175 if (cast<StoreSDNode>(Val: N)->isTruncatingStore()) return false;
1176return true;
1177
1178 }
1179 case 11: {
1180 // Predicate_i32neg16
1181 auto *N = cast<ConstantSDNode>(Val: Op.getNode());
1182 (void)N;
1183
1184 // i32neg16 predicate - true if the 32-bit immediate is negative and can
1185 // be represented by a 16 bit integer.
1186 int Imm = N->getSExtValue();
1187 return (Imm < 0) && (isInt<16>(x: Imm));
1188 }
1189 case 12: {
1190 // Predicate_unindexedload
1191 SDNode *N = Op.getNode();
1192 (void)N;
1193if (cast<LoadSDNode>(Val: N)->getAddressingMode() != ISD::UNINDEXED) return false;
1194return true;
1195
1196 }
1197 case 13: {
1198 // Predicate_zextloadi32
1199 SDNode *N = Op.getNode();
1200 (void)N;
1201if (cast<MemSDNode>(Val: N)->getMemoryVT() != MVT::i32) return false;
1202return true;
1203
1204 }
1205 case 14: {
1206 // Predicate_extload
1207 SDNode *N = Op.getNode();
1208 (void)N;
1209if (cast<LoadSDNode>(Val: N)->getExtensionType() != ISD::EXTLOAD) return false;
1210return true;
1211
1212 }
1213 case 15: {
1214 // Predicate_unindexedstore
1215 SDNode *N = Op.getNode();
1216 (void)N;
1217if (cast<StoreSDNode>(Val: N)->getAddressingMode() != ISD::UNINDEXED) return false;
1218return true;
1219
1220 }
1221 case 16: {
1222 // Predicate_truncstore
1223 SDNode *N = Op.getNode();
1224 (void)N;
1225 if (!cast<StoreSDNode>(Val: N)->isTruncatingStore()) return false;
1226return true;
1227
1228 }
1229 case 17: {
1230 // Predicate_atomic_load_aext
1231 SDNode *N = Op.getNode();
1232 (void)N;
1233if (cast<AtomicSDNode>(Val: N)->getExtensionType() != ISD::EXTLOAD) return false;
1234return true;
1235
1236 }
1237 case 18: {
1238 // Predicate_atomic_load_zext
1239 SDNode *N = Op.getNode();
1240 (void)N;
1241if (cast<AtomicSDNode>(Val: N)->getExtensionType() != ISD::ZEXTLOAD) return false;
1242return true;
1243
1244 }
1245 case 19: {
1246 // Predicate_i32lo21
1247 auto *N = cast<ConstantSDNode>(Val: Op.getNode());
1248 (void)N;
1249
1250 // i32lo21 predicate - true if the 32-bit immediate has only rightmost 21
1251 // bits set.
1252 return ((N->getZExtValue() & 0x1FFFFFUL) == N->getZExtValue());
1253 }
1254 }
1255}
1256#endif // GET_DAGISEL_BODY
1257
1258#ifdef GET_DAGISEL_DECL
1259bool CheckComplexPattern(SDNode *Root, SDNode *Parent,
1260 SDValue N, unsigned PatternNo,
1261 SmallVectorImpl<std::pair<SDValue, SDNode *>> &Result) override;
1262#endif
1263#if defined(GET_DAGISEL_BODY) || DAGISEL_INLINE
1264bool DAGISEL_CLASS_COLONCOLON CheckComplexPattern(SDNode *Root, SDNode *Parent,
1265 SDValue N, unsigned PatternNo,
1266 SmallVectorImpl<std::pair<SDValue, SDNode *>> &Result)
1267#if DAGISEL_INLINE
1268 override
1269#endif
1270{
1271 unsigned NextRes = Result.size();
1272 switch (PatternNo) {
1273 default: llvm_unreachable("Invalid pattern # in table?");
1274 case 0:
1275 Result.resize(N: NextRes+3);
1276 return selectAddrSpls(Addr: N, Base&: Result[NextRes+0].first, Offset&: Result[NextRes+1].first, AluOp&: Result[NextRes+2].first);
1277 case 1:
1278 Result.resize(N: NextRes+3);
1279 return selectAddrRr(Addr: N, R1&: Result[NextRes+0].first, R2&: Result[NextRes+1].first, AluOp&: Result[NextRes+2].first);
1280 case 2:
1281 Result.resize(N: NextRes+3);
1282 return selectAddrRi(Addr: N, Base&: Result[NextRes+0].first, Offset&: Result[NextRes+1].first, AluOp&: Result[NextRes+2].first);
1283 case 3:
1284 Result.resize(N: NextRes+1);
1285 return selectAddrSls(Addr: N, Offset&: Result[NextRes+0].first);
1286 }
1287}
1288#endif // GET_DAGISEL_BODY
1289
1290#ifdef GET_DAGISEL_DECL
1291SDValue RunSDNodeXForm(SDValue V, unsigned XFormNo) override;
1292#endif
1293#if defined(GET_DAGISEL_BODY) || DAGISEL_INLINE
1294SDValue DAGISEL_CLASS_COLONCOLON RunSDNodeXForm(SDValue V, unsigned XFormNo)
1295#if DAGISEL_INLINE
1296 override
1297#endif
1298{
1299 switch (XFormNo) {
1300 default: llvm_unreachable("Invalid xform # in table?");
1301 case 0: {
1302 ConstantSDNode *N = cast<ConstantSDNode>(Val: V.getNode());
1303
1304 return CurDAG->getTargetConstant(Val: (uint64_t)N->getZExtValue() & 0xffff,
1305 DL: SDLoc(N), VT: MVT::i32);
1306
1307 }
1308 case 1: {
1309 ConstantSDNode *N = cast<ConstantSDNode>(Val: V.getNode());
1310
1311 return CurDAG->getTargetConstant(Val: (uint64_t)N->getZExtValue() >> 16, DL: SDLoc(N),
1312 VT: MVT::i32);
1313
1314 }
1315 case 2: {
1316 ConstantSDNode *N = cast<ConstantSDNode>(Val: V.getNode());
1317
1318 return CurDAG->getSignedTargetConstant(Val: -N->getSExtValue(), DL: SDLoc(N),
1319 VT: MVT::i32);
1320
1321 }
1322 case 3: {
1323 ConstantSDNode *N = cast<ConstantSDNode>(Val: V.getNode());
1324
1325 return CurDAG->getTargetConstant(Val: (uint64_t)N->getZExtValue() & 0x1fffff,
1326 DL: SDLoc(N), VT: MVT::i32);
1327
1328 }
1329 }
1330}
1331#endif // GET_DAGISEL_BODY
1332
1333
1334#ifdef DAGISEL_INLINE
1335#undef DAGISEL_INLINE
1336#endif
1337#ifdef DAGISEL_CLASS_COLONCOLON
1338#undef DAGISEL_CLASS_COLONCOLON
1339#endif
1340#ifdef GET_DAGISEL_DECL
1341#undef GET_DAGISEL_DECL
1342#endif
1343#ifdef GET_DAGISEL_BODY
1344#undef GET_DAGISEL_BODY
1345#endif
1346