1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2|* *|
3|* Calling Convention Implementation Fragment *|
4|* *|
5|* Automatically generated file, do not edit! *|
6|* *|
7\*===----------------------------------------------------------------------===*/
8
9#ifdef GET_CALLING_CONV_IMPL
10#undef GET_CALLING_CONV_IMPL
11
12static bool CC_Mips(unsigned ValNo, MVT ValVT,
13 MVT LocVT, CCValAssign::LocInfo LocInfo,
14 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
15static bool CC_Mips16RetHelper(unsigned ValNo, MVT ValVT,
16 MVT LocVT, CCValAssign::LocInfo LocInfo,
17 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
18static bool CC_MipsN(unsigned ValNo, MVT ValVT,
19 MVT LocVT, CCValAssign::LocInfo LocInfo,
20 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
21static bool CC_MipsN_FastCC(unsigned ValNo, MVT ValVT,
22 MVT LocVT, CCValAssign::LocInfo LocInfo,
23 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
24static bool CC_MipsN_SoftFloat(unsigned ValNo, MVT ValVT,
25 MVT LocVT, CCValAssign::LocInfo LocInfo,
26 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
27static bool CC_MipsN_VarArg(unsigned ValNo, MVT ValVT,
28 MVT LocVT, CCValAssign::LocInfo LocInfo,
29 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
30static bool CC_MipsO32(unsigned ValNo, MVT ValVT,
31 MVT LocVT, CCValAssign::LocInfo LocInfo,
32 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
33static bool CC_MipsO32_FP(unsigned ValNo, MVT ValVT,
34 MVT LocVT, CCValAssign::LocInfo LocInfo,
35 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
36static bool CC_MipsO32_FastCC(unsigned ValNo, MVT ValVT,
37 MVT LocVT, CCValAssign::LocInfo LocInfo,
38 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
39static bool CC_Mips_ByVal(unsigned ValNo, MVT ValVT,
40 MVT LocVT, CCValAssign::LocInfo LocInfo,
41 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
42static bool CC_Mips_FastCC(unsigned ValNo, MVT ValVT,
43 MVT LocVT, CCValAssign::LocInfo LocInfo,
44 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
45static bool CC_Mips_FixedArg(unsigned ValNo, MVT ValVT,
46 MVT LocVT, CCValAssign::LocInfo LocInfo,
47 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
48static bool CC_Mips_VarArg(unsigned ValNo, MVT ValVT,
49 MVT LocVT, CCValAssign::LocInfo LocInfo,
50 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
51static bool RetCC_F128(unsigned ValNo, MVT ValVT,
52 MVT LocVT, CCValAssign::LocInfo LocInfo,
53 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
54static bool RetCC_F128HardFloat(unsigned ValNo, MVT ValVT,
55 MVT LocVT, CCValAssign::LocInfo LocInfo,
56 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
57static bool RetCC_F128SoftFloat(unsigned ValNo, MVT ValVT,
58 MVT LocVT, CCValAssign::LocInfo LocInfo,
59 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
60static bool RetCC_Mips(unsigned ValNo, MVT ValVT,
61 MVT LocVT, CCValAssign::LocInfo LocInfo,
62 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
63static bool RetCC_MipsN(unsigned ValNo, MVT ValVT,
64 MVT LocVT, CCValAssign::LocInfo LocInfo,
65 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
66static bool RetCC_MipsO32(unsigned ValNo, MVT ValVT,
67 MVT LocVT, CCValAssign::LocInfo LocInfo,
68 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State);
69
70
71static bool CC_Mips(unsigned ValNo, MVT ValVT,
72 MVT LocVT, CCValAssign::LocInfo LocInfo,
73 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
74
75 if (State.isVarArg()) {
76 if (ArgFlags.isVarArg()) {
77 if (!CC_Mips_VarArg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
78 return false;
79 }
80 }
81
82 if (!CC_Mips_FixedArg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
83 return false;
84
85 return true; // CC didn't match.
86}
87
88
89static bool CC_Mips16RetHelper(unsigned ValNo, MVT ValVT,
90 MVT LocVT, CCValAssign::LocInfo LocInfo,
91 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
92
93 if (ArgFlags.isByVal()) {
94 if (!CC_Mips_ByVal(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
95 return false;
96 }
97
98 if (LocVT == MVT::i32) {
99 static const MCPhysReg RegList1[] = {
100 Mips::V0, Mips::V1, Mips::A0, Mips::A1
101 };
102 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
103 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
104 return false;
105 }
106 }
107
108 return true; // CC didn't match.
109}
110
111
112static bool CC_MipsN(unsigned ValNo, MVT ValVT,
113 MVT LocVT, CCValAssign::LocInfo LocInfo,
114 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
115
116 if (LocVT == MVT::i8 ||
117 LocVT == MVT::i16 ||
118 LocVT == MVT::i32 ||
119 LocVT == MVT::i64) {
120 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().isLittle()) {
121 if (ArgFlags.isInReg()) {
122 LocVT = MVT::i64;
123 if (ArgFlags.isSExt())
124 LocInfo = CCValAssign::SExtUpper;
125 else if (ArgFlags.isZExt())
126 LocInfo = CCValAssign::ZExtUpper;
127 else
128 LocInfo = CCValAssign::AExtUpper;
129 }
130 }
131 }
132
133 if (LocVT == MVT::i32) {
134 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().useSoftFloat()) {
135 if (OrigTy->isFloatingPointTy()) {
136 if (!CC_MipsN_SoftFloat(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
137 return false;
138 }
139 }
140 }
141
142 if (LocVT == MVT::i8 ||
143 LocVT == MVT::i16 ||
144 LocVT == MVT::i32) {
145 LocVT = MVT::i64;
146 if (ArgFlags.isSExt())
147 LocInfo = CCValAssign::SExt;
148 else if (ArgFlags.isZExt())
149 LocInfo = CCValAssign::ZExt;
150 else
151 LocInfo = CCValAssign::AExt;
152 }
153
154 if (LocVT == MVT::i64) {
155 static const MCPhysReg RegList1[] = {
156 Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64, Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64
157 };
158 static const MCPhysReg RegList2[] = {
159 Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64, Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64
160 };
161 if (MCRegister Reg = State.AllocateReg(Regs: RegList1, ShadowRegs: RegList2)) {
162 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
163 return false;
164 }
165 }
166
167 if (LocVT == MVT::f32) {
168 static const MCPhysReg RegList3[] = {
169 Mips::F12, Mips::F13, Mips::F14, Mips::F15, Mips::F16, Mips::F17, Mips::F18, Mips::F19
170 };
171 static const MCPhysReg RegList4[] = {
172 Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64, Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64
173 };
174 if (MCRegister Reg = State.AllocateReg(Regs: RegList3, ShadowRegs: RegList4)) {
175 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
176 return false;
177 }
178 }
179
180 if (LocVT == MVT::f64) {
181 static const MCPhysReg RegList5[] = {
182 Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64, Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64
183 };
184 static const MCPhysReg RegList6[] = {
185 Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64, Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64
186 };
187 if (MCRegister Reg = State.AllocateReg(Regs: RegList5, ShadowRegs: RegList6)) {
188 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
189 return false;
190 }
191 }
192
193 if (LocVT == MVT::f32) {
194 int64_t Offset7 = State.AllocateStack(Size: 4, Alignment: Align(8));
195 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset7, LocVT, HTP: LocInfo));
196 return false;
197 }
198
199 if (LocVT == MVT::i64 ||
200 LocVT == MVT::f64) {
201 int64_t Offset8 = State.AllocateStack(Size: 8, Alignment: Align(8));
202 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset8, LocVT, HTP: LocInfo));
203 return false;
204 }
205
206 return true; // CC didn't match.
207}
208
209
210static bool CC_MipsN_FastCC(unsigned ValNo, MVT ValVT,
211 MVT LocVT, CCValAssign::LocInfo LocInfo,
212 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
213
214 if (LocVT == MVT::i64) {
215 static const MCPhysReg RegList1[] = {
216 Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64, Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64, Mips::T4_64, Mips::T5_64, Mips::T6_64, Mips::T7_64, Mips::T8_64, Mips::V1_64
217 };
218 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
219 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
220 return false;
221 }
222 }
223
224 if (LocVT == MVT::f64) {
225 static const MCPhysReg RegList2[] = {
226 Mips::D0_64, Mips::D1_64, Mips::D2_64, Mips::D3_64, Mips::D4_64, Mips::D5_64, Mips::D6_64, Mips::D7_64, Mips::D8_64, Mips::D9_64, Mips::D10_64, Mips::D11_64, Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64, Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64
227 };
228 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
229 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
230 return false;
231 }
232 }
233
234 if (LocVT == MVT::i64 ||
235 LocVT == MVT::f64) {
236 int64_t Offset3 = State.AllocateStack(Size: 8, Alignment: Align(8));
237 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset3, LocVT, HTP: LocInfo));
238 return false;
239 }
240
241 return true; // CC didn't match.
242}
243
244
245static bool CC_MipsN_SoftFloat(unsigned ValNo, MVT ValVT,
246 MVT LocVT, CCValAssign::LocInfo LocInfo,
247 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
248
249 static const MCPhysReg RegList1[] = {
250 Mips::A0, Mips::A1, Mips::A2, Mips::A3, Mips::T0, Mips::T1, Mips::T2, Mips::T3
251 };
252 static const MCPhysReg RegList2[] = {
253 Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64, Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64
254 };
255 if (MCRegister Reg = State.AllocateReg(Regs: RegList1, ShadowRegs: RegList2)) {
256 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
257 return false;
258 }
259
260 int64_t Offset3 = State.AllocateStack(Size: 4, Alignment: Align(8));
261 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset3, LocVT, HTP: LocInfo));
262 return false;
263
264 return true; // CC didn't match.
265}
266
267
268static bool CC_MipsN_VarArg(unsigned ValNo, MVT ValVT,
269 MVT LocVT, CCValAssign::LocInfo LocInfo,
270 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
271
272 if (LocVT == MVT::i8 ||
273 LocVT == MVT::i16 ||
274 LocVT == MVT::i32 ||
275 LocVT == MVT::i64) {
276 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().isLittle()) {
277 if (ArgFlags.isInReg()) {
278 LocVT = MVT::i64;
279 if (ArgFlags.isSExt())
280 LocInfo = CCValAssign::SExtUpper;
281 else if (ArgFlags.isZExt())
282 LocInfo = CCValAssign::ZExtUpper;
283 else
284 LocInfo = CCValAssign::AExtUpper;
285 }
286 }
287 }
288
289 if (LocVT == MVT::i8 ||
290 LocVT == MVT::i16 ||
291 LocVT == MVT::i32) {
292 LocVT = MVT::i64;
293 if (ArgFlags.isSExt())
294 LocInfo = CCValAssign::SExt;
295 else if (ArgFlags.isZExt())
296 LocInfo = CCValAssign::ZExt;
297 else
298 LocInfo = CCValAssign::AExt;
299 }
300
301 if (LocVT == MVT::f32) {
302 static const MCPhysReg RegList1[] = {
303 Mips::A0, Mips::A1, Mips::A2, Mips::A3, Mips::T0, Mips::T1, Mips::T2, Mips::T3
304 };
305 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
306 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
307 return false;
308 }
309 }
310
311 if (LocVT == MVT::i64 ||
312 LocVT == MVT::f64) {
313 static const MCPhysReg RegList2[] = {
314 Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64, Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64
315 };
316 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
317 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
318 return false;
319 }
320 }
321
322 if (LocVT == MVT::f32) {
323 int64_t Offset3 = State.AllocateStack(Size: 4, Alignment: Align(8));
324 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset3, LocVT, HTP: LocInfo));
325 return false;
326 }
327
328 if (LocVT == MVT::i64 ||
329 LocVT == MVT::f64) {
330 int64_t Offset4 = State.AllocateStack(Size: 8, Alignment: Align(8));
331 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset4, LocVT, HTP: LocInfo));
332 return false;
333 }
334
335 return true; // CC didn't match.
336}
337
338
339static bool CC_MipsO32(unsigned ValNo, MVT ValVT,
340 MVT LocVT, CCValAssign::LocInfo LocInfo,
341 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
342
343 if (LocVT == MVT::i1 ||
344 LocVT == MVT::i8 ||
345 LocVT == MVT::i16) {
346 LocVT = MVT::i32;
347 if (ArgFlags.isSExt())
348 LocInfo = CCValAssign::SExt;
349 else if (ArgFlags.isZExt())
350 LocInfo = CCValAssign::ZExt;
351 else
352 LocInfo = CCValAssign::AExt;
353 }
354
355 if (LocVT == MVT::i32 ||
356 LocVT == MVT::f32) {
357 int64_t Offset1 = State.AllocateStack(Size: 4, Alignment: Align(4));
358 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset1, LocVT, HTP: LocInfo));
359 return false;
360 }
361
362 if (LocVT == MVT::f64) {
363 int64_t Offset2 = State.AllocateStack(Size: 8, Alignment: Align(8));
364 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset2, LocVT, HTP: LocInfo));
365 return false;
366 }
367
368 return true; // CC didn't match.
369}
370
371
372static bool CC_MipsO32_FP(unsigned ValNo, MVT ValVT,
373 MVT LocVT, CCValAssign::LocInfo LocInfo,
374 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
375
376 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().isFP64bit()) {
377 if (!CC_MipsO32_FP32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
378 return false;
379 }
380
381 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isFP64bit()) {
382 if (!CC_MipsO32_FP64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
383 return false;
384 }
385
386 return true; // CC didn't match.
387}
388
389
390static bool CC_MipsO32_FastCC(unsigned ValNo, MVT ValVT,
391 MVT LocVT, CCValAssign::LocInfo LocInfo,
392 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
393
394 if (LocVT == MVT::f64) {
395 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().isFP64bit()) {
396 static const MCPhysReg RegList1[] = {
397 Mips::D0, Mips::D1, Mips::D2, Mips::D3, Mips::D4, Mips::D5, Mips::D6, Mips::D7, Mips::D8, Mips::D9
398 };
399 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
400 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
401 return false;
402 }
403 }
404 }
405
406 if (LocVT == MVT::f64) {
407 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isFP64bit()) {
408 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().useOddSPReg()) {
409 static const MCPhysReg RegList2[] = {
410 Mips::D0_64, Mips::D1_64, Mips::D2_64, Mips::D3_64, Mips::D4_64, Mips::D5_64, Mips::D6_64, Mips::D7_64, Mips::D8_64, Mips::D9_64, Mips::D10_64, Mips::D11_64, Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64, Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64
411 };
412 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
413 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
414 return false;
415 }
416 }
417 }
418 }
419
420 if (LocVT == MVT::f64) {
421 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isFP64bit()) {
422 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().noOddSPReg()) {
423 static const MCPhysReg RegList3[] = {
424 Mips::D0_64, Mips::D2_64, Mips::D4_64, Mips::D6_64, Mips::D8_64, Mips::D10_64, Mips::D12_64, Mips::D14_64, Mips::D16_64, Mips::D18_64
425 };
426 if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) {
427 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
428 return false;
429 }
430 }
431 }
432 }
433
434 if (LocVT == MVT::f64) {
435 int64_t Offset4 = State.AllocateStack(Size: 8, Alignment: Align(8));
436 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset4, LocVT, HTP: LocInfo));
437 return false;
438 }
439
440 return true; // CC didn't match.
441}
442
443
444static bool CC_Mips_ByVal(unsigned ValNo, MVT ValVT,
445 MVT LocVT, CCValAssign::LocInfo LocInfo,
446 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
447
448 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isABI_O32()) {
449 if (ArgFlags.isByVal()) {
450 State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, MinSize: 4, MinAlign: Align(4), ArgFlags);
451 return false;
452 }
453 }
454
455 if (ArgFlags.isByVal()) {
456 State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, MinSize: 8, MinAlign: Align(8), ArgFlags);
457 return false;
458 }
459
460 return true; // CC didn't match.
461}
462
463
464static bool CC_Mips_FastCC(unsigned ValNo, MVT ValVT,
465 MVT LocVT, CCValAssign::LocInfo LocInfo,
466 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
467
468 if (ArgFlags.isByVal()) {
469 State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, MinSize: 4, MinAlign: Align(4), ArgFlags);
470 return false;
471 }
472
473 if (LocVT == MVT::i8 ||
474 LocVT == MVT::i16) {
475 LocVT = MVT::i32;
476 if (ArgFlags.isSExt())
477 LocInfo = CCValAssign::SExt;
478 else if (ArgFlags.isZExt())
479 LocInfo = CCValAssign::ZExt;
480 else
481 LocInfo = CCValAssign::AExt;
482 }
483
484 if (LocVT == MVT::i32) {
485 static const MCPhysReg RegList1[] = {
486 Mips::A0, Mips::A1, Mips::A2, Mips::A3, Mips::T0, Mips::T1, Mips::T2, Mips::T3, Mips::T4, Mips::T5, Mips::T6, Mips::T7, Mips::T8, Mips::V1
487 };
488 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
489 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
490 return false;
491 }
492 }
493
494 if (LocVT == MVT::f32) {
495 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().useOddSPReg()) {
496 static const MCPhysReg RegList2[] = {
497 Mips::F0, Mips::F1, Mips::F2, Mips::F3, Mips::F4, Mips::F5, Mips::F6, Mips::F7, Mips::F8, Mips::F9, Mips::F10, Mips::F11, Mips::F12, Mips::F13, Mips::F14, Mips::F15, Mips::F16, Mips::F17, Mips::F18, Mips::F19
498 };
499 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
500 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
501 return false;
502 }
503 }
504 }
505
506 if (LocVT == MVT::f32) {
507 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().noOddSPReg()) {
508 static const MCPhysReg RegList3[] = {
509 Mips::F0, Mips::F2, Mips::F4, Mips::F6, Mips::F8, Mips::F10, Mips::F12, Mips::F14, Mips::F16, Mips::F18
510 };
511 if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) {
512 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
513 return false;
514 }
515 }
516 }
517
518 if (LocVT == MVT::i32 ||
519 LocVT == MVT::f32) {
520 int64_t Offset4 = State.AllocateStack(Size: 4, Alignment: Align(4));
521 State.addLoc(V: CCValAssign::getMem(ValNo, ValVT, Offset: Offset4, LocVT, HTP: LocInfo));
522 return false;
523 }
524
525 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isABI_O32()) {
526 if (!CC_MipsO32_FastCC(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
527 return false;
528 }
529
530 if (!CC_MipsN_FastCC(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
531 return false;
532
533 return true; // CC didn't match.
534}
535
536
537static bool CC_Mips_FixedArg(unsigned ValNo, MVT ValVT,
538 MVT LocVT, CCValAssign::LocInfo LocInfo,
539 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
540
541 if (State.getCallingConv() != CallingConv::Fast) {
542 if (static_cast<MipsCCState *>(&State)->getSpecialCallingConv() == MipsCCState::Mips16RetHelperConv) {
543 if (!CC_Mips16RetHelper(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
544 return false;
545 }
546 }
547
548 if (ArgFlags.isByVal()) {
549 if (!CC_Mips_ByVal(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
550 return false;
551 }
552
553 if (LocVT == MVT::i64) {
554 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().isSingleFloat()) {
555 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().useSoftFloat()) {
556 if (OrigTy->isFP128Ty()) {
557 LocVT = MVT::f64;
558 LocInfo = CCValAssign::BCvt;
559 }
560 }
561 }
562 }
563
564 if (State.getCallingConv() == CallingConv::Fast) {
565 if (!CC_Mips_FastCC(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
566 return false;
567 }
568
569 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isABI_O32()) {
570 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().isGP64bit()) {
571 if (!CC_MipsO32_FP(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
572 return false;
573 }
574 }
575
576 if (!CC_MipsN(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
577 return false;
578
579 return true; // CC didn't match.
580}
581
582
583static bool CC_Mips_VarArg(unsigned ValNo, MVT ValVT,
584 MVT LocVT, CCValAssign::LocInfo LocInfo,
585 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
586
587 if (ArgFlags.isByVal()) {
588 if (!CC_Mips_ByVal(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
589 return false;
590 }
591
592 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isABI_O32()) {
593 if (!CC_MipsO32_FP(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
594 return false;
595 }
596
597 if (!CC_MipsN_VarArg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
598 return false;
599
600 return true; // CC didn't match.
601}
602
603
604static bool RetCC_F128(unsigned ValNo, MVT ValVT,
605 MVT LocVT, CCValAssign::LocInfo LocInfo,
606 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
607
608 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().useSoftFloat()) {
609 if (LocVT == MVT::i64) {
610 if (!RetCC_F128SoftFloat(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
611 return false;
612 }
613 }
614
615 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().useSoftFloat()) {
616 if (LocVT == MVT::i64) {
617 if (!RetCC_F128HardFloat(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
618 return false;
619 }
620 }
621
622 return true; // CC didn't match.
623}
624
625
626static bool RetCC_F128HardFloat(unsigned ValNo, MVT ValVT,
627 MVT LocVT, CCValAssign::LocInfo LocInfo,
628 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
629
630 LocVT = MVT::f64;
631 LocInfo = CCValAssign::BCvt;
632
633 if (ArgFlags.isInReg()) {
634 static const MCPhysReg RegList1[] = {
635 Mips::D0_64, Mips::D1_64
636 };
637 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
638 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
639 return false;
640 }
641 }
642
643 static const MCPhysReg RegList2[] = {
644 Mips::D0_64, Mips::D2_64
645 };
646 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
647 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
648 return false;
649 }
650
651 return true; // CC didn't match.
652}
653
654
655static bool RetCC_F128SoftFloat(unsigned ValNo, MVT ValVT,
656 MVT LocVT, CCValAssign::LocInfo LocInfo,
657 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
658
659 static const MCPhysReg RegList1[] = {
660 Mips::V0_64, Mips::A0_64
661 };
662 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
663 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
664 return false;
665 }
666
667 return true; // CC didn't match.
668}
669
670
671static bool RetCC_Mips(unsigned ValNo, MVT ValVT,
672 MVT LocVT, CCValAssign::LocInfo LocInfo,
673 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
674
675 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isABI_N32()) {
676 if (!RetCC_MipsN(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
677 return false;
678 }
679
680 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isABI_N64()) {
681 if (!RetCC_MipsN(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
682 return false;
683 }
684
685 if (!RetCC_MipsO32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
686 return false;
687
688 return true; // CC didn't match.
689}
690
691
692static bool RetCC_MipsN(unsigned ValNo, MVT ValVT,
693 MVT LocVT, CCValAssign::LocInfo LocInfo,
694 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
695
696 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().isSingleFloat()) {
697 if (LocVT == MVT::i64) {
698 if (OrigTy->isFP128Ty()) {
699 if (!RetCC_F128(ValNo, ValVT, LocVT, LocInfo, ArgFlags, OrigTy, State))
700 return false;
701 }
702 }
703 }
704
705 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isLittle()) {
706 if (LocVT == MVT::i8 ||
707 LocVT == MVT::i16 ||
708 LocVT == MVT::i32 ||
709 LocVT == MVT::i64) {
710 if (ArgFlags.isInReg()) {
711 LocVT = MVT::i64;
712 if (ArgFlags.isSExt())
713 LocInfo = CCValAssign::SExt;
714 else if (ArgFlags.isZExt())
715 LocInfo = CCValAssign::ZExt;
716 else
717 LocInfo = CCValAssign::AExt;
718 }
719 }
720 }
721
722 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().isLittle()) {
723 if (LocVT == MVT::i8 ||
724 LocVT == MVT::i16 ||
725 LocVT == MVT::i32 ||
726 LocVT == MVT::i64) {
727 if (ArgFlags.isInReg()) {
728 LocVT = MVT::i64;
729 if (ArgFlags.isSExt())
730 LocInfo = CCValAssign::SExtUpper;
731 else if (ArgFlags.isZExt())
732 LocInfo = CCValAssign::ZExtUpper;
733 else
734 LocInfo = CCValAssign::AExtUpper;
735 }
736 }
737 }
738
739 if (LocVT == MVT::i64) {
740 static const MCPhysReg RegList1[] = {
741 Mips::V0_64, Mips::V1_64
742 };
743 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
744 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
745 return false;
746 }
747 }
748
749 if (LocVT == MVT::f32) {
750 static const MCPhysReg RegList2[] = {
751 Mips::F0, Mips::F2
752 };
753 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
754 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
755 return false;
756 }
757 }
758
759 if (LocVT == MVT::f64) {
760 static const MCPhysReg RegList3[] = {
761 Mips::D0_64, Mips::D2_64
762 };
763 if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) {
764 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
765 return false;
766 }
767 }
768
769 return true; // CC didn't match.
770}
771
772
773static bool RetCC_MipsO32(unsigned ValNo, MVT ValVT,
774 MVT LocVT, CCValAssign::LocInfo LocInfo,
775 ISD::ArgFlagsTy ArgFlags, Type *OrigTy, CCState &State) {
776
777 if (LocVT == MVT::i1 ||
778 LocVT == MVT::i8 ||
779 LocVT == MVT::i16) {
780 LocVT = MVT::i32;
781 if (ArgFlags.isSExt())
782 LocInfo = CCValAssign::SExt;
783 else if (ArgFlags.isZExt())
784 LocInfo = CCValAssign::ZExt;
785 else
786 LocInfo = CCValAssign::AExt;
787 }
788
789 if (!OrigTy->isVectorTy() || !OrigTy->isFPOrFPVectorTy()) {
790 if (LocVT == MVT::i32) {
791 static const MCPhysReg RegList1[] = {
792 Mips::V0, Mips::V1, Mips::A0, Mips::A1
793 };
794 if (MCRegister Reg = State.AllocateReg(Regs: RegList1)) {
795 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
796 return false;
797 }
798 }
799 }
800
801 if (LocVT == MVT::f32) {
802 static const MCPhysReg RegList2[] = {
803 Mips::F0, Mips::F2
804 };
805 if (MCRegister Reg = State.AllocateReg(Regs: RegList2)) {
806 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
807 return false;
808 }
809 }
810
811 if (LocVT == MVT::f64) {
812 if (State.getMachineFunction().getSubtarget<MipsSubtarget>().isFP64bit()) {
813 static const MCPhysReg RegList3[] = {
814 Mips::D0_64, Mips::D2_64
815 };
816 if (MCRegister Reg = State.AllocateReg(Regs: RegList3)) {
817 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
818 return false;
819 }
820 }
821 }
822
823 if (LocVT == MVT::f64) {
824 if (!State.getMachineFunction().getSubtarget<MipsSubtarget>().isFP64bit()) {
825 static const MCPhysReg RegList4[] = {
826 Mips::D0, Mips::D1
827 };
828 if (MCRegister Reg = State.AllocateReg(Regs: RegList4)) {
829 State.addLoc(V: CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, HTP: LocInfo));
830 return false;
831 }
832 }
833 }
834
835 return true; // CC didn't match.
836}
837
838#endif // GET_CALLING_CONV_IMPL
839
840#ifdef GET_CC_REGISTER_LISTS
841#undef GET_CC_REGISTER_LISTS
842
843const MCRegister CC_Mips_ArgRegs[] = { 0 };
844const MCRegister CC_Mips16RetHelper_ArgRegs[] = { Mips::A0, Mips::A1, Mips::V0, Mips::V1 };
845const MCRegister CC_MipsN_ArgRegs[] = { 0 };
846const MCRegister CC_MipsN_FastCC_ArgRegs[] = { Mips::A0_64, Mips::A1_64, Mips::A2_64, Mips::A3_64, Mips::D0_64, Mips::D10_64, Mips::D11_64, Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64, Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64, Mips::D1_64, Mips::D2_64, Mips::D3_64, Mips::D4_64, Mips::D5_64, Mips::D6_64, Mips::D7_64, Mips::D8_64, Mips::D9_64, Mips::T0_64, Mips::T1_64, Mips::T2_64, Mips::T3_64, Mips::T4_64, Mips::T5_64, Mips::T6_64, Mips::T7_64, Mips::T8_64, Mips::V1_64 };
847const MCRegister CC_MipsN_SoftFloat_ArgRegs[] = { 0 };
848const MCRegister CC_MipsN_VarArg_ArgRegs[] = { Mips::A0, Mips::A0_64, Mips::A1, Mips::A1_64, Mips::A2, Mips::A2_64, Mips::A3, Mips::A3_64, Mips::T0, Mips::T0_64, Mips::T1, Mips::T1_64, Mips::T2, Mips::T2_64, Mips::T3, Mips::T3_64 };
849const MCRegister CC_MipsO32_ArgRegs[] = { 0 };
850const MCRegister CC_MipsO32_FP_ArgRegs[] = { 0 };
851const MCRegister CC_MipsO32_FastCC_ArgRegs[] = { Mips::D0, Mips::D0_64, Mips::D1, Mips::D10_64, Mips::D11_64, Mips::D12_64, Mips::D13_64, Mips::D14_64, Mips::D15_64, Mips::D16_64, Mips::D17_64, Mips::D18_64, Mips::D19_64, Mips::D1_64, Mips::D2, Mips::D2_64, Mips::D3, Mips::D3_64, Mips::D4, Mips::D4_64, Mips::D5, Mips::D5_64, Mips::D6, Mips::D6_64, Mips::D7, Mips::D7_64, Mips::D8, Mips::D8_64, Mips::D9, Mips::D9_64 };
852const MCRegister CC_Mips_ByVal_ArgRegs[] = { 0 };
853const MCRegister CC_Mips_FastCC_ArgRegs[] = { Mips::A0, Mips::A1, Mips::A2, Mips::A3, Mips::F0, Mips::F1, Mips::F10, Mips::F11, Mips::F12, Mips::F13, Mips::F14, Mips::F15, Mips::F16, Mips::F17, Mips::F18, Mips::F19, Mips::F2, Mips::F3, Mips::F4, Mips::F5, Mips::F6, Mips::F7, Mips::F8, Mips::F9, Mips::T0, Mips::T1, Mips::T2, Mips::T3, Mips::T4, Mips::T5, Mips::T6, Mips::T7, Mips::T8, Mips::V1 };
854const MCRegister CC_Mips_FixedArg_ArgRegs[] = { 0 };
855const MCRegister CC_Mips_VarArg_ArgRegs[] = { 0 };
856const MCRegister RetCC_F128_ArgRegs[] = { 0 };
857const MCRegister RetCC_F128HardFloat_ArgRegs[] = { Mips::D0_64, Mips::D1_64, Mips::D2_64 };
858const MCRegister RetCC_F128SoftFloat_ArgRegs[] = { Mips::A0_64, Mips::V0_64 };
859const MCRegister RetCC_Mips_ArgRegs[] = { 0 };
860const MCRegister RetCC_MipsN_ArgRegs[] = { Mips::D0_64, Mips::D2_64, Mips::F0, Mips::F2, Mips::V0_64, Mips::V1_64 };
861const MCRegister RetCC_MipsO32_ArgRegs[] = { Mips::A0, Mips::A1, Mips::D0, Mips::D0_64, Mips::D1, Mips::D2_64, Mips::F0, Mips::F2, Mips::V0, Mips::V1 };
862
863#endif // GET_CC_REGISTER_LISTS
864
865