1//===-- R600TargetMachine.cpp - TargetMachine for hw codegen targets-------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// This file contains both AMDGPU-R600 target machine and the CodeGen pass
11/// builder. The target machine contains all of the hardware specific
12/// information needed to emit code for R600 GPUs and the CodeGen pass builder
13/// handles the pass pipeline for new pass manager.
14//
15//===----------------------------------------------------------------------===//
16
17#include "R600TargetMachine.h"
18#include "R600.h"
19#include "R600MachineFunctionInfo.h"
20#include "R600MachineScheduler.h"
21#include "R600TargetTransformInfo.h"
22#include "llvm/Passes/CodeGenPassBuilder.h"
23#include "llvm/Transforms/Scalar.h"
24#include <optional>
25
26using namespace llvm;
27
28static cl::opt<bool>
29 EnableR600StructurizeCFG("r600-ir-structurize",
30 cl::desc("Use StructurizeCFG IR pass"),
31 cl::init(Val: true));
32
33static cl::opt<bool> EnableR600IfConvert("r600-if-convert",
34 cl::desc("Use if conversion pass"),
35 cl::ReallyHidden, cl::init(Val: true));
36
37static cl::opt<bool, true> EnableAMDGPUFunctionCallsOpt(
38 "amdgpu-function-calls", cl::desc("Enable AMDGPU function call support"),
39 cl::location(L&: AMDGPUTargetMachine::EnableFunctionCalls), cl::init(Val: true),
40 cl::Hidden);
41
42static ScheduleDAGInstrs *createR600MachineScheduler(MachineSchedContext *C) {
43 return new ScheduleDAGMILive(C, std::make_unique<R600SchedStrategy>());
44}
45
46static MachineSchedRegistry R600SchedRegistry("r600",
47 "Run R600's custom scheduler",
48 createR600MachineScheduler);
49
50//===----------------------------------------------------------------------===//
51// R600 CodeGen Pass Builder interface.
52//===----------------------------------------------------------------------===//
53
54class R600CodeGenPassBuilder
55 : public CodeGenPassBuilder<R600CodeGenPassBuilder, R600TargetMachine> {
56public:
57 R600CodeGenPassBuilder(R600TargetMachine &TM, const CGPassBuilderOption &Opts,
58 PassInstrumentationCallbacks *PIC);
59
60 void addPreISel(PassManagerWrapper &PMW) const;
61 void addAsmPrinterBegin(PassManagerWrapper &PMW,
62 CreateMCStreamer CreateStreamer) const;
63 void addAsmPrinter(PassManagerWrapper &PMW,
64 CreateMCStreamer CreateStreamer) const;
65 void addAsmPrinterEnd(PassManagerWrapper &PMW,
66 CreateMCStreamer CreateStreamer) const;
67 Error addInstSelector(PassManagerWrapper &PMW) const;
68};
69
70//===----------------------------------------------------------------------===//
71// R600 Target Machine (R600 -> Cayman)
72//===----------------------------------------------------------------------===//
73
74R600TargetMachine::R600TargetMachine(const Target &T, const Triple &TT,
75 StringRef CPU, StringRef FS,
76 const TargetOptions &Options,
77 std::optional<Reloc::Model> RM,
78 std::optional<CodeModel::Model> CM,
79 CodeGenOptLevel OL, bool JIT)
80 : AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {
81 setRequiresStructuredCFG(true);
82
83 // Override the default since calls aren't supported for r600.
84 if (EnableFunctionCalls &&
85 EnableAMDGPUFunctionCallsOpt.getNumOccurrences() == 0)
86 EnableFunctionCalls = false;
87}
88
89const TargetSubtargetInfo *
90R600TargetMachine::getSubtargetImpl(const Function &F) const {
91 StringRef GPU = getGPUName(F);
92 StringRef FS = getFeatureString(F);
93
94 SmallString<128> SubtargetKey(GPU);
95 SubtargetKey.append(RHS: FS);
96
97 auto &I = SubtargetMap[SubtargetKey];
98 if (!I) {
99 // This needs to be done before we create a new subtarget since any
100 // creation will depend on the TM and the code generation flags on the
101 // function that reside in TargetOptions.
102 resetTargetOptions(F);
103 I = std::make_unique<R600Subtarget>(args: TargetTriple, args&: GPU, args&: FS, args: *this);
104 }
105
106 return I.get();
107}
108
109TargetTransformInfo
110R600TargetMachine::getTargetTransformInfo(const Function &F) const {
111 return TargetTransformInfo(std::make_unique<R600TTIImpl>(args: this, args: F));
112}
113
114ScheduleDAGInstrs *
115R600TargetMachine::createMachineScheduler(MachineSchedContext *C) const {
116 return createR600MachineScheduler(C);
117}
118
119namespace {
120class R600PassConfig final : public AMDGPUPassConfig {
121public:
122 R600PassConfig(TargetMachine &TM, PassManagerBase &PM)
123 : AMDGPUPassConfig(TM, PM) {}
124
125 bool addPreISel() override;
126 bool addInstSelector() override;
127 void addPreRegAlloc() override;
128 void addPreSched2() override;
129 void addPreEmitPass() override;
130};
131} // namespace
132
133//===----------------------------------------------------------------------===//
134// R600 Pass Setup
135//===----------------------------------------------------------------------===//
136
137bool R600PassConfig::addPreISel() {
138 AMDGPUPassConfig::addPreISel();
139
140 if (EnableR600StructurizeCFG)
141 addPass(P: createStructurizeCFGPass());
142 return false;
143}
144
145bool R600PassConfig::addInstSelector() {
146 addPass(P: createR600ISelDag(TM&: getAMDGPUTargetMachine(), OptLevel: getOptLevel()));
147 return false;
148}
149
150void R600PassConfig::addPreRegAlloc() { addPass(P: createR600VectorRegMerger()); }
151
152void R600PassConfig::addPreSched2() {
153 addPass(P: createR600EmitClauseMarkers());
154 if (EnableR600IfConvert)
155 addPass(PassID: &IfConverterID);
156 addPass(P: createR600ClauseMergePass());
157}
158
159void R600PassConfig::addPreEmitPass() {
160 addPass(P: createR600MachineCFGStructurizerPass());
161 addPass(P: createR600ExpandSpecialInstrsPass());
162 addPass(P: createR600Packetizer());
163 addPass(P: createR600ControlFlowFinalizer());
164}
165
166TargetPassConfig *R600TargetMachine::createPassConfig(PassManagerBase &PM) {
167 return new R600PassConfig(*this, PM);
168}
169
170Error R600TargetMachine::buildCodeGenPipeline(
171 ModulePassManager &MPM, raw_pwrite_stream &Out, raw_pwrite_stream *DwoOut,
172 CodeGenFileType FileType, const CGPassBuilderOption &Opts, MCContext &Ctx,
173 PassInstrumentationCallbacks *PIC) {
174 R600CodeGenPassBuilder CGPB(*this, Opts, PIC);
175 return CGPB.buildPipeline(MPM, Out, DwoOut, FileType, Ctx);
176}
177
178MachineFunctionInfo *R600TargetMachine::createMachineFunctionInfo(
179 BumpPtrAllocator &Allocator, const Function &F,
180 const TargetSubtargetInfo *STI) const {
181 return R600MachineFunctionInfo::create<R600MachineFunctionInfo>(
182 Allocator, F, STI: static_cast<const R600Subtarget *>(STI));
183}
184
185//===----------------------------------------------------------------------===//
186// R600 CodeGen Pass Builder interface.
187//===----------------------------------------------------------------------===//
188
189R600CodeGenPassBuilder::R600CodeGenPassBuilder(
190 R600TargetMachine &TM, const CGPassBuilderOption &Opts,
191 PassInstrumentationCallbacks *PIC)
192 : CodeGenPassBuilder(TM, Opts, PIC) {
193 Opt.RequiresCodeGenSCCOrder = true;
194}
195
196void R600CodeGenPassBuilder::addPreISel(PassManagerWrapper &PMW) const {
197 // TODO: Add passes pre instruction selection.
198}
199
200void R600CodeGenPassBuilder::addAsmPrinterBegin(
201 PassManagerWrapper &PMW, CreateMCStreamer CreateStreamer) const {
202 // TODO: Add AsmPrinterBegin
203}
204
205void R600CodeGenPassBuilder::addAsmPrinter(
206 PassManagerWrapper &PMW, CreateMCStreamer CreateStreamer) const {
207 // TODO: Add AsmPrinter.
208}
209
210void R600CodeGenPassBuilder::addAsmPrinterEnd(
211 PassManagerWrapper &PMW, CreateMCStreamer CreateStreamer) const {
212 // TODO: Add AsmPrinterEnd
213}
214
215Error R600CodeGenPassBuilder::addInstSelector(PassManagerWrapper &PMW) const {
216 // TODO: Add instruction selector.
217 return Error::success();
218}
219