1//===-- R600TargetMachine.cpp - TargetMachine for hw codegen targets-------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9/// \file
10/// This file contains both AMDGPU-R600 target machine and the CodeGen pass
11/// builder. The target machine contains all of the hardware specific
12/// information needed to emit code for R600 GPUs and the CodeGen pass builder
13/// handles the pass pipeline for new pass manager.
14//
15//===----------------------------------------------------------------------===//
16
17#include "R600TargetMachine.h"
18#include "R600.h"
19#include "R600MachineFunctionInfo.h"
20#include "R600MachineScheduler.h"
21#include "R600TargetTransformInfo.h"
22#include "llvm/Passes/CodeGenPassBuilder.h"
23#include "llvm/Transforms/Scalar.h"
24#include <optional>
25
26using namespace llvm;
27
28static cl::opt<bool>
29 EnableR600StructurizeCFG("r600-ir-structurize",
30 cl::desc("Use StructurizeCFG IR pass"),
31 cl::init(Val: true));
32
33static cl::opt<bool> EnableR600IfConvert("r600-if-convert",
34 cl::desc("Use if conversion pass"),
35 cl::ReallyHidden, cl::init(Val: true));
36
37static cl::opt<bool, true> EnableAMDGPUFunctionCallsOpt(
38 "amdgpu-function-calls", cl::desc("Enable AMDGPU function call support"),
39 cl::location(L&: AMDGPUTargetMachine::EnableFunctionCalls), cl::init(Val: true),
40 cl::Hidden);
41
42static ScheduleDAGInstrs *createR600MachineScheduler(MachineSchedContext *C) {
43 return new ScheduleDAGMILive(C, std::make_unique<R600SchedStrategy>());
44}
45
46static MachineSchedRegistry R600SchedRegistry("r600",
47 "Run R600's custom scheduler",
48 createR600MachineScheduler);
49
50//===----------------------------------------------------------------------===//
51// R600 CodeGen Pass Builder interface.
52//===----------------------------------------------------------------------===//
53
54class R600CodeGenPassBuilder
55 : public CodeGenPassBuilder<R600CodeGenPassBuilder, R600TargetMachine> {
56public:
57 R600CodeGenPassBuilder(R600TargetMachine &TM, const CGPassBuilderOption &Opts,
58 PassInstrumentationCallbacks *PIC);
59
60 void addPreISel(PassManagerWrapper &PMW) const;
61 void addAsmPrinterBegin(PassManagerWrapper &PMW) const;
62 void addAsmPrinter(PassManagerWrapper &PMW) const;
63 void addAsmPrinterEnd(PassManagerWrapper &PMW) const;
64 Error addInstSelector(PassManagerWrapper &PMW) const;
65};
66
67//===----------------------------------------------------------------------===//
68// R600 Target Machine (R600 -> Cayman)
69//===----------------------------------------------------------------------===//
70
71R600TargetMachine::R600TargetMachine(const Target &T, const Triple &TT,
72 StringRef CPU, StringRef FS,
73 const TargetOptions &Options,
74 std::optional<Reloc::Model> RM,
75 std::optional<CodeModel::Model> CM,
76 CodeGenOptLevel OL, bool JIT)
77 : AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {
78 setRequiresStructuredCFG(true);
79
80 // Override the default since calls aren't supported for r600.
81 if (EnableFunctionCalls &&
82 EnableAMDGPUFunctionCallsOpt.getNumOccurrences() == 0)
83 EnableFunctionCalls = false;
84}
85
86const TargetSubtargetInfo *
87R600TargetMachine::getSubtargetImpl(const Function &F) const {
88 StringRef GPU = getGPUName(F);
89 StringRef FS = getFeatureString(F);
90
91 SmallString<128> SubtargetKey(GPU);
92 SubtargetKey.append(RHS: FS);
93
94 auto &I = SubtargetMap[SubtargetKey];
95 if (!I)
96 I = std::make_unique<R600Subtarget>(args: TargetTriple, args&: GPU, args&: FS, args: *this);
97
98 return I.get();
99}
100
101TargetTransformInfo
102R600TargetMachine::getTargetTransformInfo(const Function &F) const {
103 return TargetTransformInfo(std::make_unique<R600TTIImpl>(args: this, args: F));
104}
105
106ScheduleDAGInstrs *
107R600TargetMachine::createMachineScheduler(MachineSchedContext *C) const {
108 return createR600MachineScheduler(C);
109}
110
111namespace {
112class R600PassConfig final : public AMDGPUPassConfig {
113public:
114 R600PassConfig(TargetMachine &TM, PassManagerBase &PM)
115 : AMDGPUPassConfig(TM, PM) {}
116
117 bool addPreISel() override;
118 bool addInstSelector() override;
119 void addPreRegAlloc() override;
120 void addPreSched2() override;
121 void addPreEmitPass() override;
122};
123} // namespace
124
125//===----------------------------------------------------------------------===//
126// R600 Pass Setup
127//===----------------------------------------------------------------------===//
128
129bool R600PassConfig::addPreISel() {
130 AMDGPUPassConfig::addPreISel();
131
132 if (EnableR600StructurizeCFG)
133 addPass(P: createStructurizeCFGPass());
134 return false;
135}
136
137bool R600PassConfig::addInstSelector() {
138 addPass(P: createR600ISelDag(TM&: getAMDGPUTargetMachine(), OptLevel: getOptLevel()));
139 return false;
140}
141
142void R600PassConfig::addPreRegAlloc() { addPass(P: createR600VectorRegMerger()); }
143
144void R600PassConfig::addPreSched2() {
145 addPass(P: createR600EmitClauseMarkers());
146 if (EnableR600IfConvert)
147 addPass(PassID: &IfConverterID);
148 addPass(P: createR600ClauseMergePass());
149}
150
151void R600PassConfig::addPreEmitPass() {
152 addPass(P: createR600MachineCFGStructurizerPass());
153 addPass(P: createR600ExpandSpecialInstrsPass());
154 addPass(P: createR600Packetizer());
155 addPass(P: createR600ControlFlowFinalizer());
156}
157
158TargetPassConfig *R600TargetMachine::createPassConfig(PassManagerBase &PM) {
159 return new R600PassConfig(*this, PM);
160}
161
162Error R600TargetMachine::buildCodeGenPipeline(
163 ModulePassManager &MPM, ModuleAnalysisManager &MAM, raw_pwrite_stream &Out,
164 raw_pwrite_stream *DwoOut, CodeGenFileType FileType,
165 const CGPassBuilderOption &Opts, MCContext &Ctx,
166 PassInstrumentationCallbacks *PIC) {
167 R600CodeGenPassBuilder CGPB(*this, Opts, PIC);
168 return CGPB.buildPipeline(MPM, MAM, Out, DwoOut, FileType, Ctx);
169}
170
171MachineFunctionInfo *R600TargetMachine::createMachineFunctionInfo(
172 BumpPtrAllocator &Allocator, const Function &F,
173 const TargetSubtargetInfo *STI) const {
174 return R600MachineFunctionInfo::create<R600MachineFunctionInfo>(
175 Allocator, F, STI: static_cast<const R600Subtarget *>(STI));
176}
177
178//===----------------------------------------------------------------------===//
179// R600 CodeGen Pass Builder interface.
180//===----------------------------------------------------------------------===//
181
182R600CodeGenPassBuilder::R600CodeGenPassBuilder(
183 R600TargetMachine &TM, const CGPassBuilderOption &Opts,
184 PassInstrumentationCallbacks *PIC)
185 : CodeGenPassBuilder(TM, Opts, PIC) {
186 Opt.RequiresCodeGenSCCOrder = true;
187}
188
189void R600CodeGenPassBuilder::addPreISel(PassManagerWrapper &PMW) const {
190 // TODO: Add passes pre instruction selection.
191}
192
193void R600CodeGenPassBuilder::addAsmPrinterBegin(PassManagerWrapper &PMW) const {
194 // TODO: Add AsmPrinterBegin
195}
196
197void R600CodeGenPassBuilder::addAsmPrinter(PassManagerWrapper &PMW) const {
198 // TODO: Add AsmPrinter.
199}
200
201void R600CodeGenPassBuilder::addAsmPrinterEnd(PassManagerWrapper &PMW) const {
202 // TODO: Add AsmPrinterEnd
203}
204
205Error R600CodeGenPassBuilder::addInstSelector(PassManagerWrapper &PMW) const {
206 // TODO: Add instruction selector.
207 return Error::success();
208}
209